LED backlight driving method for realizing variable refresh rate and image black insertion display simultaneously

Abstract

The present invention discloses an LED backlight driving method for realizing variable refresh rate and image black insertion display at the same time, wherein the LED backlight component is divided into a plurality of backlight partitions, each of which corresponds to a pixel partition of a display panel; when the display panel is displayed at a first refresh rate, the vertical synchronization signal period T of each backlight partition is divided into a black insertion time period T1, a frame display time period T2 and a brightness balance time period T3; each time period uses a different LED current to drive the LED to emit light; when the display panel is displayed at a second refresh rate less than the first refresh rate, the vertical synchronization signal period T' of each backlight partition is divided into a black insertion time period T'1, a frame display time period T'2 and a brightness balance time period T'3; and relative to the black insertion time period T1, the frame display time period T2 and the brightness balance time period T3, at least one of the time periods is lengthened.

Description

Technical Field

[0001] The present invention relates to the field of image display technology, and in particular to an LED backlight driving method for realizing variable refresh rate and image black insertion display simultaneously. Background Art

[0002] Every time a liquid crystal display (LCD) refreshes and displays a frame of image, the liquid crystal molecules must be flipped. The high refresh rate will cause users to see blurry images when playing fast dynamic images, affecting the customer experience. The traditional black frame insertion technology (BFI) refers to inserting a black frame between two normal frames to cover up the gray residual image of the picture to eliminate the ghosting and improve people's viewing experience. The traditional black frame insertion method requires the response time of the LCD to be fast enough, otherwise the inserted black frame will be easily detected by the human eye and flicker will occur.

[0003] Variable Refresh Rate (VRR) is a new technology for display panels that allows the refresh rate of the display panel to adaptively change based on the current processing speed of the video provider such as the graphics processing unit (GPU). This avoids some visual effect problems such as tearing effect and image retention when the GPU cannot output image frames in time. The variable refresh rate display gives the user a better experience, especially for game players. The variable refresh rate signal makes the game screen texture higher and can reduce or eliminate the problems of screen lag, freeze and frame tearing. Based on the characteristics of the above-mentioned BFI technology and VRR technology, in the prior art, it becomes difficult to obtain a better display effect by implementing black insertion technology under a variable refresh rate display panel. In the synchronous backlight control scheme, the backlight control signal is synchronized with the vertical synchronization signal (Vsync) of the input image. The vertical synchronization signal is a pulse signal added between two frames, which indicates the end of the previous frame and the beginning of the new frame, that is, the frequency of the vertical synchronization signal is consistent with the picture refresh rate. Therefore, since the length of the frame period (that is, the period of the vertical synchronization signal Vsync) is variable, performing BFI in different frame periods will make the backlight partition current of the backlight control signal inconsistent, and the continuously changing backlight partition current will produce backlight flicker, which will make the user feel that the image is flickering. Therefore, implementing black insertion technology under variable refresh rate will not only cause the brightness reduction caused by the black insertion technology itself, but also easily cause backlight flicker.

[0004] It can be seen that a new LED backlight control technology is needed in the prior art, so that the black insertion technology can be implemented simultaneously under a variable refresh rate and a better display effect can be obtained, that is, the image can be kept at a high brightness while avoiding backlight flickering. Summary of the invention

[0005] The technical purpose to be achieved by the present invention is to provide an LED backlight component and a control method suitable for realizing image black insertion under variable refresh rate. Based on the LED backlight component and the backlight control method, it is possible to implement black insertion technology simultaneously under variable refresh rate and obtain better display effect, that is, it is possible to maintain the image with a high brightness while avoiding backlight flickering.

[0006] Based on the above technical objectives, the present invention provides an LED backlight driving method for realizing variable refresh rate and image black insertion display at the same time, and the LED backlight driving method comprises:

[0007] Dividing the LED backlight assembly into a plurality of backlight partitions, each backlight partition corresponds to a pixel partition of the display panel, and each pixel partition contains a plurality of rows of pixels;

[0008] When the display panel displays at the first refresh rate, the vertical synchronization signal period T of each backlight partition is divided into a black insertion period T1, a frame display period T2 and a brightness balance period T3;

[0009] The LED driving current in the black insertion period T1 is a first current value I1, the LED driving current in the frame display period T2 is a second current value I2, and the LED driving current in the brightness balance period T3 is set to a third current value I3;

[0010] The second current value is the frame current value I of the frame display picture. Led ; The first current value I1 is set to be smaller than the second current value I2 in the frame display period T2;

[0011] The third current value I3 in the brightness balance time period T3 is related to the frame average current value in the vertical synchronization signal period T or the current value corresponding to the average brightness in the vertical synchronization signal period T;

[0012] When the display panel displays at a second refresh rate lower than the first refresh rate, the vertical synchronization signal period T' of each backlight partition is divided into a black insertion period T'1, a frame display period T'2 and a brightness balance period T'3;

[0013] Moreover, relative to the black insertion time period T1, the frame display time period T2 and the brightness balance time period T3, at least one of the black insertion time period T'1, the frame display time period T'2 and the brightness balance time period T'3 is prolonged.

[0014] In one embodiment, the first current value I1 of each backlight partition satisfies: the first current value I1 is set to be greater than zero and less than the second current value I2; and the first current value I1 is less than a first threshold; the first threshold is 1 / 2, 1 / 4, 1 / 16, 1 / 32, 1 / 64 or 1 / 128 of the current value corresponding to the highest brightness.

[0015] In one embodiment, the first threshold is 1 / 2, 1 / 4, 1 / 16, 1 / 32, 1 / 64 or 1 / 128 of the current value corresponding to the highest brightness.

[0016] In one embodiment, the third current value I3 in the brightness balance period T3 ranges from the frame average current value I avg ±current floating value ΔI, and the frame average current I avg It is expressed as:

[0017]

[0018] In one embodiment, the current floating value ΔI is the frame average current I avg 10%, 15% or 20% of the total.

[0019] In one embodiment, the third current value I3 in the brightness balance period T3 has a value range of the current value I corresponding to the frame average brightness. avg1 ±Current floating value ΔI.

[0020] In one embodiment, the current floating value ΔI is the current value I corresponding to the average brightness of the frame. avg1 10%, 15% or 20% of the total.

[0021] In one embodiment, the duration of the black insertion time period T'1 at the second refresh rate is the same as the duration of the black insertion time period T1 at the first refresh rate, and the length of the frame display time period T'2 at the second refresh rate is the same as the length of the frame display time period T2 at the first refresh rate.

[0022] In one embodiment, when the display panel is at the first refresh rate, the corresponding black insertion time period T1, frame display time period T2 and brightness balance time period T3 in different backlight partitions can be set to different durations.

[0023] Compared with the prior art, one or more embodiments of the present invention may have the following advantages:

[0024] The present invention implements the screen black insertion technology under the variable refresh rate state by controlling the LED current in different time periods within the vertical synchronization signal cycle, while ensuring the brightness of the displayed screen is stable and the backlight is flicker-free.

[0025] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0027] Figure 1 It is a schematic diagram of the LED backlight partition structure of the present invention;

[0028] Figure 2 It is a corresponding schematic diagram of the LED backlight partition and the liquid crystal pixel partition of the present invention;

[0029] Figure 3 is a timing diagram of the LED backlight partition control method in the first embodiment of the present invention at the first refresh rate;

[0030] Figure 4 is a timing diagram of the LED backlight partition control method in the first embodiment of the present invention at the second refresh rate;

[0031] Figure 5 is a timing diagram of the LED backlight partition control method in the second embodiment of the present invention at the second refresh rate;

[0032] Figure 6 It is a timing diagram of the LED backlight partition control method in the third embodiment of the present invention at the first refresh rate. DETAILED DESCRIPTION

[0033] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below with reference to the accompanying drawings.

[0034] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present invention necessarily has the first element, component, region, layer or part.

[0035] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0036] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0037] Example 1

[0038] like Figure 1As shown, the LED backlight assembly of the present invention is divided into n rows of backlight partitions according to the requirements of the present invention, which are synchronized with the refresh direction of the display panel image signal, from top to bottom, the 1st row of backlight partitions, the 2nd row of backlight partitions to the bottom nth row of backlight partitions. The value of n can be determined according to the requirements of LED backlight control, that is, the higher n is, the more backlight partitions there are, the more accurate the LED backlight control is, and the higher the component cost is.

[0039] like Figure 2 As shown, the LED backlight assembly of the present invention is arranged below the liquid crystal panel, and each backlight partition corresponds to a pixel partition of the liquid crystal panel, and the pixel partition contains multiple rows of liquid crystal pixels. For example, the pixel resolution of the liquid crystal panel is 2560×1440, that is, 2K resolution, and the number of backlight partitions is n=40 rows, then the number of liquid crystal pixel rows corresponding to each backlight partition is 1440 / 40=36, that is, the first row of backlight partitions corresponds to the first 36 rows of liquid crystal pixels, the second row of backlight partitions corresponds to the second 36 rows of liquid crystal pixels, and so on.

[0040] According to the characteristics of the liquid crystal panel, in the liquid crystal partitioning mode of this embodiment, when displaying a frame of the image, all rows of liquid crystal pixels in each pixel partition must perform liquid crystal flipping, and the time consumed is the same. That is, if in a pixel partition, the time from the first row of liquid crystal pixels starting to flip to the last row of liquid crystal pixels in the pixel partition is t, if the above 2K resolution and 40 backlight partitions are still used as an example, that is, in a pixel partition, the time from the first row of liquid crystal pixels starting to flip to the 36th row of liquid crystal pixels flipping is t. In the present invention, the t value in all backlight partitions is the same.

[0041] The present invention achieves the black insertion effect of displaying the picture by setting a black insertion time period within the Vsync signal cycle T, so as to improve the picture flicker. At the same time, outside the black insertion time period and the frame display time period for frame picture display, a brightness balance time period is set, and the brightness consistency of pixels in the pixel partition is adjusted through the brightness balance time period to further improve the picture flicker caused by the brightness change caused by the change of the Vsync signal cycle T caused by the black insertion and the refresh rate change. In order to achieve this technical purpose, this embodiment provides the following LED backlight control method.

[0042] like Figure 3As shown, when the display panel operates at the first refresh rate, the period of the vertical synchronization signal Vsync is T. In this embodiment, the first refresh rate is the highest refresh rate among the variable refresh rates of the display panel, and can also be the highest refresh rate designed by the pixel driving system of the display panel (that is, higher than the highest refresh rate that the display panel can achieve in actual use). For example, the variable refresh rate setting of the display panel includes multiple options such as 180Hz, 165Hz, 144Hz, 120Hz, 75Hz, and 60Hz, then the first refresh rate described in this embodiment refers to 180Hz. Accordingly, the period of the vertical synchronization signal Vsync at the first refresh rate is T, which is also the minimum value under multiple refresh rates.

[0043] In this embodiment, within the vertical synchronization signal Vsync period T at the first refresh rate, the vertical synchronization signal period T of each backlight partition is set to a black insertion period T1, a frame display period T2 and a brightness balance period T3. And T1+T2+T3=T.

[0044] The duration of the black insertion time period T1 and the frame display time period T2 in the present invention can be adjusted according to the actual needs of the flip time and refresh rate of the liquid crystal, but the black insertion time period cannot be too short to ensure the black insertion effect, and when the black insertion time period is set to be longer, the current value of the frame display time period needs to be increased accordingly to ensure that the average current of the black time period T1 and the frame display time period T2 meets the brightness requirements of the picture to be displayed. For example, the black insertion time period T1 is set to the time when the liquid crystal flips from 10% to 90%, and the frame display time period T2 can be set to a fixed duration, such as 1ms.

[0045] In this embodiment, the current values ​​in the black insertion time period T1, the frame display time period T2 and the brightness balance time period T3 are set as follows:

[0046] The LED driving current in the black insertion period T1 is a first current value I1, the LED driving current in the frame display period T2 is a second current value I2, and the LED driving current in the brightness balance period T3 is set to a third current value I3.

[0047] In the present invention, the second current value is the frame current value I of the frame display picture. Led In this embodiment, in order to achieve black insertion in the black insertion time period T1, the first current value I1 needs to be set to be smaller than the second current value I2 in the frame display time period T2, so as to achieve the black insertion effect. In this embodiment, the first current value I1 satisfies the following two conditions at the same time:

[0048] 1. The first current value I1 is set to be greater than zero and less than the second current value I2;

[0049] 2. The first current value I1 is set to be less than a first threshold value; the first threshold value is 1 / 2, 1 / 4, 1 / 16, 1 / 32, 1 / 64 or 1 / 128 of the current value corresponding to the highest brightness.

[0050] In the present invention, the first threshold can be set as small as possible under the premise of being non-zero, that is, the closer the first threshold is to zero and the first current value I1 is to zero, the closer the brightness of the LED during the black insertion period is to a pure black screen, and the better the black insertion effect is.

[0051] By setting the first current value I1 as described above, the LED backlight is avoided from being completely turned off during the black insertion period, the LED element is avoided from switching between the on and off states, and the switching between the on and off states of the control transistor corresponding to the LED element is reduced, thereby avoiding the screen flicker that is noticeable to the human eye.

[0052] The third current value I3 in the brightness balance period T3 has a value range of the frame average current value I avg ± the first current floating value ΔI1, that is, the value range of the third current I3 is [I avg -ΔI1,I avg +ΔI1], the frame average current I avg It is expressed as:

[0053]

[0054] The first current floating value ΔI1 is the frame average current I avg 10%, 15%, 20% of.

[0055] In this embodiment, the value range of the third current value I3 can also be set to the current value I corresponding to the frame average brightness. avg1 ± a second current floating value ΔI2, where the second current floating value ΔI2 is the current value I corresponding to the average brightness of the frame avg1 10%, 15%, 20% of.

[0056] In the present invention, for different backlight partitions, the black insertion time period T1 can be configured to be divided into a plurality of sub-time periods, such as Figure 3 As shown in the second backlight partition or the third backlight partition, the black insertion time period T1 includes a black insertion first sub-time period T 11 And the second black sub-time period T 12 . And there is T 11 +T 12 =T1. Of course, in this embodiment, the black insertion time period T1 is divided into the first black insertion sub-time period T 11 And the second black sub-time period T 12The two sub-time periods are only one implementation mode, and the present invention can further divide the black insertion time period T1 into more sub-time periods according to actual needs, and distribute them in different time segments within the Vsycn cycle T. Similarly, the frame display time period T2 or the brightness balance time period T3 can also be divided into multiple segments in the present invention.

[0057] After the liquid crystal molecules are flipped, the backlight LED is turned on to display the picture. At this time, the input current of the backlight LED is the frame current I determined by the display data of the frame. Led .

[0058] It should be noted that, at the first refresh rate, the flipping cutoff time of the nth pixel partition does not necessarily end when the next frame Vsync comes; the cutoff time of the nth pixel partition will exceed the next frame Vsync at a high refresh rate. It can be understood that when the picture is output continuously, there is a delay between the Vsync signal and the actual picture output.

[0059] like Figure 4 As shown, in this embodiment, the vertical synchronization signal Vsync period T' at the second refresh rate (not the highest refresh rate) is also set to include: black insertion period T'1, frame display period T'2 and brightness balance period T'3. And T'1+T'2+T'3=T'.

[0060] In this embodiment, the duration of the black insertion time period T'1 at the second refresh rate is the same as the duration of the black insertion time period T1 at the first refresh rate, and the duration of the frame display time period T'2 at the second refresh rate is the same as the duration of the frame display time period T2 at the first refresh rate. The brightness balance time period T'3 at the second refresh rate is greater than the brightness balance time period T3 at the first refresh rate, that is, T'-T=T'3-T3.

[0061] In this embodiment, the current values ​​of the black insertion time period T'1, the frame display time period T'2 and the brightness balance time period T'3 under the second refresh rate (non-highest refresh rate) are set in the same manner as the current values ​​of each time period under the first refresh rate, that is:

[0062] The second current value I'2 corresponding to the frame display time period T'2 at the second refresh rate is the frame current value I' of the frame display picture. Led The black insertion is realized in the black insertion time period T'1 at the second refresh rate. The first current value I'1 in the black insertion time period T'1 at the second refresh rate also needs to be set to be smaller than the second current value I'2 corresponding to the frame display time period T'2 at the second refresh rate, so as to realize the black insertion effect. In this embodiment, the first current value I'1 at the second refresh rate satisfies the following two conditions at the same time:

[0063] 1. The first current value I'1 at the second refresh rate is set to be greater than zero and less than the second current value I'2 at the second refresh rate;

[0064] 2. The first current value I'1 at the second refresh rate is set to be less than a first threshold; the first threshold is 1 / 2, 1 / 4, 1 / 16, 1 / 32, 1 / 64 or 1 / 128 of the current value corresponding to the highest brightness.

[0065] The third current value I'3 in the brightness balance time period T'3 is in the range of the frame average current value I' at the second refresh rate. avg ± the first current floating value ΔI'1, that is, the value range of the third current I3 is [I avg -ΔI'1,I avg +ΔI'1], the frame average current I' avg It is expressed as:

[0066]

[0067] The first current floating value ΔI'1 is the frame average current I' avg 10%, 15%, 20% of.

[0068] In this embodiment, the value range of the third current value I'3 can also be set to the current value I' corresponding to the frame average brightness. avg1 ± the second current floating value ΔI'2, where the second current floating value ΔI'2 is the current value I' corresponding to the average brightness of the frame avg1 10%, 15%, 20% of.

[0069] In this embodiment, when the refresh rate of the display panel changes from the first refresh rate to the second refresh rate, since the Vsycn cycle is lengthened, this embodiment achieves brightness balance at a low refresh rate by correspondingly lengthening the duration of the brightness balance time period T'3, thereby avoiding flickering of the screen due to brightness changes. However, the present invention can adjust the duration of the black insertion time period T'1, the frame display time period T'2, and the brightness balance time period T'3 at the second refresh rate by other methods, and the specific method is given in the following embodiment.

[0070] In this embodiment, the brightness balance time period at the first refresh rate can be set to zero.

[0071] In this embodiment, the first current value, the second current value or the third current value can also be realized by PWM modulation in the corresponding time period, that is, the first current value, the second current value or the third current value is an equivalent average current value in the corresponding time period.

[0072] Example 2

[0073] This embodiment is a further improvement on the above-mentioned embodiment 1. In this embodiment, Figure 5 As shown, when the display panel is at the second refresh rate, the black insertion time period T'1, frame display time period T'2 and brightness balance time period T'3 at the second refresh rate (not the highest refresh rate) are set to be proportionally enlarged to the black insertion time period T1, frame display time period T2 and brightness balance time period T3 at the first refresh rate. That is, T'1 / T1=T'2 / T2=T'3 / T3.

[0074] Example 3

[0075] This embodiment is a further improvement on the above-mentioned embodiment 1. In this embodiment, Figure 6 As shown, when the display panel is at the first refresh rate, the corresponding black insertion time period T1, frame display time period T2 and brightness balance time period T3 in different backlight partitions can be set to be different, that is, the black insertion time or frame display time in the backlight partition is changed according to the display requirements of different backlight partitions.

[0076] Similarly, in this embodiment, when the display panel switches to display at the second refresh rate, the black insertion time period T'1, frame display time period T'2 and brightness balance time period T'3 of different backlight partitions at the second refresh rate are also set to be different.

[0077] The present invention may be a system, method and / or computer program product at any possible level of integrated technical detail. The computer program product may include a computer-readable storage medium (or multiple media) having computer-readable program instructions thereon for causing a processor to perform various aspects of the present invention.

[0078] A computer readable storage medium may be a tangible device that can retain and store instructions used by an instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer readable storage media includes the following: a portable computer floppy disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device such as a punch card or a raised structure in a groove on which instructions are recorded, and any suitable combination of the above. A computer readable storage medium, as used herein, should not be interpreted as a transient signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted by a wire.

[0079] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a corresponding computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical transmission fibers, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in a computer-readable storage medium within the corresponding computing / processing device.

[0080] The computer-readable program instructions for performing the operation of the present invention may be assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages ​​and process programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer, partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer by any type of network including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., by using the Internet of an Internet service provider). In certain embodiments, the electronic circuit including, for example, a programmable logic circuit, a field programmable gate array (FPGA) or a programmable logic array (PLA) may execute the computer-readable program instructions by utilizing the state information of the computer-readable program instructions to personalize the electronic circuit, thereby performing aspects of the present invention.

[0081] Various aspects of the present invention are described herein with reference to flowcharts and / or block diagrams of methods, devices (systems) and computer program products according to embodiments of the present invention. It is understood that each block of the flowchart illustration and / or block diagram, and the combination of blocks in the flowchart illustration and / or block diagram, can be implemented by computer-readable program instructions.

[0082] These computer-readable program instructions may be provided to a processor of a computer or other programmable data processing device to produce a machine so that the instructions executed by the processor of the computer or other programmable data processing device create instructions for implementing the flowcharts and / or block diagrams. Figure 1 These computer-readable program instructions may also be stored in a computer-readable storage medium capable of booting a computer, a programmable data processing device and / or other device that operates in a specific manner, so that the computer-readable storage medium having the instructions stored therein includes a manufactured product that includes instructions that implement aspects of the functions / actions specified in the flowchart and / or block diagram blocks.

[0083] Computer readable program instructions may also be loaded into a computer, other programmable data processing device, or other device to cause a series of operating steps to be performed on the computer, other programmable devices or other devices for producing a computer-implemented process, so that the instructions executed on the computer, other programmable device or other device implement the functions / actions specified in the flowchart and / or block diagram blocks.

[0084] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the system, method and computer program product according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, segment or portion of an instruction, which includes one or more executable instructions for implementing a specified logical function. In some optional implementations, the functions indicated in the block may occur outside the order indicated in the figure. For example, in fact, two blocks shown in succession can be completed as a step, and depending on the functions involved, they can be executed concurrently, substantially concurrently, in a partially or fully time-overlapping manner, or sometimes these blocks can be executed in reverse order. It will also be noted that each block of the block diagram and / or flowchart illustration, as well as the combination of blocks in the block diagram and / or flowchart illustration, can be implemented by a dedicated hardware-based system that performs a specified function or action or performs a combination of dedicated hardware and computer instructions.

[0085] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, apparatuses (devices) and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0086] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0087] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0088] The above description is only a specific implementation case of the present invention, and the protection scope of the present invention is not limited thereto. Any modification or replacement of the present invention by any technician familiar with the present technology within the technical specifications described in the present invention should be within the protection scope of the present invention.

Claims

1. A method for driving an LED backlight that realizes variable refresh rate and image black insertion display simultaneously, characterized in that: The LED backlight assembly comprises: Dividing the LED backlight assembly into a plurality of backlight partitions, each backlight partition corresponds to a pixel partition of the display panel, and each pixel partition contains a plurality of rows of pixels; When the display panel displays at the first refresh rate, the vertical synchronization signal period T of each backlight partition is divided into a black insertion period T1, a frame display period T2 and a brightness balance period T3; and the black insertion period T1 is set to multiple sub-periods; The LED driving current in the black insertion period T1 is a first current value I1, the LED driving current in the frame display period T2 is a second current value I2, and the LED driving current in the brightness balance period T3 is set to a third current value I3; The second current value is the frame current value I of the frame display picture. Led ; The first current value I1 is set to be smaller than the second current value I2 in the frame display period T2; The third current value I3 in the brightness balance period T3 is related to the frame average current value in the vertical synchronization signal period T or the current value corresponding to the average brightness in the vertical synchronization signal period T; When the display panel displays at a second refresh rate lower than the first refresh rate, the vertical synchronization signal period T' of each backlight partition is divided into a black insertion period T'1, a frame display period T'2 and a brightness balance period T'3; And at least one of the black insertion time period T'1, the frame display time period T'2 and the brightness balance time period T'3 is extended relative to the black insertion time period T1, the frame display time period T2 and the brightness balance time period T3; The first current value I1 at the first refresh rate of each backlight partition satisfies: the first current value I1 at the first refresh rate is set to be greater than zero and less than the second current value I2 at the first refresh rate; and the first current value I1 at the first refresh rate is less than the first threshold; The first current value I1 ′ at the second refresh rate of each backlight partition satisfies the condition that the first current value I1 ′ at the second refresh rate is set to be greater than zero and less than the second current value I2 ′ at the second refresh rate.

2. The LED backlight driving method according to claim 1, characterized in that: The first threshold is 1 / 2, 1 / 4, 1 / 16, 1 / 32, 1 / 64 or 1 / 128 of the current value corresponding to the highest brightness.

3. The LED backlight driving method according to claim 1, characterized in that: The third current value I3 in the brightness balance period T3 has a value range of the frame average current value I avg ±current floating value ΔI, and the frame average current I avg It is expressed as:

4. The LED backlight driving method according to claim 3, characterized in that: The current floating value ΔI is the frame average current I avg 10%, 15% or 20% of the total.

5. The LED backlight driving method according to claim 1, characterized in that: The third current value I3 in the brightness balance time period T3 has a value range of the current value I corresponding to the frame average brightness. avg1 ±Current floating value ΔI.

6. The LED backlight driving method according to claim 5, characterized in that: The current floating value ΔI is the current value I corresponding to the average brightness of the frame avg1 10%, 15% or 20% of the total.

7. The LED backlight driving method according to claim 1, characterized in that: The duration of the black insertion period T'1 at the second refresh rate is the same as the duration of the black insertion period T1 at the first refresh rate, and the duration of the frame display period T'2 at the second refresh rate is the same as the duration of the frame display period T2 at the first refresh rate.

8. The LED backlight driving method according to claim 1, characterized in that: When the display panel is at the first refresh rate, the corresponding black insertion time period T1, frame display time period T2 and brightness balance time period T3 in different backlight partitions can be set to different durations.

9. An LED backlight panel, characterized in that: The LED backlight panel uses the LED backlight driving method as described in any one of claims 1-8 to perform backlight control.

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