Display panel and display device

Abstract

The display panel provided by the embodiments of the present disclosure has a display area and a frame area, the frame area is arranged around the display area, the edge line of the display area is a circular arc line, the edge line of the frame area is a circular arc line, the shape of the edge line of the display area is matched with the shape of the edge line of the frame area, the display panel comprises a peripheral circuit and a peripheral signal line, the peripheral circuit and the peripheral signal line are distributed in the frame area, and the peripheral circuit and the peripheral signal line are sequentially distributed away from the display area, the display panel further comprises an array substrate and a color film substrate, the array substrate and the color film substrate are in a lapping mode, the array substrate and the color film substrate do not overlap at a first side edge, in the frame area outside the first side edge, the width range between the signal line closest to the outer side edge of the frame area in the peripheral signal line and the outer side edge of the frame area is 0.35±0.2 microns, and the outer side edge of the frame area is the side edge of the frame area away from the display area.

Description

Technical Field

[0001] This disclosure pertains to the field of display technology, specifically relating to a display panel and a display device. Background Technology

[0002] With the increasing demand for circular display products in today's society, their design plays a crucial role in LCD product design. However, as the bezel requirements for circular displays become increasingly narrow, it's essential to simultaneously meet the demands of both narrow bezels and sufficient bezel design space. Meeting these requirements necessitates optimized circuit layout design in the bezel area of ​​the circular display. Furthermore, the bezel design itself needs to be as space-efficient as possible to minimize bezel size. Summary of the Invention

[0003] In a first aspect, embodiments of this disclosure provide a display panel having a display area and a border area, the border area surrounding the display area.

[0004] The edge line of the display area is an arc; the edge line of the border area is an arc; the shape of the edge line of the display area matches that of the edge line of the border area.

[0005] The display panel includes peripheral circuits and peripheral signal lines, which are distributed in the frame area and are distributed sequentially away from the display area.

[0006] The display panel further includes an array substrate and a color filter substrate, wherein the array substrate and the color filter substrate are paired.

[0007] The array substrate and the color filter substrate do not overlap at the first side edge;

[0008] In the border area outside the first side edge, the width range between the outermost signal line closest to the outer edge of the border area and the outer edge of the border area is 0.35 ± 0.2 micrometers.

[0009] The outer edge of the border area is the side edge of the border area that is away from the display area.

[0010] In some embodiments, the display area is circular; the display area is located in the overlapping area of ​​the orthographic projection of the array substrate and the color filter substrate;

[0011] The border area includes a first portion, which is located on a second side of the array substrate and the color filter substrate of the cell, and the second side is opposite to the first side;

[0012] The edge line of the first part is a semi-circular arc, and the center of the semi-circular arc coincides with the center of the semi-circular edge line of the display area located on the second side.

[0013] In some embodiments, the first portion includes a first sub-portion and a second sub-portion, the first sub-portion being located on the side of the display area away from the first side; the second sub-portion being disposed on opposite side edges of the display area along a second direction;

[0014] The first and second sides of the array substrate and the color filter substrate of the cell are arranged in a first direction; the second direction is perpendicular to the first direction.

[0015] The peripheral circuit includes a shift register circuit, and the peripheral signal line includes a first signal line connected to the shift register circuit;

[0016] The shift register circuit and the first signal line are not distributed within the first subsection;

[0017] Part of the shift register circuit and part of the first signal line are distributed within the second subsection;

[0018] The total width of the shift register circuit and the first signal line distributed at any position within the second subsection is equal.

[0019] In some embodiments, the width of the first portion ranges from 1.0 to 2.7 mm.

[0020] In some embodiments, the border area further includes a second portion and a third portion, the second portion and the third portion being located on the first side of the array substrate and the color filter substrate of the cell, and the second portion and the third portion being arranged sequentially along a first direction away from the first portion;

[0021] The second portion is located on opposite sides of the display area along the second direction;

[0022] The third part is located at the first side edge of the display area;

[0023] The peripheral signal lines also include data lines. The data lines, a portion of the shift register circuit, and a portion of the first signal lines are distributed within the second and third portions, and the data lines and the shift register circuit are distributed sequentially away from the display area.

[0024] The total width of the shift register circuit and the first signal line distributed at any position within the second part is equal.

[0025] In some embodiments, the width of the data line within the second portion gradually increases from one end of the second portion near the first portion to one end of the second portion near the third portion.

[0026] In some embodiments, the distribution area from the second part to the third part, the distribution width of the data line in the second part gradually increases to the distribution width of the data line in the third part.

[0027] In some embodiments, the width of the second portion gradually increases along the distribution direction from the second portion to the third portion.

[0028] In some embodiments, the width of the second portion ranges from 1.5 to 3.2 mm.

[0029] In some embodiments, the peripheral circuit further includes a driving circuit, a bonding connection terminal, an electrostatic discharge circuit, and a shielded grounding electrode;

[0030] The peripheral signal lines also include test signal line groups, common voltage signal lines, and shielded signal lines;

[0031] The driving circuit, the bonding connection terminal, the electrostatic discharge circuit, the shielded grounding electrode, and the test signal line group are distributed within the third part;

[0032] The bonding connection terminal and the test signal line group are respectively connected to the driving circuit; the shielded signal line is connected to the shielded ground electrode and the bonding connection terminal; the common voltage signal line is connected to the shift register circuit and the electrostatic discharge circuit.

[0033] The shielded signal line and the common voltage signal line extend from the third part to the second part and the first part, respectively, and the shielded signal line and the common voltage signal line each wrap around the display area once;

[0034] The common voltage signal line is located in the area between the display area and the shift register circuit;

[0035] The peripheral circuits and other peripheral signal lines distributed in the frame area are located in the area between the shielded signal line and the display area.

[0036] In some embodiments, the width of the third portion gradually decreases along the second direction in the direction away from the second portion.

[0037] In some embodiments, the bonding connection end is located on the side of the driving circuit opposite to the display area;

[0038] The data lines distributed within the third part are located on the side of the driving circuit closer to the display area;

[0039] The electrostatic discharge circuit is located on opposite sides of the data line distribution area along the second direction;

[0040] The shielding ground electrode is located on at least one side of the driving circuit along the second direction, and the shielding ground electrode is located on the side of the shift register circuit opposite to the display area;

[0041] The data lines in the third part are arranged in a fan shape or an inverted trapezoidal shape;

[0042] The third part is fan-shaped or inverted trapezoidal.

[0043] In some embodiments, the width of the third portion along the second direction ranges from 10 to 12 mm.

[0044] In some embodiments, the width of the third portion along the direction away from the display area ranges from 3.0 to 3.5 mm.

[0045] In some embodiments, the bonding connection includes a plurality of terminals, which are arranged sequentially at intervals along the second direction; the first and last terminals are grounded.

[0046] One end of the shielded signal line is connected to the first terminal and extends to the shielded ground electrode, and extends from the shielded ground electrode to the outside of the shift register circuit away from the display area. The other end of the shielded signal line is connected to the last terminal.

[0047] In some embodiments, the bonding connection includes a plurality of terminals, which are arranged sequentially at intervals along the second direction; the first and last terminals are grounded.

[0048] One end of the shielded signal line is connected to the first terminal and extends within the third part to the outer side of the shift register circuit away from the display area and the inner side of the shielded ground electrode near the display area. The shielded signal line is connected to the shielded ground electrode and extends from the shielded ground electrode to the second part and the first part, wrapping around the outer side of the shift register circuit away from the display area. The other end of the shielded signal line is connected to the last terminal.

[0049] In some embodiments, the peripheral circuitry and the peripheral signal lines are formed on the array substrate;

[0050] The orthographic projection of the color filter substrate onto the array substrate does not overlap with the driving circuit and the bonding connection terminal;

[0051] The orthographic projection of the first side edge line of the color filter substrate onto the array substrate is located on the array substrate, and the orthographic projection of the first side edge line of the color filter substrate onto the array substrate partially overlaps with the shielding ground electrode.

[0052] An electrostatic discharge electrode is provided on the side surface of the color filter substrate facing away from the array substrate. The electrostatic discharge electrode is positioned opposite to the shielding ground electrode, and the electrostatic discharge electrode and the shielding ground electrode are connected by conductive adhesive extending and covering a portion of the first side edge end face of the color filter substrate.

[0053] In some embodiments, the dimension of the color filter substrate along the first direction is smaller than the dimension of the array substrate along the first direction;

[0054] The driving circuit, the bonding connection terminal, the test signal line group, a portion of the data line, and a portion of the shielding ground electrode are exposed outside the first side edge line of the color filter substrate.

[0055] In some embodiments, the array substrate and the color filter substrate are further included, wherein the array substrate and the color filter substrate are paired.

[0056] The array substrate and the color filter substrate do not overlap at the first side edge;

[0057] The display area is circular; the display area is located in the overlapping area of ​​the orthographic projection of the array substrate and the color filter substrate;

[0058] The border area includes a first part, which is located in the overlapping area of ​​the orthographic projection of the array substrate and the color filter substrate;

[0059] The edge line of the first part is an unclosed arc line, and the center of the unclosed arc line coincides with the center of the arc edge line of the display area.

[0060] In some embodiments, the border area further includes a second portion located at the first side edge of the array substrate and the color filter substrate of the cell;

[0061] The second part is fan-shaped or inverted trapezoidal;

[0062] The width of the second portion along the direction away from the display area is greater than the width of the first portion along the direction away from the display area.

[0063] In some embodiments, the width of the first portion ranges from 1.2 to 3.5 mm.

[0064] In some embodiments, the width of the second portion extending along the direction of the first side edge ranges from 8 to 15 mm.

[0065] In some embodiments, the width of the second portion along the direction away from the display area ranges from 3.0 to 5.5 mm.

[0066] Secondly, embodiments of this disclosure also provide a display device, which includes the aforementioned display panel. Attached Figure Description

[0067] The accompanying drawings are provided to further illustrate the embodiments of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the disclosure and do not constitute a limitation thereof. The above and other features and advantages will become more apparent to those skilled in the art from the detailed description of exemplary embodiments with reference to the accompanying drawings, in which:

[0068] Figure 1 This is a top view schematic diagram of the structure of a circular display panel in the disclosed technology.

[0069] Figure 2 This is a top view of the structure of a circular display panel with a side bezel area in the disclosed technology.

[0070] Figure 3a This is a simplified top view of the structure of a display panel according to an embodiment of this disclosure.

[0071] Figure 3b This is a top view schematic diagram of the structure of a display panel according to an embodiment of the present disclosure.

[0072] Figure 3c This is a top view of the structure of a 1.43-inch display panel in an embodiment of this disclosure.

[0073] Figure 4 for Figure 3b Enlarged view of part A in the middle.

[0074] Figure 5 for Figure 3b Enlarged view of section B.

[0075] Figure 6 for Figure 3b Enlarged view of section C.

[0076] Figure 7 for Figure 3b Enlarged view of section D.

[0077] Figure 8 for Figure 3b An enlarged view of section F in the middle.

[0078] Figure 9 for Figure 3bAn enlarged view of part E in the middle.

[0079] Figure 10 for Figure 3b Another enlarged view of section E in the middle.

[0080] Figure 11 This is a circuit diagram of an electrostatic discharge circuit.

[0081] Figure 12a This is a top view of another display panel structure in an embodiment of this disclosure.

[0082] Figure 12b This is a top view of the structure of the 3.6-inch display panel in an embodiment of this disclosure. Detailed Implementation

[0083] To enable those skilled in the art to better understand the technical solutions of the embodiments of this disclosure, a display panel and display device provided in the embodiments of this disclosure will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0084] Embodiments of this disclosure will be described more fully below with reference to the accompanying drawings; however, the embodiments shown may be embodied in different forms and should not be construed as limited to the embodiments set forth in this disclosure. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will enable those skilled in the art to fully understand the scope of this disclosure.

[0085] This disclosure is not limited to the embodiments shown in the accompanying drawings, but includes modifications to the configuration based on the manufacturing process. Therefore, the areas illustrated in the drawings are schematic, and the shapes of the areas shown illustrate specific shapes of the areas, but are not intended to be limiting.

[0086] Reference Figure 1This is a top view schematic diagram of the structure of a circular display panel in the disclosed technology. The display panel includes a circular display area 101 and a border area 102 surrounding the display area 101. An array of pixels 1 is disposed within the display area 101. The border area 102 contains peripheral driving circuits (such as GOA circuit 15, gate driver chip 16, data driver chip 17, electrostatic discharge circuit 8, bonding connection circuit 18, etc.) and peripheral wiring (such as data lines 5, electrostatic shielding lines, signal lines connected to GOA circuit 15, test signal lines, etc.) that drive the pixels 1 for display. For example, the GOA circuit 15 is distributed around the display area 101 and is used to provide scanning drive signals for the display of pixels. The gate driver chip (Gate IC) 16 and the data driver chip (Data IC) 17 are distributed in the bonding side border area 108 of the display panel. The gate driver chip 16 is used to provide drive signals to the GOA circuit 15; the data driver chip 17 is used to provide data signals to the data lines; and the gate driver chip 16 and the data driver chip 17 are used to provide drive signals for the display of pixels 1. An electrostatic discharge circuit 8 is located in the bonding side frame area 108 and is used for electrostatic discharge of certain signal lines and nodes in the peripheral driving circuit (such as the GOA circuit) and the pixel circuit within the display area 101. A bonding connection circuit 18 is located in the bonding side frame area 108 and is used for bonding and connecting with the peripheral circuit board to enable the peripheral circuit board to provide display signals to the peripheral driving circuit.

[0087] In the disclosed technology, the border area 102 and the display area 101 are set as concentric circles. This means that the width of any position of the border area 102 can only be designed according to the maximum radius required by the design space. As a result, the border area 102 of the circular display panel is enlarged, and it is impossible to achieve a narrow border for the circular display panel.

[0088] Additionally, refer to Figure 2This is a top view schematic diagram of the structure of the binding side bezel area of ​​a circular display panel in the disclosed technology. The lower side bezel area of ​​the display panel is the binding side bezel area 108. The display panel is formed by a combination of an array substrate 2 and a color filter substrate 3. The array substrate 2 is partially exposed in the binding side bezel area 108. The binding connection circuit is set in the exposed area on the array substrate 2. The binding connection circuit includes multiple binding connection terminals 7 arranged at intervals along a straight line. One end of the binding connection terminal 7 is connected to the peripheral driving circuit, and the other end is bound to one end of the flexible circuit board. The other end of the flexible circuit board is bound to the peripheral circuit board, thereby realizing the connection between the peripheral circuit board and the peripheral driving circuit. A shielding ground electrode 9 is also provided on the array substrate 2 in the bonding side bezel area 108. The shielding ground electrode 9 is located at the edge line s7 of the color filter substrate 3 corresponding to the bonding side bezel area 108. Three bonding connection terminals 7 in the bonding connection circuit are led out through leads 19 and connected to the shielding ground electrode 9. The shielding ground electrode 9 is connected to the electrostatic discharge electrode 13 located on the side of the color filter substrate 3 away from the array substrate 2 through conductive adhesive 14 covering a local edge of the bonding side bezel area 108 of the color filter substrate 3, thereby realizing the release of static electricity accumulated inside the display panel. In addition, another bonding connection terminal 7 in the bonding connection circuit needs to be led out through leads and connected to the shielding signal line 12 that wraps around the bezel area 102. This bonding connection terminal 7 is grounded so that the static electricity accumulated on the shielding signal line 12 can be conducted to ground. Thus, a total of four bonding connection terminals 7 need to be grounded in the bonding side bezel area 108, which increases the width of the bonding side bezel area 108 along the arrangement direction of the bonding connection terminals 7. Meanwhile, the setting of the shielded signal line 12 and the lead connecting the shielded ground electrode 9 in the binding side bezel area 108 further increases the width of the binding side bezel area 108 in the direction away from the display area 101, making it impossible to achieve a narrow bezel in the binding side bezel area 108.

[0089] To address the aforementioned problems in the disclosed technology, in a first aspect, this invention provides a display panel, referring to... Figure 3a This is a simplified top view of the structure of a display panel according to an embodiment of this disclosure; Figure 3b This is a top view schematic diagram of the structure of a display panel according to an embodiment of the present disclosure; Figure 3cThis is a simplified top view of the structure of a 1.43-inch display panel according to an embodiment of the present disclosure; wherein, the display panel has a display area 101 and a bezel area 102, the bezel area 102 surrounds the display area 101, the edge line s1 of the display area 101 is an arc line; the edge line s2 of the bezel area 102 is an arc line; the shape of the edge line s1 of the display area 101 and the edge line s2 of the bezel area 102 are adapted to each other; the display panel includes peripheral circuits and peripheral signal lines, the peripheral circuits and peripheral signal lines are distributed in the bezel area 102, and the peripheral circuits and peripheral signal lines are arranged according to... The display panel is distributed away from the display area 101; the display panel also includes an array substrate 2 and a color filter substrate 3, the array substrate 2 and the color filter substrate 3 are paired; the array substrate 2 and the color filter substrate 3 do not overlap at the edge of the first side 103; in the frame area 102 outside the frame area 102 where the edge of the first side 103 is located, the width range between the signal line closest to the outer edge of the frame area 102 and the outer edge of the frame area 102 is 0.35±0.2 micrometers; the outer edge of the frame area 102 is the side edge of the frame area 102 away from the display area 101.

[0090] The display area 101 contains an array of pixels 1. Pixel 1 can be a liquid crystal (LCD) pixel or an organic light-emitting diode (OLED) pixel. Peripheral circuits and peripheral signal lines are used to drive the pixel 1 array for display.

[0091] In some embodiments, the width of the border region 102 at any location is the minimum width that can accommodate the peripheral circuits and peripheral signal lines distributed at that location. The minimum width of the border region 102 at any location is the narrowest width that can be achieved by the process when the peripheral circuits and peripheral signal lines are fully distributed at any location.

[0092] In this embodiment, by making the edge line s1 of the display area 101 and the edge line s2 of the border area 102 rounded, and by matching the shapes of the edge line s1 of the display area 101 and the edge line s2 of the border area 102, a circular or near-circular display panel can be achieved. By making the width of the border area 102 at any position the minimum width that can accommodate the peripheral circuits and peripheral signal lines distributed at that position, on the one hand, it can ensure that the design space of the border area 102 of the circular or near-circular display panel is sufficient, and on the other hand, it can achieve a narrow border of the circular or near-circular display panel, thereby enabling the circular or near-circular display panel to save space to the maximum extent.

[0093] In some embodiments, refer to Figure 3a , Figure 3b , Figure 3c , Figure 4 and Figure 5 , Figure 4 for Figure 3b Enlarged view of section A; Figure 5 for Figure 3b Enlarged view of part B; the display panel also includes an array substrate 2 and a color filter substrate 3, which are paired; the array substrate 2 and the color filter substrate 3 do not overlap at the edge of the first side 103; the display area 101 is circular; the display area 101 is located in the overlapping area of ​​the orthographic projection of the array substrate 2 and the color filter substrate 3; the border area 102 includes a first part 105, which is located on the second side 104 of the paired array substrate 2 and the color filter substrate 3, and the second side 104 is opposite to the first side 103; the edge line of the first part 105 is a semi-circular arc, and the center of the semi-circular arc coincides with the center of the semi-circular arc edge line of the display area 101 located on the second side 104.

[0094] Among them, the coincidence of the center of the semi-circular arc edge line of the first part 105 and the center of the semi-circular arc edge line of the display area 101 located on the second side 104 includes the case where the centers of the two semi-circular arc edge lines are absolutely coincident, and the case where the centers of the two semi-circular arc edge lines are approximately coincident within a certain error range.

[0095] In some embodiments, the first portion 105 includes a first sub-portion 1051 and a second sub-portion 1052. The first sub-portion 1051 is located on the side of the display area 101 away from the first side 103. The second sub-portion 1052 is disposed on opposite sides of the display area 101 along the second direction L2. The first side 103 and the second side 104 of the array substrate 2 and the color filter substrate 3 are arranged in the first direction L1. The second direction L2 is perpendicular to the first direction L1. The peripheral circuit includes a shift register circuit 4, and the peripheral signal lines include first signal lines connected to the shift register circuit 4. The shift register circuit and the first signal lines are not distributed in the first sub-portion 1051. Some of the shift register circuits 4 and some of the first signal lines are distributed in the second sub-portion 1052. The total distribution width of the shift register circuits 4 and the first signal lines distributed at any position in the second sub-portion 1052 is equal.

[0096] In some embodiments, the fact that the total distribution width of the shift register circuit 4 and the first signal line, which are distributed at any position within the second sub-section 1052, is equal does not only mean that the total distribution width is absolutely equal, but may also include the case that the total distribution width is approximately equal within a certain error range. For example, the total distribution width may include a certain measurement error, such as a measurement error of 0.3 μm.

[0097] The first part 105 of the bezel area 102 mainly contains the shift register circuit 4 and the first signal line connected to the shift register circuit 4. The edge line of the first part 105 of the bezel area 102 and the edge line of the corresponding part of the display area 101 form a concentric arc, which makes the appearance of the corresponding first part 105 of the display panel more aesthetically pleasing, while ensuring sufficient design space for the first part 105 of the bezel area 102 and ensuring a narrow bezel.

[0098] In some embodiments, the shift register circuit 4, i.e. the GOA circuit, is used to provide a row scanning signal to the pixel array 1 in the display area 101. The row scanning signal enables the pixel array 1 to be turned on row by row or multiple rows to be turned on simultaneously, so as to display pixel 1 row by row or multiple rows of pixel 1 simultaneously.

[0099] In some embodiments, the first signal lines connected to the shift register circuit 4 include gate lines, light emission control signal lines, reset signal lines, clock signal lines, scan trigger signal lines, power supply signal lines, etc.

[0100] In some embodiments, the width 'a' of the first portion 105 ranges from 1.0 to 2.7 mm. Here, the width 'a' of the first portion 105 refers to the dimension of the first portion 105 along the direction away from the display area 101.

[0101] In some embodiments, the display panel is 1.43 inches in size and the width a of the first portion 105 is 1.3 mm.

[0102] In some embodiments, refer to Figure 3a , Figure 3b , Figure 3c and Figure 6 , Figure 6 for Figure 3bEnlarged view of section C; the border area 102 also includes a second part 106 and a third part 107, which are located on the first side 103 of the array substrate 2 and color filter substrate 3 of the cell, and are arranged sequentially along a first direction L1 away from the first part 105; the first direction L1 is the arrangement direction of the first side 103 and the second side 104 of the array substrate 2 and color filter substrate 3 of the cell; the second part 106 is disposed in the display area 101 along the second direction. The opposite two edges of L2; the second direction L2 is perpendicular to the first direction L1; the third part 107 is located at the edge of the first side 103 of the display area 101; the peripheral signal lines also include data lines 5, data lines 5, a portion of the shift register circuit 4 and a portion of the first signal lines are distributed within the second part 106 and the third part 107, and the data lines 5 and the shift register circuit 4 are distributed away from the display area 101 in sequence; the total distribution width of the shift register circuit 4 and the first signal lines at any position within the second part 106 is equal. The total distribution width of the shift register circuit 4 and the first signal lines refers to the total distribution width of the two along the direction away from the display area 101.

[0103] In some embodiments, the fact that the total distribution width of the shift register circuit 4 and the first signal line distributed at any position within the second part 106 is equal does not only mean that the total distribution width is absolutely equal, but may also include the case that the total distribution width is approximately equal within a certain error range.

[0104] The second part 106 of the bezel area 102 mainly contains data lines 5, shift register circuits 4, and first signal lines connected to the shift register circuits 4. The total width of the shift register circuits 4 and the first signal lines distributed at any position within the second part 106 is equal. That is, within the second part 106, the edge line s3 of the distribution area of ​​the data lines 5 adjacent to the display area 101 is parallel or approximately parallel to the edge line s4 of the second part 106, and the distance between the edge line s3 of the distribution area of ​​the data lines 5 and the edge line s4 of the second part 106 is equal at any position. This ensures that the shape of the corresponding second part 106 of the display panel is arc-shaped or approximately arc-shaped, making the appearance of the corresponding second part 106 of the display panel more aesthetically pleasing. On the other hand, it also ensures that the design space of the second part 106 of the bezel area 102 is sufficient and that a narrow bezel is achieved.

[0105] In some embodiments, the distribution width of the data line 5 within the second portion 106 gradually increases from the end of the second portion 106 near the first portion 105 to the end of the second portion 106 near the third portion 107. Here, the distribution width of the data line 5 refers to the distribution dimension of the data line 5 along the direction away from the display area 101.

[0106] In some embodiments, refer to Figure 3a , Figure 3b , Figure 3c and Figure 7 , Figure 7 for Figure 3b Enlarged view of section D; the distribution area from the second part 106 to the third part 107, the distribution width of data line 5 in the second part 106 gradually increases to the distribution width of data line 5 in the third part 107.

[0107] In some embodiments, refer to Figure 3a , Figure 3b , Figure 3c and Figure 7 Along the distribution direction L3 from the second part 106 to the third part 107, the width of the second part 106 gradually increases. The width of the second part 106 refers to its dimension along the direction away from the display area 101.

[0108] In some embodiments, the width b of the second portion 106 ranges from 1.5 to 3.2 mm.

[0109] In some embodiments, for a 1.43-inch display panel, the width b of the second portion 106 is 1.74 mm.

[0110] In some embodiments, within the second portion 106, the distance between the edge line s3 of the distribution area of ​​the data line 5 and the edge line s4 of the second portion 106 is 1.1 mm at any location.

[0111] In some embodiments, the distance between the edge line s3 of the distribution area of ​​the data line 5 and the edge line s4 of the second part 106 is 1.1 mm at any position, which does not mean exactly 1.1 mm, but may also include the case where it is approximately 1.1 mm within a certain error range.

[0112] In some embodiments, refer to Figure 3a , Figure 3b , Figure 3c , Figures 8-10 , Figure 8 for Figure 3b An enlarged view of section F in the middle; Figure 9 for Figure 3b An enlarged view of section E in the middle; Figure 10 for Figure 3bAnother enlarged view of section E; the peripheral circuitry also includes a drive circuit 6, a bonding connection terminal 7, an electrostatic discharge circuit 8, and a shielded grounding electrode 9; the peripheral signal lines also include a test signal line group 10, a common voltage signal line 11, and a shielded signal line 12; the drive circuit 6, bonding connection terminal 7, electrostatic discharge circuit 8, shielded grounding electrode 9, and test signal line group 10 are distributed within the third section 107; the bonding connection terminal 7 and the test signal line group 10 are respectively connected to the drive circuit 6; the shielded signal line 12 is connected to the shielded grounding electrode 9 and the bonding connection terminal 7. The common voltage signal line 11 connects the shift register circuit 4 and the electrostatic discharge circuit 8; the shielded signal line 12 and the common voltage signal line 11 extend from the third part 107 to the second part 106 and the first part 105 respectively, and the shielded signal line 12 and the common voltage signal line 11 wrap around the display area 101 once; the common voltage signal line 11 is located in the area between the display area 101 and the shift register circuit 4; the peripheral circuits and other peripheral signal lines distributed in the border area 102 are located in the area between the shielded signal line 12 and the display area 101.

[0113] The driving circuit 6 includes a gate driver chip (Gate IC) and a data driver chip (Data IC). The gate driver chip provides driving signals to the shift register circuit 4, and the data driver chip provides data signals to the data lines 5. The gate driver chip and the data driver chip provide driving signals for the display of the pixel array 1 within the display area 101. The bonding connection end 7 is used to bond to one end of the flexible circuit board, and the other end of the flexible circuit board is bonded to the peripheral circuit board, thereby realizing the connection between the peripheral circuit board and the driving circuit 6. The peripheral circuit board provides display data signals to the driving circuit 6. The test signal line group 10 is fabricated on the array substrate 2 and is used for circuit testing on the array substrate 2. After the array substrate 2 is fabricated, the test signal line group 10 is used to connect the driving circuit 6 and the peripheral circuit board to test the circuit on the array substrate 2. After the test is completed, the test signal line group 10 is cut off at the edge of the circular display panel during the subsequent cutting process after the display panel is fabricated. This part of the test signal line group 10 remaining on the array substrate 2 is idle and no longer used. The shielded signal line 12 is used to shield against external static electricity, preventing external static electricity from damaging the circuitry inside the display panel (such as the peripheral circuitry and other peripheral signal lines inside the bezel area 102, as well as the circuitry and signal lines inside the display area 101).

[0114] In some embodiments, refer to Figure 11This is a circuit diagram of an electrostatic discharge circuit. One end of the electrostatic discharge circuit 8 can be connected to signal lines (such as Gate lines and other GOA signal lines) and circuit nodes in the shift register circuit 4 that are prone to static electricity accumulation, and can also be connected to signal lines (such as Data lines) and circuit nodes in the display area 101 that are prone to static electricity accumulation. Simultaneously, the other end of the electrostatic discharge circuit 8 is connected to a common voltage signal line (VCOM) to discharge static electricity accumulated in the aforementioned circuits or signal lines to the common voltage signal line. Furthermore, the common voltage signal line 11 is also used to provide a common voltage signal to the pixel circuits in the display area 101 and the peripheral circuits of the bezel area 102.

[0115] In some embodiments, refer to Figure 3a , Figure 3b and Figure 3c Along the direction away from the second part 106, the width c of the third part 107 along the second direction L2 gradually decreases.

[0116] In some embodiments, refer to Figure 3a , Figure 3b and Figure 3c The binding connection end 7 is located on the side of the driving circuit 6 away from the display area 101; the data lines 5 distributed within the third part 107 are located on the side of the driving circuit 6 closer to the display area 101; the electrostatic discharge circuit 8 is located on opposite sides of the data line 5 distribution area along the second direction L2; the shielding ground electrode 9 is located on at least one side of the driving circuit 6 along the second direction L2, and the shielding ground electrode 9 is located on the side of the shift register circuit 4 away from the display area 101; the data lines 5 within the third part 107 are distributed in a fan shape or an inverted trapezoidal shape; the third part 107 is fan-shaped or an inverted trapezoidal shape. This configuration, while ensuring sufficient design space for the third part 107, achieves an extremely narrow bezel for the third part 107, and the third part 107 has an aesthetically pleasing appearance.

[0117] In some embodiments, the width c of the third portion 107 along the second direction L2 ranges from 10 to 12 mm.

[0118] In some embodiments, the width d of the third portion 107 along the direction away from the display area 101 ranges from 3.0 to 3.5 mm.

[0119] In some embodiments, for a 1.43-inch display panel, the width d of the third portion 107 along the first direction L1 is 3.258 mm.

[0120] In some embodiments, refer to Figure 3a , Figure 3b , Figure 3c , Figure 8 and Figure 9The binding connection terminal 7 includes multiple terminals 70, which are arranged sequentially at intervals along the second direction L2; the first and last terminals 70 are grounded; one end of the shielded signal line 12 is connected to the first terminal 70 and extends to the shielded ground electrode 9, and extends from the shielded ground electrode 9 to the outside of the shift register circuit 4 away from the display area 101, and the other end of the shielded signal line 12 is connected to the last terminal 70.

[0121] This configuration serves two purposes. First, the shielded signal line 12 can surround the peripheral circuits and other peripheral signal lines within the bezel area 102, thereby preventing damage from external static electricity to the peripheral circuits and other peripheral signal lines within the bezel area 102, as well as the circuits and signal lines within the display area 101. Second, compared to Figure 2 In the disclosed technology, two grounding signal lines are bound together: the shielded signal line within the side frame area and the lead connecting the shielded grounding electrode 9. In this embodiment, only one grounding signal line (i.e., the shielded signal line 12) needs to be provided within the third part 107. Furthermore, compared to… Figure 2 In the disclosed technology, three terminals 70 in the binding connection terminal 7 need to be connected to a lead wire simultaneously in order to connect to the shielded ground electrode 9. Furthermore, another terminal 70 in the binding connection terminal 7 needs to be led out via a lead wire and connected to the shielded signal line 12 that wraps around the frame area 102. Figure 2 In the disclosed technology, a total of four grounded terminals 70 are required at either the beginning or end of the binding connection terminal 7. In this embodiment, only one grounded terminal 70 is required at either the beginning or end of the binding connection terminal 7. This allows the width c along the second direction L2 and the width d along the direction away from the display area 101 of the third part 107 to be further narrowed, thereby achieving an extremely narrow bezel of the third part 107. This greatly reduces the width of the bottom bezel of the display panel where the third part 107 is located, and greatly improves the competitiveness of small-sized circular display panels.

[0122] In some embodiments, refer to Figure 10 The binding connection terminal 7 includes multiple terminals 70, which are arranged sequentially at intervals along the second direction L2; the first and last terminals 70 are grounded; one end of the shielded signal line 12 is connected to the first terminal 70 and extends within the third part 107 to the outer side of the shift register circuit 4 away from the display area 101 and the inner side of the shielded ground electrode 9 near the display area 101; the shielded signal line 12 is connected to the shielded ground electrode 9 and extends from the shielded ground electrode 9 to the second part 106 and the first part 105, wrapping around the outer side of the shift register circuit 4 away from the display area 101; the other end of the shielded signal line 12 is connected to the last terminal 70.

[0123] In this embodiment, within the third part 107, the shielded signal line 12 is located in the area between the shielded ground electrode 9 and the shift register circuit 4, and is distributed near the outer side of the shift register circuit 4 away from the display area 101, surrounding the shift register circuit 4 within the third part 107 within its enclosing ring; within the second part 106 and the first part 105, the shielded signal line 12 is arranged around the outer side of the shift register circuit 4 away from the display area 101, surrounding the shift register circuit 4 within the second part 106 and the first part 105 within its enclosing ring, thereby effectively shielding against external static electricity and preventing external static electricity from damaging the peripheral circuits and other peripheral signal lines within the frame area 102, as well as the circuits and signal lines within the display area 101; in addition, relative to Figure 9 The shielded signal line 12 is positioned closer to the display area 101 within the third part 107 in this embodiment, thereby further narrowing the width c along the second direction L2 and the width d along the direction away from the display area 101 of the third part 107, thus further achieving an extremely narrow bezel for the third part 107. Furthermore, in this embodiment… Figure 10 The setup of the shielded signal cable 12 and the binding connection terminal 7 is compared to... Figure 2 The shielded signal line 12 and the binding connection terminal 7 in the disclosed technology can also further narrow the width c along the second direction L2 and the width d along the direction away from the display area 101 of the third part 107, thereby achieving an extremely narrow bezel of the third part 107, that is, greatly reducing the width of the bottom bezel of the display panel where the third part 107 is located, and greatly improving the competitiveness of small-sized circular display panels.

[0124] In some embodiments, refer to Figures 8-10 The peripheral circuits and peripheral signal lines are formed on the array substrate 2; the orthographic projection of the color filter substrate 3 on the array substrate 2 does not overlap with the driving circuit 6 and the bonding connection terminal 7; the orthographic projection of the edge line s5 of the first side 103 of the color filter substrate 3 on the array substrate 2 is located on the array substrate 2, and the orthographic projection of the edge line s5 of the first side 103 of the color filter substrate 3 on the array substrate 2 partially overlaps with the shielding ground electrode 9; an electrostatic discharge electrode 13 is provided on the side surface of the color filter substrate 3 facing away from the array substrate 2, the electrostatic discharge electrode 13 is positioned corresponding to the shielding ground electrode 9, and the electrostatic discharge electrode 13 and the shielding ground electrode 9 are connected by conductive adhesive 14 extending and covering the edge end face of the first side 103 of the color filter substrate 3.

[0125] The conductive adhesive 14 can be made of conductive silver paste. The static electricity accumulated on the shielding ground electrode 9 can be released through the conductive adhesive 14 to the static discharge electrode 13 located on the side of the color filter substrate 3 away from the array substrate 2. The static discharge electrode 13 can carry a large amount of static electricity, thereby conducting the static electricity accumulated on the shielding ground electrode 9 to the outside of the display panel, avoiding electric shock damage to the internal circuits or signal lines of the display panel caused by static electricity.

[0126] In some embodiments, refer to Figure 3a , Figure 3b , Figure 3c , Figures 8-10 The dimension of the color filter substrate 3 along the first direction L1 is smaller than the dimension of the array substrate 2 along the first direction L1; the driving circuit 6, the bonding connection terminal 7, the test signal line group 10, the data line 5, and the shielding ground electrode 9 are partially exposed outside the edge line s5 of the first side 103 of the color filter substrate 3. That is, the driving circuit 6, the bonding connection terminal 7, the test signal line group 10, the data line 5, and the shielding ground electrode 9 are located in the area of ​​the array substrate 2 that does not overlap with the color filter substrate 3. The area of ​​the array substrate 2 that does not overlap with the color filter substrate 3 is used as the bonding area of ​​the display panel.

[0127] In some embodiments, refer to Figure 3a , Figure 3b and Figure 3c For a 1.43-inch display panel, the maximum distance e between the edge line s5 of the first side 103 of the array substrate 2 and the edge line s5 of the first side 103 of the color filter substrate 3 is 2.226 mm; the minimum distance f between the edge line s5 of the first side 103 of the color filter substrate 2 and the edge line s5 of the first side 103 of the display area 101 is 1.032 mm.

[0128] This disclosure also provides a display panel, which differs from the above embodiments in that, with reference to... Figure 12a This is a simplified top view of another display panel structure in an embodiment of this disclosure; Figure 12b This is a top view of the structure of a 3.6-inch display panel in an embodiment of this disclosure; wherein, the display panel further includes an array substrate 2 and a color filter substrate 3, the array substrate 2 and the color filter substrate 3 are paired; the array substrate 2 and the color filter substrate 3 do not overlap at the edge of the first side 103; the display area 101 is circular; the display area 101 is located in the overlapping area of ​​the orthographic projection of the array substrate 2 and the color filter substrate 3; the border area 102 includes a first part 105, the first part 105 is located in the overlapping area of ​​the orthographic projection of the array substrate 2 and the color filter substrate 3; the edge line s6 of the first part 105 is an unclosed arc line, and the center of the unclosed arc line coincides with the center of the arc edge line of the display area 101.

[0129] In some embodiments, the border area 102 further includes a second portion 106, which is located at the edge of the first side 103 of the array substrate 2 and the color filter substrate 3 of the cell; the second portion 106 is fan-shaped or inverted trapezoidal; the width g of the second portion 106 along the direction away from the display area 101 is greater than the width h of the first portion 105 along the direction away from the display area 101.

[0130] In some embodiments, the width h of the first portion 105 ranges from 1.2 to 3.5 mm.

[0131] In some embodiments, for a 3.6-inch display panel, the width h of the first portion 105 is 2.7 mm.

[0132] In some embodiments, the width i of the second portion 106 extending in the direction X along the edge of the first side 103 ranges from 8 to 15 mm.

[0133] In some embodiments, the width g of the second portion 106 along the direction away from the display area 101 ranges from 3.0 to 5.5 mm.

[0134] In some embodiments, for a 3.6-inch display panel, the width g of the second portion 106 along the direction away from the display area 101 is 5.27 mm.

[0135] In some embodiments, for a 3.6-inch display panel, the maximum spacing k between the edge line of the first side 103 of the array substrate 2 and the edge line of the first side 103 of the color filter substrate 3 is 3.26 mm; the minimum spacing m between the edge line of the first side 103 of the color filter substrate 2 and the edge line of the first side 103 of the display area 101 is 2.01 mm.

[0136] In this embodiment, the distribution of the peripheral circuits and peripheral signal lines of the display panel bezel area 102 is the same as described above. Figure 3a and Figure 3b The embodiments are the same as those in the previous examples, and will not be described again. Figure 12a The display panel in Figure 3a and Figure 3b The comparison of the display panels in the middle is visible. Figure 3a and Figure 3b The bezel area 102 of the central display panel is narrower, which can better achieve an extremely narrow bezel for a circular or near-circular display panel, while also being aesthetically pleasing.

[0137] The display panel provided in this embodiment is circular or near-circular. By making the edge line s1 of the display area 101 and the edge line s2 of the border area 102 rounded, and by matching the shapes of the edge line s1 of the display area 101 and the edge line s2 of the border area 102, a circular or near-circular display panel can be achieved. By making the width of the border area 102 at any position the minimum width that can accommodate the peripheral circuits and peripheral signal lines distributed at that position, on the one hand, sufficient design space can be ensured for the border area 102 of the circular or near-circular display panel, and on the other hand, a narrow border can be achieved for the circular or near-circular display panel. This allows the circular or near-circular display panel to save space to the maximum extent, meet user needs, and ensure an aesthetically pleasing design.

[0138] This disclosure also provides a display device, including the display panel in any of the above embodiments.

[0139] By adopting the display panel in any of the above embodiments, not only can a circular or near-circular display device be realized, but also the design space of the bezel area of ​​the display device can be sufficient and the bezel can be narrow, thereby maximizing space saving of the display device, meeting user needs while ensuring an aesthetically pleasing design.

[0140] The display device provided in this disclosure can be any product or component with display function, such as an LCD panel, LCD TV, LCD billboard, OLED panel, OLED TV, OLED billboard, monitor, mobile phone, or navigator.

[0141] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.

Claims

1. A display panel, wherein, It has a display area and a border area, wherein the border area surrounds the display area. The edge line of the display area is an arc; the edge line of the border area is an arc; the shape of the edge line of the display area matches that of the edge line of the border area. The display panel includes peripheral circuits and peripheral signal lines, which are distributed in the frame area and are distributed sequentially away from the display area. The display panel further includes an array substrate and a color filter substrate, wherein the array substrate and the color filter substrate are paired. The array substrate and the color filter substrate do not overlap at the first side edge; In the border area outside the first side edge, the width range between the outermost signal line closest to the outer edge of the border area and the outer edge of the border area is 0.35 ± 0.2 micrometers. The outer edge of the border area is the side edge of the border area that is away from the display area.

2. The display panel according to claim 1, wherein, The display area is circular; the display area is located in the overlapping area of ​​the orthographic projection of the array substrate and the color filter substrate; The border area includes a first portion, which is located on a second side of the array substrate and the color filter substrate of the cell, and the second side is opposite to the first side; The edge line of the first part is a semi-circular arc, and the center of the semi-circular arc coincides with the center of the semi-circular edge line of the display area located on the second side.

3. The display panel according to claim 2, wherein, The first part includes a first sub-part and a second sub-part, the first sub-part being located on the side of the display area away from the first side; the second sub-part being disposed on opposite side edges of the display area along a second direction; The first and second sides of the array substrate and the color filter substrate of the cell are arranged in a first direction; the second direction is perpendicular to the first direction. The peripheral circuit includes a shift register circuit, and the peripheral signal line includes a first signal line connected to the shift register circuit; The shift register circuit and the first signal line are not distributed within the first subsection; Part of the shift register circuit and part of the first signal line are distributed within the second subsection; The total width of the shift register circuit and the first signal line distributed at any position within the second subsection is equal.

4. The display panel according to claim 3, wherein, The width of the first part ranges from 1.0 to 2.7 mm.

5. The display panel according to any one of claims 3-4, wherein, The border area further includes a second part and a third part, the second part and the third part being located on the first side of the array substrate and the color filter substrate of the cell, and the second part and the third part being arranged sequentially along the first direction away from the first part; The second portion is located on opposite sides of the display area along the second direction; The third part is located at the first side edge of the display area; The peripheral signal lines also include data lines. The data lines, a portion of the shift register circuit, and a portion of the first signal lines are distributed within the second and third portions, and the data lines and the shift register circuit are distributed sequentially away from the display area. The total width of the shift register circuit and the first signal line distributed at any position within the second part is equal.

6. The display panel according to claim 5, wherein, The width of the data line within the second part gradually increases from the end of the second part closer to the first part to the end of the second part closer to the third part.

7. The display panel according to claim 6, wherein, The data line gradually increases in width from the second part to the third part of the distribution area.

8. The display panel according to claim 7, wherein, Along the distribution direction from the second part to the third part, the width of the second part gradually increases.

9. The display panel according to claim 8, wherein, The width of the second part ranges from 1.5 to 3.2 mm.

10. The display panel according to claim 5, wherein, The peripheral circuit also includes a driving circuit, a bonding connection terminal, an electrostatic discharge circuit, and a shielded grounding electrode; The peripheral signal lines also include test signal line groups, common voltage signal lines, and shielded signal lines; The driving circuit, the bonding connection terminal, the electrostatic discharge circuit, the shielded grounding electrode, and the test signal line group are distributed within the third part; The binding connection terminal and the test signal line group are respectively connected to the driving circuit; The shielded signal line connects the shielded grounding electrode and the bonding connection terminal; The common voltage signal line is connected to the shift register circuit and the electrostatic discharge circuit; The shielded signal line and the common voltage signal line extend from the third part to the second part and the first part, respectively, and the shielded signal line and the common voltage signal line each wrap around the display area once; The common voltage signal line is located in the area between the display area and the shift register circuit; The peripheral circuits and other peripheral signal lines distributed in the frame area are located in the area between the shielded signal line and the display area.

11. The display panel according to claim 10, wherein, Along the direction away from the second part, the width of the third part gradually decreases in the second direction.

12. The display panel according to claim 11, wherein, The bonding connection end is located on the side of the driving circuit that is away from the display area; The data lines distributed within the third part are located on the side of the driving circuit closer to the display area; The electrostatic discharge circuit is located on opposite sides of the data line distribution area along the second direction; The shielding ground electrode is located on at least one side of the driving circuit along the second direction, and the shielding ground electrode is located on the side of the shift register circuit opposite to the display area; The data lines in the third part are arranged in a fan shape or an inverted trapezoidal shape; The third part is fan-shaped or inverted trapezoidal.

13. The display panel according to claim 12, wherein, The width of the third part along the second direction ranges from 10 to 12 mm.

14. The display panel according to claim 13, wherein, The width of the third part along the direction away from the display area ranges from 3.0 to 3.5 mm.

15. The display panel according to claim 12, wherein, The binding connection terminal includes multiple terminals, which are arranged at intervals along the second direction; the first and last terminals are grounded. One end of the shielded signal line is connected to the first terminal and extends to the shielded ground electrode, and extends from the shielded ground electrode to the outside of the shift register circuit away from the display area. The other end of the shielded signal line is connected to the last terminal.

16. The display panel according to claim 12, wherein, The binding connection terminal includes multiple terminals, which are arranged at intervals along the second direction; the first and last terminals are grounded. One end of the shielded signal line is connected to the first terminal and extends within the third portion to the outer side of the shift register circuit away from the display area and the inner side of the shielded ground electrode near the display area. The shielded signal line is connected to the shielded ground electrode and extends from the shielded ground electrode to the second portion and the first portion, wrapping around the outer side of the shift register circuit away from the display area. The other end of the shielded signal line is connected to the last terminal.

17. The display panel according to claim 15 or 16, wherein, The peripheral circuits and the peripheral signal lines are formed on the array substrate; The orthographic projection of the color filter substrate onto the array substrate does not overlap with the driving circuit and the bonding connection terminal; The orthographic projection of the first side edge line of the color filter substrate onto the array substrate is located on the array substrate, and the orthographic projection of the first side edge line of the color filter substrate onto the array substrate partially overlaps with the shielding ground electrode. An electrostatic discharge electrode is provided on the side surface of the color filter substrate facing away from the array substrate. The electrostatic discharge electrode is positioned opposite to the shielding ground electrode, and the electrostatic discharge electrode and the shielding ground electrode are connected by conductive adhesive extending and covering a portion of the first side edge end face of the color filter substrate.

18. The display panel according to claim 17, wherein, The dimension of the color filter substrate along the first direction is smaller than the dimension of the array substrate along the first direction; The driving circuit, the bonding connection terminal, the test signal line group, a portion of the data line, and a portion of the shielding ground electrode are exposed outside the first side edge line of the color filter substrate.

19. The display panel according to claim 1, wherein, It also includes an array substrate and a color filter substrate, wherein the array substrate and the color filter substrate are paired. The array substrate and the color filter substrate do not overlap at the first side edge; The display area is circular; The display area is located in the overlapping region of the orthographic projection of the array substrate and the color filter substrate; The border area includes a first part, which is located in the overlapping area of ​​the orthographic projection of the array substrate and the color filter substrate; The edge line of the first part is an unclosed arc line, and the center of the unclosed arc line coincides with the center of the arc edge line of the display area.

20. The display panel according to claim 19, wherein, The border area further includes a second portion, which is located at the first side edge of the array substrate and the color filter substrate of the cell; The second part is fan-shaped or inverted trapezoidal; The width of the second portion along the direction away from the display area is greater than the width of the first portion along the direction away from the display area.

21. The display panel according to claim 20, wherein, The width of the first part ranges from 1.2 to 3.5 mm.

22. The display panel according to claim 20, wherein, The width of the second part extending along the first side edge ranges from 8 to 15 mm.

23. The display panel according to claim 20, wherein, The width of the second portion along the direction away from the display area ranges from 3.0 to 5.5 mm.

24. A display device, wherein, Includes the display panel as described in any one of claims 1-23.

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