Avalanche photodiode, preparation method, array and range finder thereof

Abstract

The invention provides an avalanche photodiode and a preparation method thereof, an avalanche photodiode array and a range finder thereof, and the avalanche photodiode comprises a first anode ohmic contact electrode, a P + doping layer, a P-type substrate, a P-type epitaxial layer, a P trap, an N trap, an N-type protection ring, a P trap ohmic contact ring, a second anode ohmic contact electrode, and a cathode ohmic contact electrode. And the doping concentration of the P + doping layer is greater than that of the P-type epitaxial layer. A P + doping layer is formed on the surface of a P-type epitaxial layer serving as a light absorption layer, the doping concentration of the P + doping layer is higher than that of the P-type epitaxial layer, and an avalanche photodiode assists a second anode ohmic contact electrode to realize full depletion of the P-type epitaxial layer, namely, the full depletion state of the P-type epitaxial layer can be adjusted through the P + doping layer, so that the full depletion of the P-type epitaxial layer is realized. Therefore, the device can be used up at a lower voltage, namely, the depletion voltage is reduced, so that the diffusion current is reduced, and the cut-off frequency of the device is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor integrated circuit design and manufacturing, and in particular to an avalanche photodiode and a preparation method thereof, an avalanche photodiode array and a rangefinder thereof. Background Art

[0002] Avalanche photodiode (APD) is a photosensitive element used in laser communication. After reverse bias is applied to the PN junction of the photodiode, the incident light is absorbed by the PN junction to form a photocurrent. If the reverse bias is increased to a large enough level, an "avalanche" will occur in the avalanche area, that is, the photocurrent increases exponentially, so it is called an "avalanche photodiode". It is mainly used in high-sensitivity detection occasions, including fiber-optic communication, laser ranging, 3D imaging, thermal imaging, volume scanning, and single-photon level detection and imaging. In the field of human body sensing such as laser radar and face recognition, near-infrared bands such as 840nm, 905nm, and 940nm are widely used.

[0003] Currently, to achieve high device bandwidth of APD, it is usually necessary to fully deplete the absorption layer, otherwise the diffusion current will cause tailing and reduce the device bandwidth. Full depletion requires high voltage, especially for APD with large effective detection area. Its high reverse bias voltage often causes premature breakdown of the device. In addition, non-depletion regions are easily formed in the boundary area of ​​the device, and the body and surface dark currents are in the form of diffusion currents, thereby reducing the bandwidth of the APD. Summary of the invention

[0004] In view of the shortcomings of the prior art described above, the object of the present invention is to provide an avalanche photodiode and a preparation method thereof, an avalanche photodiode array and a rangefinder thereof, so as to solve at least one of the technical problems in the prior art that full depletion of avalanche photodiodes requires a high voltage, full depletion is not easy to achieve in the boundary region of the APD device, resulting in the formation of a diffusion current, and the electric field in the boundary region of the APD device is strong, resulting in premature breakdown of the device.

[0005] To achieve the above-mentioned object and other related objects, the present invention provides an avalanche photodiode, which includes, in sequence along the thickness direction: a first anode ohmic contact electrode, a P+ doped layer, a P-type substrate, a P-type epitaxial layer, a P-well, an N-well, an N-type guard ring, a P-well type ohmic contact ring, a second anode ohmic contact electrode, and a cathode ohmic contact electrode, wherein the doping concentration of the P+ doped layer is greater than the doping concentration of the P-type substrate and the doping concentration of the P-type epitaxial layer; wherein,

[0006] The N-well, the N-type guard ring and the P-well type ohmic contact ring extend downward from the surface of the P-type epitaxial layer; the P-well is located below the N-well, and the surface of the N-well completely covers the surface of the P-well; the P-well and the N-well form an avalanche region; the P-type epitaxial layer forms an electron absorption region;

[0007] The N-type guard ring is located at the periphery of the avalanche zone;

[0008] The P-well type ohmic contact ring is located at the periphery of the N-type guard ring;

[0009] The second anode ohmic contact electrode is in contact with the P-well type ohmic contact ring;

[0010] The cathode ohmic contact electrode is contact-connected to the N-well.

[0011] Optionally, the semiconductor material used by the avalanche photodiode is silicon.

[0012] Optionally, the avalanche photodiode further includes: a P-type substrate; the upper and lower surfaces of the P-type substrate are respectively in contact with the P+ doped layer and the P-type epitaxial layer, and the doping concentration of the P+ doped layer is greater than the doping concentration of the P-type substrate.

[0013] Furthermore, the semiconductor material used in the avalanche photodiode is silicon; the doping concentration of the P+ doping layer is 1e18cm -3 -1e20cm -3 , with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type substrate is 1e14 cm -3 -1e18cm -3 , the thickness is 100μm to 500μm, the width is 200μm to 2000μm; the doping concentration of the P-type epitaxial layer is 1e11cm -3 -1e14cm -3 , the thickness is 10μm to 100μm, the width is 200μm to 2000μm; the doping concentration of the N-type guard ring is 1e14cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well is 1e16cm -3 -1e19cm -3 , with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well is 1e16 cm -3 -1e19cm -3, with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring is 1e18 cm -3 -1e20cm -3 , depth is 0.3μm~1.0μm, and ring width is 1.0μm~10μm.

[0014] Optionally, the avalanche photodiode also includes: a substrate and an insulating dielectric layer; wherein the substrate, the insulating dielectric layer and the P+ doped layer are stacked in sequence along the thickness direction, and the substrate and the insulating dielectric layer have a through groove that penetrates the substrate and the insulating dielectric layer, and the first anode ohmic contact electrode covers the substrate surface and the side walls and bottom walls of the through groove.

[0015] Furthermore, the semiconductor material used in the avalanche photodiode is silicon; the doping concentration of the P+ doping layer is 1e16cm -3 -1e18cm -3 , with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the substrate is a P-type substrate with a doping concentration of 1e14 cm -3 -1e18cm -3 , with a thickness of 450 μm to 750 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type epitaxial layer is 1e11 cm -3 -1e14cm -3 , the thickness is 10μm to 100μm, the width is 200μm to 2000μm; the doping concentration of the N-type guard ring is 1e14cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well is 1e16cm -3 -1e19cm -3 , with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well is 1e16 cm -3 -1e19cm -3 , with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring is 1e18 cm -3 -1e20cm -3 , depth is 0.3μm~1.0μm, and ring width is 1.0μm~10μm.

[0016] Optionally, the P-well contacts the surface of the N-well; or the P-well and the N-well are spaced apart, and the interval between the two is no greater than 10 μm.

[0017] Optionally, the avalanche photodiode also includes a first-level N-type guard ring and a second-level N-type guard ring which are nested in sequence on the periphery of the P-well type ohmic contact ring, and ohmic contact electrodes are also formed on the first-level N-type guard ring and the second-level N-type guard ring; when the avalanche photodiode is in a working state, the ohmic contact electrode is grounded or floating.

[0018] Optionally, the avalanche photodiode also includes a third-level N-type guard ring formed on the periphery of the P-well type ohmic contact ring, and an ohmic contact electrode is formed on the third-level N-type guard ring; when the avalanche photodiode is in a working state, the ohmic contact electrode is grounded or floating.

[0019] Optionally, the avalanche photodiode also includes a fourth-level N-type guard ring formed between the N-type guard ring and the P-well type ohmic contact ring, and an ohmic contact electrode is formed on the fourth-level N-type guard ring; when the avalanche photodiode is in a working state, the ohmic contact electrode is grounded or floating.

[0020] The present invention also provides an avalanche photodiode array, which includes a plurality of avalanche photodiodes arranged in an array; wherein the avalanche photodiode is an avalanche photodiode as described in any one of the above items, and two adjacent avalanche photodiodes are isolated by a shallow trench isolation structure.

[0021] The present invention also provides a method for preparing an avalanche photodiode, which is used to prepare the avalanche photodiode described above, and the preparation method comprises:

[0022] Providing an epitaxial wafer, wherein the epitaxial wafer comprises a P-type epitaxial layer;

[0023] Performing P-well ion implantation inside the P-type epitaxial layer;

[0024] Sequentially performing ion implantation of an N-well, an N-type guard ring, and a P-type ohmic contact ring from the surface of the P-type epitaxial layer inward;

[0025] Performing thermal annealing on the ion implantation to form a P-well, an N-well, an N-type guard ring and a P-type ohmic contact ring;

[0026] A P+ doping layer and a first anode ohmic contact electrode are sequentially formed on the lower side of the P-type epitaxial layer, and a second anode ohmic contact electrode and a cathode ohmic contact electrode are formed on the upper surface of the P-type epitaxial layer.

[0027] The present invention also provides a rangefinder based on an avalanche photodiode array, the rangefinder comprising: the avalanche photodiode array as described above, a charge-sensitive preamplifier, a pulse rectifier, a comparator and a display; wherein,

[0028] The avalanche photodiode array is used to receive reflected light and convert the reflected light into a current signal;

[0029] The charge-sensitive preamplifier is used to receive the current signal and amplify it;

[0030] The pulse rectifier is used to receive the amplified current signal and rectify it to obtain a pulse current signal;

[0031] The comparator is used to receive the pulse current signal and compare it with a preset threshold voltage to suppress noise on the pulse current signal, thereby obtaining distance information;

[0032] The display is used to display the distance information output by the comparator.

[0033] As described above, the avalanche photodiode and its preparation method, the avalanche photodiode array and its rangefinder of the present invention, by forming a P+ doping layer on the surface of the P-type epitaxial layer serving as an electron absorption layer, and its doping concentration is relatively large compared to the doping concentration of the P-type epitaxial layer, can adjust the electric field distribution inside the avalanche photodiode, and assist the second anode ohmic contact electrode to achieve full depletion of the P-type epitaxial layer, that is, the full depletion state of the P-type epitaxial layer can be adjusted through the P+ doping layer, so that it can be depleted at a lower voltage, that is, the depletion voltage is reduced, thereby reducing the diffusion current and improving the cut-off frequency of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 FIG. 1 is a schematic cross-sectional structure diagram of a first example of an avalanche photodiode according to the present invention.

[0035] Figure 2 FIG. 2 is a schematic cross-sectional structure diagram of a second example of an avalanche photodiode according to the present invention.

[0036] Figure 3 FIG. 1 is a schematic cross-sectional structure diagram of a third example of an avalanche photodiode according to the present invention.

[0037] Figure 4 FIG. 4 is a schematic cross-sectional structure diagram of a fourth example of an avalanche photodiode according to the present invention.

[0038] Figure 5 FIG. 1 is a schematic cross-sectional structure diagram of a fifth example of an avalanche photodiode according to the present invention.

[0039] Figure 6FIG. 1 is a schematic cross-sectional structure diagram of a sixth example of an avalanche photodiode according to the present invention.

[0040] Figure 7 A schematic cross-sectional structure diagram of an example of an avalanche photodiode array of the present invention is shown.

[0041] Figures 8 to 18 It is a schematic diagram of the cross-sectional structure presented in each step of the method for preparing an avalanche photodiode of the present invention.

[0042] Fig.19 Shown is a simulated spectral response diagram of the first example of the avalanche photodiode of the present invention.

[0043] Fig. 20 Shown is a graph of the photon detection efficiency at 300K for a simulation of the first example of an avalanche photodiode of the present invention.

[0044] Fig.21 Shown are simulated gain and dark current diagrams at different voltages for the first example of the avalanche photodiode of the present invention.

[0045] Fig. 22 A simulation diagram showing the breakdown voltage variation with temperature of the first example of the avalanche photodiode of the present invention is shown.

[0046] Fig.23 Shown is a simulation diagram of the coefficient of breakdown voltage varying with temperature for the first example of the avalanche photodiode of the present invention.

[0047] Fig.24 Shown is a response speed simulation diagram of the first example of the avalanche photodiode of the present invention.

[0048] Component number description

[0049] 100 epitaxial wafer

[0050] 101 first anode ohmic contact electrode

[0051] 102 P+ doped layer

[0052] 103 P-type substrate

[0053] 104 P-type epitaxy

[0054] 105 P-well

[0055] 106 N-well

[0056] 107 N type protection ring

[0057] 108 P-well ohmic contact ring

[0058] 109 second anode ohmic contact electrode

[0059] 110 cathode ohmic contact electrode

[0060] 111 First-level N-type protection ring

[0061] 112 Second level N type protection ring

[0062] 113 Third-level N-type protection ring

[0063] 114 Fourth level N type protection ring

[0064] 115 Ohm contact electrode

[0065] 116 Shallow Trench Isolation Structure

[0066] 117 Substrate

[0067] 118 Insulation dielectric layer

[0068] 119 Through slot

[0069] 200 First dielectric layer

[0070] 201 First Support Wafer

[0071] 202 second supporting wafer

[0072] 203 Second dielectric layer

[0073] 204 Third dielectric layer

[0074] 300 Avalanche Photodiode DETAILED DESCRIPTION

[0075] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0076] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic view is only an example, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional space dimensions of length, width and depth should be included.

[0077] For ease of description, spatial relational terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatial relational terms are intended to include other directions of the device in use or operation in addition to the directions depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can be one or more intervening layers. As used herein, "between..." means including the end point values.

[0078] See also Figures 1 to 24 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0079] like Figures 1 to 4 As shown, this embodiment provides an avalanche photodiode, which includes in sequence along the thickness direction: a first anode ohmic contact electrode 101, a P+ doped layer 102, a P-type epitaxial layer 104, a P well 105, an N well 106, an N-type guard ring 107, a P well type ohmic contact ring 108, a second anode ohmic contact electrode 109 and a cathode ohmic contact electrode 110, wherein the doping concentration of the P+ doped layer 102 is greater than the doping concentration of the P-type epitaxial layer 104; wherein,

[0080] The N-well 106, the N-type guard ring 107 and the P-well type ohmic contact ring 108 extend downward from the surface of the P-type epitaxial layer 104; the P-well 105 is located below the N-well 106, and the surface of the N-well 106 completely covers the surface of the P-well 105; the P-well 105 and the N-well 106 form an avalanche region; the P-type epitaxial layer 104 forms an electron absorption region;

[0081] The N-type guard ring 107 is located at the periphery of the avalanche region;

[0082] The P-well type ohmic contact ring 108 is located at the periphery of the N-type guard ring 107;

[0083] The second anode ohmic contact electrode 109 is in contact with and connected to the P-well type ohmic contact ring 108;

[0084] The cathode ohmic contact electrode 110 is in contact with and connected to the N-well 106 .

[0085] The avalanche photodiode of the present embodiment forms a P+ doped layer 102 on the surface of the P-type epitaxial layer 104 serving as an electron absorption layer, and the doping concentration of the P+ doped layer 102 is relatively large compared to the doping concentration of the P-type epitaxial layer 104. This can adjust the electric field distribution inside the avalanche photodiode and assist the second anode ohmic contact electrode 109 to achieve full depletion of the P-type epitaxial layer 104. That is, the full depletion state of the P-type epitaxial layer 104 can be adjusted through the P+ doped layer 102, so that it can be depleted at a lower voltage, that is, the depletion voltage is reduced, thereby reducing the diffusion current and improving the cut-off frequency of the device.

[0086] As an example, the semiconductor material used by the avalanche photodiode may be an existing conventional semiconductor material, such as silicon, germanium, gallium arsenide, gallium nitride, indium gallium arsenide and other semiconductor materials.

[0087] It should be noted that the surface of the N-well 106 completely covers the surface of the P-well 105, that is, the surface size of the N-well 106 can be the same as the surface size of the P-well 105, or can be larger than the surface size of the P-well 105. The P-well 105 is located below the N-well 106 and can be in contact with it. Figures 1 to 5 In the figure, the P-well 105 and the N-well 106 are in contact with each other, or they may be in a non-contact state, such as Figure 6 As shown, there is a spacing distance between the P-well 105 and the N-well 106. Preferably, the P-well 105 and the N-well 106 are spaced apart, which can effectively increase the electron mean free migration path to improve the device gain under the same external bias voltage, while preventing the breakdown effect between the N-well 106 and the P+ doped layer 102. Setting the spacing between the two too large will increase the difficulty of the ion implantation process, and will also increase the bias voltage and affect the electric field distribution of the device. Therefore, it is preferably set to a spacing distance of no more than 10μm, for example, it can be 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, etc.

[0088] like Figure 1 As shown, as an example, the avalanche photodiode also includes: a P-type substrate 103; the upper and lower surfaces of the P-type substrate 103 are respectively in contact with the P+ doped layer 102 and the P-type epitaxial layer 104, and the doping concentration of the P+ doped layer 102 is greater than the doping concentration of the P-type substrate 103.

[0089] As Figure 1 In a preferred example, the semiconductor material used in the avalanche photodiode is silicon; the doping concentration of the P+ doping layer 102 is 1e18cm -3 -1e20cm -3, with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type substrate 103 is 1e14 cm -3 -1e18cm -3 , the thickness is 100 μm to 500 μm, the width is 200 μm to 2000 μm; the doping concentration of the P-type epitaxial layer 104 is 1e11 cm -3 -1e14cm -3 , with a thickness of 10 μm to 100 μm and a width of 200 μm to 2000 μm; the doping concentration of the N-type guard ring 107 is 1e14 cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well 105 is 1e16cm -3 -1e19cm -3 , with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well 106 is 1e16 cm -3 -1e19cm -3 , with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring 108 is 1e18 cm -3 -1e20cm -3 , depth is 0.3μm~1.0μm, and ring width is 1.0μm~10μm. By setting these parameters, the avalanche photodiode can work in the near-infrared band of 800nm~950nm, and the avalanche photodiode can fully meet the required device cutoff frequency, absorption peak and dark current requirements.

[0090] like Figure 5 and Figure 6 As shown, as an example, the avalanche photodiode also includes: a substrate 117 and an insulating dielectric layer 118; wherein the substrate 117, the insulating dielectric layer 118 and the P+ doped layer 102 are stacked in sequence along the thickness direction, and the substrate 117 and the insulating dielectric layer 118 have a through groove 119 that penetrates the substrate 117 and the insulating dielectric layer 118, and the first anode ohmic contact electrode 101 covers the surface of the substrate 117 and the side walls and bottom walls of the through groove 119.

[0091] As Figure 5 and Figure 6 In a preferred example, the semiconductor material used in the avalanche photodiode is silicon; the doping concentration of the P+ doped layer is 1e16cm -3 -1e18cm -3, with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the substrate is a P-type substrate with a doping concentration of 1e14 cm -3 -1e18cm -3 , with a thickness of 450 μm to 750 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type epitaxial layer is 1e11 cm -3 -1e14cm -3 , the thickness is 10μm to 100μm, the width is 200μm to 2000μm; the doping concentration of the N-type guard ring is 1e14cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well is 1e16cm -3 -1e19cm -3 , with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well is 1e16 cm -3 -1e19cm -3 , with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring is 1e18 cm -3 -1e20cm -3 , depth is 0.3μm~1.0μm, and ring width is 1.0μm~10μm.

[0092] As another preferred example, a circle of N-type guard rings may be provided at the boundary region of the avalanche photodiode to improve the device performance, such as Figure 3As shown, a third-stage N-type guard ring 113 is formed in the avalanche photodiode. The third-stage N-type guard ring 113 is arranged on the periphery of the P-well type ohmic contact ring 108, and an ohmic contact electrode 115 is formed on the third-stage N-type guard ring 113. When the avalanche photodiode is in a working state, the ohmic contact electrode 115 is grounded or floating. Generally, the electric field is relatively strong at the boundary of the doped region, including the boundary of the N-type guard ring 107, which can easily cause the device to break down prematurely. By setting the third-pole N-type guard ring 113, the electric field distribution in these regions can be made more uniform, thereby increasing the breakdown voltage of the device. In addition, the edge region of the device is generally not easy to be depleted. Setting the third-pole N-type guard ring 113 can lead out the diffusion current in the undepleted region at the edge of the device to reduce the influence of the diffusion current on the cutoff frequency of the device. Furthermore, when the avalanche photodiode is in working state (i.e., when in use), the ohmic contact electrode 115 is grounded, i.e., 0V. At this time, the third-pole N-type guard ring 113 can reduce the influence of the body dark current and the surface dark current on the device, thereby increasing the sensitivity of the device. More preferably, the semiconductor material used by the avalanche photodiode can be silicon; the doping concentration of the P+ doping layer 102 is 1e18cm -3 -1e20cm -3 , with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type substrate 103 is 1e14 cm -3 -1e18cm -3 , the thickness is 100 μm to 500 μm, the width is 200 μm to 2000 μm; the doping concentration of the P-type epitaxial layer 104 is 1e11 cm -3 -1e14cm -3 , with a thickness of 10 μm to 100 μm and a width of 200 μm to 2000 μm; the doping concentration of the N-type guard ring 107 is 1e14 cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well 105 is 1e16cm -3 -1e19cm -3 , with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well 106 is 1e16 cm -3 -1e19cm -3 , with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring 108 is 1e18 cm -3 -1e20cm -3, the depth is 0.3μm~1.0μm, the ring width is 1.0μm~10μm; the doping concentration of the third-level N-type guard ring 113 is 1e14cm -3 -1e18cm -3 , depth is 1.0μm~3.0μm, and ring width is 10μm~60μm. By setting these parameters, the avalanche photodiode can work in the near-infrared band of 800nm~950nm, and the avalanche photodiode can further meet the required device cutoff frequency, absorption peak and dark current requirements.

[0093] As another preferred example, two circles of mutually nested N-type guard rings may be provided at the boundary region of the avalanche photodiode to improve the device performance, such as Figure 2 As shown, a first-level N-type guard ring 111 and a second-level N-type guard ring 112 are sequentially nested on the periphery of the P-well type ohmic contact ring, and an ohmic contact electrode 115 is also formed on the first-level N-type guard ring 111 and the second-level N-type guard ring 112; when the avalanche photodiode is in working state, the ohmic contact electrode 115 is grounded or floating. Compared with the above-mentioned third-pole N-type guard ring 113 with only one level, the two-level first-level N-type guard ring 111 and second-level N-type guard ring 112 structure can make the electric field distribution at the boundary of the doped region including the boundary of the N-type guard ring 107 more uniform, and further improve the breakdown voltage of the device; in addition, the diffusion current extraction effect of the non-depleted region at the edge of the device is better; further, when the avalanche photodiode is in working state (i.e., when in use), the ohmic contact electrode 115 is grounded, which can further improve the sensitivity of the device. More preferably, the semiconductor material used in the avalanche photodiode is silicon; the doping concentration of the P+ doping layer 102 is 1e18 cm -3 -1e20cm -3 , with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type substrate 103 is 1e14 cm -3 -1e18cm -3 , the thickness is 100 μm to 500 μm, the width is 200 μm to 2000 μm; the doping concentration of the P-type epitaxial layer 104 is 1e11 cm -3 -1e14cm -3 , with a thickness of 10 μm to 100 μm and a width of 200 μm to 2000 μm; the doping concentration of the N-type guard ring 107 is 1e14 cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well 105 is 1e16cm -3 -1e19cm -3, with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well 106 is 1e16 cm -3 -1e19cm -3 , with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring 108 is 1e18 cm -3 -1e20cm -3 , the depth is 0.3μm~1.0μm, the ring width is 1.0μm~10μm; the doping concentration of the first-level N-type guard ring 111 is 1e14cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the second-level N-type guard ring 112 is 1e14cm -3 -1e18cm -3 , depth is 1.0μm~3.0μm, and ring width is 10μm~60μm. By setting these parameters, the avalanche photodiode can work in the near-infrared band of 800nm~950nm, and the avalanche photodiode can better meet the required device cutoff frequency, absorption peak and dark current requirements.

[0094] As another preferred example, Figure 4 As shown, a fourth-level N-type guard ring 114 can be provided between the N-type guard ring 107 and the P-well type ohmic contact ring 108, and an ohmic contact electrode 115 is formed on the fourth-level N-type guard ring 114; when the avalanche photodiode is in working state, the ohmic contact electrode 115 is grounded or floating. The fourth-level N-type guard ring 114 is provided, and together with the N-type guard ring 107 structure, the electric field distribution at the boundary of the doped region can be made more uniform, thereby improving the breakdown voltage of the device; in addition, when the avalanche photodiode is in working state (i.e., when in use), the ohmic contact electrode 115 is grounded, i.e., 0V, and at this time, the fourth-level N-type guard ring 114 can reduce the influence of the body dark current and the surface dark current on the device, thereby improving the sensitivity of the device. More preferably, the semiconductor material used by the avalanche photodiode is silicon; the doping concentration of the P+ doping layer 102 is 1e18cm -3 -1e20cm -3 , with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type substrate 103 is 1e14 cm -3 -1e18cm -3 , the thickness is 100 μm to 500 μm, the width is 200 μm to 2000 μm; the doping concentration of the P-type epitaxial layer 104 is 1e11 cm -3 -1e14cm-3 , with a thickness of 10 μm to 100 μm and a width of 200 μm to 2000 μm; the doping concentration of the N-type guard ring 107 is 1e14 cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well 105 is 1e16cm -3 -1e19cm -3 , with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well 106 is 1e16 cm -3 -1e19cm -3 , with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring 108 is 1e18 cm -3 -1e20cm -3 , the depth is 0.3μm~1.0μm, the ring width is 1.0μm~10μm; the doping concentration of the fourth-level N-type guard ring 114 is 1e14cm -3 -1e18cm -3 , depth is 1.0μm~3.0μm, and ring width is 10μm~60μm. By setting these parameters, the avalanche photodiode can work in the near-infrared band of 800nm~950nm, and the avalanche photodiode can fully meet the required device cutoff frequency, absorption peak and dark current requirements.

[0095] As an example, the P-type doping ions in the avalanche photodiode may be boron ions, and the N-type doping ions may be phosphorus ions, but this is not limited thereto, and other semiconductor doping ions may also be used.

[0096] The following is a specific example of an avalanche photodiode, which works in the near-infrared band of 800nm ​​to 950nm. The avalanche photodiode includes, in sequence along the thickness direction: a first anode ohmic contact electrode 101, a P+ doped layer 102, a P-type substrate 103, a P-type epitaxial layer 104, a P-well 105, an N-well 106, an N-type guard ring 107, a P-well type ohmic contact ring 108, a second anode ohmic contact electrode 109, and a cathode ohmic contact electrode 110. The doping concentration of the P+ doped layer 102 is greater than the doping concentration of the P-type substrate 103 and the doping concentration of the P-type epitaxial layer 104; the N-well 106, the N-type guard ring 107, and the P-well type ohmic contact ring 108 extends downward from the surface of the P-type epitaxial layer 104; the P-well 105 is located below the N-well 106, and the surface of the N-well 106 completely covers the surface of the P-well 105; the P-well 105 and the N-well 106 form an avalanche region; the P-type epitaxial layer 104 forms an electron absorption region; the N-type guard ring 107 is located at the periphery of the avalanche region; the P-well type ohmic contact ring 108 is located at the periphery of the N-type guard ring 107; the second anode ohmic contact electrode 109 is in contact with the P-well type ohmic contact ring 108; the cathode ohmic contact electrode 110 is in contact with the N-well 106; wherein the semiconductor material used by the avalanche photodiode is silicon. Figures 19 to 24 As shown in FIG. 1 , the simulation results of the avalanche photodiode performance of the above specific example are shown. Fig.19 As shown, the light absorption peak of the avalanche photodiode of this example is about 840nm, which is within the near-infrared spectrum range of 800nm ​​to 950nm; Fig. 20 As shown in FIG. 1 , the maximum photon efficiency of the avalanche photodiode in this example can reach nearly 80% when simulated under 300K conditions; Fig.21 As shown, the breakdown voltage of the avalanche photodiode in this example is about 150V; Fig. 22 and Fig.23 As shown in FIG. 1 , the coefficient of variation of the breakdown voltage of the avalanche photodiode of this example with temperature is 1.165 V / °C; Fig.24 As shown, the response speed of the avalanche photodiode of this example is 614 MHz. The simulation results show that the avalanche photodiode of this example can work preferably in the near-infrared spectrum range.

[0097] Based on the above avalanche photodiode, this embodiment further provides an avalanche photodiode array, including a plurality of the above avalanche photodiodes 300 arranged in an array, such as Figure 7 As shown, in the avalanche photodiode array, two adjacent avalanche photodiodes 300 are isolated by a shallow trench isolation structure 116 .

[0098] Based on the above avalanche photodiode array, this embodiment also provides a rangefinder based on the above avalanche photodiode array, the rangefinder comprising: the above avalanche photodiode array, a charge-sensitive preamplifier, a pulse rectifier, a comparator and a display; wherein,

[0099] The avalanche photodiode array is used to receive reflected light and convert the reflected light into a current signal;

[0100] The charge-sensitive preamplifier is used to receive the current signal and amplify it;

[0101] The pulse rectifier is used to receive the amplified current signal and rectify it to obtain a pulse current signal;

[0102] The comparator is used to receive the pulse current signal and compare it with a preset threshold voltage to suppress noise on the pulse current signal and improve the signal-to-noise ratio of the detection signal, thereby obtaining distance information; it should be noted that the preset threshold voltage may be one or more, depending on a specific application scenario or specific requirements;

[0103] The display is used to display the distance information output by the comparator.

[0104] Based on the above-mentioned avalanche photodiode, this embodiment also provides a method for preparing an avalanche photodiode, which can be used to prepare the above-mentioned avalanche photodiode, but is not limited thereto. The above-mentioned avalanche photodiode can also be obtained by other preparation methods. The beneficial effects that can be achieved by the avalanche photodiode prepared by the preparation method can be found in the above-mentioned avalanche photodiode, which will not be described in detail below. The preparation method of the avalanche photodiode is described below in conjunction with specific drawings.

[0105] like Figure 8 and Fig. 9 As shown, step S1 is first performed to provide an epitaxial wafer 100 , wherein the epitaxial wafer 100 includes a P-type epitaxial layer 104 .

[0106] It should be noted here that the epitaxial wafer 100 can be directly purchased from outside; or the epitaxial wafer 100 can be obtained by purchasing a substrate wafer from outside and forming a P-type epitaxial layer 104 thereon through an epitaxial deposition process.

[0107] In this embodiment, the thickness of the epitaxial wafer 100 is selected to be 750 μm.

[0108] like Figure 8 As shown, as an example, the substrate of the epitaxial wafer 100 may be a single-layer semiconductor substrate, such as Figure 8In the embodiment, the epitaxial wafer 100 is composed of a P-type substrate 103 and a P-type epitaxial layer thereon.

[0109] like Fig. 9 As shown, as an example, the substrate of the epitaxial wafer 100 can be a semiconductor layer on an insulator structure, that is, it includes a substrate 117, an insulating dielectric layer 118 and an upper semiconductor layer, and a P+ doped layer 102 is formed by ion implantation of the upper semiconductor layer, for example, a SOI structure, including a silicon substrate, a silicon dioxide insulating dielectric layer and an upper semiconductor layer.

[0110] For ease of description, in the subsequent steps, the structure of the epitaxial wafer 100 is explained using a single-layer semiconductor substrate as an example, but those skilled in the art can understand that the substrate of the epitaxial wafer 100 can also be a semiconductor layer on an insulator structure, which does not require creative labor.

[0111] like Fig.10 As shown, step S2 is then performed to perform P-well ion implantation inside the P-type epitaxial layer 104 .

[0112] As a specific example, a first dielectric layer 200 may be formed on the surface of the P-type epitaxial layer 104 as a protective layer for ion implantation, and then ion implantation may be performed. For example, when the P-type epitaxial layer 104 is a silicon epitaxial layer, the material of the first dielectric layer 200 may be silicon dioxide.

[0113] In this embodiment, the P-type substrate 103 and the P-type epitaxial layer 104 are made of silicon material, and the material of the first dielectric layer 200 is silicon dioxide; the ion implantation concentration of the P-well is 1-9e16cm -3 The implantation depth is 0.9 μm to 2 μm, and the implantation energy is 1 MkeV to 2 MkeV.

[0114] like Fig.11 As shown, step S3 is then performed to sequentially perform ion implantation of an N-well, an N-type guard ring, and a P-type ohmic contact ring from the surface of the P-type epitaxial layer 104 inward.

[0115] In this embodiment, the concentration of the ion implantation of the N-well, the ion implantation of the N-type guard ring, and the ion implantation of the P-type ohmic contact ring is 1-9e16cm -3 The implantation depth is 0.9 μm to 2 μm, and the implantation energy is 1 MkeV to 2 MkeV.

[0116] As an example, when the avalanche photodiode is also provided with a first-stage N-type guard ring, a second-stage N-type guard ring, a third-stage N-type guard ring, or a fourth-stage N-type guard ring, ion implantation of the corresponding guard rings may also be completed in this step.

[0117] like Fig.11 As shown, step S4 is then performed to perform a thermal annealing treatment on the ion implantation to activate the implanted ions, so as to form a P-well 105 , an N-well 106 , an N-type guard ring 107 and a P-type ohmic contact ring 108 .

[0118] In this embodiment, the thermal annealing temperature is selected to be 800° C. to 1100° C., and the annealing time is 20 min to 90 min.

[0119] like Fig.15 and Fig.18 As shown, step S5 is finally performed to sequentially form a P+ doped layer 102 and a first anode ohmic contact electrode 101 on the lower side of the P-type epitaxial layer 104 , and form a second anode ohmic contact electrode 109 and a cathode ohmic contact electrode 110 on the upper surface of the P-type epitaxial layer 104 .

[0120] like Figures 12 to 15 As shown, as a specific example, when the substrate of the epitaxial wafer 100 is a single-layer semiconductor layer, step S5 includes: first, as shown in Fig.12 As shown, a first supporting wafer 201 is bonded to the front side of the structure, that is, to the surface of the first dielectric layer 200; then, the P-type substrate 103 is thinned to a preset thickness; then, as shown Fig.13 As shown, P+ type ions are implanted inward from the surface of the thinned P-type substrate 103; then, a thermal annealing treatment is performed to activate the implanted ions, thereby forming the P+ doping layer 102; then, metal deposition is performed on the surface of the P+ doping layer 102 to form the first anode ohmic contact electrode 101. In this embodiment, the ion implantation concentration of the P+ doping layer 102 is selected to be 1e18cm -3 -1e20cm -3 , the implantation depth is 0μm~1.5μm, the implantation energy is 200keV; the thermal annealing temperature is 800℃~1100℃, and the annealing time is 20min~90min; then, Fig.14 As shown, a second support wafer 202 is bonded to the back of the above structure, that is, to the surface of the first anode ohmic contact electrode 101, and the first support wafer 201 is debonded and removed; then, the first dielectric layer 200 is removed by wet method, and a second dielectric layer 203 is regrown on the P-type epitaxial layer 104; then, as Fig.15 As shown, a photoresist layer is formed on the surface of the second dielectric layer 203 and patterned, and the second dielectric layer 203 is etched based on the patterned photoresist layer; then, a metal layer is deposited and patterned to form the second anode ohmic contact electrode 109 and the cathode ohmic contact electrode 110; then, a third dielectric layer 204 is deposited on the surface of the above structure and patterned; finally, as shown Figures 1 to 4 As shown, the second supporting wafer 202 is debonded and removed, and finally the avalanche photodiode is obtained.

[0121] like Figures 16 to 18 As shown, as a specific example, when the substrate of the epitaxial wafer 100 is a semiconductor layer on an insulator structure, ion implantation can be performed on the upper semiconductor layer to form the P+ doped layer 102 when forming the epitaxial wafer 100. In this case, step S5 includes: first, Fig.16 As shown, the first dielectric layer 200 is removed by wet method, and a second dielectric layer 203 is regrown on the P-type epitaxial layer 104; then, as shown Fig.17 As shown, a photoresist layer is formed on the surface of the second dielectric layer 203 and patterned, and the second dielectric layer 203 is etched based on the patterned photoresist layer; then, a metal layer is deposited and patterned to form the second anode ohmic contact electrode 109 and the cathode ohmic contact electrode 110; then, a third dielectric layer 204 is deposited on the surface of the above structure and patterned; then, as shown in FIG. Fig.17 As shown, the substrate 117 and the insulating dielectric layer 118 are etched to form a through groove 119; finally, as shown Fig.18 As shown, a metal deposition step is performed to form the first anode ohmic contact electrode 101 on the surface of the substrate 117 and the sidewalls and bottom walls of the through groove 119, and finally the avalanche photodiode is obtained. The epitaxial wafer 100 with a semiconductor layer on insulator structure is used to prepare an avalanche photodiode. The semiconductor layer on insulator structure can be used to reduce the use of supporting wafers in the preparation process, thereby reducing the bonding and debonding processes, and effectively reducing the preparation complexity and manufacturing cost.

[0122] In this embodiment, a thermal oxidation process is selected to form the second dielectric layer 203 , and the material of the second dielectric layer 203 is silicon dioxide; the material of the third dielectric layer 204 is silicon nitride.

[0123] As an example, when the avalanche photodiode is also provided with a first-stage N-type guard ring, a second-stage N-type guard ring, a third-stage N-type guard ring, or a fourth-stage N-type guard ring, it is necessary to form an ohmic contact electrode 115 on the surface of the corresponding guard ring, so the ohmic contact electrode 115 can also be formed in this step. For example, when the metal layer is deposited and patterned, the second anode ohmic contact electrode 109 and the cathode ohmic contact electrode 110 are formed and the ohmic contact electrode 115 is formed at the same time.

[0124] In summary, the avalanche photodiode and its preparation method, avalanche photodiode array and its rangefinder of the present invention, by forming a P+ doping layer on the surface of the P-type epitaxial layer as an electron absorption layer, and its doping concentration is relatively large compared to the doping concentration of the P-type epitaxial layer, can adjust the electric field distribution inside the avalanche photodiode, and assist the second anode ohmic contact electrode to achieve full depletion of the P-type epitaxial layer, that is, the full depletion state of the P-type epitaxial layer can be adjusted through the P+ doping layer, so that it can be depleted at a lower voltage, that is, the depletion voltage is reduced, thereby reducing the diffusion current and increasing the cutoff frequency of the device. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0125] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. An avalanche photodiode, characterized in that: The avalanche photodiode includes, in sequence along the thickness direction: a first anode ohmic contact electrode, a P+ doped layer, a P-type epitaxial layer, a P well, an N well, an N-type guard ring, a P well-type ohmic contact ring, a second anode ohmic contact electrode, and a cathode ohmic contact electrode, wherein the doping concentration of the P+ doped layer is greater than the doping concentration of the P-type epitaxial layer; wherein, The N-well, the N-type guard ring and the P-well type ohmic contact ring extend downward from the surface of the P-type epitaxial layer; the P-well is located below the N-well, and the surface of the N-well completely covers the surface of the P-well; the P-well and the N-well form an avalanche region; the P-type epitaxial layer forms an electron absorption region; The N-type guard ring is located at the periphery of the avalanche zone; The P-well type ohmic contact ring is located at the periphery of the N-type guard ring; The second anode ohmic contact electrode is in contact with the P-well type ohmic contact ring; The cathode ohmic contact electrode is contact-connected to the N-well.

2. The avalanche photodiode according to claim 1, characterized in that: The semiconductor material used by the avalanche photodiode is silicon.

3. The avalanche photodiode according to claim 1 or 2, characterized in that: The avalanche photodiode further comprises: A P-type substrate; the upper and lower surfaces of the P-type substrate are respectively in contact with the P+ doped layer and the P-type epitaxial layer, and the doping concentration of the P+ doped layer is greater than the doping concentration of the P-type substrate.

4. The avalanche photodiode according to claim 3, characterized in that: The semiconductor material used in the avalanche photodiode is silicon; the doping concentration of the P+ doping layer is 1e18cm -3 -1e20cm -3 , with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type substrate is 1e14 cm -3 -1e18cm -3 , the thickness is 100μm to 500μm, the width is 200μm to 2000μm; the doping concentration of the P-type epitaxial layer is 1e11cm -3 -1e14cm -3 , the thickness is 10μm to 100μm, the width is 200μm to 2000μm; the doping concentration of the N-type guard ring is 1e14cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well is 1e16cm -3 -1e19cm -3 , with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well is 1e16 cm -3 -1e19cm -3 , with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring is 1e18 cm -3 -1e20cm -3 , depth is 0.3μm~1.0μm, and ring width is 1.0μm~10μm.

5. The avalanche photodiode according to claim 1, characterized in that: The avalanche photodiode also includes: a substrate and an insulating dielectric layer; wherein the substrate, the insulating dielectric layer and the P+ doped layer are stacked in sequence along the thickness direction, and the substrate and the insulating dielectric layer have a through groove that penetrates the substrate and the insulating dielectric layer, and the first anode ohmic contact electrode covers the substrate surface and the side walls and bottom walls of the through groove.

6. The avalanche photodiode according to claim 5, characterized in that: The semiconductor material used in the avalanche photodiode is silicon; the doping concentration of the P+ doping layer is 1e16cm -3 -1e18cm -3 , with a thickness of 0.1 μm to 1.0 μm and a width of 200 μm to 2000 μm; the substrate is a P-type substrate with a doping concentration of 1e14 cm -3 -1e18cm -3 , with a thickness of 450 μm to 750 μm and a width of 200 μm to 2000 μm; the doping concentration of the P-type epitaxial layer is 1e11 cm -3 -1e14cm -3 , the thickness is 10μm to 100μm, the width is 200μm to 2000μm; the doping concentration of the N-type guard ring is 1e14cm -3 -1e18cm -3 , the depth is 1.0μm to 3.0μm, the ring width is 10μm to 60μm; the doping concentration of the P well is 1e16cm -3 -1e19cm -3 , with a thickness of 0.8 μm to 2.0 μm and a width of 80 μm to 700 μm; the doping concentration of the N well is 1e16 cm -3 -1e19cm -3 , with a thickness of 0.7 μm to 1.5 μm and a width of 100 μm to 800 μm; the doping concentration of the P-well type ohmic contact ring is 1e18 cm -3 -1e20cm -3 , depth is 0.3μm~1.0μm, and ring width is 1.0μm~10μm.

7. The avalanche photodiode according to claim 1, characterized in that: The P-well is in contact with the surface of the N-well; Or the P-well and the N-well are spaced apart, and the interval between them is no greater than 10 μm.

8. The avalanche photodiode according to claim 1, characterized in that: The avalanche photodiode also includes a first-level N-type guard ring and a second-level N-type guard ring which are nested in sequence on the outer periphery of the P-well type ohmic contact ring, and ohmic contact electrodes are also formed on the first-level N-type guard ring and the second-level N-type guard ring; when the avalanche photodiode is in a working state, the ohmic contact electrode is grounded or floating.

9. The avalanche photodiode according to claim 1, characterized in that: The avalanche photodiode also includes a third-level N-type guard ring formed on the periphery of the P-well type ohmic contact ring, and an ohmic contact electrode is formed on the third-level N-type guard ring; when the avalanche photodiode is in a working state, the ohmic contact electrode is grounded or floating.

10. The avalanche photodiode according to claim 1, characterized in that: The avalanche photodiode also includes a fourth-level N-type guard ring formed between the N-type guard ring and the P-well type ohmic contact ring, and an ohmic contact electrode is formed on the fourth-level N-type guard ring; when the avalanche photodiode is in a working state, the ohmic contact electrode is grounded or floating.

11. An avalanche photodiode array, characterized in that: The avalanche photodiode array includes a plurality of avalanche photodiodes arranged in an array; wherein the avalanche photodiode is an avalanche photodiode as claimed in any one of claims 1 to 10, and two adjacent avalanche photodiodes are isolated by a shallow trench isolation structure.

12. A method for preparing an avalanche photodiode, for preparing the avalanche photodiode as claimed in claim 1, characterized in that: The preparation method comprises: Providing an epitaxial wafer, wherein the epitaxial wafer comprises a P-type epitaxial layer; Performing P-well ion implantation inside the P-type epitaxial layer; Sequentially performing ion implantation of an N-well, an N-type guard ring, and a P-type ohmic contact ring from the surface of the P-type epitaxial layer inward; Performing thermal annealing on the ion implantation to form a P-well, an N-well, an N-type guard ring and a P-type ohmic contact ring; A P+ doping layer and a first anode ohmic contact electrode are sequentially formed on the lower side of the P-type epitaxial layer, and a second anode ohmic contact electrode and a cathode ohmic contact electrode are formed on the upper surface of the P-type epitaxial layer.

13. A rangefinder based on an avalanche photodiode array, characterized in that: The rangefinder comprises: an avalanche photodiode array as claimed in claim 11, a charge-sensitive preamplifier, a pulse rectifier, a comparator and a display; wherein, The avalanche photodiode array is used to receive reflected light and convert the reflected light into a current signal; The charge-sensitive preamplifier is used to receive the current signal and amplify it; The pulse rectifier is used to receive the amplified current signal and rectify it to obtain a pulse current signal; The comparator is used to receive the pulse current signal and compare it with a preset threshold voltage to suppress noise on the pulse current signal, thereby obtaining distance information; The display is used to display the distance information output by the comparator.

Images