High-speed SPI communication method based on double-drive isolation

Abstract

The invention discloses a high-speed SPI (Serial Peripheral Interface) communication method based on double-drive isolation, which is characterized in that another auxiliary SPI drive is added at an SPI master station side to form a double-SPI drive structure, the auxiliary SPI works in a slave station mode, and a clock signal CLK3 input by the auxiliary SPI is positively and negatively corrected by digital isolation, so that a phase difference caused by unidirectional transmission delay is counteracted. According to software, an SPI-Master is configured to work in a master station data sending mode, an SPI-Assist is configured to work in a slave station data receiving mode, and the whole SPI dual-drive structure forms a full-duplex transceiving system. Through the signal waveform checked by the oscilloscope, the returned MOSI signal and CLK signal are almost not delayed. The input data is sampled according to the clock signal without clock phase deviation, and the sampled data is accurate. The method is mainly applied to power supply isolation high-speed communication design in the power electronic industry.

Description

Technical Field

[0001] The invention relates to a synchronous serial communication protocol, and in particular to a high-speed SPI communication method based on dual-drive isolation. Background Art

[0002] SPI is a synchronous serial communication protocol, mainly used for data communication between embedded systems and peripherals. It has the characteristics of full-duplex, high speed and simple hardware structure. It usually uses 4 lines for communication, including clock line (SCLK), chip select line (CS), master output slave input line (MOSI) and master input slave output line (MISO). The basic working principle of SPI communication is realized through data transmission between master and slave devices. The master device is responsible for initializing the data transmission frame and selecting and communicating with the slave device through the clock signal line (SCLK) and chip select signal line (CS). Data is sent from the master device to the slave device through the MOSI line, and the slave device sends data back to the master device through the MISO line, realizing full-duplex communication. The data transmission rate supported by SPI communication can range from several thousand bps to several hundred Mbps, and the specific rate depends on the specifications and performance of the master and slave devices.

[0003] Existing technology and defects:

[0004] Existing SPI communication technology is applied to embedded non-isolated systems, the structure is as follows Figure 1 As shown, the SPI master (SPI-Master) sends a chip select signal CS, a clock signal CLK, a data transmission signal MOSI, and receives a data input signal MISO from the slave (SPI-Slave). The communication rate in this structure state is relatively high, reaching tens of Mbps.

[0005] When applied to an isolation system, the conventional operation method is to add a digital isolation device between the master and slave communications to electrically isolate the master and slave communication signals. Its structure is as follows: Figure 2 shown.

[0006] Because of the signal delay of the isolation device, the reference clock CLK1 for data transmission and the reference clock CLK2 for data readback will have a phase offset, which will seriously affect the upper limit of the SPI communication rate. The degree of impact varies depending on the electrical delay parameters of the isolation device. In severe cases, data communication may be disordered at several thousand bps. Therefore, a method is needed to eliminate the problem of SPI data sampling errors caused by device signal delay in embedded isolation systems.

[0007] In view of this, the present invention is proposed. Summary of the invention

[0008] The purpose of the present invention is to provide a high-speed SPI communication method based on dual-drive isolation to solve the above-mentioned technical problems existing in the prior art.

[0009] The objective of the present invention is achieved through the following technical solutions:

[0010] The high-speed SPI communication method based on dual-drive isolation of the present invention adds another auxiliary SPI drive to the SPI master station to form a dual SPI drive structure. The auxiliary SPI works in slave mode, and its input clock signal CLK3 has been positively and negatively corrected by digital isolation, thereby offsetting the phase difference caused by unidirectional transmission delay.

[0011] Compared with the prior art, the high-speed SPI communication method based on dual-drive isolation provided by the present invention adopts a dual-drive SPI isolation method, and the signal waveform viewed by an oscilloscope has almost no delay in the return MOSI signal and CLK signal. The input data is sampled according to the clock signal without clock phase deviation, and the sampled data is accurate. It is mainly used in the isolated high-speed communication design of power supplies in the power electronics industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 The schematic diagram is a schematic diagram of applying the prior art SPI communication technology to an embedded non-isolated system.

[0013] Figure 2 This is a schematic diagram of a conventional operation method in the prior art that adds a digital isolation device between master and slave communications to electrically isolate the signals of the master and slave communications when applied in an isolation system.

[0014] Figure 3 It is a schematic diagram of the structure of dual-drive isolation according to an embodiment of the present invention.

[0015] Figure 4 The figure is a schematic diagram of the signal waveform of the conventional isolation method in the prior art viewed through an oscilloscope.

[0016] Figure 5 This is a schematic diagram of signal waveforms viewed through an oscilloscope using a dual-drive SPI isolation method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0017] The following is a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention; it is obvious that the described embodiments are only part of the embodiments of the present invention, not all of the embodiments, which does not constitute a limitation of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the protection scope of the present invention.

[0018] First, the terms that may be used in this article are explained as follows:

[0019] The term “and / or” means that either or both of them can be realized at the same time. For example, X and / or Y means both “X” or “Y” and “X and Y”.

[0020] The terms "include", "comprises", "contains", "has" or other descriptions with similar semantics should be interpreted as non-exclusive inclusion. For example, including certain technical feature elements (such as raw materials, components, ingredients, carriers, dosage forms, materials, dimensions, parts, components, mechanisms, devices, steps, procedures, methods, reaction conditions, processing conditions, parameters, algorithms, signals, data, products or products, etc.) should be interpreted as including not only certain technical feature elements explicitly listed, but also other technical feature elements known in the art that are not explicitly listed.

[0021] The term "consisting of..." means excluding any technical feature elements not explicitly listed. If this term is used in a claim, it will make the claim closed, so that it does not contain technical feature elements other than the technical feature elements explicitly listed, except for the conventional impurities related to them. If this term only appears in a clause of a claim, it only limits the elements explicitly listed in the clause, and the elements recorded in other clauses are not excluded from the overall claim.

[0022] It is not to be construed as limiting the present invention as having to have a specific orientation, being constructed and operating in a specific orientation.

[0023] The contents not described in detail in the examples of the present invention belong to the prior art known to professionals in the field. If no specific conditions are specified in the examples of the present invention, the conditions are carried out according to the conventional conditions in the field or the conditions recommended by the manufacturer. If the manufacturer is not specified in the reagents or instruments used in the examples of the present invention, they are all conventional products that can be purchased commercially.

[0024] The high-speed SPI communication method based on dual-drive isolation of the present invention adds another auxiliary SPI drive to the SPI master station to form a dual SPI drive structure. The auxiliary SPI works in slave mode, and its input clock signal CLK3 has been positively and negatively corrected by digital isolation, thereby offsetting the phase difference caused by unidirectional transmission delay.

[0025] The software configures SPI-Master to work in the master data transmission mode, and configures SPI-Assist to work in the slave data reception mode. The entire SPI dual-drive structure constitutes a full-duplex transceiver system.

[0026] The system automatically shields the phase deviation problem of clock and data signals caused by the digital isolator, so that the high-speed working rate of SPI is still not affected in the isolation system.

[0027] In summary, the high-speed SPI communication method based on dual-drive isolation in the embodiment of the present invention adopts a dual-drive SPI isolation method, and the signal waveform viewed by the oscilloscope has almost no delay in the return MOSI signal and CLK signal. The input data is sampled according to the clock signal without clock phase deviation, and the sampled data is accurate. It is mainly used in the isolated high-speed communication design of power supplies in the power electronics industry.

[0028] In order to more clearly demonstrate the technical solution and technical effects provided by the present invention, the embodiments of the present invention are described in detail with specific embodiments below.

[0029] Example 1

[0030] The structure of the dual drive isolation of the present invention is as follows Figure 3 As shown in the figure, another auxiliary SPI driver is added to the SPI master station to form a dual SPI driver structure. The auxiliary SPI works in slave mode, and its input clock signal CLK3 has been corrected by digital isolation, offsetting the phase difference caused by unidirectional transmission delay. The software configures SPI-Master to work in master data transmission mode, and configures SPI-Assist to work in slave data reception mode. The entire SPI dual-drive structure constitutes a full-duplex transceiver system. The system automatically shields the problem of clock and data signal phase deviation caused by the digital isolator, so that the high-speed working rate of SPI is still unaffected in the isolation system.

[0031] Testing and experimental verification

[0032] The dual-drive solution proposed in this invention is compared with the traditional solution. The master station sends CLK signals and data, and the slave station returns the same data. The signal waveform of the conventional isolation method is checked by an oscilloscope. Figure 4 As shown, there is a transmission delay of about 16ns between sending the CLK signal and returning the MOSI signal, and this transmission delay will affect the accuracy of data sampling.

[0033] Same as above, using the dual-drive SPI isolation method, the signal waveform viewed through the oscilloscope is as follows Figure 5 As shown, the returned MOSI signal and CLK signal have almost no delay. The input data is sampled according to the clock signal without clock phase deviation, and the sampled data is accurate.

[0034] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with the technical field within the technical scope disclosed in the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims. The information disclosed in the background technology section of this article is only intended to deepen the understanding of the overall background technology of the present invention, and should not be regarded as an admission or in any form that the information constitutes prior art known to those skilled in the art.

Claims

1. A high-speed SPI communication method based on dual-drive isolation, It is characterized in that Another auxiliary SPI driver is added to the SPI master station to form a dual SPI driver structure. The auxiliary SPI works in slave mode, and its input clock signal CLK3 has been corrected by digital isolation, offsetting the phase difference caused by unidirectional transmission delay.

2. The high-speed SPI communication method based on dual-drive isolation according to claim 1, It is characterized in that The software configures SPI-Master to work in the master data transmission mode, and configures SPI-Assist to work in the slave data reception mode. The entire SPI dual-drive structure constitutes a full-duplex transceiver system.

3. The high-speed SPI communication method based on dual-drive isolation according to claim 2, It is characterized in that The system automatically shields the phase deviation problem of clock and data signals caused by the digital isolator, so that the high-speed working rate of SPI is still not affected in the isolation system.

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