Double-gate enhanced gallium nitride radio frequency power transistor

Abstract

The invention discloses a double-gate enhanced gallium nitride radio frequency power transistor, which relates to the field of transistors and comprises a substrate, a buffer layer, a GaN channel layer and an AlGaN barrier layer which are sequentially stacked, a p-GaN cap layer is arranged on the upper surface of the AlGaN barrier layer; a direct current grid electrode is arranged on the upper surface of the p-GaN cap layer; two ends of the upper surface of the AlGaN barrier layer are respectively provided with a source electrode and a drain electrode; a radio frequency grid electrode is arranged on the upper surface of the AlGaN barrier layer and located between the source electrode and the p-GaN cap layer. The transistor structure designed by the invention relates to the double-gate combination of the radio frequency gate and the direct current gate, so that the transistor device can simultaneously obtain a plurality of excellent electrical characteristics such as high cut-off frequency, positive threshold voltage, large breakdown voltage and low switch ratio.

Description

Technical Field

[0001] The present application relates to the field of transistors, and in particular to a dual-gate enhancement-mode gallium nitride radio frequency power transistor. Background Art

[0002] With the advent of the 5G era, communication methods and RF technologies have been greatly improved, so the requirements for RF devices have become more and more stringent. The two-dimensional electron gas generated by the polarization of GaN HEMT devices (gallium nitride high electron mobility transistors) has a high mobility and saturated carrier velocity, and is widely used in high-frequency, high-speed and high-power operations. Therefore, GaN HEMT devices play an indispensable role in power amplifiers and RF switches in RF front-end applications.

[0003] For RF power amplifiers, the enhancement mode with a positive threshold voltage can use a unipolar bias design, which will greatly save space, improve operational safety and simplify circuit design. Although conventional GaN HEMT devices have excellent power amplification capabilities, due to the spontaneous generation of the two-dimensional electron gas, GaN HEMT devices are usually depletion devices. Therefore, in actual use, GaN HEMT devices usually have to be turned off by using a negative voltage at the gate, which undoubtedly increases the circuit complexity and process cost. Although the p-GaN gate HEMT device is the most mature and most promising enhancement-mode GaN n-FET device, its transconductance, cutoff frequency and maximum oscillation frequency are far inferior to those of conventional GaN HEMT devices due to the presence of the p-GaN cap layer. Conventional GaN HEMTs do not have a competitive advantage in the practical application of 5G communications due to their negative threshold voltage. Summary of the invention

[0004] The purpose of the present application is to provide a dual-gate enhancement-mode gallium nitride radio frequency power transistor having electrical characteristics of high cross-over and cut-off frequencies and a positive threshold voltage, thereby improving the radio frequency performance of the radio frequency power transistor.

[0005] To achieve the above objectives, this application provides the following solutions:

[0006] In a first aspect, the present application provides a dual-gate enhancement-mode gallium nitride radio frequency power transistor, comprising: a substrate, a buffer layer, a GaN channel layer, an AlGaN barrier layer, a p-GaN cap layer, a source, a radio frequency gate, a DC gate, and a drain;

[0007] The substrate, the buffer layer, the GaN channel layer and the AlGaN barrier layer are stacked in sequence from bottom to top;

[0008] The p-GaN cap layer is disposed on the upper surface of the AlGaN barrier layer; the DC gate is disposed on the upper surface of the p-GaN cap layer;

[0009] The source electrode and the drain electrode are respectively arranged at two ends of the upper surface of the AlGaN barrier layer;

[0010] The radio frequency gate is arranged on the upper surface of the AlGaN barrier layer and is located between the source and the p-GaN cap layer.

[0011] Optionally, the distance between the RF gate and the source is smaller than the distance between the RF gate and the drain;

[0012] The distance between the DC gate and the drain is smaller than the distance between the DC gate and the source.

[0013] Optionally, at the interface between the AlGaN barrier layer and the GaN channel layer, a two-dimensional electron gas is generated on the side close to the GaN channel layer through piezoelectric polarization and spontaneous polarization effects.

[0014] Optionally, the substrate is a silicon substrate, a sapphire substrate, a silicon carbide substrate or a self-supporting gallium nitride substrate.

[0015] Optionally, the buffer layer is a gallium nitride layer doped with iron or carbon, an AlGaN superlattice structure or a GaN superlattice structure.

[0016] Optionally, materials of the source electrode and the drain electrode include T, Al, Ni and Au.

[0017] Optionally, the material of the RF gate includes Ni and Au.

[0018] Optionally, the thickness of the substrate is 1 mm;

[0019] The thickness of the buffer layer is 4um;

[0020] The thickness of the GaN channel layer is 100 nm;

[0021] The thickness of the AlGaN barrier layer is 20 nm;

[0022] The thickness of the p-GaN cap layer is 70 nm.

[0023] Optionally, the length of the source electrode is 5um;

[0024] The length of the radio frequency gate is 0.5um;

[0025] The length of the DC gate is 2um;

[0026] The length of the drain electrode is 5 um.

[0027] According to the specific embodiments provided in this application, this application discloses the following technical effects:

[0028] The present application provides a dual-gate enhancement-mode gallium nitride radio frequency power transistor, in which a radio frequency gate and a direct current gate are added on the basis of a conventional p-GaN gate HEMT. The radio frequency gate is a Schottky gate structure close to the source side, and its main function is to input radio frequency signals. Due to its low parasitic capacitance and high channel carrier mobility, the transistor device has high transconductance and cutoff frequency. The direct current gate is a p-GaN gate structure close to the drain side, and its contact can be ohmic contact, Schottky contact and dielectric layer isolation (MIS) and other methods. Due to the presence of the p-GaN cap layer, the direct current gate can obtain a positive threshold voltage, thereby controlling the switch of the transistor device; in addition, the direct current gate can also increase the transconductance, improve the power added efficiency and filter the power supply noise. Therefore, the dual-gate combination of the radio frequency gate and the direct current gate can simultaneously obtain multiple excellent electrical characteristics such as high cutoff frequency, positive threshold voltage, large breakdown voltage and low switching ratio, thereby improving the electrical characteristics of the GaN HEMT device. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0030] Figure 1 A schematic diagram of the structure of a dual-gate enhancement-mode gallium nitride radio frequency power transistor provided in an embodiment of the present application;

[0031] Figure 2 A schematic structural diagram of a cross section 1 of a transistor provided in an embodiment of the present application;

[0032] Figure 3 A schematic structural diagram of a cross section 2 of a transistor provided in an embodiment of the present application;

[0033] Figure 4 A schematic structural diagram of a cross section 3 of a transistor provided in an embodiment of the present application;

[0034] Figure 5 A schematic structural diagram of a cross section 4 of a transistor provided in an embodiment of the present application.

[0035] Reference numerals:

[0036] Substrate—1; buffer layer—2; GaN channel layer—3; AlGaN barrier layer—4; p-GaN cap layer—5; source—6; RF gate—7; DC gate—8; drain—9. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0038] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0039] Example

[0040] This embodiment provides a dual-gate enhancement-mode gallium nitride radio frequency power transistor, such as Figures 1 to 5 As shown, it includes a substrate 1, a buffer layer 2, a GaN channel layer 3, an AlGaN barrier layer 4, a p-GaN cap layer 5, a source 6, an RF gate 7, a DC gate 8, and a drain 9.

[0041] Among them, the substrate 1, the buffer layer 2, the GaN channel layer 3, and the AlGaN barrier layer 4 are stacked in sequence from top to bottom. The substrate 1 is placed at the bottom of the entire structure and plays a supporting role. It may be, but not limited to, a silicon substrate, a sapphire substrate, a silicon carbide (SiC) substrate, or a self-supporting gallium nitride substrate. The buffer layer 2 is located on the substrate 1, and may use, but not limited to, a gallium nitride layer doped with iron (Fe) or carbon (C) or an Al(Ga)N / GaN superlattice structure. The GaN channel layer 3 is located above the buffer layer 2. The AlGaN barrier layer 4 is above the GaN channel layer 3, and generates a two-dimensional electron gas 2DEG10 on the side close to the GaN channel layer 3 through piezoelectric polarization and spontaneous polarization effects at the interface between it and the GaN channel layer 3.

[0042] The p-GaN cap layer 5 is located on the upper surface of the AlGaN barrier layer 4. A DC gate 8 is provided above the p-GaN cap layer 5.

[0043] A source electrode 6 and a drain electrode 9 are disposed at both ends of the upper surface of the AlGaN barrier layer 4. A radio frequency gate electrode 7 is disposed on the upper surface of the AlGaN barrier layer 4 and is located between the source electrode and the p-GaN cap layer.

[0044] The RF gate 7 is a Schottky gate structure, close to the source side, that is, the distance between the RF gate and the source is smaller than the distance between the RF gate and the drain, and its main function is to input RF signals. The DC gate 8 is a pGaN gate structure, close to the drain side, that is, the distance between the DC gate and the drain is smaller than the distance between the DC gate and the source, which plays the role of controlling device switching, filtering power supply noise, etc., wherein the p-GaN contact can be ohmic contact, Schottky contact and dielectric layer isolation (MIS) and other methods. The dual-gate combination of the RF gate and the DC gate can simultaneously obtain multiple excellent electrical characteristics such as high cut-off frequency, positive threshold voltage, large breakdown voltage and low switching ratio.

[0045] As an optional implementation, the thickness of the substrate is 1 mm.

[0046] As an optional implementation, the thickness of the buffer layer is 4 um.

[0047] As an optional implementation, the thickness of the GaN channel layer is 100 nm.

[0048] As an optional implementation manner, the thickness of the AlGaN barrier layer is 20 nm.

[0049] As an optional implementation manner, the thickness of the p-GaN cap layer is 70 nm.

[0050] As an optional implementation, the length of the source electrode is 5 um.

[0051] As an optional implementation, the length of the RF gate is 0.5 um.

[0052] As an optional implementation, the length of the DC gate is 2 um.

[0053] As an optional implementation, the length of the drain is 5 um.

[0054] As an optional implementation manner, materials of the source electrode and the drain electrode include T, Al, Ni and Au.

[0055] As an optional implementation, the material of the RF gate includes Ni and Au.

[0056] The material type and size data of each structure described above are only examples and do not have any limiting effect in this embodiment. The material type and size can be adjusted according to actual needs.

[0057] The structural design of the dual-gate enhancement-mode gallium nitride RF power transistor designed in this embodiment is based on the conventional p-GaN gate HEMT, and a conventional RF gate is added to the left side of the p-GaN gate, and the electrical characteristics of the RF gate such as high transconductance and large saturation current are used to input the RF signal. The p-GaN gate mainly plays the role of controlling the switching of the device and filtering the power supply noise, among which the pGaN contact can be a variety of methods such as ohmic contact, Schottky contact and dielectric layer isolation (MIS). This combination can simultaneously obtain multiple excellent electrical characteristics such as high cut-off frequency, positive threshold voltage, large breakdown voltage and low switching ratio.

[0058] In order to obtain the above dual-gate enhancement-mode gallium nitride RF power transistor structure, the following manufacturing process is proposed:

[0059] Step (1): Select an epitaxial wafer having a substrate 1, a buffer layer 2, a GaN channel layer 3, an AlGaN barrier layer 4 and a p-GaN cap layer 5. The substrate 1, the buffer layer 2, the GaN channel layer 3, the AlGaN barrier layer 4 and the p-GaN cap layer 5 of the epitaxial wafer are as follows: Figure 1 The positional relationship is shown.

[0060] Step (2): If the DC gate 8 adopts MIS gate contact, a dielectric layer may be deposited on the entire surface, including but not limited to aluminum oxide (Al2O3), silicon oxide (SiO2) and silicon nitride (SiXN y )wait.

[0061] Step (3): mesa isolation step: ICP-RIE dry etching of AlGaN / GaN to the buffer layer to form electrical isolation.

[0062] Step (4): Deposit metal (such as Ti / Ni, TiN / Ni) on the DC gate 8, use the gate metal as a hard mask, etch the p-GaN cap layer 5, expose the source and drain contact areas, and only leave the p-GaN cap layer 5 in the DC gate 8 area.

[0063] Step (5): Surface treatment (acid treatment: HCl, BOE) is performed on the device with completed mesa isolation to remove surface oxides and reduce surface trap state density.

[0064] Step (6): using electron beam evaporation or magnetron sputtering technology, evaporate ohmic contact metal (such as Ti / Al / Ti / Au or Ti / Al / Ni / Au) on the source and drain electrode area windows (dielectric layer openings), and quickly anneal to form the source 6 and drain 9.

[0065] Step (7): using electron beam evaporation or magnetron sputtering technology to evaporate Schottky contact metal (such as Ni / Au or Ti / Au) on the gate area window to form a radio frequency gate 7.

[0066] The present application also provides an application scenario, which uses the above-mentioned dual-gate enhancement-type gallium nitride RF power transistor. Specifically: The dual-gate enhancement-type gallium nitride RF power transistor provided in this embodiment can be used in a Class D switching amplifier to achieve signal amplification while controlling the switch, wherein the DC gate realizes the enhanced switching device function and the RF gate realizes the signal amplification function.

[0067] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0068] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A dual-gate enhancement-mode gallium nitride radio frequency power transistor, characterized in that: include: Substrate, buffer layer, GaN channel layer, AlGaN barrier layer, p-GaN cap layer, source, RF gate, DC gate and drain; The substrate, the buffer layer, the GaN channel layer and the AlGaN barrier layer are stacked in sequence from bottom to top; The p-GaN cap layer is disposed on the upper surface of the AlGaN barrier layer; The DC gate is arranged on the upper surface of the p-GaN cap layer; The source electrode and the drain electrode are respectively arranged at two ends of the upper surface of the AlGaN barrier layer; The radio frequency gate is arranged on the upper surface of the AlGaN barrier layer and is located between the source and the p-GaN cap layer.

2. The dual-gate enhancement-mode gallium nitride radio frequency power transistor according to claim 1, characterized in that: The distance between the RF gate and the source is smaller than the distance between the RF gate and the drain; The distance between the DC gate and the drain is smaller than the distance between the DC gate and the source.

3. The dual-gate enhancement-mode gallium nitride radio frequency power transistor according to claim 1, characterized in that: At the interface between the AlGaN barrier layer and the GaN channel layer, two-dimensional electron gas is generated on the side close to the GaN channel layer through piezoelectric polarization and spontaneous polarization effects.

4. The dual-gate enhancement-mode gallium nitride radio frequency power transistor according to claim 1, characterized in that: The substrate is a silicon substrate, a sapphire substrate, a silicon carbide substrate or a self-supporting gallium nitride substrate.

5. The dual-gate enhancement-mode gallium nitride radio frequency power transistor according to claim 1, characterized in that: The buffer layer is a gallium nitride layer doped with iron or carbon, an AlGaN superlattice structure or a GaN superlattice structure.

6. The dual-gate enhancement-mode gallium nitride radio frequency power transistor according to claim 1, characterized in that: Materials of the source electrode and the drain electrode include T, Al, Ni, and Au.

7. The dual-gate enhancement-mode gallium nitride radio frequency power transistor according to claim 1, characterized in that: The material of the radio frequency gate includes Ni and Au.

8. The dual-gate enhancement-mode gallium nitride radio frequency power transistor according to claim 1, characterized in that: The thickness of the substrate is 1 mm; The thickness of the buffer layer is 4um; The thickness of the GaN channel layer is 100 nm; The thickness of the AlGaN barrier layer is 20 nm; The thickness of the p-GaN cap layer is 70 nm.

9. The dual-gate enhancement-mode gallium nitride radio frequency power transistor according to claim 1, characterized in that: The length of the source electrode is 5um; The length of the radio frequency gate is 0.5um; The length of the DC gate is 2um; The length of the drain electrode is 5 um.

Images