Two-parameter sensor array and preparation method thereof

Abstract

The invention provides a two-parameter sensor array and a preparation method thereof, the two-parameter sensor array comprises a substrate, a divider resistor array, a Schottky diode array and a pressure-sensitive film, and the divider resistor array comprises a plurality of divider resistors arranged in an array; the Schottky diode array comprises a plurality of Schottky diodes located on the divider resistors respectively, each Schottky diode comprises a negative electrode, a positive electrode and a semiconductor structure located between the negative electrode and the positive electrode, and the negative electrode is electrically connected with the first end of the corresponding divider resistor. The first end of the positive electrode is electrically connected with the negative electrode through the semiconductor structure, and the second end of the positive electrode is electrically connected with the second end of the corresponding divider resistor; during a pressure test, the pressure-sensitive film covers the Schottky diode array. The problems that the sensitivity and the spatial resolution of a pressure-sensitive sensor in a two-parameter sensor array cannot be considered at the same time, and a temperature sensor is easily coupled to a pressure signal are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a dual-parameter sensor array and a preparation method thereof. Background Art

[0002] Human skin has a remarkable ability to detect a wide range of physical parameters with high resolution and capture intricate details of contacting objects. This skin-like sensing capability is crucial for emerging artificial intelligence applications, including electronic skin (e-skin), human-machine interaction, and soft robotics. Currently, researchers have developed a series of flexible sensors based on different materials, structures, and fabrication processes, achieving impressive performance comparable to that of human skin. However, many sensing devices are limited to detecting a single signal and cannot provide comprehensive information about the contacting object. For example, in e-skin applications, sensors must simultaneously detect at least two basic physical parameters: pressure and temperature. Pressure detection is crucial for estimating the weight and shape of an object, while temperature feedback provides critical thermal information. In addition, multifunctional manipulation of objects can only be achieved using flexible sensor arrays with high spatial resolution, just like human skin.

[0003] The challenge of dual-parameter sensors lies in the decoupling of the two signals, pressure and temperature. However, since the measurement of pressure and temperature often relies on the resistance change of the sensing material, it is complicated to distinguish the source of the stimulus. One solution is to use a separate sensing mechanism for each parameter. For example, this can be achieved through some combination, such as thermoelectric effect and piezoresistive effect, or integrating pressure-sensitive field-effect transistors with thermal resistance characteristics. However, in these two methods, the sensitivity and spatial resolution of the pressure sensor cannot be taken into account at the same time, and the problem of temperature sensor coupling to the pressure signal is inevitable. These two problems are the main challenges faced in the current design of dual-parameter sensor arrays. Summary of the invention

[0004] In order to solve the above technical problems, an embodiment of the present invention provides a dual-parameter sensor array, comprising:

[0005] substrate;

[0006] A voltage-dividing resistor array located on the substrate, the voltage-dividing resistor array comprising a plurality of voltage-dividing resistors arranged in an array;

[0007] A Schottky diode array located on the voltage-dividing resistor array, the Schottky diode array comprising a plurality of Schottky diodes respectively located on a plurality of the voltage-dividing resistors, the Schottky diode comprising a cathode electrode, an anode electrode and a semiconductor structure located between the cathode electrode and the anode electrode, the cathode electrode being electrically connected to a first end of the corresponding voltage-dividing resistor, the first end of the anode electrode being electrically connected to the cathode electrode through the semiconductor structure, and the second end of the anode electrode being electrically connected to a second end of the corresponding voltage-dividing resistor;

[0008] A pressure-sensitive film, during a pressure test, the pressure-sensitive film covers the Schottky diode array.

[0009] Optionally, the Schottky diode further includes a semiconductor structure, and the semiconductor structure is connected between the cathode electrode and the anode electrode.

[0010] Optionally, a resistance insulating layer is provided between the cathode electrode and the voltage-dividing resistor, a first via hole is provided on the resistance insulating layer, a first conductive component is provided in the first via hole, and the cathode electrode is electrically connected to the first end of the voltage-dividing resistor through the first conductive component.

[0011] Optionally, the semiconductor structure is located on the cathode electrode, and the anode electrode is located above the semiconductor structure. An etching stop layer is provided between the anode electrode and the semiconductor structure. A second via and a third via are provided on the etching stop layer. The second via is communicated with the semiconductor structure, and a second conductive component is provided in the second via. The first end of the anode electrode is electrically connected to the semiconductor structure through the second conductive component. The third via is communicated with the second end of the voltage-dividing resistor, and a third conductive component is provided in the third via. The second end of the anode electrode is electrically connected to the second end of the voltage-dividing resistor through the third conductive component.

[0012] Optionally, the resistance insulating layer is located on the substrate and covers the voltage dividing resistor.

[0013] Optionally, the etching stop layer is located on the resistive insulating layer and covers the semiconductor structure and the cathode electrode.

[0014] Optionally, a protective layer is further provided on the anode electrode, the protective layer is located on the etching stop layer, the protective layer covers the anode electrode, and a fourth via hole exposing the anode electrode is further provided on the protective layer.

[0015] Optionally, the metal material of the anode electrode uses a high work function metal material to form a Schottky barrier.

[0016] Optionally, the metal material of the cathode electrode uses a metal with a low work function or a composite material to form an ohmic contact.

[0017] Optionally, the conductive material in the pressure-sensitive film includes two materials with opposite temperature coefficients.

[0018] Another embodiment of the present invention further provides a method for preparing a dual-parameter sensor array, comprising:

[0019] providing a substrate;

[0020] forming a voltage-dividing resistor array on the substrate, wherein the voltage-dividing resistor array comprises a plurality of voltage-dividing resistors arranged in an array;

[0021] A Schottky diode array is formed on the voltage-dividing resistor array, wherein the Schottky diode array includes a plurality of Schottky diodes respectively located on the plurality of voltage-dividing resistors, wherein the Schottky diode includes a cathode electrode, an anode electrode, and a semiconductor structure located between the cathode electrode and the anode electrode, wherein the cathode electrode is electrically connected to a first end of the corresponding voltage-dividing resistor, the first end of the anode electrode is electrically connected to the cathode electrode through the semiconductor structure, and the second end of the anode electrode is electrically connected to a second end of the corresponding voltage-dividing resistor;

[0022] A pressure-sensitive film is formed, and during a pressure test, the pressure-sensitive film covers the Schottky diode array.

[0023] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0024] In the present invention, since the Schottky diode is sensitive to temperature (because temperature will change the intensity of the movement of semiconductor carriers in the Schottky diode), but is not sensitive to pressure, that is, the pressure response is low, therefore, the influence on the pressure signal is avoided and the coupling problem of the pressure signal is eliminated; at the same time, the present invention uses a temperature-insensitive pressure-sensitive film as a pressure-sensitive sensor array, avoiding the influence on the temperature signal, eliminating the coupling problem of the temperature signal, and thus solving the signal decoupling problem of pressure and temperature.

[0025] Since the Schottky diodes are distributed in an array over the entire substrate, the density and pixel points of the Schottky diodes (i.e., temperature sensors) are increased, thereby improving the sensitivity of the temperature sensors while also taking into account their spatial resolution. During the pressure test, the pressure-sensitive film completely covers the Schottky diode array, increasing the distribution density and pixel points of the pressure-sensitive sensors, thereby improving the sensitivity of the pressure-sensitive sensors while also taking into account their spatial resolution. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0027] Figure 1 is a top view of a voltage-dividing resistor provided by an embodiment of the present invention;

[0028] Figure 2 is along Figure 1 A cross-sectional view of the a-a1 axis;

[0029] Figure 3 is along Figure 1 A cross-sectional view of the b-b1 axis;

[0030] Figure 4 is a top view of a cathode electrode prepared according to an embodiment of the present invention;

[0031] Figure 5 is along Figure 4 A cross-sectional view of the a-a1 axis;

[0032] Figure 6 is along Figure 4 A cross-sectional view of the b-b1 axis;

[0033] Figure 7 is a top view of a semiconductor structure prepared according to an embodiment of the present invention;

[0034] Figure 8 is along Figure 7 A cross-sectional view of the a-a1 axis;

[0035] Fig. 9 is along Figure 7 A cross-sectional view of the b-b1 axis;

[0036] Fig.10 is a top view of the preparation of an etching stop layer and an anode electrode provided by an embodiment of the present invention;

[0037] Fig.11 is along Fig.10 A cross-sectional view of the a-a1 axis;

[0038] Fig.12 is along Fig.10 A cross-sectional view of the b-b1 axis;

[0039] Fig.13 is a top view of a protective layer prepared according to an embodiment of the present invention;

[0040] Fig.14 is along Fig.13 A cross-sectional view of the a-a1 axis;

[0041] Fig.15 is along Fig.13 A cross-sectional view of the b-b1 axis;

[0042] Fig.16 is an equivalent circuit diagram of a single pressure-sensitive sensor provided by an embodiment of the present invention;

[0043] Fig.17 is an equivalent circuit diagram of a pressure-sensitive sensor array provided by an embodiment of the present invention;

[0044] Fig.18 is an equivalent circuit diagram of a single temperature-sensitive sensor provided by an embodiment of the present invention;

[0045] Fig.19 1 is an equivalent circuit diagram of a temperature sensitive sensor provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0046] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0047] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices. The terms "on" and "above" and any variations thereof are intended to describe positional relationships and do not represent a relationship of direct contact between the described objects.

[0048] As described in the background art, in a dual-parameter sensor array, there are problems that the sensitivity and spatial resolution of the pressure-sensitive sensor cannot be taken into account at the same time, and the temperature sensor is easily coupled to the pressure signal.

[0049] In one embodiment, first, in the dual-parameter sensor array, the area of ​​the temperature-sensitive sensor is relatively large, while the distribution area reserved for the pressure-sensitive sensor is relatively small, thereby limiting the area ratio of the pressure-sensitive sensor in the dual-parameter sensor array. Since the sensitivity of the pressure-sensitive sensor is positively correlated with the area ratio of the pressure-sensitive sensor in the dual-parameter sensor, the sensitivity of the pressure-sensitive sensor is limited; at the same time, when the area of ​​the pressure-sensitive sensor is increased, its spatial resolution cannot be taken into account. Secondly, the temperature sensor in the dual-parameter sensor will also be affected by the pressure, so the pressure signal and the temperature signal will be coupled, which makes it difficult to decouple the signals in the dual-parameter sensor.

[0050] In order to solve the above problems, the present invention provides a dual-parameter sensor array, comprising:

[0051] substrate;

[0052] A voltage-dividing resistor array located on the substrate, the voltage-dividing resistor array comprising a plurality of voltage-dividing resistors arranged in an array;

[0053] A Schottky diode array located on the voltage-dividing resistor array, the Schottky diode array comprising a plurality of Schottky diodes respectively located on a plurality of the voltage-dividing resistors, the Schottky diode comprising a cathode electrode, an anode electrode and a semiconductor structure located between the cathode electrode and the anode electrode, the cathode electrode being electrically connected to a first end of the corresponding voltage-dividing resistor, the first end of the anode electrode being electrically connected to the cathode electrode through the semiconductor structure, and the second end of the anode electrode being electrically connected to a second end of the corresponding voltage-dividing resistor;

[0054] A pressure-sensitive film, during a pressure test, the pressure-sensitive film covers the Schottky diode array.

[0055] In the present invention, since the Schottky diode is sensitive to temperature (because temperature will change the intensity of the movement of semiconductor carriers in the Schottky diode), but is not sensitive to pressure, that is, the pressure response is low, therefore, the influence on the pressure signal is avoided and the coupling problem of the pressure signal is eliminated; at the same time, the present invention uses a temperature-insensitive pressure-sensitive film as a pressure-sensitive sensor array, avoiding the influence on the temperature signal, eliminating the coupling problem of the temperature signal, and thus solving the signal decoupling problem of pressure and temperature.

[0056] Since the Schottky diodes are distributed in an array over the entire substrate, the density and pixel points of the Schottky diodes (i.e., temperature sensors) are increased, thereby improving the sensitivity of the temperature sensors while also taking into account their spatial resolution. During the pressure test, the pressure-sensitive film completely covers the Schottky diode array, increasing the distribution density and pixel points of the pressure-sensitive sensors, thereby improving the sensitivity of the pressure-sensitive sensors while also taking into account their spatial resolution.

[0057] In order to make the above-mentioned purposes, features and beneficial effects of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0058] Please refer to Figures 1 to 15 An embodiment of the present invention provides a method for preparing a dual-parameter sensor array, comprising:

[0059] Providing a substrate 1;

[0060] A voltage-dividing resistor array is formed on the substrate 1, wherein the voltage-dividing resistor array includes a plurality of voltage-dividing resistors 2 arranged in an array;

[0061] A Schottky diode array is formed on the voltage-dividing resistor array, the Schottky diode array includes a plurality of Schottky diodes respectively located on a plurality of the voltage-dividing resistors 2, the Schottky diode includes a cathode electrode 4, an anode electrode 8, and a semiconductor structure 6 located between the cathode electrode 4 and the anode electrode 8, the cathode electrode 4 is electrically connected to a first end of the corresponding voltage-dividing resistor 2, the first end of the anode electrode 8 is electrically connected to the cathode electrode 4 through the semiconductor structure 6, and the second end of the anode electrode 8 is electrically connected to a second end of the corresponding voltage-dividing resistor 2;

[0062] A pressure-sensitive film is formed, and during a pressure test, the pressure-sensitive film covers the Schottky diode array.

[0063] The preparation method of the dual-parameter sensor array is described in detail below with reference to the accompanying drawings.

[0064] A substrate 1 is provided, wherein the material of the substrate 1 is a glass substrate or polyimide.

[0065] When the substrate 1 is a glass substrate, a clean glass plate is selected as the substrate 1 .

[0066] When the material of substrate 1 is polyimide, the method for forming the substrate 1 includes: first, providing a glass substrate, and spin-coating a polyimide reagent on the glass substrate; second, treating the glass substrate spin-coated with the polyimide reagent according to a set annealing temperature; and then, using a plasma enhanced chemical vapor deposition process to prepare a buffer layer composed of silicon nitride and silicon dioxide on the annealed substrate to obtain the substrate 1, which is a flexible polyimide substrate.

[0067] Please refer to Figures 1 to 3 , a voltage-dividing resistor array is formed on a substrate 1, wherein the voltage-dividing resistor array includes a plurality of voltage-dividing resistors 2 arranged in an array.

[0068] In one embodiment, a method for forming the voltage-dividing resistor 2 includes: preparing a voltage-dividing resistor layer on a substrate 1 ; and etching the voltage-dividing resistor layer using a mask plate to form the voltage-dividing resistor 2 on the substrate 1 .

[0069] In one implementation, a voltage-dividing resistor layer is prepared on the substrate 1 by a sputtering process, and the voltage-dividing resistor layer is etched by a wet etching technique to form the voltage-dividing resistor 2 on the substrate 1 .

[0070] In one example, the thickness of the voltage-dividing resistor 2 is 190 nm to 210 nm. By adjusting the thickness of the voltage-dividing resistor 2 within the range of 190 nm to 210 nm, the resistance value can be controlled to be at the same order of magnitude as the resistance value of the pressure-sensitive film, thereby improving the pressure sensitivity.

[0071] Preferably, the thickness of the voltage-dividing resistor 2 is 200 nm.

[0072] The material of the voltage divider resistor 2 is a mature technology in this field. Therefore, this embodiment does not specifically limit the material of the voltage divider resistor 2. In a specific example, the material of the voltage divider resistor 2 is indium tin oxide (ITO). The method of forming the voltage divider resistor 2 includes: sputtering an ITO layer on a substrate 1; wet etching the ITO layer using a mask plate to form the voltage divider resistor 2 on the substrate 1. Of course, the material of the voltage divider resistor 2 is not limited to indium tin oxide, and can also be other materials, such as indium zinc oxide (IZO) and indium oxide (In2O3).

[0073] The formed plurality of voltage-dividing resistors 2 form a voltage-dividing resistor array, and after the voltage-dividing resistor array is formed, a Schottky diode array is prepared on the voltage-dividing resistor array. The Schottky diode array includes a plurality of Schottky diodes respectively located on the plurality of voltage-dividing resistors 2, and the Schottky diode includes a cathode electrode 4, an anode electrode 8, and a semiconductor structure 6 located between the cathode electrode 4 and the anode electrode 8, the cathode electrode 4 is electrically connected to the first end of the corresponding voltage-dividing resistor 2, the first end of the anode electrode 8 is electrically connected to the cathode electrode 4 through the semiconductor structure 6, and the second end of the anode electrode 8 is electrically connected to the second end of the corresponding voltage-dividing resistor 2.

[0074] In one embodiment, a resistance insulating layer 3 is provided between the cathode electrode 4 and the voltage-dividing resistor 2 , a first via hole is provided on the resistance insulating layer 3 , a first conductive component 5 is provided in the first via hole, and the cathode electrode 4 is electrically connected to the first end of the voltage-dividing resistor 2 through the first conductive component 5 .

[0075] Please refer to Figures 4 to 6 In one example, the resistance insulating layer 3 is formed on the substrate 1, and the resistance insulating layer 3 covers the voltage-dividing resistor 2; a first via hole is provided on the resistance insulating layer 3, and the first via hole exposes the first end of the voltage-dividing resistor 2.

[0076] The material of the resistive insulating layer 3 is a mature technology in the art, so this embodiment does not specifically limit the material of the resistive insulating layer 3. In a specific example, the material of the resistive insulating layer 3 is silicon oxide. Of course, the material of the resistive insulating layer 3 is not limited to silicon oxide, but can also be other materials, such as silicon nitride.

[0077] The method for forming the resistive insulating layer 3 comprises: depositing a resistive insulating material layer on the substrate 1, the resistive insulating material layer covering the voltage divider resistor 2; and etching the resistive insulating material layer on the first end of the voltage divider resistor 2 using a mask plate to form a plurality of first via holes.

[0078] In a typical example, a resistive insulating material layer is deposited on the substrate 1 using a plasma enhanced chemical vapor deposition process.

[0079] In one embodiment, the thickness of the resistive insulating material layer is 190 nm to 210 nm.

[0080] In a typical example, the thickness of the resistive insulating material layer is 200 nm.

[0081] In one embodiment, the method for forming a plurality of first via holes includes: forming a hard mask layer on the resistive insulating material layer, using the mask plate to form a first via pattern on the hard mask plate using a wet etching process; then using the hard mask plate having the pattern of the plurality of first via holes as a mask, etching the resistive insulating material layer using a dry etching process to form a plurality of first via holes on the resistive insulating material layer, thereby forming the resistive insulating layer 3.

[0082] In one embodiment, after forming the resistive insulating layer 3 having a plurality of first via holes on the substrate 1, it further includes: forming a cathode electrode 4 located above the voltage divider resistor 2 on the resistive insulating layer 3, at which time the first end of the voltage divider resistor 2 is electrically connected to the cathode electrode 4 through the first via hole.

[0083] The method for forming the cathode electrode 4 includes: forming a cathode electrode material layer on the resistor insulating layer 3; etching the cathode electrode material layer using a mask plate and a wet etching process to form the cathode electrode 4, at which time the cathode electrode 4 has been electrically connected to the first end of the voltage divider resistor 2 through the first via hole.

[0084] The material of the cathode material layer is a mature technology in the art. Therefore, this embodiment does not impose any specific restrictions on the material of the cathode material layer. The cathode material layer can be a composite material of molybdenum and indium tin oxide, aluminum and indium tin oxide, or titanium and indium tin oxide. Of course, the material of the cathode material layer is not limited to a composite material, but can also be a metal with a low work function, as long as it can form an ohmic contact.

[0085] In a typical example, a cathode material layer is formed on the resistive insulating layer 3 by a sputtering process.

[0086] In a typical example, molybdenum, aluminum or titanium is firstly sputtered on the resistive insulating layer 3 by a sputtering process; and then indium tin oxide is sputtered by a sputtering process to form the cathode material layer.

[0087] In a typical example, the thickness of the sputtered molybdenum, aluminum or titanium is 200 nm; the thickness of the sputtered indium tin oxide is 50 nm.

[0088] Please refer to Figures 7 to 9 In a typical example, a semiconductor structure 6 is prepared on a cathode electrode 4, and the method includes: forming a semiconductor material layer on the cathode electrode 4 by a sputtering process; and etching the semiconductor material layer by a mask template and a wet etching process to obtain a semiconductor structure 6.

[0089] Semiconductor materials are mature technologies in this field. Therefore, this embodiment does not impose any specific restrictions on semiconductor materials. In a specific example, the semiconductor material is at least one of N-type semiconductors Si, GaAs and InGaZnO, and the thickness is 60 nm.

[0090] Please refer to Figures 10 to 12 In one example, an etching stop layer 7 is formed on the resistor insulating layer 3, and the etching stop layer 7 covers the cathode electrode 4 and the semiconductor structure 6; a second via and a third via are provided on the etching stop layer 7, and the second via exposes the semiconductor structure 6, that is, the second via is connected to the semiconductor structure 6; the third via exposes the second end of the voltage-dividing resistor 2, that is, the third via is connected to the second end of the voltage-dividing resistor 2.

[0091] In some specific examples, the material of the etching stop layer 7 is silicon oxide.

[0092] The method for forming the etching stop layer 7 includes: depositing an etching stop material layer on the resistive insulating layer 3, the etching stop material layer covering the cathode electrode 4 and the semiconductor structure 6; using a mask plate, etching the etching stop material layer to form a plurality of second via holes and a third via hole for subsequent connection to the anode electrode 8. Among them, by etching the etching stop material layer on the semiconductor structure 6, a plurality of second via holes are formed for electrical conduction between the anode electrode 8 and the semiconductor structure 6; by etching the etching stop material layer and the resistive insulating material layer on the second end of the voltage divider resistor 2, a plurality of third via holes are formed for electrical conduction between the anode electrode 8 and the second end of the voltage divider resistor 2.

[0093] In a typical example, a plasma enhanced chemical vapor deposition process is used to deposit an etching stop material layer on the resistive insulating layer 3 .

[0094] In one embodiment, the thickness of the etch stop material layer is 190 nm to 210 nm.

[0095] In a typical example, the thickness of the etching stop material layer is 200 nm.

[0096] In one embodiment, the method for forming a plurality of second vias includes: forming a hard mask layer on the etch barrier material layer, using the mask plate to form second via and third via patterns on the hard mask plate using a wet etching process; then using the hard mask plate having the pattern of the plurality of second vias and the third vias as a mask, etching the etch barrier material layer using a dry etching process to form a plurality of second vias and third vias on the etch barrier material layer, thereby forming the etch barrier layer 7.

[0097] In one embodiment, after the etching stop layer 7 having a plurality of second vias and a third via is formed on the resistive insulating layer 3, an anode electrode 8 is further formed on the etching stop layer 7, and the first end of the anode electrode 8 is electrically connected to the semiconductor structure 6 through the second via, and the second end of the anode electrode 8 is electrically connected to the second end of the voltage divider resistor 2 through the third via. The plurality of anode electrodes 8 may be arranged in an array at intervals, or may be integrally connected to form a circular structure, and this embodiment does not impose any specific restrictions on this.

[0098] The method for forming the anode electrode 8 includes: forming an anode electrode material layer on the etching stop layer 7; etching the anode electrode material layer using a mask plate and a wet etching process to form the anode electrode 8, at which time the first end of the anode electrode 8 has been electrically connected to the semiconductor structure 6 through the second via hole, and the second end of the anode electrode 8 has been electrically connected to the second end of the voltage divider resistor 2 through the third via hole.

[0099] The anode material layer uses a high work function metal material to form a Schottky barrier. This embodiment does not impose any specific restrictions on the high work function metal material, such as Pd or Pt.

[0100] In a typical example, an anode material layer is formed on the etch stop layer 7 by a sputtering process.

[0101] In a typical example, Pd or Pt is firstly sputtered on the etching stop layer 7 by a sputtering process, and then an anode electrode pattern is obtained by a mask and wet etching technology to form the anode electrode 8.

[0102] Please refer to Figures 13 to 15 In a typical example, a protective layer 11 is prepared on the anode electrode 8. The method includes: forming a protective layer 11 on the etching barrier layer 7, wherein the protective layer 11 covers the anode electrode 8; using a mask plate, etching the protective layer 11 to form a fourth via 12 for exposing the anode electrode 8 to facilitate subsequent electrical performance testing. During the electrical performance testing, the varistor film or the external resistor 13 is connected to the array for testing.

[0103] In a typical example, the protective layer 11 is deposited on the etch stop layer 7 by using a plasma enhanced chemical vapor deposition process.

[0104] In a specific example, the material of the protection layer 11 is an insulating material, such as silicon oxide, silicon oxide, etc.

[0105] In one embodiment, the thickness of the protection layer 11 is 190 nm to 210 nm.

[0106] In a specific example, the thickness of the protective layer 11 is 200 nm.

[0107] A pressure-sensitive film is prepared, wherein the conductive material in the pressure-sensitive film includes at least two materials with opposite temperature coefficients, MWCNTs (multi-walled carbon nanotubes) and silver nanowires. MWCNTs (multi-walled carbon nanotubes) and silver nanowires are mixed to form a pressure-sensitive film composite material with a zero temperature coefficient, which is not easily affected by temperature.

[0108] The preparation method of the pressure-sensitive film includes: mixing MWCNTs and silver nanowires, using a magnetic stirring table to fully mix them and then filtering them through a water filter membrane, at which time a conductive film is formed on the water filter membrane. After the filter membrane is completely dried, the PDMS mixture (main agent and curing agent) is poured on the conductive film and then cured on a hot plate. Finally, the PDMS is peeled off from the filter membrane to obtain a temperature-insensitive pressure-sensitive film.

[0109] In summary, in the preparation method of the dual-parameter sensor array provided by the present invention, since the Schottky diode is sensitive to temperature but not to pressure, that is, the pressure response is low, the influence on the pressure signal is avoided and the coupling problem of the pressure signal is eliminated; at the same time, a temperature-insensitive pressure-sensitive film is used as a pressure-sensitive sensor, which avoids the influence on the temperature signal and eliminates the coupling problem of the temperature signal, thereby solving the signal decoupling problem of pressure and temperature.

[0110] Since the Schottky diodes are distributed in an array on the entire substrate 1, the density and pixel points of the Schottky diodes are increased, so while the sensitivity of the temperature sensor is improved, its spatial resolution is also taken into account. During the pressure test, the pressure-sensitive film completely covers the Schottky diode array, which increases the distribution density and pixel points of the pressure-sensitive sensor. Therefore, while the sensitivity of the pressure-sensitive sensor is improved, the spatial resolution is also taken into account.

[0111] One embodiment of the present invention provides a dual-parameter sensor array, please refer to Figures 1 to 15 , comprising: a substrate 1, a voltage-dividing resistor array located on the substrate 1, a Schottky diode array located on the voltage-dividing resistor array and a pressure-sensitive film, wherein the voltage-dividing resistor array comprises a plurality of voltage-dividing resistors 2 arranged in an array.

[0112] A Schottky diode array located on the voltage-dividing resistor array, the Schottky diode array includes a plurality of Schottky diodes respectively located on a plurality of the voltage-dividing resistors 2, the Schottky diode includes a cathode electrode 4, an anode electrode 8 and a semiconductor structure 6 located between the cathode electrode 4 and the anode electrode 8, the cathode electrode 4 is electrically connected to the first end of the corresponding voltage-dividing resistor 2, the first end of the anode electrode 8 is electrically connected to the cathode electrode 4 through the semiconductor structure 6, and the second end of the anode electrode 8 is electrically connected to the second end of the corresponding voltage-dividing resistor 2.

[0113] A pressure-sensitive film, during a pressure test, the pressure-sensitive film covers the Schottky diode array.

[0114] In one embodiment, a resistance insulating layer 3 is provided between the cathode electrode 4 and the voltage-dividing resistor 2, a first via hole is provided on the resistance insulating layer 3, a first conductive component 5 is provided in the first via hole, and the cathode electrode 4 is electrically connected to the first end of the voltage-dividing resistor 2 through the first conductive component 5.

[0115] In a specific embodiment, the resistance insulating layer 3 is located on the substrate 1 and covers the voltage dividing resistor 2 .

[0116] In one embodiment, the Schottky diode also includes a semiconductor structure 6, wherein the semiconductor structure 6 is located on the cathode electrode 4, and the anode electrode 8 is located above the semiconductor structure 6. An etching stop layer 7 is provided between the anode electrode 8 and the semiconductor structure 6, and a second via and a third via are provided on the etching stop layer 7. The second via is communicated with the semiconductor structure 6, and a second conductive component 10 is provided in the second via. The first end of the anode electrode 8 is electrically connected to the semiconductor structure 6 through the second conductive component 10; the third via is communicated with the second end of the voltage divider resistor 2, and a third conductive component 9 is provided in the third via. The second end of the anode electrode 8 is electrically connected to the second end of the voltage divider resistor 2 through the third conductive component 9.

[0117] In a specific embodiment, the etching stop layer 7 is located on the resistive insulating layer 3 and covers the semiconductor structure 6 and the cathode electrode 4 .

[0118] A protective layer 11 is further disposed on the anode electrode 8 . The protective layer 11 is located on the etching stop layer 7 . The protective layer 11 covers the anode electrode 8 . A fourth via hole 12 exposing the anode electrode 8 is further disposed on the protective layer 11 .

[0119] During the pressure test, since the pressure-sensitive film covers the Schottky diode array, and the Schottky diode array is provided with a fourth via 12, when pressure is applied to the pressure-sensitive film, the pressure-sensitive film will contact the anode electrode 8 through a number of fourth vias 12. Therefore, the pressure-sensitive sensors of the pressure-sensitive film are also distributed in an array.

[0120] Test method:

[0121] 1. Stress test:

[0122] The pressure-sensitive film is covered on the Schottky diode array. When pressure is applied to the pressure-sensitive film, the pressure-sensitive film will contact the anode electrode 8 through the fourth via hole 12. The schematic diagram of a single-point pressure-sensitive sensor is shown in FIG. Fig.16 The schematic diagram of the pressure sensitive sensor array is shown in the attached Fig.17 As shown, the end of the pressure-sensitive film (V in the figure) in , V in the figure in1 , V in2 , V in3 ) applies voltage, and when the pressure-sensitive film is subjected to external pressure, resistance changes occur. At this time, a voltage signal that changes with pressure can be measured at the test point (the exposed anode electrode 8 of the fourth via 12 is the test point).

[0123] 2. Temperature test:

[0124] The anode electrode 8 is connected to the external resistor 13 through the fourth via hole 12. The schematic diagram of the single-point temperature sensitive sensor is as follows: Fig.18 The schematic diagram of the temperature sensitive sensor array is shown in the attached Fig.19 As shown, a voltage is applied to one end of the external resistor 13 (Vin in the figure, Vin1, Vin2, Vin3 in the figure), and when the temperature changes, a voltage signal that changes with the temperature can be measured at the test point.

[0125] In the present invention, the pressure-sensitive sensor and the temperature-sensitive sensor are both based on Schottky diodes, which can be formed in one step to reduce costs.

[0126] In a specific embodiment, the temperature-sensitive sensor pixels and the pressure-sensitive sensor array are arranged in a checkerboard pattern, taking into account the uniform sensing performance of both on a plane, making the sensing of both parameters more uniform.

[0127] The present invention adopts a Schottky diode, which has a smaller turn-on voltage and a larger detectable range than the prior art.

[0128] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A dual-parameter sensor array, characterized in that: include: substrate; A voltage-dividing resistor array located on the substrate, the voltage-dividing resistor array comprising a plurality of voltage-dividing resistors arranged in an array; A Schottky diode array located on the voltage-dividing resistor array, the Schottky diode array comprising a plurality of Schottky diodes respectively located on a plurality of the voltage-dividing resistors, the Schottky diode comprising a cathode electrode, an anode electrode and a semiconductor structure located between the cathode electrode and the anode electrode, the cathode electrode being electrically connected to a first end of the corresponding voltage-dividing resistor, the first end of the anode electrode being electrically connected to the cathode electrode through the semiconductor structure, and the second end of the anode electrode being electrically connected to a second end of the corresponding voltage-dividing resistor; A pressure-sensitive film, during a pressure test, the pressure-sensitive film covers the Schottky diode array.

2. The dual parameter sensor array according to claim 1, characterized in that: A resistance insulating layer is provided between the cathode electrode and the voltage-dividing resistor, a first via hole is provided on the resistance insulating layer, a first conductive component is provided in the first via hole, and the cathode electrode is electrically connected to the first end of the voltage-dividing resistor through the first conductive component.

3. The dual parameter sensor array according to claim 2, characterized in that: The semiconductor structure is located on the cathode electrode, and the anode electrode is located above the semiconductor structure. An etching stop layer is provided between the anode electrode and the semiconductor structure. A second via and a third via are provided on the etching stop layer. The second via is communicated with the semiconductor structure, and a second conductive component is provided in the second via. The first end of the anode electrode is electrically connected to the semiconductor structure through the second conductive component. The third via is communicated with the second end of the voltage-dividing resistor, and a third conductive component is provided in the third via. The second end of the anode electrode is electrically connected to the second end of the voltage-dividing resistor through the third conductive component.

4. The dual parameter sensor array according to claim 3, characterized in that: The resistance insulating layer is located on the substrate and covers the voltage dividing resistor.

5. The dual parameter sensor array according to claim 4, characterized in that: The etching stop layer is located on the resistive insulating layer and covers the semiconductor structure and the cathode electrode.

6. The dual parameter sensor array according to claim 5, characterized in that: A protective layer is also provided on the anode electrode. The protective layer is located on the etching stop layer and covers the anode electrode. A fourth via hole exposing the anode electrode is also provided on the protective layer.

7. The dual parameter sensor array according to claim 1, characterized in that: The metal material of the anode electrode uses a high work function metal material to form a Schottky barrier.

8. The dual parameter sensor array according to claim 1, characterized in that: The metal material of the cathode electrode is a low work function metal or a composite material to form an ohmic contact.

9. The dual parameter sensor array according to claim 1, characterized in that: The conductive material in the pressure-sensitive film includes two materials with opposite temperature coefficients.

10. The method for preparing a dual-parameter sensor array according to any one of claims 1 to 9, characterized in that: include: providing a substrate; forming a voltage-dividing resistor array on the substrate, wherein the voltage-dividing resistor array comprises a plurality of voltage-dividing resistors arranged in an array; A Schottky diode array is formed on the voltage-dividing resistor array, wherein the Schottky diode array includes a plurality of Schottky diodes respectively located on the plurality of voltage-dividing resistors, wherein the Schottky diode includes a cathode electrode, an anode electrode, and a semiconductor structure located between the cathode electrode and the anode electrode, wherein the cathode electrode is electrically connected to a first end of the corresponding voltage-dividing resistor, the first end of the anode electrode is electrically connected to the cathode electrode through the semiconductor structure, and the second end of the anode electrode is electrically connected to a second end of the corresponding voltage-dividing resistor; A pressure-sensitive film is formed, and during a pressure test, the pressure-sensitive film covers the Schottky diode array.

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