Method and device for improving electrical property uniformity of silicon carbide substrate

Abstract

The invention provides a method and a device for improving electrical property uniformity of a silicon carbide substrate, and the method and the device are used for growth of silicon carbide crystals by a PVT method, and the method comprises the following steps: installing silicon carbide seed crystals at the bottom of a crucible upper cover; in an area corresponding to the seed crystal, the upper surface of the crucible upper cover is provided with a temperature control piece used for preventing the center of the crucible upper cover from radiating heat, so that a near-flat micro-concave temperature field is formed at a crystal growth interface of the seed crystal; putting the crucible provided with the crucible upper cover, the seed crystal and the temperature control piece into a single crystal growth furnace, and carrying out silicon carbide crystal growth to obtain a silicon carbide crystal without a growth characteristic surface; performing crystal processing on the silicon carbide crystal to obtain a silicon carbide substrate without a growth characteristic surface; the problems that the electrical property of the silicon carbide crystal is not uniform due to the growth characteristic surface, lattice mismatch exists in the epitaxial process, and the difficulty of laser cutting and processing the silicon carbide substrate is improved are solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor material technology, and in particular to a method and device for improving the uniformity of electrical characteristics of a silicon carbide substrate. Background Art

[0002] Physical Vapor Transport (PVT) is an important technical method for preparing high-quality silicon carbide single crystals. It converts solid silicon carbide raw materials into gas at high temperature, and then re-condenses and crystallizes in an area with a slightly lower temperature to achieve crystal growth. In the PVT method, in order to obtain high-quality single crystals, a nearly flat and slightly convex temperature field design is usually adopted to control the interface morphology of crystal growth. This interface morphology is conducive to reducing defects and stresses during the growth process and improving the integrity of the crystal. However, this also causes the crystal to form a unique growth feature facet at the edge of the crystal.

[0003] The growth feature surface area has significant differences in electrical characteristics from the non-growth feature surface area due to its unique spiral growth mechanism and enhanced impurity doping effect. This non-uniformity not only increases the fluctuation of the device's on-resistance, but may also affect the stability and reliability of the device. At the same time, the uneven distribution of impurities will also aggravate the lattice mismatch between the substrate and the epitaxial layer, induce the proliferation of defects such as dislocations, significantly reduce the quality of the epitaxial layer, and thus affect the performance of the final device.

[0004] Laser cutting is an efficient and precise method in the processing of silicon carbide substrates. However, due to the difference in optical absorption characteristics between the growth feature surface area and the non-growth feature surface area, the laser cutting performs differently in these two areas. The growth feature surface area requires more cutting times to achieve the same cutting quality, which increases processing time and cost and reduces cutting efficiency. Summary of the invention

[0005] The present application provides a method and device for improving the uniformity of electrical properties of a silicon carbide substrate, in order to solve the problems that a growth feature surface is formed during the growth process of a silicon carbide crystal, resulting in uneven electrical properties of a silicon carbide substrate obtained by processing the silicon carbide crystal, lattice mismatch during the epitaxial growth process, and low efficiency during laser cutting of the substrate.

[0006] The present application provides a method for improving the uniformity of electrical properties of a silicon carbide substrate for PVT method silicon carbide crystal growth, the method comprising:

[0007] A silicon carbide seed crystal is installed at the bottom of the crucible cover, wherein the (0001) crystal plane of the seed crystal is deflected N° in the <11-20> direction, where N is greater than 0;

[0008] In the area corresponding to the seed crystal, a temperature control member for blocking the radiation heat dissipation from the center of the crucible upper cover is provided on the upper surface of the crucible upper cover, so as to form a nearly flat micro-concave temperature field at the crystal growth interface of the seed crystal;

[0009] placing the crucible equipped with the crucible upper cover, seed crystal and temperature control element into a single crystal growth furnace to grow silicon carbide crystals to obtain silicon carbide crystals without growth feature surfaces;

[0010] The silicon carbide crystal is subjected to crystal processing to obtain a silicon carbide substrate without a growth feature surface.

[0011] In some embodiments, the temperature control element is a graphite temperature control element, which is arranged at the center of the crucible cover, and the thickness of the graphite temperature control element decreases from the center to the edge; the diameter of the graphite temperature control element is greater than or equal to the diameter of the seed crystal.

[0012] In some embodiments, the diameter of the graphite temperature control element is equal to the diameter of the seed crystal.

[0013] In some embodiments, the temperature control component includes a plurality of stacked graphite blocks, the center positions of the graphite blocks are in the same vertical direction; the diameter of each graphite block decreases successively from the bottom to the upper surface of the crucible cover; the diameter of the graphite block located at the bottom layer is greater than or equal to the diameter of the seed crystal.

[0014] In some embodiments, the diameter of the graphite block at the bottom layer is equal to the diameter of the seed crystal.

[0015] In some embodiments, the temperature control element is composed of three layers of graphite blocks, and the thickness of each layer of graphite blocks is 2 to 10 mm.

[0016] In some embodiments, the thickness of the thickest part of the graphite temperature control element is 10 to 30 mm.

[0017] In some embodiments, the temperature control component and the crucible upper cover are an integrally formed structure.

[0018] In some embodiments, a difference between a maximum resistivity and a minimum resistivity in the silicon carbide substrate is less than 1 mΩ·cm.

[0019] A second aspect of the present application provides a device for improving the uniformity of electrical characteristics of a silicon carbide substrate, characterized in that it includes:

[0020] A crucible, the bottom of which is used to fill silicon carbide powder; and a crucible cover is installed on the top of the crucible;

[0021] A silicon carbide seed crystal, wherein the seed crystal is mounted at the bottom of the crucible cover, and the (0001) crystal plane of the seed crystal is deflected N° in the <11-20> direction, where N is greater than 0;

[0022] A temperature control component is arranged on the upper surface of the crucible cover and is used to block the radiation heat dissipation from the center of the crucible cover to form a nearly flat micro-concave temperature field at the crystal growth interface of the seed crystal.

[0023] The present application provides a method and device for improving the uniformity of electrical characteristics of a silicon carbide substrate, which are used for PVT method silicon carbide crystal growth. The method comprises: installing a silicon carbide seed crystal at the bottom of a crucible upper cover, wherein the (0001) crystal plane of the seed crystal is deflected N° in the <11-20> direction, where N is greater than 0; in an area corresponding to the seed crystal, a temperature control component is provided on the upper surface of the crucible upper cover for blocking the radiative heat dissipation from the center of the crucible upper cover, so as to form a nearly flat micro-concave temperature field at the crystal growth interface of the seed crystal; placing a crucible equipped with the crucible upper cover, the seed crystal and the temperature control component into a single crystal growth furnace, and performing silicon carbide crystal growth. The method comprises the following steps: growing the silicon carbide crystal by cutting the silicon carbide crystal into a micro-concave shape, and obtaining a silicon carbide crystal without a growth feature surface; performing crystal processing on the silicon carbide crystal to obtain a silicon carbide substrate without a growth feature surface; when the crystal is grown under a nearly flat micro-concave temperature field, the crystal growth interface presents a micro-concave shape, and the entire growth interface has no area close to the (000-1) plane, so no growth feature surface is formed, and the silicon carbide substrate obtained by the crystal processing has no growth feature surface and no nitrogen impurity doping aggregation area, thereby solving the problems of uneven electrical properties of silicon carbide crystals caused by growth feature surfaces, lattice mismatch in the epitaxial process, and increased difficulty in laser cutting of silicon carbide substrates. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solution of the present application, the drawings required for use in the embodiments are briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0025] Figure 1 A flow chart of a method for improving the uniformity of electrical properties of a silicon carbide substrate in this application;

[0026] Figure 2 A schematic diagram of the formation of a characteristic surface of crystal growth under a non-near-flat micro-concave temperature field in this application;

[0027] Figure 3 A schematic diagram of a silicon carbide substrate having a growth feature surface in the present application;

[0028] Figure 4 This is a schematic diagram of the crystal not forming a growth feature surface under a nearly flat and slightly concave temperature field in the present application;

[0029] Figure 5 A schematic diagram of the structure of a device for improving the uniformity of electrical characteristics of a conductive silicon carbide substrate in one embodiment of the present application;

[0030] Figure 6 A schematic diagram of the structure of a device for improving the uniformity of electrical characteristics of a conductive silicon carbide substrate in another embodiment of the present application;

[0031] Figure 7 Schematic diagram of the nearly flat micro-concave temperature field in this application;

[0032] Figure 8 A schematic diagram of a silicon carbide substrate without a growth feature surface in this application;

[0033] Fig. 9 This is a resistivity mapping diagram of the silicon carbide substrate in Example 1 of the present application;

[0034] Fig.10 This is a resistivity mapping diagram of the silicon carbide substrate in Example 2 of the present application;

[0035] Fig.11 This is a resistivity mapping diagram of the silicon carbide substrate in the comparative example of the present application;

[0036] Fig.12 1 is a comparison diagram of the carrier concentration distribution of the silicon carbide substrate in Example 1 of the present application and the comparative example.

[0037] Description of reference numerals:

[0038] 1-crucible; 11-silicon carbide powder; 12-crucible cover; 2-silicon carbide seed crystal; 3-temperature control component; 31-graphite block; 32-graphite block group. DETAILED DESCRIPTION

[0039] In order to enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application.

[0040] In some technologies, a growth feature surface is formed during the growth of a silicon carbide crystal, resulting in uneven electrical properties of the processed silicon carbide substrate, lattice mismatch during the epitaxial growth process, and increased difficulty in laser cutting of the silicon carbide substrate. In order to solve this technical problem, the present application provides a method and device for improving the uniformity of electrical properties of a silicon carbide substrate. The method and device for improving the uniformity of a silicon carbide substrate are described below:

[0041] For example, in the process of growing silicon carbide crystals using the physical vapor transport method (PVT method), the crystals are usually grown in a nearly flat and slightly convex temperature field, and the crystal growth front presents a nearly flat and slightly convex interface. When using a 4° biased seed crystal for growth, when the local area of ​​the growth interface is close to the (000-1) plane, a growth feature facet will be formed near the edge of one side of the crystal, such as Figure 2 As shown, the growth feature surface area is a spiral growth mechanism, which causes the impurity doping to gather in this area, so the color of the growth feature surface is darker, such as Figure 3 As shown, there is a big difference between the electrical characteristics of the growth feature surface area and the non-growth feature surface area, resulting in the non-uniformity of the electrical properties within the substrate surface, which will lead to changes in the on-resistance of the device. In addition, the non-uniformity of impurity doping will lead to lattice mismatch between the substrate and the epitaxial layer, resulting in dislocation proliferation and affecting the quality of the epitaxial layer. In addition, during the laser cutting of silicon carbide crystals, due to the different optical absorption characteristics of the growth feature surface area and the non-growth feature surface area, the growth feature surface area needs to be repeatedly cut, which increases the difficulty of cutting and reduces the cutting efficiency. In view of the problem that growth feature surfaces are easily formed in the above-mentioned prior art, Figure 1 It can be seen that the first aspect of the present application provides a method for improving the uniformity of electrical properties of a silicon carbide substrate for PVT method silicon carbide crystal growth, comprising:

[0042] S100: A silicon carbide seed crystal 2 is installed at the bottom of the crucible cover 11, and the (0001) crystal plane of the seed crystal is deflected N° in the <11-20> direction, where N is greater than 0, for example, the seed crystal can be deflected by 2°, 4° or 8°; S200: In the area corresponding to the seed crystal, a temperature control component 3 is provided on the upper surface of the crucible cover for blocking the heat dissipation radiated from the center of the crucible cover 11, so as to form a nearly flat and slightly concave temperature field at the crystal growth interface of the seed crystal; S300: The crucible equipped with the crucible cover 11, the silicon carbide seed crystal 2 and the temperature control component 3 is placed in a single crystal growth furnace to grow silicon carbide crystals to obtain silicon carbide crystals without growth feature surfaces; S400: The silicon carbide crystals are subjected to crystal processing to obtain silicon carbide substrates without growth feature surfaces. Exemplarily, the thickness of the thickest part of the graphite temperature control component corresponds to 10 to 30 mm, but it is not limited to this numerical range. As long as the center temperature at the crystal growth interface is slightly higher than the edge temperature and the temperature difference is within the target temperature (such as 5°C), a nearly flat and slightly concave temperature field will be sufficient.

[0043] Taking the silicon carbide seed crystal 2 with a 4° deflection angle as an example, the crucible 1 of the above-mentioned assembly structure is placed in a single crystal growth furnace, and the crucible 1 is heated to sublimate the silicon carbide powder 12 and produce a variety of gas phase components. These gases are atomically deposited on the surface of the silicon carbide seed crystal 2 at the top of the growth chamber, i.e., the crucible top cover 11, and the silicon carbide crystal is gradually grown; since the upper surface of the crucible cover 11 is provided with a temperature control component 3, in this example, the center of the side of the crucible cover away from the seed crystal is called its upper surface, and the other side is the bottom surface; the temperature control component blocks the radiation heat dissipation at the center of the crucible cover, and increases the central temperature of the temperature field where the crystal grows. At this time, the central temperature is slightly higher than the edge temperature, so that the temperature field where the crystal grows presents a nearly flat and slightly concave temperature field; Figure 4 It can be seen that when the crystal is grown under a nearly flat and slightly concave temperature field, the crystal growth interface presents a slightly concave shape, and the entire growth interface has no area close to the (000-1) plane, so no growth characteristic surface is formed.

[0044] like Figure 5 As shown, the temperature control element 3 is made of graphite, and the graphite temperature control element is arranged at the center of the crucible cover. The thickness of the graphite temperature control element decreases from the center to the edge, and can be gradually reduced or stepped, which is not specifically limited in this example; the diameter of the graphite temperature control element is greater than or equal to the diameter of the seed crystal. Preferably, the diameter of the graphite temperature control element is equal to the diameter of the seed crystal. The function of the graphite block is to block the radiant heat dissipation at the center of the crucible cover, and to increase the center temperature of the temperature field where the silicon carbide crystal grows. At this time, the center temperature is higher than the edge temperature, so that the temperature field where the silicon carbide seed crystal grows presents a nearly flat and slightly concave temperature field, such as Figure 7 As shown; Optionally, the graphite block is in a conical shape, the thickness of the conical graphite block is large in the center and small in the edge. The thicker the graphite block is, the stronger the effect of blocking the radiation heat dissipation in the center of the crucible cover is. The concave degree of the temperature field can be adjusted by adjusting the height of the conical graphite block, thereby avoiding the growth characteristic surface of the grown silicon carbide substrate, such as Figure 8 By setting the bottom diameter of the conical graphite block to be the same as the seed crystal diameter, the amount of graphite block can be reduced on the one hand, and normal heat dissipation of the edge of the crucible cover can be achieved on the other hand, so that the edge temperature of the crystal is slightly lower than the center temperature, making it easier to achieve a nearly flat and slightly concave temperature field.

[0045] Depend on Figure 6It can be seen that the temperature control component 3 includes several stacked graphite blocks, and the center positions of the graphite blocks are in the same vertical direction; along the bottom to the upper surface of the crucible cover, the diameter of each graphite block decreases successively; the diameter of the graphite block located at the bottom layer is greater than or equal to the diameter of the seed crystal. Exemplarily, the diameter of the graphite block located at the bottom layer is equal to the diameter of the seed crystal. Exemplarily, the temperature control component is composed of three layers of graphite blocks, and the thickness of each layer of graphite blocks is 2 to 10 mm. Compared with the setting of graphite blocks, it is easier to form a nearly flat micro-concave temperature field through the setting of graphite block groups, which can be achieved by adding or reducing graphite blocks, while the setting of graphite blocks can only be achieved by using graphite blocks of different heights to form a nearly flat micro-concave temperature field, which causes inconvenience in achieving the formation of a nearly flat micro-concave temperature field. Among them, by making the diameter of the graphite block close to the side of the crucible cover equal to the diameter of the silicon carbide seed crystal, on the one hand, the amount of graphite block used can be reduced, and on the other hand, normal heat dissipation at the edge of the crucible cover can be achieved, so that the edge temperature of the crystal is slightly lower than the center temperature, making it easier to achieve a nearly flat and slightly concave temperature field.

[0046] Exemplarily, the temperature control part and the upper cover of the crucible are an integrated structure. In order to improve the production efficiency of the silicon carbide substrate, the temperature control part and the upper cover of the crucible are an integrated structure in the embodiment of the present application. Specifically, temperature control parts of different sizes can be set according to silicon carbide seed crystals of different sizes, so that the production process of the silicon carbide substrate can be carried out by only filling the silicon carbide powder into the crucible and installing the silicon carbide seed crystals on the upper cover of the crucible, thereby improving the manufacturing efficiency of the silicon carbide substrate.

[0047] To verify the shape of the constructed temperature field, the VR-PVT simulation software can be used to simulate the silicon carbide crystal growth process to obtain the temperature field distribution diagram at the silicon carbide crystal growth interface; the collection of temperatures at each point in the material system is called the temperature field; it is a function of time and space coordinates, reflecting the distribution of temperature in space and time. According to the temperature field distribution diagram, increase or decrease the height of the temperature control component until the parameters in the temperature field distribution diagram are within the set range, forming a nearly flat micro-concave temperature field. By using graphite blocks of different heights, or increasing or decreasing the number of graphite blocks in the graphite block group, so that the parameters in the temperature field diagram are within the set range, and observing the shape of the temperature field, the formation of a nearly flat micro-concave temperature field is achieved.

[0048] The crucible is assembled by using the temperature control component structure obtained by the above adjustment, and the crucible 1 is heated to grow the silicon carbide crystal in a nearly flat and slightly concave temperature field. When the silicon carbide crystal grows in a nearly flat and slightly concave temperature field, the silicon carbide crystal will not form a growth feature surface, and there will be no impurity doping and gathering area. Therefore, the electrical characteristics of the entire silicon carbide substrate obtained by processing are highly uniform.

[0049] The steps of processing silicon carbide crystal include:

[0050] The silicon carbide crystal is subjected to rounding, cutting, grinding and polishing to obtain a silicon carbide substrate. Rounding is usually a preliminary shape correction of the silicon carbide crystal to form a nearly circular shape for subsequent cutting operations. The rounding can make the silicon carbide crystal have a more regular shape, which is convenient for cutting and processing; it plays a role in improving cutting efficiency and cutting quality and reducing material waste. Cutting is the process of cutting the rounded silicon carbide crystal into thin slices along a certain direction to prepare a silicon carbide substrate. A silicon carbide substrate with uniform thickness and small warpage is prepared by cutting. The cutting process is used to change the thickness of the wafer to reduce production costs and improve device performance. The grinding process is to remove defects and roughness on the surface of the silicon carbide substrate and improve its flatness through the interaction between the grinding liquid and the grinding tool. The grinding process is used to remove surface damage and roughness generated during the cutting process, improve the surface quality and finish of the silicon carbide substrate, and provide a good foundation for subsequent polishing. Polishing is to further remove tiny defects and scratches on the surface of the silicon carbide substrate on the basis of grinding, so that its surface achieves a mirror effect. Polishing is used to improve the surface finish and optical properties of silicon carbide substrates; reduce the thickness of the oxide layer and the impact of polishing liquid penetration, improve the surface quality and stability of the sample, and provide a better foundation for subsequent semiconductor manufacturing processes (such as epitaxial growth, device manufacturing, etc.).

[0051] In this embodiment, the difference between the maximum resistivity and the minimum resistivity in the silicon carbide substrate is less than 1 mΩ·cm. The present application proposes growing silicon carbide crystals in a nearly flat and slightly concave temperature field, at which time the crystal growth front presents a nearly flat and slightly concave interface, and no growth feature surface is formed in the entire interface, and there is no impurity doping concentration area, so the uniformity of the electrical characteristics in the entire substrate surface is high.

[0052] Exemplarily, a method for producing a silicon carbide substrate without a growth feature surface is currently disclosed. The main idea is to fix the growth feature surface within 5 mm of the edge, and then remove 5 mm of the crystal edge by processing, so as to obtain a substrate without a growth feature surface. However, the above method requires growing a crystal on a seed crystal larger than the target size, which leads to a prolonged crystal processing time and a problem of wasted crystal edges. The method provided in the present application can directly grow a crystal without a growth feature surface on a seed crystal of the target diameter, without the problem of prolonged processing time and wasted crystal edges.

[0053] The second aspect of the present application provides a device for improving the uniformity of electrical properties of a conductive silicon carbide substrate, comprising: a crucible 1, the bottom of the crucible 1 is used to fill silicon carbide powder 11; a crucible cover 12 is installed on the top of the crucible 1; a silicon carbide seed crystal 2, the silicon carbide seed crystal 2 is installed at the bottom of the crucible cover 12, and the (0001) crystal plane of the seed crystal is deflected N° in the <11-20> direction, N is greater than 0; a temperature control component 3, the temperature control component 3 is arranged on the upper surface of the crucible cover 12, and is used to block the radiative heat dissipation from the center of the crucible cover 12, so as to form a nearly flat and slightly concave temperature field at the crystal growth interface of the silicon carbide seed crystal 2. Among them, the temperature control component 3 includes: a graphite block 31 or a graphite block group 32, the thickness of the central position of the graphite block 31 is greater than the thickness of the edge of the graphite block 31; the graphite block 31 covers the silicon carbide seed crystal 2 in the projection direction of the silicon carbide seed crystal 2, such as Figure 5 As shown; the graphite block group 32 is a plurality of graphite blocks overlapped with each other, and the center positions of the graphite blocks are in the same vertical direction; the diameter of the graphite block close to the crucible cover 12 side decreases gradually toward the graphite block away from the crucible cover 12 side; the graphite block group 32 covers the silicon carbide seed crystal 2 in the projection direction of the silicon carbide seed crystal 2, as shown Figure 6 The effects of the above device embodiment in manufacturing a silicon carbide substrate can refer to the effects of the above method embodiment, which will not be described in detail here.

[0054] The present application provides a method and device for improving the uniformity of electrical characteristics of a silicon carbide substrate, which has the following embodiments:

[0055] Embodiment 1: First, silicon carbide powder 12 is filled into the crucible 1, and then the silicon carbide seed crystal 2 is fixed on the crucible cover 11; by setting a conical graphite block on the side of the crucible cover 11 away from the seed crystal, for example, when growing a 6-inch silicon carbide seed crystal, a 15mm high graphite block can be placed in the center of the crucible cover; the height range of the graphite block is 10mm to 30mm. Because the graphite block is conical, the center thickness of the graphite block is relatively large, so that the center of the crucible cover 11 does not dissipate much heat, resulting in the center temperature of the temperature field where the silicon carbide crystal grows being slightly higher than the edge temperature, and the temperature difference is within 5°C, thus presenting a nearly flat and slightly concave temperature field, heating the crucible 1 until the silicon carbide powder 12 is completely consumed to obtain the silicon carbide crystal to be processed, and processing the grown silicon carbide crystal into a silicon carbide substrate.

[0056] Embodiment 2: First, silicon carbide powder 12 is filled into the crucible 1, and then the silicon carbide seed crystal 2 is installed and fixed on the crucible cover 11; by setting a graphite block group on the side of the crucible cover 11 away from the seed crystal seat, for example, when growing a 6-inch silicon carbide seed crystal, 3 layers of graphite blocks can be placed in the center of the crucible cover, the lower graphite block has a diameter of 150mm, the middle graphite block has a diameter of 100mm, and the upper graphite block has a diameter of 50mm. The thickness of each layer of graphite block is 5mm. At this time, the total thickness of the central graphite block is 15mm, and the thickness of the edge graphite block is 5mm. The center of the crucible cover radiates less heat, resulting in the center temperature of the temperature field where the silicon carbide crystal grows being slightly higher than the edge temperature, and the temperature difference is within 5°C, thus presenting a nearly flat and slightly concave temperature field. The crucible 1 is heated until the silicon carbide powder 12 is completely consumed to obtain the silicon carbide crystal to be processed, and the grown silicon carbide crystal is processed into a silicon carbide substrate. The following table is a parameter comparison of the minimum in-plane resistivity, the maximum in-plane resistivity, and the in-plane resistivity difference between the target silicon carbide substrates obtained in Example 1 and Example 2 and the silicon carbide substrate with a growth feature surface in the comparative example:

[0057]

[0058] As can be seen from the above table, the resistivity distribution of the silicon carbide substrate without growth feature surface in Example 1 of the present application is shown in the resistivity distribution diagram of the silicon carbide substrate in Example 1. Fig. 9 As shown, the difference between the highest and lowest values ​​of the resistivity in the entire surface is 0.57 mΩ·cm, which does not exceed 1 mΩ·cm, reflecting the high uniformity of the resistivity in the entire substrate surface; the resistivity distribution of the silicon carbide substrate without growth feature surface in Example 2 of the present application, the resistivity distribution diagram of the silicon carbide substrate in Example 2 is as shown Fig.10 As shown in the figure, the difference between the highest and lowest resistivity values ​​in the entire surface is 0.48mΩ·cm, which does not exceed 1mΩ·cm, reflecting the high uniformity of the resistivity in the entire substrate surface. The comparative example is the resistivity distribution of the silicon carbide substrate with growth feature surface. The resistivity distribution diagram of the silicon carbide substrate in the comparative example is shown in the figure. Fig.11 As shown, the difference between the highest and lowest resistivity values ​​in the entire surface is 3.58 mΩ·cm, and the resistivity uniformity is obviously worse than that of the silicon carbide substrate without growth feature surface.

[0059] Among them, Fig.12 As shown in FIG. 1 , the carrier concentration distribution diagram of the silicon carbide substrate in Example 1, i.e., the silicon carbide substrate without growth feature surface, and the silicon carbide substrate in the comparative example, i.e., the substrate with growth feature surface, passing through the growth feature surface area is shown. The carrier concentration is obtained by Raman spectroscopy test and analysis. The carrier concentration range of the first silicon carbide substrate is 2.42×10 18 cm -3 to 2.56×10 18 cm -3The difference between the maximum and minimum values ​​in the range is 0.12×10 18 cm -3 , while the carrier concentration of the second SiC substrate through the growth feature area ranges from 1.8×10 18 cm -3 to 2.97×10 18 cm -3 The difference between the maximum and minimum values ​​in the range is 1.17×10 18 cm -3 It can be seen that the carrier concentration within the surface of the silicon carbide substrate in Example 1 of the present application is more uniform, and thus the electrical properties are more uniform than those of the silicon carbide substrate in the comparative example, that is, the electrical properties of the silicon carbide substrate obtained by the method for improving the uniformity of the electrical properties of the silicon carbide substrate provided by the present application are more uniform.

[0060] The above specific implementation methods further explain in detail the purpose, technical solutions and beneficial effects of the embodiments of the present application. It should be understood that the above are only specific implementation methods of the embodiments of the present application and are not used to limit the protection scope of the embodiments of the present application. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the embodiments of the present application should be included in the protection scope of the embodiments of the present application.

Claims

1. A method for improving the uniformity of electrical properties of a silicon carbide substrate, characterized in that: For growing silicon carbide crystals using a PVT method, the method comprises: A silicon carbide seed crystal is installed at the bottom of the crucible cover, wherein the (0001) crystal plane of the seed crystal is deflected N° in the <11-20> direction, where N is greater than 0; In the area corresponding to the seed crystal, a temperature control member for blocking the radiation heat dissipation from the center of the crucible upper cover is provided on the upper surface of the crucible upper cover, so as to form a nearly flat micro-concave temperature field at the crystal growth interface of the seed crystal; placing the crucible equipped with the crucible upper cover, seed crystal and temperature control element into a single crystal growth furnace to grow silicon carbide crystals to obtain silicon carbide crystals without growth feature surfaces; The silicon carbide crystal is subjected to crystal processing to obtain a silicon carbide substrate without a growth feature surface.

2. The method for improving the uniformity of electrical properties of a silicon carbide substrate according to claim 1, characterized in that: The temperature control component is a graphite temperature control component, which is arranged at the center of the crucible cover, and the thickness of the graphite temperature control component decreases from the center to the edge; the diameter of the graphite temperature control component is greater than or equal to the diameter of the seed crystal.

3. The method for improving the uniformity of electrical characteristics of a silicon carbide substrate according to claim 2, characterized in that: The diameter of the graphite temperature control element is equal to the diameter of the seed crystal.

4. The method for improving the uniformity of electrical properties of a silicon carbide substrate according to claim 1, characterized in that: The temperature control component includes a plurality of stacked graphite blocks, the center positions of the graphite blocks are in the same vertical direction; the diameters of the graphite blocks decrease in sequence from the bottom to the upper surface of the crucible cover; the diameter of the graphite block at the bottom layer is greater than or equal to the diameter of the seed crystal.

5. The method for improving the uniformity of electrical characteristics of a silicon carbide substrate according to claim 4, characterized in that: The diameter of the graphite block located at the bottom layer is equal to the diameter of the seed crystal.

6. According to the method for improving the uniformity of electrical characteristics of a silicon carbide substrate as described in claim 4, the temperature control component is composed of three layers of graphite blocks, and the thickness of each layer of graphite blocks is 2 to 10 mm.

7. The method for improving the uniformity of electrical characteristics of a silicon carbide substrate according to claim 2, characterized in that: The thickness of the thickest part of the graphite temperature control element is 10 to 30 mm.

8. The method for improving the uniformity of electrical characteristics of a silicon carbide substrate according to claim 1, characterized in that: The temperature control component and the crucible upper cover are an integrally formed structure.

9. The method for improving the uniformity of electrical characteristics of a silicon carbide substrate according to claim 1, characterized in that: The difference between the maximum resistivity and the minimum resistivity in the silicon carbide substrate is less than 1 mΩ·cm.

10. A device for improving the uniformity of electrical properties of a silicon carbide substrate, characterized in that: include: A crucible (1), wherein the bottom of the crucible (1) is used to be filled with silicon carbide powder (11); and a crucible cover (12) is installed on the top of the crucible (1); A silicon carbide seed crystal (2), the silicon carbide seed crystal (2) being mounted on the bottom of the crucible upper cover (12), the (0001) crystal plane of the seed crystal being deflected N° in the <11-20> direction, where N is greater than 0; A temperature control component (3) is arranged on the upper surface of the crucible upper cover (12) and is used to block the central radiation heat dissipation of the crucible upper cover (12) so as to form a nearly flat micro-concave temperature field at the crystal growth interface of the silicon carbide seed crystal (2).

Images