Spot inspection method for copper connecting wire through hole defects
By directly forming through holes in the interlayer dielectric layer and filling copper metal, using electron beam scanner detection, the problem of difficult time detection of through hole defects in copper connecting wires in the prior art is solved, and more efficient defect detection and Quality control.
Patent Information
- Application Number
- CN202411298022.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-14
- Publication Date
- 2025-01-10
Smart Images
Figure CN119297098A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a method for spot checking copper wiring through-hole defects. Background Art
[0002] Currently, copper connections and through-holes use a dual damascene structure, where a groove is first formed in the hard mask layer, and then a through-hole is opened in the groove. Finally, the groove and through-hole are opened to a specified depth through integrated (AIO) etching and connected to the previous copper wire.
[0003] During the implementation of the above process, for the step of opening a through hole in the groove, bubbles are present during the anti-reflective coating coating process due to environmental factors. Since the anti-reflective coating is covered with photoresist, the bubble defect cannot be captured in the defect scan of the current station. After integrated etching, the defect exists at the bottom of the groove and is still difficult to detect, resulting in the product being affected and not being discovered until the yield test stage. Summary of the invention
[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide a method for spot inspection of copper connection through-hole defects, which is used to solve the problem that through-hole defects of dual Damascene interconnect structures in the prior art are not easy to be detected in time.
[0005] To achieve the above-mentioned purpose and other related purposes, the present application provides a method for inspecting copper wiring through-hole defects, comprising:
[0006] Step 1, providing a substrate, on which a front layer of copper wiring is formed;
[0007] Step 2, forming a barrier layer, a capping layer, an interlayer dielectric layer and an etch stop layer on the substrate in sequence;
[0008] Step 3, forming a through hole at the bottom that is connected to the front layer copper connection line;
[0009] Step 4: After the through-hole is filled with copper metal, through-hole defect detection is performed.
[0010] Preferably, the barrier layer, the capping layer, the interlayer dielectric layer and the etch stop layer are formed by a deposition process.
[0011] Preferably, the material of the barrier layer includes doped silicon carbide.
[0012] Preferably, the material of the cover layer includes TEOS.
[0013] Preferably, the material of the etch stop layer includes silicon nitride.
[0014] Preferably, the step of forming the through hole includes: forming a photoresist layer having a through hole pattern on the etch stop layer; using the photoresist layer as a mask, etching the etch stop layer, the interlayer dielectric layer, the covering layer and the barrier layer in sequence through an etching process until the front layer copper connection is exposed; and removing the photoresist layer through an ashing process.
[0015] Preferably, copper metal is filled in the through hole by an electroplating process.
[0016] Preferably, after the electroplating is completed, a grinding process is performed to remove the copper metal and the etch stop layer outside the through hole.
[0017] Preferably, the grinding process is chemical mechanical grinding.
[0018] Preferably, the through hole defect detection is performed by an electron beam scanner.
[0019] As described above, the spot inspection method for copper connection through-hole defects provided by the present application has the following beneficial effects: it eliminates the steps of first forming a groove in the hard mask layer and then opening a through-hole in the groove, directly forms a through-hole connecting the copper wire of the previous layer in the interlayer dielectric layer, and performs defect detection after filling the through-hole with copper. At this time, the defect is located on the surface of the wafer and can be easily detected in time. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0021] Figure 1 (a)- Figure 1 (d) is a schematic diagram showing a cross-sectional structure of a device formed after each step of forming a copper wiring through hole using the prior art is completed;
[0022] Figure 1 (e)- Figure 1 (g) is a schematic diagram of a device cross-sectional structure showing a process of forming a through hole defect when forming a copper wiring through hole using the prior art;
[0023] Figure 2 A flow chart showing a method for inspecting copper wiring through-hole defects provided by an embodiment of the present application;
[0024] Figure 3 (a)- Figure 3 (c) is a schematic diagram showing a cross-sectional structure of a device formed after each step is completed in the copper wiring through-hole defect inspection method provided in an embodiment of the present application. DETAILED DESCRIPTION
[0025] The following describes the implementation of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0026] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0027] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating directions or positional relationships, are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0028] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0029] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.
[0030] See also Figure 1 (a)- Figure 1 (d) is a schematic diagram showing a cross-sectional structure of a device formed after completing each step of forming a copper wiring through hole using the prior art.
[0031] like Figure 1 As shown in (a), a front layer copper connection 101 and an interlayer dielectric layer 102 covering the front layer copper connection 101 are formed on the substrate, a mask layer is formed on the interlayer dielectric layer 102, and a groove 103 is formed in the mask layer by photolithography and etching processes.
[0032] Then, if Figure 1 As shown in (b), after forming a sacrificial layer 105 that fills the trench 103, an anti-reflective coating 106 and a photoresist layer 107 having a through-hole pattern are sequentially formed on the sacrificial layer 105.
[0033] Then, if Figure 1 As shown in (c), a through hole 108 is formed in the interlayer dielectric layer 102 by an etching process.
[0034] Finally, if Figure 1 As shown in (d), a copper interconnect structure 109 is formed in the interlayer dielectric layer 102 by an integrated etching process, wherein a portion of the copper interconnect structure 109 is composed of a groove and a through hole connected to the bottom of the groove, and the bottom of the through hole is connected to the front layer copper connection 101.
[0035] like Figure 1 As shown in (e), bubbles 110 are introduced during the process of forming the anti-reflective coating 106 due to environmental factors, and the bubbles 110 cannot be found through the defect scanning of the current station due to the obstruction of the photoresist layer 107.
[0036] like Figure 1 As shown in FIG. 5( f ), due to the presence of the bubble 110 , an unwanted through hole defect 108 a is simultaneously formed during the process of forming the through hole 108 in the interlayer dielectric layer 102 . If there is a mask layer below the bubble 110 , the through hole defect 108 a will not be formed in the interlayer dielectric layer 102 .
[0037] like Figure 1 As shown in (g), after the copper interconnect structure 109 is formed in the interlayer dielectric layer 102 through an integrated etching process, a copper interconnect structure 109a having the through-hole defect is formed. Since the characteristic size of the through-hole defect is very small and located at the bottom of the trench, it is difficult to find it through defect scanning. The existence of the through-hole defect will only be discovered when the subsequent device manufacturing process is completed and the yield test is performed.
[0038] In order to solve this problem, the present application provides a method for spot inspection of copper connection through-hole defects.
[0039] See also Figure 2 , which shows a flow chart of a method for inspecting copper wiring through-hole defects provided in an embodiment of the present application.
[0040] like Figure 2 As shown, the spot inspection method for copper connection through-hole defects includes the following steps:
[0041] Step 1, providing a substrate, on which a front layer of copper wiring is formed;
[0042] Step 2, forming a barrier layer, a capping layer, an interlayer dielectric layer and an etch stop layer on the substrate in sequence;
[0043] Step 3, forming a through hole at the bottom that is connected to the front layer copper connection line;
[0044] Step 4: After the through-hole is filled with copper metal, through-hole defect detection is performed.
[0045] In step 1, optionally, the substrate is a silicon substrate, a germanium substrate, or a silicon-on-insulator substrate, etc.; or the material of the substrate may also include other materials, such as III-V compounds such as gallium arsenide. Those skilled in the art can select the constituent material of the substrate according to the type of device structure formed on the substrate, so the type of the substrate should not limit the protection scope of the present invention.
[0046] like Figure 3 As shown in (a), a front layer copper connection 301 is formed on the substrate.
[0047] In step 2, if Figure 3 As shown in (a), a barrier layer 303, a capping layer 305, an interlayer dielectric layer 302 and an etch stop layer 306 are sequentially formed by a deposition process.
[0048] Exemplarily, the material of the barrier layer 303 includes doped silicon carbide (NDC), the material of the capping layer 305 includes tetraethoxysilane (TEOS), and the material of the etch stop layer 306 includes silicon nitride.
[0049] Optionally, the material of the interlayer dielectric layer 302 is, for example but not limited to: silicon nitride (Si3N4), silicon oxide (SiO2), fluorinated SiO2 (FSG), hydrogenated carbon oxide (SiCOH), porous SiCOH, borophosphosilicate glass (BPSG), silsesquioxane, carbon (C) doped oxides (i.e., organic silicates) including silicon (Si), carbon (C), oxygen (O) and / or hydrogen (H) atoms, thermosetting polyarylene ether, or other materials with low dielectric constant (<3.9).
[0050] In step three, if Figure 3 As shown in (b), the steps of forming a through hole 307 at the bottom connected to the front-layer copper connection 301 include: forming a photoresist layer with a through hole 307 pattern on the etch stop layer 306; using the photoresist layer as a mask, etching the etch stop layer 306, the interlayer dielectric layer 302, the covering layer 305 and the barrier layer 303 in sequence through an etching process until the front-layer copper connection 301 is exposed; and removing the photoresist layer through an ashing process.
[0051] In step 4, if Figure 3As shown in (c), copper metal 308 is filled in the through hole 307 by electroplating process. Then, the copper metal 308 and the etch stop layer 306 outside the through hole 307 are removed by grinding process.
[0052] Exemplarily, the polishing process is chemical mechanical polishing.
[0053] Exemplarily, the through hole defect detection is performed by an electron beam scanner, where the defect is on the wafer surface and can be easily detected in time.
[0054] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present application in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0055] In summary, the spot inspection method for copper connection through-hole defects provided by the present application eliminates the steps of first forming a groove in the hard mask layer and then opening a through-hole in the groove, and directly forms a through-hole connecting the copper wire of the previous layer in the interlayer dielectric layer, and performs defect inspection after filling the through-hole with copper. At this time, the defect is located on the surface of the wafer and is easy to detect in time. Therefore, the present application effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.
[0056] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present application.
Claims
1. A method for inspecting copper wiring through-hole defects, characterized in that: The method comprises: Step 1, providing a substrate, on which a front layer copper connection is formed; Step 2, forming a barrier layer, a capping layer, an interlayer dielectric layer and an etch stop layer in sequence on the substrate; Step 3, forming a through hole at the bottom connected to the front layer copper connection line; Step 4: After the through hole is filled with copper metal, through hole defect detection is performed.
2. The method according to claim 1, characterized in that The barrier layer, the capping layer, the interlayer dielectric layer and the etch stop layer are formed by a deposition process.
3. The method according to claim 1 or 2, characterized in that: The material of the barrier layer includes doped silicon carbide.
4. The method according to claim 1 or 2, characterized in that: The material of the capping layer includes TEOS.
5. The method according to claim 1 or 2, characterized in that: The material of the etch stop layer includes silicon nitride.
6. The method according to claim 1, characterized in that The steps of forming the through hole include: forming a photoresist layer having the through hole pattern on the etch stop layer; using the photoresist layer as a mask, etching the etch stop layer, the interlayer dielectric layer, the covering layer and the barrier layer in sequence through an etching process until the front layer copper connection is exposed; and removing the photoresist layer through an ashing process.
7. The method according to claim 1, characterized in that The through hole is filled with copper metal by an electroplating process.
8. The method according to claim 7, characterized in that After the electroplating is completed, a grinding process is performed to remove the copper metal outside the through hole and the etching stop layer.
9. The method according to claim 8, characterized in that The grinding process is chemical mechanical grinding.
10. The method according to claim 1, characterized in that The through hole defect inspection is performed by an electron beam scanner.