Signal link fault self-check circuit and RF link

Abstract

The disclosed embodiment provides a signal link fault self-checking circuit and a radio frequency link. The signal link fault self-checking circuit includes: a signal input terminal, a signal transmission main path and a signal output terminal connected in sequence; a plurality of LC units connected in sequence to the signal transmission main path, the LC unit includes an inductor and a capacitor, the inductor is connected in series to the signal transmission main path, and one end of the capacitor is connected to any end of the inductor; the value of each LC unit is greater than or equal to the preset bandwidth of the signal transmission main path; a coupling branch, the input end of the coupling branch is connected to any node of the signal transmission main path, and is used to couple the transmission signal on the signal transmission main path and output a coupling signal; a detection unit is connected to the output end of the coupling branch, and is used to determine whether the transmission signal is abnormal according to the coupling signal.

Description

Technical Field

[0001] The present disclosure relates to the field of integrated circuits, and in particular to a signal link fault self-detection circuit and a radio frequency link. Background Art

[0002] RF links are widely used in various fields. In wireless communications, the stability of RF links is the key to ensuring smooth data transmission; in satellite communications, signal reliability is crucial to the transmission of information; in medical equipment, accurate RF signal transmission may be related to the patient's life safety.

[0003] At present, the complexity of RF links is increasing day by day, and the number of nodes to be tested is huge. In order to monitor the signals of multiple nodes to be tested, it is necessary to mount monitoring chips on each node to be tested. Therefore, how to provide a miniaturized and low-cost solution is an issue worthy of special attention. Summary of the invention

[0004] In view of this, the present disclosure provides a signal link fault self-detection circuit and a radio frequency link

[0005] To achieve the above objectives, the technical solution of the present disclosure is implemented as follows:

[0006] In a first aspect, an embodiment of the present disclosure provides a signal link fault self-detection circuit, comprising: a signal input terminal, a signal transmission main path, and a signal output terminal connected in sequence; a plurality of LC units connected in sequence to the signal transmission main path, the LC units comprising an inductor and a capacitor, the inductor being connected in series to the signal transmission main path, one end of the capacitor being connected to any end of the inductor; each of the LC units A value is greater than or equal to a preset bandwidth of the signal transmission main path; a coupling branch, the input end of the coupling branch is connected to any node of the signal transmission main path, and is used to couple the transmission signal on the signal transmission main path and output a coupled signal; a detection unit is connected to the output end of the coupling branch, and is used to determine whether the transmission signal is abnormal based on the coupled signal.

[0007] In some embodiments, the signal input end has an equivalent input inductance and an equivalent input capacitance, and the equivalent input inductance and the equivalent input capacitance serve as one LC unit among the multiple LC units; and / or, the signal output end has an equivalent output inductance and an equivalent output capacitance, and the equivalent output inductance and the equivalent output capacitance serve as one LC unit among the multiple LC units.

[0008] In some embodiments, at least one electrostatic protection circuit is further included, and the electrostatic protection circuit is connected to any node of the signal transmission main path.

[0009] In some embodiments, the electrostatic protection circuit has a first equivalent capacitor, and the first equivalent capacitor serves as a capacitor in the LC unit.

[0010] In some embodiments, the electrostatic protection circuit includes a first diode string and a second diode string, the first diode string and the second diode string are connected in reverse parallel; the first diode string includes at least one first diode, and the second diode string includes at least one second diode.

[0011] In some embodiments, the coupling branch includes a first voltage divider module and a second voltage divider module connected in sequence, the first voltage divider module includes at least one first resistor, and the second voltage divider module includes at least one second resistor; the first voltage divider module is connected to any node of the signal transmission main path, the node between the first voltage divider module and the second voltage divider module is connected to the input end of the detection unit, and the second voltage divider module is coupled to the ground.

[0012] In some embodiments, the first voltage divider module includes at least two first resistors connected in series and at least one first switch, each first switch is connected in parallel with at least one first resistor, and the first switch is used to control the passage and short circuit of the at least one first resistor to adjust the impedance of the first voltage divider module.

[0013] In some embodiments, the second voltage divider module includes at least two second resistors connected in series and at least one second switch, each second switch is connected in parallel with at least one second resistor, and the second switch is used to control the passage and short circuit of the at least one second resistor to adjust the impedance of the second voltage divider module.

[0014] In some embodiments, the coupling branch also includes a first voltage divider module, a second voltage divider module and a third voltage divider module connected in sequence; the first voltage divider module includes at least one first resistor, the second voltage divider module includes at least one second resistor, and the third voltage divider module includes at least one third resistor; the first voltage divider module is connected to any node of the signal transmission main path, and the third voltage divider module is coupled to the ground; the node between the first voltage divider module and the second voltage divider module serves as the first output end of the coupling branch; the node between the second voltage divider module and the third voltage divider module serves as the second output end of the coupling branch; the coupling branch also includes a multi-way switch, the first output end and the second output end are connected to the input end of the multi-way switch, and the output end of the multi-way switch is connected to the input end of the detection unit; the multi-way switch is used to conduct the connection between the first output end and the input end of the detection unit, or to conduct the connection between the second output end and the input end of the detection unit.

[0015] In some embodiments, the detection unit includes a detector and multiple comparators, the input end of the detector is connected to the output end of the coupling branch, and the output end of the detector is connected to the input ends of the multiple comparators; the detector is used to convert the coupling signal into a DC voltage; each of the comparators is used to compare the DC voltage with a reference voltage and generate a comparison result, and the comparison result is used to indicate whether there is an abnormality in the transmission signal, and the reference voltage of each comparator is different.

[0016] In some embodiments, a first inductor is further included, and the first inductor is arranged between the output end of the coupling branch and the input end of the detection unit; the output end of the coupling branch has a second equivalent capacitor, and the input end of the detection unit has a third equivalent capacitor, and the first inductor, the second equivalent capacitor and the third equivalent capacitor constitute an input impedance matching network of the detection unit.

[0017] In some embodiments, the coupling branch further includes a DC blocking capacitor, and the DC blocking capacitor is arranged at an input end of the coupling branch.

[0018] In some embodiments, the input end of the coupling branch has a fourth equivalent capacitor, and the fourth equivalent capacitor serves as a capacitor in the LC unit.

[0019] In a second aspect, an embodiment of the present disclosure provides a radio frequency link, comprising: a radio frequency front-end chip and a signal link fault self-detection circuit in any of the above embodiments, wherein the radio frequency front-end chip is connected in series with the signal link fault self-detection circuit; the radio frequency front-end chip is used to output the transmission signal; and the signal link fault self-detection circuit is used to determine whether there is an abnormality in the transmission signal.

[0020] The embodiment of the present disclosure provides a signal link fault self-checking circuit and a radio frequency link. The signal link fault self-checking circuit comprises: a signal input terminal, a signal transmission main path and a signal output terminal connected in sequence; a plurality of LC units connected in sequence to the signal transmission main path, the LC unit comprises an inductor and a capacitor, the inductor is connected in series to the signal transmission main path, one end of the capacitor is connected to any end of the inductor; each of the LC units has a The value is greater than or equal to the preset bandwidth of the signal transmission main path; the coupling branch, the input end of the coupling branch is connected to any node of the signal transmission main path, and is used to couple the transmission signal on the signal transmission main path and output the coupling signal; the detection unit is connected to the output end of the coupling branch, and is used to determine whether the transmission signal is abnormal according to the coupling signal. In the signal link fault self-detection circuit provided by the embodiment of the present disclosure, multiple LC units are arranged on the signal transmission main path, so that the signal transmission main path has a suitable bandwidth, excellent impedance characteristics and frequency response characteristics, which can reduce the signal transmission loss and improve the signal transmission quality; by connecting the coupling branch to any node of the signal transmission main path, the transmission signal on the signal transmission main path can be coupled to the detection unit, so that the detection unit can judge the fault of the transmission signal according to the coupling signal; the signal link fault self-detection circuit provided by the embodiment of the present disclosure can also be implemented by on-chip integration without the need for additional off-chip devices, so that the signal link fault self-detection circuit can be integrated on a small chip, which is not only low-cost but also easy to mount on each node to be tested in a large-scale radio frequency link.

[0021] In some embodiments, by using the equivalent input inductance and equivalent input capacitance of the signal input end as one of the multiple LC units, and / or using the equivalent output inductance and equivalent output capacitance of the signal output end as one of the multiple LC units, the capacitance and inductance of the signal input end and / or the signal output end can be absorbed, thereby reducing the difficulty of implementing a signal transmission main path with a large bandwidth.

[0022] In some embodiments, by connecting the electrostatic protection circuit to the main signal transmission path, the signal link fault self-detection circuit has electrostatic protection capabilities, preventing electrostatic discharge from damaging the signal input and output ends, reducing interference and noise generated by electrostatic discharge, and improving the stability and reliability of the circuit.

[0023] In some embodiments, the electrostatic protection circuit has a first equivalent capacitor. By using the first equivalent capacitor of the electrostatic protection circuit as a capacitor in an LC unit, the equivalent capacitor of the electrostatic protection circuit can be absorbed, thereby preventing the equivalent capacitor of the electrostatic protection circuit from adversely affecting the bandwidth of the main signal transmission path, thereby improving the signal transmission quality.

[0024] In some embodiments, the coupling branch includes a first voltage divider module and a second voltage divider module connected in sequence, the first voltage divider module includes at least one first resistor, and the second voltage divider module includes at least one second resistor; by connecting the first switch in parallel with the at least one first resistor, the passage or short circuit of the at least one first resistor can be controlled by the first switch to adjust the impedance of the first voltage divider module, so that the coupling amount of the coupling branch can be adjusted. Therefore, when the range of the coupling signal that can be detected by the detection unit is fixed, the coupling amount of the coupling branch can be adjusted to adjust the signal power entering the detection unit so that the coupling signal is within the detection range of the detection unit, so that the coupling signal can be prevented from exceeding the detection range of the detection unit when the transmission signal is too large, or the coupling signal can be prevented from failing to reach the detection range of the detection unit when the transmission signal is too small, thereby achieving an adjustable detection range of the signal link fault self-detection circuit.

[0025] In some embodiments, the coupling branch includes a first voltage divider module and a second voltage divider module connected in sequence, the first voltage divider module includes at least one first resistor, and the second voltage divider module includes at least one second resistor; by connecting the second switch in parallel with the at least one second resistor, the passage or short circuit of the at least one second resistor can be controlled by the second switch to adjust the impedance of the second voltage divider module, so that the coupling amount of the coupling branch can be adjusted. Therefore, when the range of the coupling signal that can be detected by the detection unit is fixed, the coupling amount of the coupling branch can be adjusted to adjust the signal power entering the detection unit so that the coupling signal is within the detection range of the detection unit, so that the coupling signal can be prevented from exceeding the detection range of the detection unit when the transmission signal is too large, or the coupling signal can be prevented from failing to reach the detection range of the detection unit when the transmission signal is too small, thereby achieving an adjustable detection range of the signal link fault self-detection circuit.

[0026] In some embodiments, the coupling branch also includes a first voltage divider module, a second voltage divider module and a third voltage divider module connected in sequence, the node between the first voltage divider module and the second voltage divider module serves as the first output end of the coupling branch, the node between the second voltage divider module and the third voltage divider module serves as the second output end of the coupling branch, the first output end and the second output end are connected to the input end of the multi-way switch, and the output end of the multi-way switch is connected to the input end of the detection unit. By controlling the connection between the first output end or the second output end and the input end of the detection unit through the multi-way switch, the coupling signal of the first output end or the coupling signal of the second output end can be controlled as the coupling signal of the coupling branch, so that the coupling amount of the coupling branch can be adjusted. Therefore, when the range of the coupling signal that can be detected by the detection unit is fixed, the coupling amount of the coupling branch can be adjusted to adjust the signal power entering the detection detection unit so that the coupling signal is within the detection range of the detection unit, so that the coupling signal can be prevented from exceeding the detection range of the detection unit when the transmission signal is too large, or the coupling signal can be prevented from failing to reach the detection range of the detection unit when the transmission signal is too small, thereby realizing the adjustable detection range of the signal link fault self-detection circuit.

[0027] In some embodiments, the detection unit includes a detector and multiple comparators. The detector can convert the coupling signal into a DC voltage. The DC voltage and the reference voltage are compared by the comparator to generate a comparison result. The comparison result can be used to determine whether the DC voltage is within a normal range. If it is not within the normal range, there is an abnormality in the transmission signal. Otherwise, the transmission signal is normal. In this way, fault detection of the transmission signal can be achieved.

[0028] In some embodiments, the input end of the coupling branch has a fourth equivalent capacitor. By using the fourth equivalent capacitor as a capacitor in an LC unit, not only the equivalent capacitance of the input end of the coupling branch is absorbed, the adverse effect on the bandwidth is reduced, and the signal transmission quality is improved; the number of components can also be reduced, thereby reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 1 ;

[0030] Figure 2 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 2 ;

[0031] Figure 3 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 3 ;

[0032] Figure 4 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 4 ;

[0033] Figure 5 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 5 ;

[0034] Figure 6 A schematic diagram of the structure of a multi-way switch provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0035] The following will be combined with the embodiments of the present disclosure and the accompanying drawings to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0036] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0037] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0038] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present disclosure necessarily has the first element, component, region, layer or part.

[0039] Spatial relationship terms such as "under", "below", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0040] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present disclosure. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0041] In order to thoroughly understand the present disclosure, detailed steps and detailed structures will be presented in the following description to illustrate the technical solution of the present disclosure. The preferred embodiments of the present disclosure are described in detail below, but in addition to these detailed descriptions, the present disclosure may also have other implementations.

[0042] With the development of science and technology, the scale of RF links is becoming increasingly large. In actual applications, when there is a problem with the signal finally output by the RF link, it is difficult to quickly find the fault location of the RF link. In related technologies, in order to solve the above problems, a BIT (Built-In Test) technology is proposed. BIT technology realizes self-detection and fault diagnosis of the system to provide detailed fault information, helping engineers to quickly locate the problem (locate to a specific node) and perform targeted repairs. However, mounting BIT chips on multiple nodes to be tested in large-scale RF links may affect the cost and performance of the entire RF link, and increase the design complexity, integration difficulty and development cycle of the RF link. Compared with BIT chips, how to provide a solution that is not only miniaturized, low-cost and easy to mount, but can also detect transmission signals without affecting the transmission signals on the main link has become increasingly urgent.

[0043] Figure 1A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 1 See also Figure 1 The signal link fault self-checking circuit comprises: a signal input terminal 10, a signal transmission main path and a signal output terminal 20 connected in sequence; a plurality of LC units connected in sequence on the signal transmission main path, the LC unit comprises an inductor and a capacitor, the inductor is connected in series on the signal transmission main path, one end of the capacitor is connected to any end of the inductor; each LC unit The value is greater than or equal to the preset bandwidth of the signal transmission main path; a coupling branch 30, the input end of the coupling branch 30 is connected to any node of the signal transmission main path, and is used to couple the transmission signal on the signal transmission main path and output a coupled signal; a detection unit 40 is connected to the output end of the coupling branch 30, and is used to determine whether there is an abnormality in the transmission signal based on the coupled signal.

[0044] In some embodiments, in order to avoid the situation in which the high-frequency components of the transmission signal on the signal transmission main path are filtered out or attenuated to produce signal distortion due to the small bandwidth of the signal transmission main path being unable to cover the frequency of the transmission signal during the transmission process, the bandwidth of the signal transmission main path can be set to a preset bandwidth, wherein the preset bandwidth is the frequency range of the signal that can be transmitted by the signal transmission main path.

[0045] In some embodiments, each LC cell When the resonant frequency of each LC unit is greater than or equal to the preset bandwidth, the transmission signal can be effectively transmitted on the main signal transmission path, and the attenuation and distortion of the signal are reduced. In a specific example, the preset bandwidth is 100Hz to 200Hz, then the resonant frequency of each LC unit Greater than or equal to 200Hz to ensure that the transmission signal can be effectively transmitted.

[0046] In the signal link fault self-detection circuit provided by the embodiment of the present disclosure, multiple LC units are arranged on the signal transmission main path, so that the signal transmission main path has a suitable bandwidth, excellent impedance characteristics and frequency response characteristics, which can reduce the signal transmission loss and improve the signal transmission quality; by connecting the coupling branch to any node of the signal transmission main path, the transmission signal on the signal transmission main path can be coupled to the detection unit, so that the detection unit can make a fault judgment on the transmission signal according to the coupled signal; the signal link fault self-detection circuit provided by the embodiment of the present disclosure can also be implemented through on-chip integration without the need for additional off-chip devices, so that the signal link fault self-detection circuit can be integrated on a small chip, which is not only low-cost but also easy to mount in each node to be tested in a large-scale radio frequency link.

[0047] In some embodiments, in order to ensure the design symmetry of the signal transmission main path, the inductor and capacitor connected to the signal transmission main path can be designed symmetrically, so as to ensure the characteristic impedance matching of the signal transmission main path, help reduce signal reflections, and thus improve the efficiency and quality of signal transmission.

[0048] In some embodiments, the main signal transmission path may have a symmetry axis, and the LC unit on the first side of the symmetry axis and the second side of the symmetry axis may satisfy a symmetrical design, so that the design symmetry of the main signal transmission path can be achieved. It should be noted that the symmetrical design means that the number of devices (the number of LC units) between the first LC unit located on the first side of the symmetry axis and the symmetry axis is the same as the number of devices between the second LC unit located on the second side of the symmetry axis and the symmetry axis, and the structure of the first LC unit is symmetrical to the structure of the second LC unit. The first side and the second side refer to the two sides opposite to the symmetry axis.

[0049] In one embodiment, taking the example of 2a LC units connected in sequence on the main signal transmission path (a is a positive integer), the symmetry axis of the main signal transmission path is the node between the ath LC unit and the a+1th LC unit; the LC units with the same number of devices spaced apart from the symmetry axis of the main signal transmission path may specifically be the first LC unit and the 2ath LC unit, the second LC unit and the 2a-1th LC unit, the third LC unit and the 2a-2th LC unit, and so on to the ath LC unit and the a+1th LC unit. It should be noted that the symmetrical design of the first LC unit and the 2ath LC unit means that if the capacitor in the first LC unit is connected to the first end of the inductor, the capacitor in the 2ath LC unit should be connected to the second end of the inductor; or, if the capacitor in the first LC unit is connected to the second end of the inductor, the capacitor in the 2ath LC unit should be connected to the first end of the inductor. In another embodiment, 2a LC units are sequentially connected to the main signal transmission path, and an inductor may be added on the symmetry axis of the main signal transmission path (the node between the ath LC unit and the a+1th LC unit). In this case, the symmetry axis of the main signal transmission path may be the added inductor, and the main signal transmission path also satisfies the symmetrical design. It should be noted that the first end and the second end of the inductor are two opposite ends of the inductor.

[0050] In another embodiment, taking the example of 2a-1 LC units connected in sequence on the main signal transmission path, the symmetry axis of the main signal transmission path is the ath LC unit. In order to meet the design symmetry of the main signal transmission path, an inductor needs to be added at one end of the ath LC unit. Specifically, the capacitor in the ath LC unit is connected to the second end of the inductor, and an inductor is added to the second end of the inductor in the ath LC unit; or the capacitor in the ath LC unit is connected to the first end of the inductor, and an inductor is added to the first end of the inductor in the ath LC unit. In this way, the ath LC unit and the added inductor can form a symmetrical circuit structure to achieve a symmetrical design of the main signal transmission path. It should be noted that the added inductor is used to ensure the design symmetry of the main signal transmission path to achieve characteristic impedance matching of the main signal transmission path.

[0051] See also Figure 1 There are 6 inductors connected in series on the main signal transmission line, namely L1, L2, L3, L4, L5 and L6, among which L1 and C1 can constitute the first LC unit, L2 and C2 can constitute the second LC unit, L3 and C3 (or L4 and C3) can constitute the third LC unit, L5 and C4 can constitute the fourth LC unit, and L6 and C5 can constitute the fifth LC unit. Figure 1 In the circuit shown, when L3 and C3 form the third LC unit, in order to ensure the design symmetry of the main signal transmission path, L4 is an additional inductor to achieve a symmetrical design of the main signal transmission path; when L4 and C3 form the third LC unit, in order to ensure the design symmetry of the main signal transmission path, L3 is an additional inductor to achieve a symmetrical design of the main signal transmission path. It should be noted that the inductor involved in the present disclosure is referred to as L, and the capacitor is referred to as C. In addition, the inductor involved in the embodiments of the present disclosure can be an on-chip transmission line inductor or an on-chip winding inductor, and the capacitor can be an on-chip capacitor or an equivalent capacitor of other circuit structures.

[0052] In some embodiments, Figure 1The signal link fault self-checking circuit shown includes 5 LC units, specifically: L1 and C1 can constitute the first LC unit, L2 and C2 can constitute the second LC unit, L3 and C3 can constitute the third LC unit, L4 and C4 can constitute the fourth LC unit, L5 and C5 can constitute the fifth LC unit, in which case L6 can be an inductor added to ensure the symmetrical design of the signal transmission main path. Or: L2 and C1 can constitute the first LC unit, L3 and C2 can constitute the second LC unit, L4 and C3 can constitute the third LC unit, L5 and C4 can constitute the fourth LC unit, L6 and C5 can constitute the fifth LC unit, in which case L1 can be an inductor added to ensure the symmetrical design of the signal transmission main path. It should be noted that when the main signal transmission path includes multiple inductors connected in series and multiple capacitors connected to any end of the inductors, if the number of inductors is one more than the number of capacitors, any one of the multiple inductors can be regarded as an additional inductor used to ensure the symmetrical design of the main signal transmission path, and the other inductors and capacitors can correspond one to one to form multiple LC units.

[0053] Figure 2 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 2 See also Figure 2 , six LC units are sequentially connected on the main signal transmission line, among which L1 and C1 can constitute the first LC unit, L2 and C2 can constitute the second LC unit, L3 and C3 can constitute the third LC unit, L4 and C4 can constitute the fourth LC unit, L5 and C5 can constitute the fifth LC unit, and L6 and C6 can constitute the sixth LC unit. Figure 2 In the circuit shown, C1 in the first LC cell is set at the second end of L1, C2 in the second LC cell is set at the first end of L2, C3 in the third LC cell is set at the second end of L3, C4 in the fourth LC cell is set at the first end of L4, C5 in the fifth LC cell is set at the second end of L5, and C6 in the sixth LC cell is set at the first end of L6. Figure 2 In the circuit shown, since an even number of LC units are sequentially connected to the main signal transmission path, and the same number of LC units spaced apart from the axis of symmetry of the main signal transmission path satisfy the symmetrical design, the symmetrical design of the main signal transmission path can be achieved without adding inductors to the main signal transmission path.

[0054] In some embodiments, the number of inductors and capacitors connected to the main signal transmission path can be the same or different, as long as the symmetrical design of the main signal transmission path can be achieved to meet the characteristic impedance matching of the main signal transmission path. It should be noted that the present disclosure does not impose any restrictions on the number of LC units, inductors, and capacitors.

[0055] In some embodiments, the number of inductors connected in series on the signal transmission main path is 2b (b is a positive integer), and the input end of the coupling branch can be connected between the bth inductor and the b+1th inductor to ensure the symmetrical design of the signal transmission main path and avoid the connection position of the coupling branch and the signal transmission main path affecting the symmetrical design of the circuit, thereby affecting the characteristic impedance matching of the signal transmission main path.

[0056] In some embodiments, the more LC units connected to the main signal transmission path, the larger the frequency range that the main signal transmission path can cover. Therefore, the bandwidth of the signal can be increased by increasing the number of LC units on the main signal transmission path.

[0057] In some embodiments, the signal input terminal has an equivalent input inductance and an equivalent input capacitance, and the equivalent input inductance and the equivalent input capacitance serve as one LC unit among multiple LC units; and / or, the signal output terminal has an equivalent output inductance and an equivalent output capacitance, and the equivalent output inductance and the equivalent output capacitance serve as one LC unit among multiple LC units.

[0058] See also Figure 1 , the LC unit composed of L1 and C1 can be regarded as the equivalent input inductance and equivalent input capacitance of the signal input terminal 10, and the LC unit composed of L6 and C5 can be regarded as the equivalent output capacitance and equivalent output inductance of the signal output terminal 20. It can be understood that L1 and C1 are the equivalent input inductance and equivalent input capacitance, respectively, and L6 and C5 are the equivalent output inductance and equivalent output capacitance, respectively.

[0059] See also Figure 2 The LC unit composed of L1 and C1 can be regarded as the equivalent input inductance and equivalent input capacitance of the signal input terminal 10 , and the LC unit composed of L6 and C6 can be regarded as the equivalent output capacitance and equivalent output inductance of the signal output terminal 20 .

[0060] In some embodiments, the signal input terminal and / or the signal output terminal may include a bonding pad and a bonding wire, wherein the bonding pad has an equivalent capacitance and the bonding wire has an equivalent inductance. By using the equivalent input inductance and equivalent input capacitance of the signal input terminal as one of the multiple LC units, and / or using the equivalent output inductance and equivalent output capacitance of the signal output terminal as one of the multiple LC units, the equivalent capacitance and equivalent inductance of the signal input terminal and / or the signal output terminal can be absorbed, thereby reducing the difficulty of implementing a signal transmission main path with a large bandwidth.

[0061] In some embodiments, the signal link fault self-detection circuit further includes at least one electrostatic protection circuit, and the electrostatic protection circuit is connected to any node of the signal transmission main path.

[0062] Figure 3 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 3 See also Figure 3 , the signal link fault self-detection circuit may include an electrostatic protection circuit 51 and an electrostatic protection circuit 52. Wherein, when the LC unit composed of L1 and C1 is the equivalent input inductance and equivalent input capacitance of the signal input terminal 10, and the LC unit composed of L6 and C5 is the equivalent output capacitance and equivalent output inductance of the signal output terminal 20, in order to ensure the symmetrical design of the signal transmission main path, the electrostatic protection circuit 51 can be connected between L2 and L3, and the electrostatic protection circuit 52 can be connected between L4 and L5. It should be noted that the present disclosure does not specifically limit the number of electrostatic protection circuits.

[0063] In other embodiments, the electrostatic protection circuit 51 may be connected between L1 and L2 , and the electrostatic protection circuit 52 may be connected between L5 and L6 .

[0064] The disclosed embodiment connects the electrostatic protection circuit to the main signal transmission path so that the signal link fault self-detection circuit has electrostatic protection capability, thereby preventing electrostatic discharge from damaging the signal input and output ends, reducing interference and noise generated by electrostatic discharge, and improving the stability and reliability of the circuit.

[0065] In some embodiments, the electrostatic protection circuit has a first equivalent capacitor, and the first equivalent capacitor serves as a capacitor in an LC unit.

[0066] See also Figure 3 , the electrostatic protection circuit 51 and the electrostatic protection circuit 52 both have a first equivalent capacitor. Among them, C2 can be regarded as the first equivalent capacitor of the electrostatic protection circuit 51, and C4 can be regarded as the first equivalent capacitor of the electrostatic protection circuit 52. It can be understood that C2 and C4 do not need to be implemented by on-chip capacitors.

[0067] In the embodiment of the present disclosure, the first equivalent capacitor of the electrostatic protection circuit is used as a capacitor in an LC unit to absorb the equivalent capacitance of the electrostatic protection circuit, thereby preventing the equivalent capacitance of the electrostatic protection circuit from having an adverse effect on the bandwidth of the main signal transmission path, thereby improving the signal transmission quality.

[0068] In some embodiments, the electrostatic protection circuit includes a first diode string and a second diode string, the first diode string and the second diode string are connected in reverse parallel; the first diode string includes at least one first diode, and the second diode string includes at least one second diode.

[0069] In some embodiments, the first diode string and the second diode string connected in reverse parallel can provide electrostatic protection in two directions. Regardless of whether it is forward static electricity or reverse static electricity, there is always a diode string that can respond and conduct, absorb and clamp excessive voltage, and achieve electrostatic protection.

[0070] See also Figure 3 The first diode string of the electrostatic protection circuit 51 includes a first diode D11 and a first diode D12 connected in series, and the second diode string of the electrostatic protection circuit 51 includes a second diode D21 and a second diode D22 connected in series. The first diode string of the electrostatic protection circuit 52 includes a first diode D31 and a first diode D32 connected in series, and the second diode string of the electrostatic protection circuit 52 includes a second diode D41.

[0071] See also Figure 3 , the cathode of the first diode string (the cathode of the first diode D11) and the anode of the second diode string (the anode of the second diode D21) in the electrostatic protection circuit 51 are connected between L2 and L3, and the anode of the first diode string (the anode of the first diode D12) and the cathode of the second diode string (the cathode of the second diode D22) in the electrostatic protection circuit 51 are grounded; the cathode of the first diode string (the cathode of the first diode D31) and the anode of the second diode string (the anode of the second diode D41) in the electrostatic protection circuit 52 are connected between L4 and L5, and the anode of the first diode string (the anode of the first diode D32) and the cathode of the second diode string (the cathode of the second diode D41) in the electrostatic protection circuit 52 are grounded. It should be noted that the present disclosure does not specifically limit the number of first diodes in the first diode string and the number of second diodes in the second diode string.

[0072] In some embodiments, the electrostatic protection circuit may include a TVS (Transient Voltage Suppressor) diode, wherein the cathode of the TVS diode is connected to any node of the main signal transmission path, and the anode of the TVS diode is grounded.

[0073] In some embodiments, since the diode has the characteristics of fast response speed and low power consumption, it can be used in an electrostatic protection circuit to quickly respond to electrostatic events, effectively protect the signal input and signal output terminals, and improve the reliability of the circuit.

[0074] In some embodiments, the coupling branch includes a first voltage divider module and a second voltage divider module connected in sequence, the first voltage divider module includes at least one first resistor, and the second voltage divider module includes at least one second resistor; the first voltage divider module is connected to any node of the signal transmission main path, the node between the first voltage divider module and the second voltage divider module is connected to the input end of the detection unit, and the second voltage divider module is coupled to the ground.

[0075] Figure 4 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 4 . See Figure 4 , the first voltage divider module includes three first resistors connected in series, namely R11, R12 and R13, and the second voltage divider module includes three second resistors connected in series, namely R21, R22 and R23. Among them, the node between the first voltage divider module and the second voltage divider module (that is, the node between R13 and R21) serves as the output end of the coupling branch 30 and is connected to the input end of the detection unit 40. Among them, the first voltage divider module is used to receive the transmission signal on the signal transmission main road, and transmit it to the output end of the coupling branch 30 and the second voltage divider module. The output end of the coupling branch 30 is used to transmit the coupled signal to the detection unit 40, and the second voltage divider module is coupled to the ground to form signal attenuation or shunting and provide a reference potential. It should be noted that the second voltage divider module is coupled to the ground, which means that the second voltage divider module can be directly connected to the ground, or it can be connected to the ground through other devices. In addition, the embodiment of the present disclosure does not specifically limit the number of first resistors and the number of second resistors.

[0076] In some embodiments, the coupling amount M of the coupling branch 30 is calculated as follows:

[0077] (1)

[0078] Among them, P1 is the power of the transmission signal on the signal transmission main path, P2 is the power of the coupling signal output by the coupling branch, R10 is the impedance of the first voltage divider module, and R20 is the impedance of the second voltage divider module.

[0079] In some embodiments, the coupling amount of the coupling branch is greater than or equal to 10 dB, such as 10 dB, 20 dB or 30 dB. When the coupling amount of the coupling branch is greater than or equal to 10 dB, the coupling signal output by the coupling branch is small and hardly affects the transmission signal on the main signal transmission path.

[0080] In some embodiments, the signal input terminal 10 is connected to the external input impedance Rin, and the signal output terminal 20 is connected to the external output impedance Rout to achieve input and output impedance matching of the signal transmission main path. The resistance value of the external input impedance Rin and the resistance value of the external output impedance Rout are both 50 ohms.

[0081] In some embodiments, the first voltage divider module includes at least two first resistors connected in series and at least one first switch, each first switch is connected in parallel with at least one first resistor, and the first switch is used to control the passage and short circuit of at least one first resistor to adjust the impedance of the first voltage divider module.

[0082] See also Figure 4, the first voltage divider module may include three first switches, namely N11, N12 and N13, N11 is connected in parallel with R11, N12 is connected in parallel with R12, and N13 is connected in parallel with R12 and R13. Among them, the first switch can be a field effect transistor, the gate of N11 is connected to V11, the gate of N12 is connected to V12, and the gate of N13 is connected to V13, so that the first resistor path or short circuit in the first voltage divider module can be controlled by controlling the levels of V11, V12 and V13 respectively, so as to adjust the impedance R10 of the first voltage divider module, so that the coupling amount of the coupling branch 30 can be adjusted. It should be noted that the present disclosure does not impose any restrictions on the number of first switches and the number of first resistors in parallel with the first switches. In addition, when the first switch is turned on, the first resistor in parallel is short-circuited, and when the first switch is turned off, the first resistor path in parallel is connected.

[0083] In the disclosed embodiment, by connecting the first switch in parallel with at least one first resistor, the passage or short circuit of at least one first resistor can be controlled by the first switch to adjust the impedance of the first voltage divider module, so that the coupling amount of the coupling branch can be adjusted. Therefore, when the range of the coupling signal that can be detected by the detection unit is fixed, the coupling amount of the coupling branch can be adjusted to adjust the signal power entering the detection unit so that the coupling signal is within the detection range of the detection unit. This can avoid the coupling signal exceeding the detection range of the detection unit when the transmission signal is too large, or avoid the coupling signal failing to reach the detection range of the detection unit when the transmission signal is too small, thereby achieving the adjustable detection range of the signal link fault self-detection circuit.

[0084] In some embodiments, the second voltage divider module includes at least two second resistors connected in series and at least one second switch, each second switch is connected in parallel with at least one second resistor, and the second switch is used to control the passage and short circuit of at least one second resistor to adjust the impedance of the second voltage divider module.

[0085] See also Figure 4 , the second voltage divider module may include two second switches, namely N21 and N22, N21 is connected in parallel with R22, and N22 is connected in parallel with R23. Among them, the second switch can be a field effect transistor, the gate of N21 is connected to V21, and the gate of N22 is connected to V22, so that the second resistor path or short circuit in the second voltage divider module can be controlled by controlling the levels of V21 and V22 respectively, so as to adjust the impedance R20 of the second voltage divider module, so that the coupling amount of the coupling branch 30 can be adjusted. It should be noted that the present disclosure does not impose any restrictions on the number of second switches and the number of second resistors in parallel with the second switches. In addition, when the second switch is turned on, the second resistor in parallel is short-circuited, and when the second switch is turned off, the second resistor path in parallel is closed.

[0086] In the embodiment of the present disclosure, by connecting the second switch in parallel with at least one second resistor, the second switch can be used to control the passage or short circuit of at least one second resistor to adjust the impedance of the second voltage divider module, thereby achieving adjustable coupling of the coupling branch.

[0087] In some embodiments, the coupling branch also includes a first voltage divider module, a second voltage divider module and a third voltage divider module connected in sequence; the first voltage divider module includes at least one first resistor, the second voltage divider module includes at least one second resistor, and the third voltage divider module includes at least one third resistor; the first voltage divider module is connected to any node of the signal transmission main path, and the third voltage divider module is coupled to the ground; the node between the first voltage divider module and the second voltage divider module serves as the first output end of the coupling branch; the node between the second voltage divider module and the third voltage divider module serves as the second output end of the coupling branch; the coupling branch also includes a multi-way switch, the first output end and the second output end are connected to the input end of the multi-way switch, and the output end of the multi-way switch is connected to the input end of the detection unit; the multi-way switch is used to conduct the connection between the first output end and the input end of the detection unit, or to conduct the connection between the second output end and the input end of the detection unit.

[0088] Figure 5 A schematic diagram of a signal link fault self-detection circuit provided in an embodiment of the present disclosure Figure 5 See also Figure 5 , the first voltage divider module includes two first resistors connected in series, namely R11' and R12', the second voltage divider module includes two second resistors connected in series, namely R21' and R22', and the third voltage divider module may include two third resistors connected in series, namely R31' and R32'. The first output end of the coupling branch 30 is connected to the first input end of the multi-way switch 33, the second output end of the coupling branch 30 is connected to the second input end of the multi-way switch, and the output end of the multi-way switch 33 is the output end of the coupling branch 30. The coupling amount of the coupling branch is adjusted by controlling the first output end to output a coupling signal or the second output end to output a coupling signal, so that the power of the signal entering the detection unit can be adjusted. The present disclosure does not impose any restrictions on the specific circuit structure of the multi-way switch. It should be noted that the third voltage divider module coupled to the ground means that the third voltage divider module can be directly connected to the ground or connected to the ground through other devices.

[0089] In some embodiments, the coupling branch includes n voltage divider modules connected in sequence, namely, the first voltage divider module to the nth voltage divider module, and n is a positive integer greater than or equal to 3. Among them, the first voltage divider module is connected to any node of the signal transmission main path, the nth voltage divider module is coupled to the ground, and the node between two adjacent voltage divider modules is connected to an input end of the multi-way switch as an output end of the coupling branch. It can be understood that the coupling branch can have n-1 output ends, namely, the first output end to the n-1th output end. It should be noted that the nth voltage divider module is coupled to the ground means that the nth voltage divider module can be directly connected to the ground, and can also be connected to the ground through other devices.

[0090] Figure 6 This is a schematic diagram of the structure of a multi-way switch provided by an embodiment of the present disclosure. Figure 6 , taking the coupling branch including n voltage-dividing modules and the multi-way switch 33 having n-1 input terminals as an example, the multi-way switch 33 can be composed of n-1 field effect transistors, the first terminals of the n-1 field effect transistors are respectively used as the input terminals of the multi-way switch, the second terminals of the n-1 field effect transistors are connected to the common terminal (that is, the output terminal of the multi-way switch), and the gates of the n-1 field effect transistors are respectively connected to V1 to Vn-1. By controlling the level of V1 to Vn-1 respectively, any field effect transistor in the multi-way switch 33 can be turned on to turn on the connection between any output terminal of the coupling branch (the first terminal of the turned-on field effect transistor) and the input terminal of the detection unit. It should be noted that the first terminal and the second terminal of the field effect transistor can be any one of the source or the drain.

[0091] In some embodiments, taking the coupling branch including n voltage dividing modules as an example, the coupling amount M of the coupling branch 30 is calculated as shown in Formula (2):

[0092] (2)

[0093] Wherein, P1 is the power of the transmission signal on the signal transmission main path, P2 is the power of the coupling signal output by the coupling branch, Rpart is the impedance of the voltage divider module located between the output end of the conducting coupling branch and the signal transmission main path, and Rtotal is the impedance of n voltage divider modules. For example, the multi-way switch is controlled to conduct the connection between the second output end and the input end of the detection unit, and at this time, Rpart is the sum of the impedance of the first voltage divider module and the impedance value of the second voltage divider module.

[0094] In the embodiment of the present disclosure, the node between two adjacent voltage-dividing modules is used as an output end of the coupling branch. By selecting and conducting the connection between any output end of the coupling branch and the input end of the detection unit through a multi-way switch, the coupling amount of the coupling branch can be adjusted.

[0095] In some embodiments, the detection unit includes a detector and multiple comparators, the input end of the detector is connected to the output end of the coupling branch, and the output end of the detector is connected to the input ends of the multiple comparators; the detector is used to convert the coupling signal into a DC voltage; each comparator is used to compare the DC voltage with a reference voltage and generate a comparison result, and the comparison result is used to indicate whether there is an abnormality in the transmission signal, and the reference voltage of each comparator is different.

[0096] See also Figure 4 , the detection unit 40 includes m comparators, namely, comparator 1 to comparator m, m is a positive integer, and the reference voltages of comparator 1 to comparator m are Vref1 to Vrefm, respectively, and Vref1 to Vrefm are different. In a specific example, if the DC voltage Vout output by the detector 41 is in the range of 4.0mV to 5.0mV, there is no abnormality in the transmission signal. Specifically, the detection unit 40 may include 5 comparators, wherein the reference voltage Vref1 of comparator 1 is 1.0mV, the reference voltage Vref2 of comparator 2 is 2.0mV, the reference voltage Vref3 of comparator 3 is 3.0mV, the reference voltage Vref4 of comparator 4 is 4.0mV, and the reference voltage Vref5 of comparator 5 is 5.0mV. If the comparison result output by the comparator is a logic "1", it indicates that the DC voltage is greater than the reference voltage, and the comparison result output by the comparator is a logic "0", it indicates that the DC voltage is less than the reference voltage. In this case, the BIT output terminal 1 of the comparator 1 outputs a logic "1", the BIT output terminal 2 of the comparator 2 outputs a logic "1", the BIT output terminal 3 of the comparator 3 outputs a logic "1", the BIT output terminal 4 of the comparator 4 outputs a logic "1", and the BIT output terminal 5 of the comparator 5 outputs a logic "0", that is, the detection unit 40 outputs 11110, then there is no abnormality in the transmission signal, otherwise there is an abnormality in the transmission signal. It should be noted that the comparison result output by the comparator is a logic "1", which can indicate that the DC voltage is greater than the reference voltage, and the comparison result output by the comparator is a logic "0", which indicates that the DC voltage is less than the reference voltage; or the comparison result output by the comparator is a logic "1", which can indicate that the DC voltage is less than the reference voltage, and the comparison result output by the comparator is a logic "0", which indicates that the DC voltage is greater than the reference voltage, and the present disclosure does not impose any other restrictions on this. In addition, the detector may be a logarithmic detector, a diode detector, or the like which can convert signal power into a DC voltage.

[0097] In the embodiment of the present disclosure, the detector can convert the coupling signal into a DC voltage, compare the DC voltage with a reference voltage through a comparator, and generate a comparison result. The comparison result can be used to determine whether the DC voltage is within a normal range. If it is not within the normal range, the transmission signal is abnormal; if it is within the normal range, the transmission signal is normal. In this way, fault detection of the transmission signal can be achieved.

[0098] In some embodiments, within the detection range of the detection unit, the more comparators there are, the smaller the difference between the reference voltages of each comparator can be, so that the detection accuracy of the detection unit is higher. In other words, the number of comparators is proportional to the detection accuracy of the detection unit.

[0099] In some embodiments, it also includes a first inductor, which is arranged between the output end of the coupling branch and the input end of the detection unit; the output end of the coupling branch has a second equivalent capacitor, and the input end of the detection unit has a third equivalent capacitor. The first inductor, the second equivalent capacitor and the third equivalent capacitor constitute an input impedance matching network of the detection unit.

[0100] See also Figure 4 and Figure 5 By setting the first inductor Lm between the output end of the coupling branch 30 and the input end of the detection unit 40, the first inductor Lm, the second equivalent capacitor C31 and the third equivalent capacitor C41 can form an input impedance matching network of the detection unit, which can avoid the second equivalent capacitor C31 and the third equivalent capacitor C41 from having an adverse effect on the high-frequency components in the coupling signal, so as to reduce the transmission loss, improve the transmission quality of the coupling signal, and improve the accuracy of the detection result output by the detection unit 40. It should be noted that the first inductor can be an on-chip transmission line inductor or an on-chip winding inductor. In addition, R42 is the input impedance of the detection unit 40.

[0101] In some embodiments, the coupling branch further includes a DC blocking capacitor, and the DC blocking capacitor is arranged at the input end of the coupling branch.

[0102] In some embodiments, the DC blocking capacitor C32 can filter out the DC component in the transmission signal to prevent the DC component in the transmission signal from affecting the accuracy and stability of the coupling signal, thereby reducing the credibility of the detection result output by the detection unit 40. It should be noted that when the DC potential between the signal input terminal and the signal output terminal is not zero, a DC component may exist in the transmission signal.

[0103] In some embodiments, the input end of the coupling branch has a fourth equivalent capacitor, and the fourth equivalent capacitor serves as a capacitor in an LC unit.

[0104] See also Figure 4 C3 can be regarded as the fourth equivalent capacitor at the input end of the coupling branch 30. By using the fourth equivalent capacitor as a capacitor in an LC unit, it not only absorbs the equivalent capacitance at the input end of the coupling branch, reduces the adverse effect on the bandwidth, and improves the signal transmission quality; it can also reduce the number of components and reduce costs.

[0105] An embodiment of the present disclosure provides a radio frequency link, including: a radio frequency front-end chip and a signal link fault self-detection circuit in any of the above embodiments, wherein the radio frequency front-end chip and the signal link fault self-detection circuit are connected in series; the radio frequency front-end chip is used to output a transmission signal, and the signal link fault self-detection circuit is used to determine whether there is an abnormality in the transmission signal.

[0106] In some embodiments, the signal link fault self-check circuit can determine whether the RF front-end chip is faulty by determining whether there is an abnormality in the transmission signal. If there is an abnormality in the transmission signal, it is determined that the RF front-end chip is faulty. In this way, the specific fault location in the RF link can be quickly and efficiently determined, improving the troubleshooting efficiency of the staff and repairing the fault in a timely manner.

[0107] It should be noted here that the description of the above radio frequency link is similar to the description of the above signal link fault self-detection circuit embodiment, and has similar beneficial effects as the signal link fault self-detection circuit embodiment. For technical details not disclosed in the radio frequency link embodiment of the present disclosure, please refer to the description of the signal link fault self-detection circuit embodiment of the present disclosure for understanding.

[0108] The embodiment of the present disclosure provides a signal link fault self-checking circuit and a radio frequency link. The signal link fault self-checking circuit comprises: a signal input terminal, a signal transmission main path and a signal output terminal connected in sequence; a plurality of LC units connected in sequence to the signal transmission main path, the LC unit comprises an inductor and a capacitor, the inductor is connected in series to the signal transmission main path, one end of the capacitor is connected to any end of the inductor; each of the LC units has a The value is greater than or equal to the preset bandwidth of the signal transmission main path; the coupling branch, the input end of the coupling branch is connected to any node of the signal transmission main path, and is used to couple the transmission signal on the signal transmission main path and output the coupling signal; the detection unit is connected to the output end of the coupling branch, and is used to determine whether the transmission signal is abnormal according to the coupling signal. In the signal link fault self-detection circuit provided by the embodiment of the present disclosure, multiple LC units are arranged on the signal transmission main path, so that the signal transmission main path has a suitable bandwidth, excellent impedance characteristics and frequency response characteristics, which can reduce the signal transmission loss and improve the signal transmission quality; by connecting the coupling branch to any node of the signal transmission main path, the transmission signal on the signal transmission main path can be coupled to the detection unit, so that the detection unit can judge the fault of the transmission signal according to the coupling signal; the signal link fault self-detection circuit provided by the embodiment of the present disclosure can also be implemented by on-chip integration without the need for additional off-chip devices, so that the signal link fault self-detection circuit can be integrated on a small chip, which is not only low-cost but also easy to mount on each node to be tested in a large-scale radio frequency link.

[0109] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present disclosure, the size of the serial number of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages and disadvantages of the embodiments.

[0110] The above description is only a preferred embodiment of the present disclosure, and does not limit the patent scope of the present disclosure. All equivalent structural changes made by using the contents of the present disclosure and the drawings under the inventive concept of the present disclosure, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present disclosure.

Claims

1. A signal link fault self-detection circuit, characterized in that: include: A signal input terminal, a signal transmission main path and a signal output terminal connected in sequence; A plurality of LC units are sequentially connected to the main signal transmission path, wherein the LC units include an inductor and a capacitor, wherein the inductor is connected in series to the main signal transmission path, and the capacitor is connected in parallel to the main signal transmission path, and one end of the capacitor is connected to any end of the inductor; each of the LC units The value is greater than or equal to the preset bandwidth of the signal transmission main path; A coupling branch, the input end of which is connected to any node of the signal transmission main path, and is used to couple the transmission signal on the signal transmission main path and output a coupled signal; A detection unit is connected to the output end of the coupling branch and is used to determine whether the transmission signal is abnormal according to the coupling signal.

2. The circuit according to claim 1, characterized in that The signal input end has an equivalent input inductance and an equivalent input capacitance, and the equivalent input inductance and the equivalent input capacitance serve as one LC unit among the plurality of LC units; And / or, the signal output end has an equivalent output inductor and an equivalent output capacitor, and the equivalent output inductor and the equivalent output capacitor serve as one LC unit among the multiple LC units.

3. The circuit according to claim 1, characterized in that It also includes at least one electrostatic protection circuit, which is connected to any node of the signal transmission main path.

4. The circuit according to claim 3, characterized in that The electrostatic protection circuit has a first equivalent capacitor, and the first equivalent capacitor serves as a capacitor in the LC unit.

5. The circuit according to claim 3, characterized in that The electrostatic protection circuit includes a first diode string and a second diode string, the first diode string and the second diode string are connected in reverse parallel; the first diode string includes at least one first diode, and the second diode string includes at least one second diode.

6. The circuit according to claim 1, characterized in that The coupling branch comprises a first voltage dividing module and a second voltage dividing module connected in sequence, the first voltage dividing module comprises at least one first resistor, and the second voltage dividing module comprises at least one second resistor; The first voltage divider module is connected to any node of the signal transmission main path, the node between the first voltage divider module and the second voltage divider module is connected to the input end of the detection unit, and the second voltage divider module is coupled to the ground.

7. The circuit according to claim 6, characterized in that The first voltage divider module includes at least two first resistors connected in series and at least one first switch. Each first switch is connected in parallel with at least one first resistor. The first switch is used to control the passage and short circuit of the at least one first resistor to adjust the impedance of the first voltage divider module.

8. The circuit according to claim 6, characterized in that The second voltage divider module includes at least two second resistors connected in series and at least one second switch, each second switch is connected in parallel with at least one second resistor, and the second switch is used to control the passage and short circuit of the at least one second resistor to adjust the impedance of the second voltage divider module.

9. The circuit according to claim 1, characterized in that The coupling branch further includes a first voltage dividing module, a second voltage dividing module and a third voltage dividing module connected in sequence; the first voltage dividing module includes at least one first resistor, the second voltage dividing module includes at least one second resistor, and the third voltage dividing module includes at least one third resistor; the first voltage dividing module is connected to any node of the signal transmission main path, and the third voltage dividing module is coupled to the ground; The node between the first voltage divider module and the second voltage divider module serves as the first output end of the coupling branch; the node between the second voltage divider module and the third voltage divider module serves as the second output end of the coupling branch; The coupling branch also includes a multi-way switch, the first output end and the second output end are connected to the input end of the multi-way switch, and the output end of the multi-way switch is connected to the input end of the detection unit; the multi-way switch is used to conduct the connection between the first output end and the input end of the detection unit, or to conduct the connection between the second output end and the input end of the detection unit.

10. The circuit according to claim 1, characterized in that The detection unit comprises a detector and a plurality of comparators, the input end of the detector is connected to the output end of the coupling branch, and the output end of the detector is connected to the input ends of the plurality of comparators; The detector is used to convert the coupled signal into a DC voltage; Each of the comparators is used to compare the DC voltage with a reference voltage and generate a comparison result, wherein the comparison result is used to indicate whether there is an abnormality in the transmission signal, and the reference voltage of each comparator is different.

11. The circuit according to claim 1, characterized in that It also includes a first inductor, which is arranged between the output end of the coupling branch and the input end of the detection unit; The output end of the coupling branch has a second equivalent capacitor, the input end of the detection unit has a third equivalent capacitor, and the first inductor, the second equivalent capacitor and the third equivalent capacitor constitute an input impedance matching network of the detection unit.

12. The circuit according to claim 1, characterized in that The coupling branch further includes a DC blocking capacitor, which is arranged at the input end of the coupling branch.

13. The circuit according to claim 1, characterized in that The input end of the coupling branch has a fourth equivalent capacitor, and the fourth equivalent capacitor serves as a capacitor in the LC unit.

14. A radio frequency link, characterized in that: It comprises a radio frequency front-end chip and a signal link fault self-detection circuit according to any one of claims 1 to 13, wherein the radio frequency front-end chip is connected in series with the signal link fault self-detection circuit; The RF front-end chip is used to output the transmission signal; The signal link fault self-detection circuit is used to determine whether there is an abnormality in the transmission signal.

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