Data transmission system, method, device, medium and product

Abstract

The present invention discloses a data transmission system, method, device, medium and product. The system includes: a clock module, a data processing module, an orchestrator module and a scheduler module; the clock module updates the global clock variable according to the configuration period, generates a scheduling signal and sends it to the scheduler module; the data processing module receives the data packet from the data sending end, divides it into user-plane data packet and control-plane data packet, and sends the user-plane data packet to the orchestrator module, wherein the control-plane data packet includes a preset target delay; the orchestrator module determines the target cache queue according to the preset target delay, the scheduling interval, the total number of preset queues, the timestamp of the user-plane data packet and the global clock variable, and stores it in the target cache queue; the scheduler module responds to receiving the scheduling signal and sends the data packets to be sent in each cache queue in the order in which they are stored. By receiving and retaining the data packets and accurately sending them, the delay shaping of the data packets is achieved.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular to a data transmission system, method, device, medium and product. Background Art

[0002] The integration of 5G and Time-Sensitive Networking (TSN) has become the key to realizing the wireless upgrade and transformation of the Industrial Internet in the future.

[0003] To support the convergence of 5G and TSN, the Third Generation Partnership Project (3GPP) added the Time-Sensitive Communication (TSC) feature to the R16 standard, integrating the 5G system into TSN as a virtual bridge. To achieve interoperability between the 5G system and TSN on the user plane, a device-side TSN translator (DS-TT) was added to the user device side, and a network-side TSN translator (NW-TT) was added to the user plane function side. NW-TT and DS-TT are primarily responsible for data format conversion and communication protocol conversion between the TSN and 5G systems, ensuring smooth communication and data exchange between the two systems. The convergence of 5G and TSN can also be achieved through the TSN translator.

[0004] However, the deep integration of 5G and TSN is still in its infancy. As a key component of the 5G and TSN integration, how to use TSN translators to receive and accurately send data streams remains unclear. Summary of the Invention

[0005] The present invention provides a data transmission system, method, device, medium and product to achieve the reception and accurate transmission of TSN data.

[0006] According to a first aspect of the present invention, there is provided a data transmission system, the system comprising: a clock module, a data processing module, an orchestrator module and a scheduler module;

[0007] The clock module is used to update the global clock variable corresponding to the time according to the configuration period, and generate a scheduling semaphore and send it to the scheduler module, so that other modules can obtain time information by reading the global clock variable;

[0008] The data processing module is configured to receive data packets from a data transmitting end, divide the data packets into user plane data packets and control plane data packets, and send the user plane data packets to the orchestrator module, wherein the control plane data packets include a preset target delay;

[0009] The orchestrator module is configured to determine a target cache queue to which the user plane data packet belongs based on the preset target delay and scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet, and the global clock variable, and store the user plane data packet in the target cache queue;

[0010] The scheduler module is configured to send the to-be-sent data packets in each cache queue in a storage order in response to the received scheduling signal.

[0011] According to a second aspect of the present invention, there is provided a data transmission method, comprising:

[0012] The clock module updates the global clock variable corresponding to the time according to the configuration period, and generates a scheduling semaphore and sends it to the scheduler module, so that other modules can obtain time information by reading the global clock variable;

[0013] receiving data packets from a data transmitter through a data processing module, dividing the data packets into user plane data packets and control plane data packets, and sending the user plane data packets to the orchestrator module, wherein the control plane data packets include a preset target delay;

[0014] Determine, by the orchestrator module, a target cache queue to which the user plane data packet belongs based on a preset target delay and scheduling interval, a preset total number of queues, a data packet timestamp of the user plane data packet, and the global clock variable, and store the user plane data packet in the target cache queue;

[0015] In response to receiving the scheduling signal, the scheduler module sends the data packets to be sent in each buffer queue in the order in which they are stored.

[0016] According to a third aspect of the present invention, there is provided an electronic device, comprising:

[0017] at least one processor; and

[0018] a memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores a computer program that can be executed by the at least one processor. The computer program is executed by the at least one processor to enable the at least one processor to perform the data transmission method according to any embodiment of the present invention.

[0020] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the data transmission method according to any embodiment of the present invention when executed.

[0021] According to another aspect of the present invention, an embodiment of the present invention further provides a computer program product. The computer program product includes a computer program. When the computer program is executed by a processor, it implements the data transmission method of any embodiment of the present invention.

[0022] The technical solution of an embodiment of the present invention comprises a system comprising: a clock module, a data processing module, an orchestrator module, and a scheduler module. The clock module is configured to update a global clock variable corresponding to time according to a configured period, generate a scheduling semaphore, and send it to the scheduler module, so that other modules can obtain time information by reading the global clock variable. The data processing module is configured to receive data packets from a data transmitter, divide the data packets into user-plane data packets and control-plane data packets, and send the user-plane data packets to the orchestrator module, wherein the control-plane data packets include a preset target delay. The orchestrator module is configured to determine the target cache queue to which the user-plane data packet belongs based on the preset target delay and scheduling interval, the total number of preset queues, the packet timestamp of the user-plane data packet, and the global clock variable, and store the user-plane data packet in the target cache queue. The scheduler module is configured to, in response to receiving the scheduling semaphore, send the data packets to be sent in each cache queue in the order in which they are stored. Minimum delay jitter is achieved by using the high-precision clock module. The orchestrator module sorts and stores the user-plane data packets based on the preset target delay to form a target cache queue, which is then sent sequentially by the scheduler module. It realizes the shaping of data packet delay, ensures that the delay of data flow is maintained at the preset target delay, and realizes the reception and accurate sending of data flow.

[0023] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 is a structural block diagram of a data transmission system provided according to a first embodiment of the present invention;

[0026] Figure 2 is another structural block diagram of a data transmission system provided according to the first embodiment of the present invention;

[0027] Figure 3 A schematic diagram of a cache queue in a data transmission system is provided according to a first embodiment of the present invention;

[0028] Figure 4 This is a flowchart of a data transmission method provided according to the first embodiment of the present invention;

[0029] Figure 5 It is a schematic structural diagram of an electronic device implementing an embodiment of the present invention. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0031] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0032] Example 1

[0033] Figure 1 A block diagram of a data transmission system is provided for the first embodiment of the present invention. This embodiment is applicable to the transmission of TSN service data streams. The system can be set up on the device side or on the core network side, for example, in the form of a TSN translator network element.

[0034] like Figure 1 As shown, the system includes: a clock module, a data processing module, an orchestrator module and a scheduler module.

[0035] The clock module is used to update the global clock variable corresponding to the time according to the configured period, so that other modules can obtain time information by reading the global clock variable, generate a scheduling semaphore, and send it to the scheduler module. The data processing module is used to receive data packets from the data sending end, divide the data packets into user-plane data packets and control-plane data packets, and send the user-plane data packets to the orchestrator module. The control-plane data packets include a preset target delay. The orchestrator module is used to determine the target cache queue to which the user-plane data packet belongs based on the preset target delay, the scheduling interval, the preset total number of queues, the data packet timestamp of the user-plane data packet, and the global clock variable, and store the user-plane data packet in the target cache queue. The scheduler module is used to send the data packets to be sent in each cache queue in the order they are stored in response to receiving the scheduling semaphore.

[0036] In this embodiment, the time synchronization process is completed between the electronic device and the server that marks the data packet timestamp using GPS, IEEE1588 or other time synchronization protocols based on IEEE802.11as.

[0037] In this embodiment, the configuration period can be understood as a pre-set period for the operation of other modules, for example, which may include the scheduling interval for the operation of the scheduler module. The scheduling semaphore can be understood as the semaphore used to trigger the scheduler module to perform event processing. The global clock variable can be understood as the clock variable used to synchronize various modules. The data transmitter can be understood as the end that sends data packets in the TSN network. Other modules can be understood as all modules except the clock module. User plane data packets can be understood as data packets processed and routed by the user plane function (UPF) in the 5G core network. Control plane data packets can be understood as data packets that transmit control information to manage network devices and sessions. These data packets may include parameters such as preset target latency, latency jitter, and timeout rate. The timeout rate is the proportion of user plane data packets whose reception latency upon arrival at the system exceeds the target latency to all user plane data packets. The preset target latency can be understood as the expected time for a user plane data packet to elapse from its generation to its departure from the network element of the data transmission system.

[0038] In this embodiment, the target cache queue can be understood as a queue for caching user-plane data packets. The cache queue can be understood as a cache queue for each processing interval of the scheduler module. The number and capacity of the queues are configured based on actual requirements such as traffic volume and / or target latency. For example, a larger target latency requires longer data cache time, and a larger number of queues requires a larger capacity to ensure sufficient storage for user-plane data packets to be shaped. Pending data packets can be understood as user-plane data packets waiting to be sent in the queue. The storage order can be understood as the order in which data packets are arranged in the cache queue.

[0039] Specifically, the clock module can generate equally spaced base clock signals according to configured periods and establish a correspondence between the clock signals and system time. Configuration periods include clock intervals, scheduling periods, statistical periods, and control periods, and are used by different modules. The clock interval is used to generate the base clock signal and is the smallest unit of time in the present invention. Other periods are integer multiples of the clock interval. The scheduling period, also known as the scheduling interval, is used to generate scheduling semaphores. The statistical period is used to generate statistical semaphores. The control period is used to generate control semaphores. The clock module generates semaphores according to different configured periods and sends them to the corresponding modules to trigger event processing in other modules. For example, the clock module can generate scheduling semaphores according to the configured scheduling interval and send them to the scheduler module to drive the scheduler module to send user-plane data packets. The clock module also maintains and updates global clock variables corresponding to time according to clock intervals. For example, this can be done by incrementing the global clock variable at each clock interval. Global time information can be obtained by combining the clock intervals. The data processing module can receive data packets sent by the data transmitter from the TSN network, divide the data packets into user-plane data packets and control-plane data packets based on the packet header field, and send the user-plane data packets to the orchestrator module. The orchestrator module can determine the target cache queue to which the user-plane data packet belongs by presetting the target delay, scheduling interval, the total number of preset queues, the data packet timestamp in the user-plane data packet, and the global clock variable, and store the user-plane data packet in the target cache queue in the order of the timestamp. When the scheduler module receives the scheduling semaphore, it responds to the scheduling semaphore, reads the global clock variable, and uses the modulo method of the queue length combined with the global clock variable to determine the cache queue for this transmission, and sends out all the data packets to be sent in the cache queue in the order of storage.

[0040] The technical solution of an embodiment of the present invention comprises a system comprising: a clock module, a data processing module, an orchestrator module, and a scheduler module. The clock module is configured to update a global clock variable corresponding to time according to a configured period, generate a scheduling semaphore, and send it to the scheduler module, so that other modules can obtain time information by reading the global clock variable. The data processing module is configured to receive data packets from a data transmitter, divide the data packets into user-plane data packets and control-plane data packets, and send the user-plane data packets to the orchestrator module, wherein the control-plane data packets include a preset target delay. The orchestrator module is configured to determine the target cache queue to which the user-plane data packet belongs based on the preset target delay, the scheduling interval, the preset total number of queues, the packet timestamp of the user-plane data packet, and the global clock variable, and store the user-plane data packet in the target cache queue. The scheduler module is configured to, in response to receiving the scheduling semaphore, send the data packets to be sent in each cache queue in the order in which they are stored. Minimum delay jitter is achieved by using the high-precision clock module. The orchestrator module sorts and stores the user-plane data packets based on the preset target delay to form a target cache queue, which is then sent sequentially by the scheduler module. It realizes the shaping of data packet delay, ensures that the delay of data flow is maintained at the preset target delay, and realizes the reception and accurate sending of data flow.

[0041] Furthermore, the orchestrator module includes:

[0042] A data packet decoding unit is used to decode the user-plane data packet to obtain a data packet timestamp; an index determination unit is used to determine the target cache queue to which the user-plane data packet belongs based on the data packet timestamp, the preset target delay, the scheduling interval, the preset total number of queues and the global clock variable; and a data packet storage unit is used to store the user-plane data packet in the target cache queue based on the data packet timestamp.

[0043] In this embodiment, the data packet timestamp can be understood as the timestamp corresponding to the time when the data packet is sent by the data transmitter. The target queue index can be understood as an index used to determine the target cache queue for storing the user plane data packet.

[0044] Specifically, the data packet decoding unit can decode the user-plane data packet to obtain the data packet timestamp carried. The index determination unit can determine the expected sending time of the user-plane data packet by adding the preset target delay to the data packet timestamp, and quantize the time difference between the expected sending time and the current time according to the time interval of the discrete scheduler module, and calculate the target queue index corresponding to the expected sending time based on the quantized value and the global clock variable. The data packet storage unit can store the user-plane data packet in the target cache queue corresponding to the target queue index. The user-plane data packets in the same cache queue are arranged in ascending order according to the timestamp carried by the data packet.

[0045] The index determination unit is specifically configured to:

[0046] Determine the current time based on the global clock variable; determine the length of time the user-side data packet stays in the cache queue based on the current time, data packet timestamp, and preset target delay; and determine the target queue index to which the user-side data packet belongs based on the length of stay, the scheduling interval, and the total number of preset queues.

[0047] In this embodiment, the current time can be understood as the time when the index is determined. The scheduling interval can be understood as the time interval between transmissions by the scheduler module. The residence time can be understood as the length of time that the user plane data packet stays in the cache queue from the current time to the expected transmission time.

[0048] Specifically, the index determination unit can determine the current time through the global clock variable, the data packet timestamp plus the preset target delay, determine the expected sending time of the user-side data packet, and quantize the time difference between the expected sending time and the current time according to the scheduling interval, and calculate the target queue index corresponding to the expected sending time based on the quantized value and the global clock variable.

[0049] For example, the dwell time d can be determined by the following formula: tick :

[0050]

[0051] Among them, the global clock variable is g tick , the length of stay is d tick , the current time is recorded as t0, and the packet timestamp is t s , the target delay is T d , the scheduling interval is T c , the time unit is ns.

[0052] Then, according to the dwell time and the total number of cache queues N, the target queue index w can be determined by the following formula: index :

[0053] w index =(g tick +d tick )%N

[0054] Furthermore, the orchestrator module is also used to:

[0055] When the sum of the data packet timestamp and the preset target delay is less than the current time, the user plane data packet is directly sent out.

[0056] Specifically, when the sum of the data packet timestamp and the preset target delay is less than the current time (i.e., t s +T dWhen t < 0, the data packet has timed out when it reaches the data processing module, and the user plane data packet is directly sent out without participating in the orchestration process.

[0057] Further, the scheduler module is specifically configured to:

[0058] In response to receiving the scheduling semaphore, read the global clock variable; determine the index of the queue to be sent according to the global clock variable and the preset total number of queues; determine the buffer queue to be sent corresponding to the index of the queue to be sent, and send the data packets to be sent in the buffer queue to be sent in the storage order.

[0059] In this embodiment, the index of the queue to be sent can be understood as the index value corresponding to the buffer queue to be sent. The buffer queue to be sent can be understood as the buffer queue that the scheduler module wakes up to send this time.

[0060] Specifically, after receiving the scheduling semaphore from the clock module, the scheduler module wakes up and sends, reads the global clock information, maps the global clock information to the index of the queue to be sent by taking the modulo of the queue length, takes the buffer queue corresponding to the index of the queue to be sent as the buffer queue to be sent, and sends the data packets in the buffer queue to be sent out through the network interface in the order of storage order.

[0061] Exemplarily, the index r of the queue to be sent can be determined by the following formula index :

[0062] r index = g tick % N

[0063] Optionally, the system further includes: a statistics module;

[0064] The statistics module is used to determine the packet reception time information of the data processing module for receiving data packets, and determine the packet transmission time information of the scheduler module for sending user plane data packets; the clock module generates a statistics semaphore for the statistics module according to the configured period, and sends the statistics semaphore to the statistics module; in response to receiving the statistics semaphore, determine the delay statistics information within the statistical period according to the packet transmission time information and the packet reception time information.

[0065] In this embodiment, the packet receiving time information can be understood as the time information when the data processing module receives the data packet, for example, it can include data such as the time when the data packet is received, the timestamp of the data packet, and the packet length. The packet sending time information can be understood as the time information when the scheduler module sends the data packet, for example, it can include data such as the time when the data packet is sent, the timestamp of the corresponding data packet, and the packet length. The receiving delay can be understood as the time it takes for the data packet to enter the data transmission system from the time it is generated. The sending delay can be understood as the time it takes for the data packet to leave the data transmission system from the time it is generated. The statistical period can be understood as the interval between two triggering of the statistical module to perform statistical operations. The delay statistical information can be understood as information used to evaluate the effect of delay adjustment, for example, it can include statistical information such as the maximum value, minimum value, average value, range and variance of the receiving delay and the sending delay.

[0066] Specifically, the clock module can generate a statistical signal according to the configured statistical cycle to drive the statistical module for processing. When the statistical module receives the statistical signal, the statistical module can determine the packet receiving time information of all data packets received by the data processing module between two statistical cycles (when the data processing module receives a data packet, the packet receiving time information of the received data packet can be determined and sent to the statistical module), and determine the packet sending time information of all user-side data packets sent by the scheduler module (when the scheduler module sends a data packet, the packet sending time information of the sent data packet can be determined and sent to the statistical module). Delay statistical information is determined based on the packet sending time information and the packet receiving time information through a corresponding calculation method. For example, the receiving delay can be determined by the current timestamp when the data packet is sent and the timestamp of the corresponding data packet, and the sending delay can be determined by the current timestamp when the data packet is received and the timestamp of the corresponding data packet. The maximum value, minimum value, average difference, range and variance of the sending delay of all the data packets in this statistics are found, and the maximum value, minimum value, average difference, range and variance of the receiving delay are collectively used as the delay statistical information.

[0067] Optionally, the system further includes: a control module, the control module being configured to obtain a control plane data packet from the data processing module, and adjust a preset target delay and delay jitter in the control plane data packet according to delay statistical information.

[0068] In this embodiment, delay jitter can be understood as the fluctuation range of the delay of a data packet when it leaves the data transmission system.

[0069] Specifically, the clock module can also generate a control signal according to the control cycle to drive the control module to process the control plane data packet. In response to the control signal, the control module can obtain the control plane data packet sent by the data processing module, and use the delay statistical information to determine the changing trend of the preset target delay in the current control plane data packet and predict the changing trend of the timeout rate, thereby determining whether the preset target delay and delay jitter are reasonable. For example, a threshold can be set for comparison to determine whether they are reasonable. The larger the preset target delay, the lower the timeout rate; the smaller the preset target delay, the higher the timeout rate. The preset target delay and delay jitter can then be adjusted according to the set adjustment threshold and other methods.

[0070] The technical solution of the embodiment of the present invention determines the length of time a user-side data packet stays in the cache queue based on the data packet timestamp, current time and preset target delay of the user-side data packet through the scheduler module, and determines the target queue index to which the user-side data packet belongs through the residence time, scheduling interval, preset total number of queues and global clock variable, and stores it in the target cache queue corresponding to the target queue index. The scheduler module responds to the scheduling signal and determines the queue index to be sent based on the global clock variable and the preset total number of queues, and sends the data packets to be sent therein in the order of storage, ensuring that the data packets can be sent according to the preset target delay. Data packet delay shaping is achieved, so that the delay of the data stream is maintained at the target delay, and smaller delay jitter is achieved through the high-precision clock module. The statistical module determines the delay statistical information based on the packet sending time information and the packet receiving time information, and uses the delay statistical information as the basis for evaluating the delay adjustment effect, providing a basis for subsequent delay adjustment. The control module adjusts the preset target delay and delay jitter in the control data packet in combination with statistical information, realizing dynamic update of the preset target delay and delay jitter, and providing support for ensuring that the delay of the data stream is maintained at the preset target delay.

[0071] Figure 2 Another structural block diagram of a data transmission system is provided for the first embodiment of the present invention. Figure 2 As shown, the system includes: a clock module 11, a data processing module 12, an orchestrator module 13, a scheduler module 14, a statistics module 15 and a control module 16.

[0072] The clock module generates a control signal according to the control cycle and sends it to the control module 16; generates a statistical signal according to the configured statistical cycle and sends it to the statistics module 15; and generates a scheduling signal according to the configured scheduling cycle and sends it to the scheduler module 14. The data processing module 12 receives data packets from the data transmitter. Upon receiving a data packet, it determines the packet reception time information and sends it to the statistics module 15. It then divides the data packet into user-plane data packets and sends them to the orchestrator module 13, and control-plane data packets and sends them to the control module 16. The orchestrator module 13 determines the target cache queue to which the user-plane data packet belongs based on the preset target latency, the scheduling interval, the preset total number of queues, the user-plane data packet's timestamp, and the global clock variable. It then stores the user-plane data packet in the target cache queue in timestamp order and sends the cache queue to the scheduler module 14. In response to the scheduling signal, the scheduler module 14 determines the to-be-sent queue index based on the global clock variable and the preset total number of queues. It then sends the to-be-sent queues corresponding to the to-be-sent queue index in order. After sending the data packet, it generates the packet sending time information for each data packet and sends it to the statistics module 15. In response to the statistical signal, the statistics module 15 determines statistical time information based on the packet sending and receiving time information, and sends the statistical time information to the control module 16. In response to the control signal, the control module 16 determines whether the target delay and timeout rate are reasonable based on the control plane data packets and the statistical delay information.

[0073] In order to better understand the cache queue in the present invention, a specific example is used for demonstration, and the symbols in the above example are used. Figure 3 A schematic diagram of a cache queue in a data transmission system is provided for the first embodiment of the present invention. Figure 3 As shown, there are N cache queues, the index of the first cache queue is N-1, and its corresponding time range is: t0-T c to t0; the index of the second cache queue is 0, and its corresponding time range is t0 to t0+T c ; The index of the third cache queue is 1, and its corresponding time range is t0+T c to t0+2*T c , the time range of the cache queue is based on the scheduler's scheduling interval T c Superposition, and so on, to get N cache queues. Each square represents a data packet, by s +T d , determine the target queue index to which the data packet belongs, and put it into the target cache queue corresponding to the target queue index in the order of timestamp. The scheduler module then sends the data packets in each cache queue in sequence.

[0074] Example 2

[0075] Figure 4 A flowchart of a data transmission method is provided for the first embodiment of the present invention. This embodiment is applicable to the transmission of TSN service data streams. The method can be executed by a data transmission system. The data transmission system can be implemented in the form of hardware and / or software. The data transmission system can be configured in an electronic device. Figure 4 As shown, the method includes:

[0076] S410 , using the clock module to update a global clock variable corresponding to the time according to a configuration period, so that other modules can obtain time information by reading the global clock variable, generate a scheduling semaphore, and send it to the scheduler module.

[0077] S420: Receive data packets from the data transmitting end through the data processing module, divide the data packets into user plane data packets and control plane data packets, and send the user plane data packets to the orchestrator module.

[0078] S430. Determine the target cache queue to which the user plane data packet belongs based on the preset target delay, the scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet, and the global clock variable through the orchestrator module, and store the user plane data packet in the target cache queue.

[0079] S440 , in response to receiving the scheduling signal, the scheduler module sends the data packets to be sent in each cache queue in the order in which they are stored.

[0080] The technical solution of the embodiments of the present invention uses a clock module to update a global clock variable corresponding to time according to a configured period, generate a scheduling semaphore, and send it to the scheduler module, allowing other modules to obtain time information by reading the global clock variable. A data processing module receives data packets from the data transmitter, divides the data packets into user-plane data packets and control-plane data packets, and sends the user-plane data packets to the orchestrator module. The orchestrator module determines the target cache queue to which the user-plane data packet belongs based on a preset target latency, a scheduling interval, the total number of preset queues, the packet timestamp of the user-plane data packet, and the global clock variable, and stores the user-plane data packet in the target cache queue. In response to receiving the scheduling semaphore, the scheduler module sends the pending data packets in each cache queue in the order in which they were stored. A high-precision clock module is used to achieve minimal delay jitter. The orchestrator module sorts and stores user-plane data packets based on the preset target latency, forming a target cache queue, which is then sent sequentially by the scheduler module. This achieves packet delay shaping, ensuring that the latency of the data stream remains within the preset target latency, and enabling the reception and accurate transmission of the data stream.

[0081] Example 4

[0082] Figure 5 A schematic diagram of the structure of an electronic device 50 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0083] like Figure 5 As shown, the electronic device 50 includes at least one processor 51 and a memory, such as a read-only memory (ROM) 52, a random access memory (RAM) 53, etc., which is communicatively connected to the at least one processor 51. The memory stores a computer program that can be executed by the at least one processor. The processor 51 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 52 or the computer program loaded from the storage unit 58 into the random access memory (RAM) 53. Various programs and data required for the operation of the electronic device 50 can also be stored in the RAM 53. The processor 51, ROM 52, and RAM 53 are connected to each other via a bus 54. An input / output (I / O) interface 55 is also connected to the bus 54.

[0084] Multiple components in the electronic device 50 are connected to the I / O interface 55, including an input unit 56, such as a keyboard, a mouse, etc.; an output unit 57, such as various types of displays, speakers, etc.; a storage unit 58, such as a magnetic disk, an optical disk, etc.; and a communication unit 59, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 59 allows the electronic device 50 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0085] The processor 51 can be various general-purpose and / or specialized processing components with processing and computing capabilities. Some examples of the processor 51 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 51 executes the various methods and processes described above, such as the data transmission method.

[0086] In some embodiments, the data transmission method can be implemented as a computer program that is tangibly contained in a computer-readable storage medium, such as the storage unit 58. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 50 via the ROM 52 and / or the communication unit 59. When the computer program is loaded into the RAM 53 and executed by the processor 51, one or more steps of the data transmission method described above can be performed. Alternatively, in other embodiments, the processor 51 can be configured to perform the data transmission method in any other suitable manner (e.g., by means of firmware).

[0087] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system comprising at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0088] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer program is executed by the processor, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The computer program may be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0089] In the context of the present invention, computer-readable storage media can be tangible media that can contain or store a computer program for use with an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. Computer-readable storage media can include but are not limited to electronic, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, computer-readable storage media can be machine-readable signal media. More specific examples of machine-readable storage media can include electrical connections based on one or more lines, portable computer disks, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0090] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0091] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0092] A computing system may include clients and servers. The clients and servers are typically remote from each other and typically interact via a communication network. This client-server relationship arises through computer programs running on the respective computers, creating a client-server relationship. The server may be a cloud server, also known as a cloud computing server or cloud host. This server is a hosting product within the cloud computing service ecosystem that addresses the management difficulties and limited scalability of traditional physical hosting and VPS services.

[0093] In one embodiment, the present invention further includes a computer program product. The computer program product includes a computer program. When the computer program is executed by a processor, it implements the data transmission method of any embodiment of the present invention.

[0094] The computer program product may be implemented by writing computer program code for performing the operations of the present invention in one or more programming languages, or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0095] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0096] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A data transmission system, characterized in that: Applied to TSN network, the system includes: a clock module, a data processing module, an orchestrator module and a scheduler module; The clock module is used to update the global clock variable corresponding to the time according to the configuration period, so that other modules can obtain time information by reading the global clock variable, generate a scheduling semaphore and send it to the scheduler module; The data processing module is configured to receive data packets from a data transmitting end, divide the data packets into user plane data packets and control plane data packets, and send the user plane data packets to the orchestrator module, wherein the control plane data packets include a preset target delay; the user plane data packets are data packets processed and routed by user plane functions in the 5G core network, and the preset target delay is the time expected for the user plane data packets to pass from generation to leaving the data transmission system network element; The orchestrator module is configured to determine a target cache queue to which the user plane data packet belongs based on the preset target delay and scheduling interval, the preset total number of queues, the data packet timestamp of the user plane data packet, and the global clock variable, and store the user plane data packet in the target cache queue; The scheduler module is configured to send the to-be-sent user plane data packets in each buffer queue in a storage order in response to receiving the scheduling signal.

2. The system according to claim 1, wherein: The orchestrator module includes: A data packet decoding unit, configured to decode the user plane data packet to obtain a data packet timestamp; an index determining unit, configured to determine a target cache queue to which the user plane data packet belongs based on a data packet timestamp, a preset target delay, a scheduling interval, a preset total number of queues, and the global clock variable of the user plane data packet; The data packet storage unit is configured to store the user plane data packet in the target cache queue based on the data packet timestamp.

3. The system according to claim 2, characterized in that The index determination unit includes: Determine the current time according to the global clock variable; Determining a stay time of the user plane data packet in the cache queue according to the current time, the data packet timestamp, and a preset target delay; Determine the target queue index to which the user plane data packet belongs according to the dwell time, the scheduling interval and the total number of preset queues.

4. The system according to claim 2, wherein: The orchestrator module is further configured to: When the sum of the data packet timestamp and the preset target delay is less than the current time, the user plane data packet is directly sent out.

5. The system according to claim 1, wherein: The scheduler module is further configured to: In response to receiving the scheduling semaphore, reading the global clock variable; Determine the queue index to be sent according to the global clock variable and the total number of preset queues; Determine a to-be-sent buffer queue corresponding to the to-be-sent queue index, and send the to-be-sent user plane data packets in the to-be-sent buffer queue in a storage order.

6. The system according to claim 1, wherein: The system further comprises: a statistics module; The statistics module is used to determine the packet receiving time information of the data processing module receiving the data packet, and determine the packet sending time information of the scheduler module sending the user plane data packet; The clock module generates a statistical signal quantity of the statistical module according to the configuration period, and sends the statistical signal quantity to the statistical module; The statistical module, in response to receiving the statistical signal quantity, determines the delay statistical information within a statistical period according to the packet sending time information and the packet receiving time information.

7. The system according to claim 6, characterized in that The system further includes a control module configured to obtain a control plane data packet from the data processing module and adjust the preset target delay in the control plane data packet according to the delay statistical information.

8. A data transmission method, characterized in that: Applied to TSN networks, including: The clock module updates the global clock variable corresponding to the time according to the configuration period, so that other modules can obtain time information by reading the global clock variable, generate a scheduling semaphore and send it to the scheduler module; The data processing module receives data packets from the data transmitting end, divides the data packets into user plane data packets and control plane data packets, and sends the user plane data packets to the orchestrator module, wherein the control plane data packets include a preset target latency. The user plane data packets are data packets processed and routed by user plane functions in the 5G core network, and the preset target latency is the time expected for the user plane data packets to pass from the time they are generated to the time they leave the data transmission system network element. Determine, by the orchestrator module, a target cache queue to which the user plane data packet belongs based on a preset target delay and scheduling interval, a preset total number of queues, a data packet timestamp of the user plane data packet, and the global clock variable, and store the user plane data packet in the target cache queue; In response to receiving the scheduling signal, the scheduler module sends the user plane data packets to be sent in each buffer queue in the order in which they are stored.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to perform the data transmission method according to claim 8 .

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the data transmission method according to claim 8 when executed.

11. A computer program product, characterized in that The computer program product comprises a computer program which, when executed by a processor, implements the data transmission method according to claim 8 .

Images