Flash read latency performance analysis method and apparatus

Abstract

The application provides a flash memory read delay performance analysis method and device, the method comprises the following steps: performing a read operation of a flash memory; obtaining the number of read operations of the flash memory in each preset time interval and the read operation delay time of each read operation; and generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time. The flash memory read delay performance analysis method and device provided by the application realize the statistics and analysis of read operation delay time, and are beneficial to optimizing the performance of the flash memory.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method and apparatus for analyzing flash memory read latency performance. Background Technology

[0002] With the rapid development of information technology, flash memory, as a non-volatile storage device, has been widely used in smartphones, tablets, solid-state drives (SSDs), and other fields. Read operation latency is a key indicator for evaluating flash memory performance, directly affecting the overall response speed of the device and the user experience. Existing flash memory performance testing methods mostly focus on average read / write speeds or performance testing under specific conditions, lacking statistical analysis of read operation latency. Summary of the Invention

[0003] This invention provides a flash memory read latency performance analysis method and apparatus to address the deficiency in the prior art of lacking statistics and analysis of read operation latency time, thereby enabling the statistics and analysis of read operation latency time.

[0004] This invention provides a flash memory read latency performance analysis method, comprising the following steps: performing a flash memory read operation; obtaining the number of flash memory read operations and the read operation latency time of each read operation within each preset time interval; and generating a read operation latency time performance distribution report based on the number of read operations and the read operation latency time.

[0005] According to a flash memory read latency performance analysis method provided by the present invention, before performing a flash memory read operation, the method further includes: setting multiple sets of control parameter combinations for the flash memory controller; performing the flash memory read operation includes: performing flash memory read operations respectively under the control of the multiple sets of control parameter combinations.

[0006] According to a flash memory read latency performance analysis method provided by the present invention, after generating a read operation latency performance distribution report based on the number of read operations and the read operation latency time, the method further includes: responding to the fact that the current preset time interval is not a preset minimum granularity time interval, performing a first adjustment on the control parameters of the flash memory controller, reducing the preset time interval, and proceeding to the processing step of performing a flash memory read operation; wherein, the first adjustment on the control parameters of the flash memory controller includes: filtering the multiple sets of control parameter combinations according to the read operation latency performance distribution report, retaining the control parameter combinations that meet the read latency performance requirements corresponding to the current preset time interval; adjusting the value of at least one control parameter in the control parameter combination; and / or, adding a new control parameter combination.

[0007] According to a flash memory read latency performance analysis method provided by the present invention, after generating a read operation latency performance distribution report based on the number of read operations and the read operation latency time, the method further includes: terminating the execution of the flash memory read latency performance analysis method and recording the at least one set of control parameter combinations that satisfies the read latency performance requirement corresponding to the current preset time interval, in response to the current preset time interval being the preset minimum granularity time interval and the read operation latency performance distribution report indicating that at least one set of control parameter combinations satisfies the read latency performance requirement corresponding to the current preset time interval; and performing a second adjustment on the control parameters of the flash memory controller and proceeding to the processing step of performing a flash memory read operation, in response to the current preset time interval being the preset minimum granularity time interval and the read operation latency performance distribution report indicating that no control parameter combination satisfies the read latency performance requirement corresponding to the current preset time interval, in response to the read operation latency performance distribution report being the preset minimum granularity time interval and the read operation latency performance distribution report indicating that no control parameter combination satisfies the read latency performance requirement corresponding to the current preset time interval, performing a second adjustment on the control parameters of the flash memory controller and proceeding to the processing step of performing a flash memory read operation; wherein, the second adjustment on the control parameters of the flash memory controller includes: adjusting the value of at least one control parameter in the control parameter combination; and / or, adding a new control parameter combination.

[0008] According to a flash memory read latency performance analysis method provided by the present invention, the execution of flash memory read operations includes: performing flash memory read operations according to a first preset number of read operations within the preset time interval; and / or, randomly performing flash memory read operations according to a second preset number of read-write mixed operations within the preset time interval.

[0009] According to a flash memory read latency performance analysis method provided by the present invention, the method further includes: outputting a read operation latency performance distribution report and optimized parameter settings in the form of a visualization chart or data file.

[0010] The present invention also provides a flash memory read latency performance analysis device, comprising the following modules: an execution module, configured to: execute flash memory read operations; an acquisition module, configured to: acquire the number of flash memory read operations and the read operation latency time of each read operation within each preset time interval; and a generation module, configured to: generate a read operation latency time performance distribution report based on the number of read operations and the read operation latency time.

[0011] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor executes the computer program to implement the flash memory read latency performance analysis method as described above.

[0012] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the flash memory read latency performance analysis method as described above.

[0013] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the flash memory read latency performance analysis method as described above.

[0014] The flash memory read latency performance analysis method and apparatus provided by the present invention obtains the number of read operations and the read operation latency time of each preset time interval by performing read operations on the flash memory, and generates a read operation latency performance distribution report based on the number of read operations and the read operation latency time, thereby realizing the statistics and analysis of read operation latency time, which is beneficial to optimizing flash memory performance. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0016] Figure 1 This is one of the flowcharts illustrating the flash memory read latency performance analysis method provided by this invention.

[0017] Figure 2 This is the second flowchart of the flash memory read latency performance analysis method provided by the present invention.

[0018] Figure 3 This is a schematic diagram of the flash memory read latency performance analysis device provided by the present invention.

[0019] Figure 4 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0021] Figure 1 This is one of the flowcharts illustrating the flash memory read latency performance analysis method provided by this invention, such as... Figure 1As shown, the method includes the following:

[0022] Step S1: Perform a read operation on the flash memory.

[0023] Flash memory read operations can be performed according to the configured read operation execution mode, and the read operations can be monitored in real time through a monitoring program. Monitoring logic can be integrated into the flash memory controller to achieve real-time monitoring and recording of read operations.

[0024] Step S2: Obtain the number of read operations of the flash memory within each preset time interval and the read operation delay time of each read operation.

[0025] The read operation monitoring mechanism can capture the start and end times of each read operation in real time, thereby obtaining the read operation latency and providing a reliable basis for accurate latency calculation and performance analysis. A timestamp array can be set to capture and record the start and end times of each read operation with high precision, providing detailed time data support for performance analysis.

[0026] By setting a counter that matches the preset time interval, you can ensure that the number of read operations within each preset time interval is recorded accurately.

[0027] Step S3: Generate a read operation latency performance distribution report based on the number of read operations and the read operation latency.

[0028] The calculated read operation latency times are meticulously categorized and statistically analyzed according to preset time intervals, generating a read operation latency performance distribution report. The frequency and latency distribution characteristics of read operations within each preset time interval are analyzed to reveal system performance bottlenecks and areas for improvement.

[0029] The flash memory read latency performance analysis method provided by this invention obtains the number of read operations and the read operation latency time of each read operation within each preset time interval by performing read operations on the flash memory. Based on the number of read operations and the read operation latency time, a read operation latency time performance distribution report is generated, which realizes the statistics and analysis of read operation latency time and is beneficial to optimizing flash memory performance.

[0030] According to a flash memory read latency performance analysis method provided by the present invention, before performing a flash memory read operation, the method further includes: setting multiple sets of control parameter combinations for the flash memory controller; performing the flash memory read operation includes: performing flash memory read operations respectively under the control of the multiple sets of control parameter combinations.

[0031] A flash memory controller manages the data stored in flash memory and communicates with computers or electronic devices. When a system or device needs to read data or write data to flash memory, it interacts with the flash memory controller. By setting the control parameters of the flash memory controller, read operations on the flash memory can be controlled.

[0032] In this embodiment of the invention, multiple sets of control parameter combinations are set for the flash memory controller, each set of control parameter combinations being used to control the read operation of the flash memory. When performing a read operation on the flash memory, the read operation is executed under the control of the multiple sets of control parameter combinations, thereby obtaining the number of read operations and the read operation delay time for each read operation within each preset time interval under the control of each set of control parameter combinations. Furthermore, a read operation delay time performance distribution report is generated based on the number of read operations and the read operation delay time, including a read operation delay time performance distribution report generated under the control of each set of control parameter combinations.

[0033] The flash memory read latency performance analysis method provided by this invention sets multiple sets of control parameters for the flash memory controller, and executes flash memory read operations under the control of these multiple sets of control parameters. This realizes read operations under the control of multiple sets of control parameters, thereby obtaining a read operation latency performance distribution report under the control of multiple sets of control parameters, providing a basis for optimizing the control parameters.

[0034] According to a flash memory read latency performance analysis method provided by the present invention, after generating a read operation latency performance distribution report based on the number of read operations and the read operation latency time, the method further includes: responding to the fact that the current preset time interval is not a preset minimum granularity time interval, performing a first adjustment on the control parameters of the flash memory controller, reducing the preset time interval, and proceeding to the processing step of performing a flash memory read operation; wherein, the first adjustment on the control parameters of the flash memory controller includes: filtering the multiple sets of control parameter combinations according to the read operation latency performance distribution report, retaining the control parameter combinations that meet the read latency performance requirements corresponding to the current preset time interval; adjusting the value of at least one control parameter in the control parameter combination; and / or, adding a new control parameter combination.

[0035] When counting the number of flash memory read operations and the latency of each read operation, the statistics are performed within a time range corresponding to a preset time interval. If the granularity of the preset time interval is small, such as 10µs, the amount of data acquired is large, resulting in high computational resource consumption. Therefore, in order to balance the optimization of flash memory controller parameters and the consumption of computational resources, this embodiment of the invention sets preset time intervals with different granularities, such as 10µs, 100µs, and 1ms.

[0036] Different preset time intervals correspond to different read latency performance requirements, which include read operation latency. If the control parameter combination cannot meet the corresponding read latency performance requirements under large-granularity preset time interval settings, it will also fail to meet the corresponding read latency performance requirements under small-granularity preset time interval settings. Conversely, if the control parameter combination can meet the corresponding read latency performance requirements under large-granularity preset time interval settings, it may or may not meet the corresponding read latency performance requirements under small-granularity preset time interval settings.

[0037] Therefore, the preset time interval is varied from large to small. This allows for initial optimization of control parameters with a large-granularity preset time interval. Then, the preset time interval is gradually decreased to progressively optimize the flash memory controller's control parameters.

[0038] After generating a read operation latency performance distribution report based on the number of read operations and the read operation latency, if the current preset time interval is not the preset minimum granularity time interval, the control parameters of the flash memory controller are adjusted first, and the preset time interval is reduced to the next level according to the preset time interval setting. Then, the process of executing the read operation of the flash memory is transferred. Then, the number of read operations of the flash memory and the read operation latency of each read operation are re-acquired within each preset time interval, and a read operation latency performance distribution report is generated based on the number of read operations and the read operation latency.

[0039] The first adjustment of the control parameters of the flash memory controller includes at least one of the following operations:

[0040] Based on the read operation delay time performance distribution report, multiple sets of control parameter combinations are screened, retaining the control parameter combinations that meet the read delay performance requirements corresponding to the current preset time interval, and discarding the control parameter combinations that do not meet the read delay performance requirements corresponding to the current preset time interval;

[0041] Adjust the value of at least one control parameter in one or more combinations of control parameters;

[0042] Add new combinations of control parameters.

[0043] The control parameters may include the maximum waiting time during a write operation pause, the maximum number of read operations that can be executed during a single write command pause, the maximum ratio of read to write commands, and the maximum duration of continuous read execution. Multiple sets of control parameters can be combined, with different compositions or different values. The order in which the preset time interval is adjusted and the first adjustment of the flash memory controller's control parameters is performed can be sequential or simultaneous, depending on the settings.

[0044] The flash memory read latency performance analysis method provided by the present invention adjusts the control parameters of the flash memory controller in response to the current preset time interval not being the preset minimum granularity time interval, and reduces the preset time interval before proceeding to the processing step of executing the flash memory read operation, thereby realizing the optimization of flash memory controller parameters and the adjustment of preset time interval.

[0045] According to a flash memory read latency performance analysis method provided by the present invention, after generating a read operation latency performance distribution report based on the number of read operations and the read operation latency time, the method further includes: terminating the execution of the flash memory read latency performance analysis method and recording the at least one set of control parameter combinations that satisfies the read latency performance requirement corresponding to the current preset time interval, in response to the current preset time interval being the preset minimum granularity time interval and the read operation latency performance distribution report indicating that at least one set of control parameter combinations satisfies the read latency performance requirement corresponding to the current preset time interval; and performing a second adjustment on the control parameters of the flash memory controller and proceeding to the processing step of performing a flash memory read operation, in response to the current preset time interval being the preset minimum granularity time interval and the read operation latency performance distribution report indicating that no control parameter combination satisfies the read latency performance requirement corresponding to the current preset time interval, in response to the read operation latency performance distribution report being the preset minimum granularity time interval and the read operation latency performance distribution report indicating that no control parameter combination satisfies the read latency performance requirement corresponding to the current preset time interval, performing a second adjustment on the control parameters of the flash memory controller and proceeding to the processing step of performing a flash memory read operation; wherein, the second adjustment on the control parameters of the flash memory controller includes: adjusting the value of at least one control parameter in the control parameter combination; and / or, adding a new control parameter combination.

[0046] After generating a read operation latency performance distribution report based on the number of read operations and the read operation latency, if the current preset time interval is the preset minimum granularity time interval, it means that there is no need to further reduce the preset time interval. If the read operation latency performance distribution report shows that at least one set of control parameter combinations meets the read latency performance requirements corresponding to the current preset time interval, it means that an optimized control parameter that can meet the final read latency performance requirements has been found. In this case, the execution of the flash memory read latency performance analysis method is terminated, and the control parameter combination that meets the read latency performance requirements corresponding to the current preset time interval is recorded.

[0047] After generating a read operation latency performance distribution report based on the number of read operations and the read operation latency, if the current preset time interval is the preset minimum granularity time interval, it means that there is no need to further reduce the preset time interval. If the read operation latency performance distribution report shows that there is no control parameter combination among multiple control parameter combinations that meets the read latency performance requirements corresponding to the current preset time interval, it means that no optimized control parameter has been found that can meet the final read latency performance requirements (read latency performance requirements corresponding to the smallest granularity preset time interval). In this case, the control parameters of the flash memory controller are adjusted a second time, and the process steps of executing flash memory read operations are performed to re-acquire the number of flash memory read operations and the read operation latency of each read operation within each preset time interval, and generate a read operation latency performance distribution report based on the number of read operations and the read operation latency.

[0048] The second adjustment to the control parameters of the flash memory controller includes: adjusting the value of at least one control parameter in one or more combinations of control parameters; and / or adding a new combination of control parameters.

[0049] The flash memory read latency performance analysis method provided by this invention terminates the execution of the flash memory read latency performance analysis method when the current preset time interval is a preset minimum granularity time interval and the read operation latency performance distribution report indicates that at least one set of control parameter combinations among multiple sets of control parameter combinations meets the read latency performance requirements corresponding to the current preset time interval, and records at least one set of control parameter combinations that meets the read latency performance requirements corresponding to the current preset time interval. When the current preset time interval is a preset minimum granularity time interval and the read operation latency performance distribution report indicates that no control parameter combination among multiple sets of control parameter combinations meets the read latency performance requirements corresponding to the current preset time interval, the control parameters of the flash memory controller are adjusted a second time, and the process proceeds to the step of executing the flash memory read operation. This achieves program termination after successful control parameter optimization and further optimization and testing of control parameters when no optimized control parameters that meet the final read latency performance requirements have been found.

[0050] According to a flash memory read latency performance analysis method provided by the present invention, the method further includes: outputting a read operation latency performance distribution report and optimized parameter settings in the form of a visualization chart or data file.

[0051] The read operation latency performance distribution report, optimized parameter settings (a combination of control parameters that meet the final flash memory latency performance requirements), and performance improvement details are output to the display module or storage module in the form of visual charts or data files for easy user viewing and subsequent application. The visual charts include histograms and line graphs, used to intuitively display latency performance.

[0052] The flash memory read latency performance analysis method provided by this invention outputs a read operation latency performance distribution report and optimized parameter settings in the form of visual charts or data files, thereby realizing the information transmission of the operation latency performance distribution report and optimized parameter settings.

[0053] According to a flash memory read latency performance analysis method provided by the present invention, the execution of flash memory read operations includes: performing flash memory read operations according to a first preset number of read operations within the preset time interval; and / or, randomly performing flash memory read operations according to a second preset number of read-write mixed operations within the preset time interval.

[0054] When performing read operations on flash memory, the number of read operations and the read operation latency for each preset time interval are obtained. Read operations can be controlled by setting a read operation mode for the preset time interval. For example, in a scenario involving only read operations, a first preset number of read operations can be set within the preset time interval, and read operations on flash memory are performed based on this first preset number. In a scenario involving mixed read and write operations, a second preset number of read and write operations can be set within the preset time interval; that is, the sum of the number of read and write operations within the preset time interval is the second preset number. Read operations on flash memory are then performed randomly based on this second preset number of mixed read and write operations within the preset time interval.

[0055] The flash memory read latency performance analysis method provided by the present invention performs flash memory read operations according to a first preset number of read operations within a preset time interval, and / or performs flash memory read operations randomly according to a second preset number of read-write mixed operations within a preset time interval. This achieves control over flash memory read operations, which is beneficial for obtaining read latency performance of various different read operation modes and optimizing the parameters of the flash memory controller based on various different read operation modes.

[0056] Figure 2 This is the second flowchart illustrating the flash memory read latency performance analysis method provided by this invention. The following is in conjunction with... Figure 2 The present invention uses NAND flash memory as an example to introduce the flash memory read latency performance analysis method provided by the present invention.

[0057] Glossary:

[0058] NFC: NAND flash controller;

[0059] NAND: Nand Flash, a common non-volatile storage medium;

[0060] Read latency: The time delay between when a system or device issues a read operation request and when the data is actually available (i.e., read to a specified location).

[0061] Write suspend: In mixed read and write scenarios, the write operation can be paused during the write operation to perform the read operation, and the write operation will be completed after the read operation is finished.

[0062] like Figure 2 As shown, the flash memory read latency performance analysis method provided by the present invention includes the following steps:

[0063] (1) Flexible setting of time interval reference

[0064] This invention first dynamically constructs a finely divided time interval benchmark system based on the specific needs and accuracy requirements of the test. This system includes, but is not limited to, key time nodes from 10 microseconds (10us), 100 microseconds (100us) to 1 millisecond (1ms), aiming to ensure the high accuracy of the analysis process and provide a solid foundation for in-depth insight and evaluation of system performance or device response speed.

[0065] (2) Initialize the statistical framework

[0066] To efficiently and accurately collect read operation data, this invention constructs a comprehensive statistical data structure framework. This framework incorporates counters matched to the baseline of each time interval, ensuring accurate recording of the read operation frequency within each specific time interval. Simultaneously, the framework initializes a timestamp array to capture and record the start and end times of each read operation with high precision, providing detailed time data support for performance analysis.

[0067] (3) NFC parameter optimization configuration

[0068] To address diverse testing scenarios and performance optimization goals, this invention implements a flexible NFC parameter configuration strategy. This strategy encompasses fine-tuning of the maximum waiting time during write operation suspend, setting the maximum number of read operations that can be executed during a single write command suspend, and optimizing key parameters such as the maximum ratio of read to write commands and the reasonable maximum time value (the maximum time for continuous read execution). This series of parameter configurations aims to balance system response speed and resource utilization efficiency, improve the smoothness of read-write interactions, and lay a solid foundation for subsequent performance testing.

[0069] (4) Real-time monitoring of read operations

[0070] By integrating monitoring logic into the NFC system, real-time monitoring and recording of read operations can be achieved. This monitoring mechanism can capture the start and end times of each read operation in real time, providing a reliable basis for accurate calculation of latency and performance analysis.

[0071] (5) Perform read operations and delay calculations

[0072] Design and execute sequences of mixed read / write or pure read operations with a fixed number of reads (e.g., 10,000) to comprehensively evaluate the read latency performance of NAND flash memory under different workloads. For each read operation, accurately calculate its latency based on the start and end times recorded by monitoring.

[0073] (6) Statistical classification and performance analysis

[0074] Based on a preset time interval benchmark, the calculated read latency times are meticulously categorized and statistically analyzed. The frequency and latency distribution characteristics of read operations within each time interval are analyzed to reveal system performance bottlenecks and areas for improvement.

[0075] (7) Performance distribution report generation and parameter tuning

[0076] Based on the statistical results, a performance distribution report on NAND read latency is generated, including histograms, line graphs, and other visual charts to intuitively display latency performance. Based on the report analysis, a rigorous evaluation process is implemented to determine whether further optimization of NFC parameters is needed. If optimization is required, key parameters are adjusted accordingly, and the performance testing process is restarted. Through iterative testing and continuous tuning, the optimal state of NAND flash memory read performance is continuously approached.

[0077] (8) Output of results

[0078] The final analysis results, optimized parameter settings, and performance improvements are output to the display module or storage module in the form of a graphical interface or data file, making it convenient for users to view and use in subsequent applications.

[0079] The flash memory read latency performance analysis method provided by this invention statistically analyzes NAND read latency time at fixed time intervals and obtains a performance distribution map of read latency time by accurately counting the number of read operations within each time interval. This comprehensively evaluates the performance of NAND devices, provides a scientific basis for NFC parameter optimization, and effectively improves the read efficiency and stability of NAND flash memory. This is of great significance for optimizing system performance, predicting potential problems, and adjusting storage strategies.

[0080] The flash memory read latency performance analysis method provided by this invention can achieve:

[0081] (1) Comprehensive performance evaluation: By statistically analyzing read latency at fixed time intervals, a detailed performance distribution map is obtained, which comprehensively reflects the performance of NAND devices.

[0082] (2) Optimize parameter settings: Provide strong support for adjusting NFC parameters and help find the best parameter combination to optimize reading performance.

[0083] (3) Improve user experience: Improve the overall response speed and user experience of the device by optimizing the read operation performance of the NAND device.

[0084] The flash memory read latency performance analysis device provided by the present invention is described below. The flash memory read latency performance analysis device described below can be referred to in correspondence with the flash memory read latency performance analysis method described above.

[0085] Figure 3 This is a schematic diagram of the flash memory read latency performance analysis device provided by the present invention. Figure 3 As shown, the device includes an execution module 10, an acquisition module 20, and a generation module 30, wherein: the execution module 10 is used to: perform read operations on the flash memory; the acquisition module 20 is used to: acquire the number of read operations on the flash memory within each preset time interval and the read operation delay time of each read operation; the generation module 30 is used to: generate a read operation delay time performance distribution report based on the number of read operations and the read operation delay time.

[0086] The flash memory read latency performance analysis device provided by the present invention performs read operations on the flash memory, obtains the number of read operations and the read operation latency time of each read operation within each preset time interval, and generates a read operation latency performance distribution report based on the number of read operations and the read operation latency time, thereby realizing the statistics and analysis of read operation latency time, which is beneficial to optimizing flash memory performance.

[0087] Figure 4 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 4 As shown, the electronic device may include a processor 410, a communications interface 420, a memory 430, and a communication bus 440, wherein the processor 410, communications interface 420, and memory 430 communicate with each other via the communication bus 440. The processor 410 can invoke logical instructions in the memory 430 to execute a flash memory read latency performance analysis method. This method includes: performing flash memory read operations; obtaining the number of flash memory read operations and the read operation latency time for each read operation within a preset time interval; and generating a read operation latency time performance distribution report based on the number of read operations and the read operation latency time.

[0088] Furthermore, the logical instructions in the aforementioned memory 430 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0089] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the flash memory read latency performance analysis method provided by the above methods. The method includes: performing a flash memory read operation; obtaining the number of flash memory read operations and the read operation latency time of each read operation within each preset time interval; and generating a read operation latency time performance distribution report based on the number of read operations and the read operation latency time.

[0090] In another aspect, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When executed by a processor, the computer program implements the flash memory read latency performance analysis method provided by the above methods. The method includes: performing a read operation on the flash memory; obtaining the number of read operations on the flash memory within each preset time interval and the read operation latency time of each read operation; and generating a read operation latency time performance distribution report based on the number of read operations and the read operation latency time.

[0091] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0092] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0093] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for analyzing flash memory read latency performance, characterized in that, include: Perform a read operation on the flash memory; Obtain the number of read operations on the flash memory within each preset time interval and the read operation latency for each read operation; A read operation latency performance distribution report is generated based on the number of read operations and the read operation latency. In response to the fact that the current preset time interval is the preset minimum granularity time interval, and that at least one set of control parameter combinations satisfies the read latency performance requirement corresponding to the current preset time interval, the execution of the flash memory read latency performance analysis method is terminated, and the at least one set of control parameter combinations that satisfies the read latency performance requirement corresponding to the current preset time interval is recorded. In response to the fact that the current preset time interval is the preset minimum granularity time interval, and that it is known from the read operation latency performance distribution report that there is no control parameter combination among the multiple control parameter combinations that meets the read latency performance requirement corresponding to the current preset time interval, the control parameters of the flash memory controller are adjusted for the second time, and the process proceeds to the step of performing a read operation on the flash memory. The second adjustment of the control parameters of the flash memory controller includes: Adjust the value of at least one control parameter in the control parameter combination; and / or add a new control parameter combination; After generating a read operation latency performance distribution report based on the number of read operations and the read operation latency, the method further includes: In response to the fact that the current preset time interval is not the preset minimum granularity time interval, the control parameters of the flash memory controller are adjusted for the first time, and the preset time interval is reduced, and the process proceeds to the step of performing a flash memory read operation; The first adjustment of the control parameters of the flash memory controller includes: Based on the read operation latency performance distribution report, the multiple sets of control parameter combinations are filtered, and the control parameter combinations that meet the read latency performance requirements corresponding to the current preset time interval are retained; the value of at least one control parameter in the control parameter combination is adjusted; and / or, a new control parameter combination is added; The control parameters include the maximum waiting time during a write operation pause, the maximum number of read operations that can be executed during a single write command pause, the maximum ratio of read to write commands, and the maximum time for continuous read execution. Multiple sets of control parameters can be combined with different compositions or different values ​​of the control parameters.

2. The flash memory read latency performance analysis method according to claim 1, characterized in that, Before performing the read operation on the flash memory, the method further includes: setting multiple sets of control parameter combinations for the flash memory controller; The execution of flash memory read operations includes: executing flash memory read operations under the control of the multiple sets of control parameter combinations.

3. The flash memory read latency performance analysis method according to claim 1, characterized in that, The method further includes: The report on the performance distribution of read operation latency and the optimized parameter settings are output in the form of visual charts or data files.

4. The flash memory read latency performance analysis method according to claim 1, characterized in that, The execution of the flash memory read operation includes: A flash memory read operation is performed based on a first preset number of read operations within the preset time interval. And / or, based on a second preset number of read / write mixed operations within the preset time interval, a read operation of the flash memory is performed randomly.

5. A flash memory read latency performance analysis device, characterized in that, include: The execution module is used to perform read operations on the flash memory. The acquisition module is used to: acquire the number of read operations of the flash memory within each preset time interval and the read operation delay time of each read operation; The generation module is configured to: generate a read operation latency performance distribution report based on the number of read operations and the read operation latency time; in response to the current preset time interval being the preset minimum granularity time interval, and knowing from the read operation latency performance distribution report that at least one set of control parameter combinations satisfies the read latency performance requirement corresponding to the current preset time interval, terminate the execution of the flash memory read latency performance analysis method, and record the at least one set of control parameter combinations that satisfies the read latency performance requirement corresponding to the current preset time interval; In response to the fact that the current preset time interval is the preset minimum granularity time interval, and that it is known from the read operation latency performance distribution report that there is no control parameter combination among the multiple control parameter combinations that meets the read latency performance requirement corresponding to the current preset time interval, the control parameters of the flash memory controller are adjusted for the second time, and the process proceeds to the step of performing a read operation on the flash memory. The second adjustment of the control parameters of the flash memory controller includes: Adjust the value of at least one control parameter in the control parameter combination; and / or add a new control parameter combination; After generating a read operation latency performance distribution report based on the number of read operations and the read operation latency, the method further includes: In response to the fact that the current preset time interval is not the preset minimum granularity time interval, the control parameters of the flash memory controller are adjusted for the first time, and the preset time interval is reduced, and the process proceeds to the step of performing a flash memory read operation; The first adjustment of the control parameters of the flash memory controller includes: Based on the read operation latency performance distribution report, the multiple sets of control parameter combinations are filtered, and the control parameter combinations that meet the read latency performance requirements corresponding to the current preset time interval are retained; the value of at least one control parameter in the control parameter combination is adjusted; and / or, a new control parameter combination is added; The control parameters include the maximum waiting time during a write operation pause, the maximum number of read operations that can be executed during a single write command pause, the maximum ratio of read to write commands, and the maximum time for continuous read execution. Multiple sets of control parameters can be combined with different compositions or different values ​​of the control parameters.

6. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the flash memory read latency performance analysis method as described in any one of claims 1 to 4.

7. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the flash memory read latency performance analysis method as described in any one of claims 1 to 4.

8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the flash memory read latency performance analysis method as described in any one of claims 1 to 4.

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