A logic control circuit and control method thereof

Abstract

The present invention belongs to the technical field of dial logic circuits, and specifically relates to a logic control circuit and a control method thereof, comprising a dial switch module, an IC control chip and a logic control module, wherein the dial switch module is connected to the logic control module, and the logic control module is connected to the IC control chip. The dial switch module is a two-position single-pole single-throw independent switch. The first position of the dial switch module is connected in parallel to the two ends of the third resistor and the fourth resistor in series, and the second position of the dial switch module is connected in parallel to the two ends of the second resistor and the third resistor in series; one end of the fifth resistor is connected to the GND port of the IC control chip and is grounded, and the other end is connected to the detection port (DIM) of the IC control chip. Compared with the existing logic control circuit, the above circuit expands the voltage variation range of the detection port (DIM), thereby meeting the application of a wider output gear.

Description

Technical Field

[0001] The invention belongs to the technical field of dial logic circuits, and in particular relates to a logic control circuit and a control method thereof. Background Art

[0002] A dip switch is a circuit that realizes logic control through a dip switch. A dip switch, also known as a DIP switch, is a multi-bit switch. Each bit of the switch has two states: on and off. The state of each bit of the dip switch can be realized by a mechanical contact point or a transistor switch, usually encoded in binary form. For example, a 4-bit dip switch can be encoded as any binary number between 0000 (all four bits are in the off state) and 1111 (all four bits are in the on state).

[0003] Conventional DIP switches control voltage by connecting the DIP switch to the base resistor, thereby changing the voltage of the detection port DIM of the IC control chip to achieve the purpose of controlling the output. In the existing circuits that control voltage by DIP switches, the voltage at the detection port rises less than the sum of the rises when the two DIP switches are turned on separately, and the voltage range of the detection port is relatively narrow. This characteristic cannot meet the application of constant current drive DIP switches plus fixed current, as well as the application of wider output gears.

[0004] Therefore, how to improve the existing circuit for controlling the voltage of the dial code and expand the voltage variation range of the detection port DIM so as to meet the application of a wider output gear while meeting the application of the constant current drive dial code plus the fixed value current is a technical problem that needs to be solved urgently. Summary of the invention

[0005] The purpose of the present invention is to provide a logic control circuit to improve the existing circuit for realizing voltage control by using a dial switch, expand the voltage variation range of the detection port DIM, and thus meet the application of a wider output gear. The application of a constant current driving dial switch plus a fixed value current is one of the application scenarios of the logic control circuit.

[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is as follows:

[0007] In a first aspect, a logic control circuit and a control method thereof are provided, comprising a dip switch module, an IC control chip and a logic control module, wherein the dip switch module is connected to the logic control module, and the logic control module is connected to the IC control chip.

[0008] Preferably, the DIP switch module is a two-position single-pole single-throw independent switch.

[0009] Preferably, the IC control chip includes a detection port DIM and a GND port.

[0010] Preferably, the logic control module comprises a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor, the first resistor, the second resistor, the third resistor, the fourth resistor and the fifth resistor are connected in series in sequence, and the other end of the first resistor is connected to the reference voltage input end;

[0011] The first position of the DIP switch module is connected in parallel to the two ends of the third resistor and the fourth resistor in series, and the second position of the DIP switch module is connected in parallel to the two ends of the second resistor and the third resistor in series;

[0012] One end of the fifth resistor is connected to the GND port of the IC control chip and shares a common ground, and the other end is connected to the detection port DIM of the IC control chip.

[0013] In a second aspect, a control method for a logic control circuit is provided, which is implemented based on any one of the logic control circuits described above, and comprises the following steps:

[0014] S1: Turn off both the two bits of the DIP switch module of the two-bit single-pole single-throw independent switch, and obtain the voltage obtained at the detection port DIM of the IC control chip through the first resistor, the second resistor, the third resistor, the fourth resistor and the fifth resistor. V0 ;

[0015] S2: Turn on the first bit of the DIP switch module of the two-bit single-pole single-throw independent switch, turn off the second bit, divide the voltage through the first resistor, the second resistor and the fifth resistor, and obtain the voltage obtained at the detection port DIM of the IC control chip V1 ;

[0016] S3: Turn on the second bit of the DIP switch module of the two-bit single-pole single-throw independent switch, turn off the first bit, divide the voltage through the first resistor, the fourth resistor and the fifth resistor, and obtain the voltage obtained at the detection port DIM of the IC control chip V2 ;

[0017] S4: Turn on the first bit of the DIP switch module of the two-bit single-pole single-throw independent switch, turn on the second bit, divide the voltage by the first resistor, the second resistor, the third resistor, the fourth resistor and the fifth resistor to obtain the voltage obtained at the detection port DIM of the IC control chip V3 ;

[0018] S5: The voltage value or current value of the output controlled by the IC control chip U is set to four gears for the constant voltage control chip, and the current value for the constant current control chip, including the first gear out0, the second gear out1, the third gear out2, and the fourth gear out3, and the voltages of the detection port DIM of the control chip U corresponding to the output gears out0, out1, out2, and out3 are defined as V0, V1, V2, V3 ;

[0019] S6: The requirements of the use scenarios of the logic control circuit are divided into three types, the first type is that the maximum gear output increase amplitude is less than the sum of the output increase amplitudes of the two switches being turned on respectively, the second type is that the maximum gear output increase amplitude is equal to the sum of the output increase amplitudes of the two switches being turned on respectively, and the third type is that the maximum gear output increase amplitude is greater than the sum of the output increase amplitudes of the two switches being turned on respectively;

[0020] S7: Identify the requirements of the current use scenario of the logic control circuit. If it is the first scenario, adjust the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 so that ;

[0021] If it is the second type, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are adjusted so that ;

[0022] If it is the third type, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are adjusted so that .

[0023] Preferably, in step S1, both the two bits of the DIP switch module of the two-bit single-pole single-throw independent switch are turned off, and the voltage obtained at the detection port DIM of the IC control chip is calculated by dividing the voltage through the first resistor, the second resistor, the third resistor, the fourth resistor and the fifth resistor. V0 The formula is as follows:

[0024] ;

[0025] in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

[0026] Preferably, the first bit of the DIP switch module of the two-bit single-pole single-throw independent switch is turned on, and the second bit is turned off, and the voltage is divided by the first resistor, the second resistor and the fifth resistor to calculate the voltage obtained at the detection port DIM of the IC control chip V1 The formula is as follows:

[0027] ;

[0028] in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance of the second resistor, R5 is the resistance value of the fifth resistor.

[0029] Preferably, the second bit of the DIP switch module of the two-bit single-pole single-throw independent switch is turned on, and the first bit is turned off, and the voltage is divided by the first resistor, the fourth resistor and the fifth resistor to calculate the voltage obtained at the detection port DIM of the IC control chip V2 The formula is as follows:

[0030] ;

[0031] in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

[0032] Preferably, the first bit of the DIP switch module of the two-bit single-pole single-throw independent switch is turned on, and the second bit is turned on, and the voltage obtained at the detection port DIM of the IC control chip is calculated by dividing the voltage through the first resistor, the second resistor, the third resistor, the fourth resistor and the fifth resistor. V3 The formula is as follows:

[0033] ;

[0034] in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

[0035] Preferably, the execution order of step S1 to step S4 is adjustable.

[0036] The beneficial effects of the present invention include:

[0037] By setting a dip switch module, an IC control chip and a logic control module, the dip switch module is connected to the logic control module, and the logic control module is connected to the IC control chip. The dip switch module is a two-position single-pole single-throw independent switch. The first position of the dip switch module is connected in parallel to the two ends of the third resistor and the fourth resistor in series, and the second position of the dip switch module is connected in parallel to the two ends of the second resistor and the third resistor in series; one end of the fifth resistor is connected to the GND port of the IC control chip and is grounded, and the other end is connected to the detection port DIM of the IC control chip, which expands the voltage variation range of the detection port DIM, thereby meeting the application of a wider output gear. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 It is a structural schematic diagram of the logic control circuit of the present invention.

[0039] Figure symbols: R1 is the first resistor, R2 is the second resistor, R3 is the third resistor, R4 is the fourth resistor, R5 is the fifth resistor, K1 is the DIP switch module, U is the IC control chip, and DIM is the detection port. DETAILED DESCRIPTION

[0040] The following is combined with Figure 1 The present invention is further described in detail:

[0041] Example 1

[0042] A logic control circuit and a control method thereof, comprising a dip switch module K1, an IC control chip U and a logic control module, wherein the dip switch module K1 is connected to the logic control module, and the logic control module is connected to the IC control chip U. The dip switch module K1 is a two-position single-pole single-throw independent switch. The IC control chip U comprises a detection port DIM and a GND port.

[0043] Example 2

[0044] Based on Example 1, see the attached Figure 1 As shown, the logic control module includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5. The first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are connected in series in sequence, and the other end of the first resistor R1 is connected to the reference voltage input end. The first position of the dip switch module K1 is connected in parallel to the two ends of the third resistor R3 and the fourth resistor R4 in series, and the second position of the dip switch module K1 is connected in parallel to the two ends of the second resistor R2 and the third resistor R3 in series. One end of the fifth resistor R5 is connected to the GND port of the IC control chip U and is shared with the ground, and the other end is connected to the detection port DIM of the IC control chip U.Figure 1 In the embodiment, the first position of the DIP switch module K1 is on the right, and the second position is on the left.

[0045] Example 3

[0046] A control method for a logic control circuit based on Embodiment 1 or Embodiment 2 is implemented based on a logic control circuit described in any one of the embodiments, and includes the following steps:

[0047] S1: Turn off both the two bits of the DIP switch module K1 of the two-bit single-pole single-throw independent switch, and obtain the voltage obtained at the detection port DIM of the IC control chip U through the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5. V0 ;

[0048] S2: Turn on the first bit of the DIP switch module K1 of the two-bit single-pole single-throw independent switch, turn off the second bit, divide the voltage through the first resistor R1, the second resistor R2 and the fifth resistor R5, and obtain the voltage obtained at the detection port DIM of the IC control chip U V1 ;

[0049] S3: Turn on the second bit of the DIP switch module K1 of the two-bit single-pole single-throw independent switch, turn off the first bit, divide the voltage through the first resistor R1, the fourth resistor R4 and the fifth resistor R5 to obtain the voltage obtained at the detection port DIM of the IC control chip U V2 ;

[0050] S4: Turn on the first bit of the DIP switch module K1 of the two-bit single-pole single-throw independent switch, turn on the second bit, and divide the voltage through the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 to obtain the voltage obtained at the detection port DIM of the IC control chip U V3 ;

[0051] S5: The voltage value or current value of the output controlled by the IC control chip U is set to four gears for the constant voltage control chip, and the current value for the constant current control chip, including the first gear out0, the second gear out1, the third gear out2, and the fourth gear out3, and the output gears out0, out1, out2, and out3 corresponding to the detection port DIM voltage of the control chip U are defined respectively. V0, V1, V2, V3 ;

[0052] S6: The requirements of the use scenarios of the logic control circuit are divided into three types, the first type is that the maximum gear output increase amplitude is less than the sum of the output increase amplitudes of the two switches being turned on respectively, the second type is that the maximum gear output increase amplitude is equal to the sum of the output increase amplitudes of the two switches being turned on respectively, and the third type is that the maximum gear output increase amplitude is greater than the sum of the output increase amplitudes of the two switches being turned on respectively;

[0053] S7: Identify the requirements of the current use scenario of the logic control circuit. If it is the first scenario, adjust the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 so that ;

[0054] If it is the second type, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are adjusted so that ;

[0055] If it is the third type, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are adjusted so that .

[0056] In this embodiment, the sequence of step S1 to step S4 is adjustable.

[0057] In step S1, both the two bits of the DIP switch module K1 of the two-bit single-pole single-throw independent switch are turned off, and the voltage obtained at the detection port DIM of the IC control chip U is calculated by dividing the voltage through the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5. V0 The formula is as follows:

[0058] ;

[0059] in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

[0060] The first bit of the DIP switch module K1 of the two-bit single-pole single-throw independent switch is turned on, and the second bit is turned off. The voltage is divided by the first resistor R1, the second resistor R2 and the fifth resistor R5 to calculate the voltage obtained at the detection port DIM of the IC control chip U. V1 The formula is as follows:

[0061] ;

[0062] in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance of the second resistor, R5 is the resistance value of the fifth resistor.

[0063] The second bit of the DIP switch module K1 of the two-bit single-pole single-throw independent switch is turned on, and the first bit is turned off. The voltage is divided by the first resistor R1, the fourth resistor R4 and the fifth resistor R5 to calculate the voltage obtained at the detection port DIM of the IC control chip U. V2 The formula is as follows:

[0064] ;

[0065] in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

[0066] The first bit of the DIP switch module K1 of the two-bit single-pole single-throw independent switch is turned on, and the second bit is turned on. The voltage obtained at the detection port DIM of the IC control chip U is calculated by dividing the voltage through the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5. V3 The formula is as follows:

[0067] ;

[0068] in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

[0069] The voltage of the detection port DIM of the IC control chip U has a linear range. Within this range, the voltage of the detection port DIM is proportional to the output voltage or current. The linear range of the detection port DIM of the IC control chip U is defined as [Vmin, Vmax]. Usually Vmin is greater than 0. By selecting appropriate R1, R2, R3, R4, and R5 resistance values, the voltage range of the detection port DIM is [V0, V3]. In order to ensure a good linear working area, V3<=Vmax is selected. The output voltage or current value is defined to have four gears, namely out0, out1, out2, and out3. The output gears out0, out1, out2, and out3 correspond to the voltages of the detection port DIM of the control chip U, respectively. V0, V1, V2, V3 , according to the proportional relationship within the linear range, the following formula can be obtained:

[0070] ;

[0071] ;

[0072] ;

[0073] .

[0074] make , which is a constant, we get:

[0075] ;

[0076] .

[0077] That is, the difference relationship between different output gears is consistent with the voltage difference relationship of the detection port DIM.

[0078] because,

[0079] ;

[0080] ;

[0081] ;

[0082] .

[0083] The following three points are examples to prove that the logic control circuit can achieve a maximum output rise of less than, equal to or greater than the sum of the output rises of the two switches that are turned on, rather than a proportional relationship of the set resistance value:

[0084] 1. Order ;

[0085] We can get:

[0086] ,

[0087] .

[0088] Satisfaction relationship , that is, the maximum gear output rise is less than the sum of the output rises of the two switches that are turned on separately.

[0089] 2. Order ;

[0090] Available ;

[0091] satisfy , that is, the maximum gear output rise is equal to the sum of the output rises of the two switches being turned on respectively.

[0092] 3. Order ;

[0093] Available ;

[0094] .

[0095] Satisfaction relationship , that is, the maximum gear output rise is greater than the sum of the output rises of the two switches that are turned on respectively;

[0096] Therefore, by selecting appropriate component parameters in the logic control circuit, the maximum gear output rise can be less than, equal to or greater than the sum of the output rises of the two dials that are turned on respectively, effectively expanding the voltage variation range of the detection port DIM, thereby meeting the application of a wider output gear. According to the needs of the use scenario, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 can be adjusted to meet the maximum gear output rise less than, equal to or greater than the sum of the output rises of the two dials that are turned on respectively, thereby increasing the applicable scenarios and use flexibility of the logic control circuit.

[0097] The IC control chip controls the output voltage value or current value by detecting the voltage of the detection port DIM. For the constant voltage control chip, it is the voltage value, and for the constant current control chip, it is the current value. The IC control chip determines the size of the output value based on this voltage. The voltage of the control port and the output voltage value or current value are proportional within a certain range.

[0098] In summary, the logic control circuit provided by the present invention is provided with a dip switch module K1, an IC control chip U and a logic control module, wherein the dip switch module K1 is connected to the logic control module, and the logic control module is connected to the IC control chip U. The dip switch module K1 is a two-position single-pole single-throw independent switch. The first position of the dip switch module K1 is connected in parallel to the two ends of the third resistor R3 and the fourth resistor R4 in series, and the second position of the dip switch module K1 is connected in parallel to the two ends of the second resistor R2 and the third resistor R3 in series; one end of the fifth resistor R5 is connected to the GND port of the IC control chip U and is grounded, and the other end is connected to the detection port DIM of the IC control chip U, which effectively expands the voltage variation range of the detection port DIM, thereby meeting the application of a wider output gear. The application of constant current drive dip plus fixed value current is one of the application scenarios of the logic control circuit.

Claims

1. A logic control circuit, characterized in that: The invention comprises a dip switch module (K1), an IC control chip (U) and a logic control module, wherein the dip switch module (K1) is connected to the logic control module, and the logic control module is connected to the IC control chip (U), the dip switch module (K1) is a two-position single-pole single-throw independent switch, the IC control chip (U) comprises a detection port (DIM) and a GND port, the logic control module comprises a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (R4) and a fifth resistor (R5), the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5) are connected in series in sequence, and the other end of the first resistor (R1) is connected to a reference voltage input end; The first position of the DIP switch module (K1) is connected in parallel to the two ends of the third resistor (R3) and the fourth resistor (R4) connected in series, and the second position of the DIP switch module (K1) is connected in parallel to the two ends of the second resistor (R2) and the third resistor (R3) connected in series; One end of the fifth resistor (R5) is connected to the GND port of the IC control chip (U) and is grounded, and the other end is connected to the detection port (DIM) of the IC control chip (U); The control method of the logic control circuit comprises the following steps: S1: Turn off both the two positions of the DIP switch module (K1) of the two-position single-pole single-throw independent switch, and divide the voltage by the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5) to obtain the voltage obtained at the detection port (DIM) of the IC control chip (U) V0 ; S2: Turn on the first position of the DIP switch module (K1) of the two-position single-pole single-throw independent switch and turn off the second position, divide the voltage through the first resistor (R1), the second resistor (R2) and the fifth resistor (R5), and obtain the voltage obtained at the detection port (DIM) of the IC control chip (U) V1 ; S3: Turning on the second position of the DIP switch module (K1) of the two-position single-pole single-throw independent switch and turning off the first position, dividing the voltage through the first resistor (R1), the fourth resistor (R4) and the fifth resistor (R5), and obtaining the voltage obtained at the detection port (DIM) of the IC control chip (U) V2 ; S4: Turn on the first bit of the DIP switch module (K1) of the two-bit single-pole single-throw independent switch, turn on the second bit, divide the voltage through the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5), and obtain the voltage obtained at the detection port (DIM) of the IC control chip (U) V3 ; S5: Set the voltage value or current value (voltage value for constant voltage control chip, current value for constant current control chip) of the control output of the IC control chip (U) to four gears, including the first gear out0, the second gear out1, the third gear out2, and the fourth gear out3, and define the voltages of the detection port (DIM) of the control chip (U) corresponding to the output gears out0, out1, out2, and out3, respectively. V0, V1, V2, V3 ; S6: The requirements of the use scenarios of the logic control circuit are divided into three types, the first type is that the maximum gear output increase amplitude is less than the sum of the output increase amplitudes of the two switches being turned on respectively, the second type is that the maximum gear output increase amplitude is equal to the sum of the output increase amplitudes of the two switches being turned on respectively, and the third type is that the maximum gear output increase amplitude is greater than the sum of the output increase amplitudes of the two switches being turned on respectively; S7: Identify the requirements of the current use scenario of the logic control circuit. If it is the first scenario, adjust the resistance values ​​of the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5) so that ; If it is the second type, adjust the resistance values ​​of the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5) so that ; If it is the third type, adjust the resistance values ​​of the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5) so that ; By adjusting the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5, the maximum gear output rise amplitude is less than or equal to or greater than the sum of the output rise amplitudes of the two switches being turned on respectively.

2. A logic control circuit according to claim 1, characterized in that: In step S1, both the two positions of the DIP switch module (K1) of the two-position single-pole single-throw independent switch are turned off, and the voltage obtained at the detection port (DIM) of the IC control chip (U) is calculated by dividing the voltage through the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5). V0 The formula is as follows: ； in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

3. A logic control circuit according to claim 1, characterized in that: In step S2, the first position of the DIP switch module (K1) of the two-position single-pole single-throw independent switch is turned on, and the second position is turned off, and the voltage is divided by the first resistor (R1), the second resistor (R2) and the fifth resistor (R5), and the voltage obtained at the detection port (DIM) of the IC control chip (U) is calculated. V1 The formula is as follows: ； in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, R5 is the resistance value of the fifth resistor.

4. A logic control circuit according to claim 1, characterized in that: In step S3, the second position of the DIP switch module (K1) of the two-position single-pole single-throw independent switch is turned on, and the first position is turned off, and the voltage is divided by the first resistor (R1), the fourth resistor (R4) and the fifth resistor (R5), and the voltage obtained at the detection port (DIM) of the IC control chip (U) is calculated. V2 The formula is as follows: ； in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

5. A logic control circuit according to claim 1, characterized in that: In step S4, the first bit of the DIP switch module (K1) of the two-bit single-pole single-throw independent switch is turned on, and the second bit is turned on. The voltage obtained at the detection port (DIM) of the IC control chip (U) is calculated by dividing the voltage through the first resistor (R1), the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5). V3 The formula is as follows: ； in, VERF is the reference voltage input value, R1 is the resistance value of the first resistor, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance value of the fourth resistor, R5 is the resistance value of the fifth resistor.

6. A logic control circuit according to claim 1, characterized in that: The execution order of step S1 to step S4 is adjustable.

Images