Rapid loop closing method and system for offshore wind power collection circuit

Abstract

The invention relates to a rapid loop closing method and system for an offshore wind power collection circuit, and the method and system are applied to an offshore converter station or booster station with two or more main transformers, and the method comprises the following steps: for any two main transformers, setting a voltage discrimination logic and a frequency discrimination logic for each main transformer; the voltage discrimination logic is used for discriminating whether a voltage transformer of a main transformer is overvoltage or undervoltage and outputting a corresponding voltage discrimination result, and the frequency discrimination logic is used for discriminating whether the bus frequency of a main transformer fan side current collection circuit exceeds a limit value and outputting a corresponding frequency discrimination result; a loop closing logic between the two main transformers is set, and the loop closing logic obtains the state of a circuit breaker and the state of a current transformer of the two main transformers. And meanwhile, according to the corresponding voltage discrimination result and the corresponding frequency discrimination result, outputting a switching-on command of a connection section circuit breaker between the two main transformer fan side current collection line buses and a tripping command of a corresponding main transformer fan side circuit breaker.

Description

Technical Field

[0001] The invention relates to a method and system for quickly closing an offshore wind power collection line, belonging to the technical field of offshore wind power line control. Background Art

[0002] Offshore wind power projects generally have onshore centralized control stations and offshore converter stations (or booster stations). Offshore wind turbines are connected to the wind turbine side busbar (hereinafter referred to as the collector line busbar) of the main transformer of the offshore converter station (or booster station) through 66kV or 220kV collector lines, and the DC is stepped up or converted into DC and sent to the onshore centralized control station and connected to the power grid.

[0003] The collector line busbar of the offshore converter station (or booster station) is generally designed according to the single busbar segmented wiring scheme. The different transformer wind turbine side busbars are connected through segmented circuit breakers. In the offshore wind power projects that have been put into operation, the segmented circuit breakers of the collector line are in the open state during normal operation. When a main transformer fails, the 66kV segmented circuit breaker closing operation is completed manually.

[0004] The main reason for adopting the above operation plan is that, unlike the substation, the bus where the collector line is located is a bidirectional power supply, and both the grid side and the wind turbine side are powered. When the main transformer fails and stops operating, the fan side will keep the bus voltage at a high level, resulting in the traditional backup automatic or quick-cut devices unable to operate correctly, and the automatic switching plan cannot be adopted. Therefore, we can only wait for the fans on the bus on the wind turbine side connected to the faulty main transformer to stop running. After the bus is free of pressure, the bus is closed with the normally operating bus by manual closing, and then the stopped fan is manually restarted.

[0005] The document "A New Automatic Backup Scheme for New Energy Access" proposes to reduce the bus voltage on the wind turbine side connected to the faulty main transformer by means of energy-consuming devices, but the construction cost of the offshore platform is high, so the engineering value of this scheme is low. At the same time, according to the document, it can be found that when the main transformer fails, the voltage of the corresponding wind turbine collector line temporarily drops below the rated voltage due to the large fault current. After the fault is removed, the collector line voltage will gradually increase and exceed the rated voltage because the wind turbine power cannot be delivered. This is the fault characteristic of the offshore wind power collector line. Summary of the invention

[0006] In order to solve the above problems existing in the prior art, the present invention proposes a method and system for quickly closing an offshore wind power collection line.

[0007] The technical solution of the present invention is as follows:

[0008] On the one hand, the present invention provides a method for fast closing an offshore wind power collection line, which is applied to an offshore converter station or booster station with two or more main transformers. The method comprises the following steps:

[0009] For any two main transformers, set voltage discrimination logic and frequency discrimination logic for each main transformer;

[0010] The voltage discrimination logic is used to judge whether the voltage transformer of the main transformer is overvoltage or undervoltage and output the corresponding voltage discrimination result, and the frequency discrimination logic is used to judge whether the bus frequency of the collector line on the fan side of the main transformer exceeds the limit value and output the corresponding frequency discrimination result;

[0011] A closing logic is set between the two main transformers, and the closing logic obtains the circuit breaker status and current transformer status of the two main transformers. At the same time, according to the corresponding voltage judgment result and the corresponding frequency judgment result, a closing command of the connection section circuit breaker between the collector line busbars on the fan side of the two main transformers and a tripping command of the corresponding main transformer fan side circuit breaker are output.

[0012] As a preferred implementation, the voltage discrimination logic is specifically as follows:

[0013] Set the effective value of the fundamental voltage of the voltage transformer corresponding to the main transformer to U PT , the rated voltage of the collector line bus is U e When the system detects U PT <0.9U e or U PT >1.1U e When the judgment is positive, the voltage judgment logic starts:

[0014] Assume the voltage determination period is Δt PT , the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is t PTU , the voltage discrimination undervoltage timing element is t PTD ;

[0015] The specific logic of the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is:

[0016] When the voltage transformer voltage corresponding to the nth cycle is determined as:

[0017] 1.1U e PT <1.3U e , then:

[0018] t PTU(n) =t PTU(n-1) +Δt PT

[0019] where t PTU(n) ​is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTU(n-1) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the n-1th cycle;

[0020] At any time t PTU >500ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1;

[0021] The specific logic of the voltage transformer voltage discrimination undervoltage timing element corresponding to the main transformer is:

[0022] When the voltage transformer voltage corresponding to the nth cycle is judged to be 0 PT <0.2U e , then:

[0023] t PTD(n) =t PTD(n-1) +Δt PT

[0024] When the voltage transformer voltage corresponding to the nth cycle is determined as:

[0025] 0.2U e PT <0.9U e , then:

[0026]

[0027] where t PTD(n) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTD(n-1) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the n-1th cycle;

[0028] At any time t PTD >625ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1;

[0029] Corresponding voltage transformer voltage discrimination overvoltage timing element t PTU and the corresponding voltage transformer voltage discrimination undervoltage timing element t PTD The value of is reset to 0 in the following two cases after the voltage discrimination element logic is started:

[0030] Case 1: The reset command is manually started;

[0031] Case 2: 0.9U is met within 1s of continuous accumulation e PT <1.1U e Condition, then return to t PTU and t PTD . ​​​

[0032] As a preferred embodiment, the frequency discrimination logic is specifically as follows:

[0033] Let the sampling frequency corresponding to the bus of the collector line on the fan side of the main transformer be f, and let the frequency discrimination period be Δt f , and the timing element for the frequency of the bus of the collector line on the fan side of the main transformer exceeding the limit is t f ;

[0034] When the frequency of the bus of the collector line on the fan side of the main transformer in the nth cycle is discriminated as f < 46.5 Hz or f > 51.5 Hz, then:

[0035] t f(n) = t f(n-1) + Δt f

[0036] where t f(n) is the value of the timing element for the frequency of the bus of the collector line on the fan side of the main transformer exceeding the limit in the nth cycle, and t f(n-1) is the value of the timing element for the frequency of the bus of the collector line on the fan side of the main transformer exceeding the limit in the (n - 1)th cycle;

[0037] When at any time t f > t fdef , where t fdef is the time setting value for exceeding the frequency limit, then the frequency over-limit discrimination element of the corresponding main transformer is set to 1;

[0038] The timing element for the frequency of the bus of the collector line on the fan side of the main transformer exceeding the limit is t f The value of will return to 0 in the following two cases after the logic of the frequency discrimination element is started:

[0039] Case 1: Manually start the reset command;

[0040] Case 2: If the condition 48.5 < f < 50.5 is satisfied continuously within 1 s, then reset t f .

[0041] As a preferred embodiment, the closing loop logic includes multiple closing discrimination elements, specifically including:

[0042] The first closing discrimination element: A digital external signal is connected, and the logic is the command of the first main transformer electrical protection or non-electrical protection to trip the circuit breaker on the fan side of the first main transformer. The received signal element value is 1, and the non-received signal element value is 0;

[0043] The second closing discrimination element: A digital external signal is connected, and the logic is the command of the second main transformer electrical protection or non-electrical protection to trip the circuit breaker on the fan side of the second main transformer. The received signal element value is 1, and the non-received signal element value is 0;

[0044] The third closing judgment element: digital external signal access, the logic is the busbar protection action of the collector line busbar on the fan side of the first main transformer or the busbar protection action command of the collector line busbar on the fan side of the second main transformer and other blocking instructions. The value of the signal element is 1 when it is received, and the value of the signal element is 0 when it is not received;

[0045] Fourth closing judgment element: digital external signal access, obtain the opening and closing status of the circuit breaker on the fan side of the first main transformer, the closing state element value is 1, and the opening state element value is 0;

[0046] Fifth closing discrimination element: digital external signal access, obtain the closing and opening status of the circuit breaker on the fan side of the second main transformer, the closing state element value is 1, and the opening state element value is 0;

[0047] The sixth closing judgment element: an analog sampling signal, sampling the effective value of the current transformer current on the fan side of the first main transformer, and assuming that the effective value of the current flows from the bus to the main transformer as positive;

[0048] The seventh closing judgment element 7: analog sampling signal, sampling the effective value of the current transformer current on the fan side of the second main transformer, assuming that the effective value of the current flowing from the bus to the main transformer is positive;

[0049] The eighth closing judgment element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the first main transformer;

[0050] Ninth closing discrimination element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the second main transformer;

[0051] The specific loop closing logic is:

[0052] Logic 1: The first main transformer fails and starts the sectional closing:

[0053] If the value of the first closing discriminating element is 1, the value of the third closing discriminating element is 0, and the sampling current direction of the sixth closing discriminating element is positive, then the first preparatory closing starting state is entered;

[0054] When in the first preparatory closing start state, when the value of the fourth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the sixth closing discriminating element is less than 0.1 times the rated current of the fan side of the first main transformer, and the effective value of the fundamental voltage of the ninth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the first main transformer does not exceed the limit, and the voltage transformer of the first main transformer does not have overvoltage and undervoltage, then enter the first main transformer fault start segmented closing start state;

[0055] After entering the first main transformer fault start-up sectional closing start-up state, a closing command is sent to the connecting sectional circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the first main transformer;

[0056] Logic 2: The second main transformer fault initiates the sectional closing:

[0057] If the value of the second closing discriminating element is 1, and the value of the third closing discriminating element is 0, and the sampling current direction of the seventh closing discriminating element 7 is positive, then the second preparatory closing starting state is entered;

[0058] When in the second preparatory closing start state, when the value of the fifth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the seventh closing discriminating element is less than 0.1 times the rated current of the fan side of the second main transformer, and the effective value of the fundamental voltage of the eighth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the second main transformer does not exceed the limit, and the voltage transformer of the second main transformer does not have overvoltage and undervoltage, then enter the second main transformer fault start segmented closing start state;

[0059] After entering the second main transformer fault-started segmented closing start state, a closing command is sent to the connecting segmented circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the second main transformer.

[0060] On the other hand, the present invention also proposes an offshore wind power collection line fast closing system, which is applied to an offshore converter station or booster station with two or more main transformers, and the system includes:

[0061] The voltage and frequency discrimination setting module sets the voltage discrimination logic and frequency discrimination logic for each of any two main transformers;

[0062] The voltage discrimination logic is used to judge whether the voltage transformer of the main transformer is overvoltage or undervoltage and output the corresponding voltage discrimination result, and the frequency discrimination logic is used to judge whether the bus frequency of the collector line on the fan side of the main transformer exceeds the limit and output the corresponding frequency discrimination result;

[0063] The closing logic setting module is used to set the closing logic between the two main transformers. The closing logic obtains the circuit breaker status and current transformer status of the two main transformers, and outputs the closing command of the connecting section circuit breaker between the collector line busbars on the fan side of the two main transformers and the corresponding main transformer fan side circuit breaker tripping command according to the corresponding voltage judgment result and the corresponding frequency judgment result.

[0064] As a preferred implementation, the voltage and frequency discrimination setting module includes a voltage discrimination logic setting unit, which is specifically used for:

[0065] Set the effective value of the fundamental voltage of the voltage transformer corresponding to the main transformer to U PT , the rated voltage of the collector line bus is U e When the system detects U PT <0.9U e or U PT >1.1U e When the judgment is positive, the voltage judgment logic starts:

[0066] Assume the voltage determination period is Δt PT , the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is t PTU , the voltage discrimination undervoltage timing element is t PTD ;

[0067] The specific logic of the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is:

[0068] When the voltage transformer voltage corresponding to the nth cycle is determined as:

[0069] 1.1U e PT <1.3U e , then:

[0070] t PTU(n) =t PTU(n-1) +Δt PT

[0071] where t PTU(n) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTU(n-1) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the n-1th cycle;

[0072] At any time t PTU >500ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1;

[0073] The specific logic of the voltage transformer voltage discrimination undervoltage timing element corresponding to the main transformer is:

[0074] When the voltage transformer voltage corresponding to the nth cycle is judged to be 0 PT <0.2U e , then:

[0075] t PTD(n) =t PTD(n-1) +Δt PT

[0076] When the voltage transformer voltage corresponding to the nth cycle is determined as:

[0077] 0.2U​​e PT <0.9U e , then:

[0078]

[0079] where t PTD(n) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTD(n-1) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the n-1th cycle;

[0080] At any time t PTD >625ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1;

[0081] Corresponding voltage transformer voltage discrimination overvoltage timing element t PTU and the corresponding voltage transformer voltage discrimination undervoltage timing element t PTD The value of is reset to 0 in the following two cases after the voltage discrimination element logic is started:

[0082] Case 1: The reset command is manually started;

[0083] Case 2: 0.9U is met within 1s of continuous accumulation e PT <1.1U e Condition, then return to t PTU and t PTD .

[0084] As a preferred implementation, the voltage and frequency discrimination setting module includes a frequency discrimination logic setting unit, which is specifically used for:

[0085] Assume that the sampling frequency of the collector line bus corresponding to the fan side of the main transformer is f, and the frequency determination period is Δt f , the corresponding timing element for the bus frequency exceeding the limit of the collector line on the fan side of the main transformer is t f ;

[0086] When the bus frequency of the collector line on the fan side of the main transformer corresponding to the nth cycle is determined to be f<46.5Hz or f>51.5Hz, then:

[0087] t f(n) =t f(n-1) +Δt f

[0088] where t f(n) is the timing element value of the bus frequency exceeding the limit value of the collector line on the fan side of the main transformer corresponding to the nth cycle, t f(n-1) ​​is the timing element value for the bus frequency of the collector line on the fan side of the corresponding main transformer in the (n - 1)th cycle;

[0089] At any time t f > t fdef , where t fdef is the time setting value for exceeding the frequency limit, then the frequency over-limit discrimination element of the corresponding main transformer is set to 1;

[0090] The timing element for the bus frequency of the collector line on the fan side of the corresponding main transformer is t f The value of which will return to 0 in the following two cases after the logic of the frequency discrimination element is started:

[0091] Case 1: Manually start the reset command;

[0092] Case 2: If the condition 48.5 < f < 50.5 is satisfied continuously for 1 s, then reset t f .

[0093] As a preferred implementation manner, the loop closing logic setting module includes a plurality of closing discrimination elements, specifically including:

[0094] The first closing discrimination element: A digital external signal is accessed, and the logic is the command for the first main transformer electrical protection or non-electrical protection to trip the circuit breaker on the fan side of the first main transformer. When the signal is received, the element value is 1; when the signal is not received, the element value is 0;

[0095] The second closing discrimination element: A digital external signal is accessed, and the logic is the command for the second main transformer electrical protection or non-electrical protection to trip the circuit breaker on the fan side of the second main transformer. When the signal is received, the element value is 1; when the signal is not received, the element value is 0;

[0096] The third closing discrimination element: A digital external signal is accessed, and the logic is the command for the bus protection of the bus of the collector line on the fan side of the first main transformer or the bus protection of the bus of the collector line on the fan side of the second main transformer and other blocking instructions. When the signal is received, the element value is 1; when the signal is not received, the element value is 0;

[0097] The fourth closing discrimination element: A digital external signal is accessed to obtain the closing and opening states of the circuit breaker on the fan side of the first main transformer. When the closing state, the element value is 1; when the opening state, the element value is 0;

[0098] The fifth closing discrimination element: A digital external signal is accessed to obtain the closing and opening states of the circuit breaker on the fan side of the second main transformer. When the closing state, the element value is 1; when the opening state, the element value is 0;

[0099] The sixth closing judgment element: an analog sampling signal, sampling the effective value of the current transformer current on the fan side of the first main transformer, and assuming that the effective value of the current flows from the bus to the main transformer as positive;

[0100] The seventh closing judgment element 7: analog sampling signal, sampling the effective value of the current transformer current on the fan side of the second main transformer, assuming that the effective value of the current flowing from the bus to the main transformer is positive;

[0101] The eighth closing judgment element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the first main transformer;

[0102] Ninth closing discrimination element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the second main transformer;

[0103] The loop logic setting module specifically sets the following two logics:

[0104] Logic 1: The first main transformer fails and starts the sectional closing:

[0105] If the value of the first closing discriminating element is 1, the value of the third closing discriminating element is 0, and the sampling current direction of the sixth closing discriminating element is positive, then the first preparatory closing starting state is entered;

[0106] When in the first preparatory closing start state, when the value of the fourth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the sixth closing discriminating element is less than 0.1 times the rated current of the fan side of the first main transformer, and the effective value of the fundamental voltage of the ninth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the first main transformer does not exceed the limit, and the voltage transformer of the first main transformer does not have overvoltage and undervoltage, then enter the first main transformer fault start segmented closing start state;

[0107] After entering the first main transformer fault start-up sectional closing start-up state, a closing command is sent to the connecting sectional circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the first main transformer;

[0108] Logic 2: The second main transformer fault initiates the sectional closing:

[0109] If the value of the second closing discriminating element is 1, and the value of the third closing discriminating element is 0, and the sampling current direction of the seventh closing discriminating element 7 is positive, then the second preparatory closing starting state is entered;

[0110] When in the second preparatory closing start state, when the value of the fifth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the seventh closing discriminating element is less than 0.1 times the rated current of the fan side of the second main transformer, and the effective value of the fundamental voltage of the eighth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the second main transformer does not exceed the limit, and the voltage transformer of the second main transformer does not have overvoltage and undervoltage, then enter the second main transformer fault start segmented closing start state;

[0111] After entering the second main transformer fault-started segmented closing start state, a closing command is sent to the connecting segmented circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the second main transformer.

[0112] On the other hand, the present invention further provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method described in any embodiment of the present invention when executing the program.

[0113] In yet another aspect, the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method described in any embodiment of the present invention.

[0114] It can be seen from the above technical solutions that this application has the following advantages:

[0115] In view of the characteristics of offshore wind power collection lines and wind turbine operation requirements, the locking of the fast closing section circuit breaker is realized through overvoltage judgment, undervoltage judgment, and frequency overlimit judgment. In view of the characteristics of the bus voltage of the offshore wind power collection line first dropping and then rising after the main transformer fails, and in order to ensure smooth closing, the section circuit breaker needs to be quickly closed as soon as possible after the fault is removed, the closing element judgment logic of the section circuit breaker is proposed, and the closing system malfunction is avoided through multiple judgments. At the same time, the fast closing of the section circuit breaker after the fault is removed is realized through multiple judgment conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0116] Figure 1 This is a flow chart of a method according to Embodiment 1 of the present invention;

[0117] Figure 2 This is a main wiring diagram of an offshore converter station (boosting station) according to an embodiment of the present invention. DETAILED DESCRIPTION

[0118] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0119] It should be understood that the step numbers used in this document are only for convenience of description and are not intended to limit the order in which the steps are executed.

[0120] It should be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0121] The terms “include” and “comprising” indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0122] The term "and / or" means and includes any and all possible combinations of one or more of the associated listed items.

[0123] Embodiment 1:

[0124] In order to achieve rapid closing of the collector line busbar of the offshore converter station (or booster station) of the offshore wind power project when the main transformer fails, and reduce the energy delivery loss of the wind turbine caused by the failure of the main transformer, this embodiment proposes a method for rapid closing of the offshore wind power collector line using a control strategy, which is applicable to offshore converter stations (or booster stations). If it is a booster station, it is directly called the main transformer, and if it is a converter station, the main transformer is called the connecting transformer. This embodiment can be used when the number of main transformers is greater than or equal to 2, and the number of windings on the fan side of the main transformer is not limited. This embodiment only describes the strategy for rapid closing of the segmented circuit breaker of the collector line busbar on the fan side of the main transformer. This embodiment takes two double-winding main transformers as an example. For details, see Figure 2 , Figure 2The main wiring diagram of the offshore converter station (or booster station) provided in this embodiment includes two main transformers: #1 main transformer and #2 main transformer, as well as #1 main transformer fan side circuit breaker DL1, #1 main transformer fan side current transformer CT1, #1 main transformer fan side collector line bus voltage transformer PT1; #2 main transformer fan side circuit breaker DL2, #2 main transformer fan side current transformer CT2, #2 main transformer fan side collector line bus voltage transformer PT2; #1 main transformer fan side collector line bus connection section circuit breaker DL3 between #1 main transformer fan side collector line bus and #2 main transformer fan side collector line bus. Each section of the collector line bus is connected to the collector lines of several wind turbines.

[0125] See also Figure 1 , the method provided in this embodiment comprises the following steps:

[0126] S100, for two main transformers, namely, main transformer #1 and main transformer #2, respectively set voltage discrimination logic and frequency discrimination logic;

[0127] The voltage discrimination logic is used to judge whether the voltage transformer of the main transformer is overvoltage or undervoltage and output the corresponding voltage discrimination result, and the frequency discrimination logic is used to judge whether the bus frequency of the collector line on the fan side of the main transformer exceeds the limit value and output the corresponding frequency discrimination result;

[0128] S200. Set the closing logic between the two main transformers, the closing logic obtains the circuit breaker status and current transformer status of the two main transformers, and outputs the closing command of the connection section circuit breaker between the collector line busbars on the fan side of the two main transformers and the corresponding main transformer fan side circuit breaker tripping command according to the corresponding voltage judgment result and the corresponding frequency judgment result.

[0129] As a preferred implementation of this embodiment, the voltage discrimination logic specifically includes a voltage overvoltage discrimination element and a voltage undervoltage discrimination element, and the element has two states, 1 and 0. The voltage discrimination is designed according to the national standard requirements for high voltage ride-through and low voltage ride-through of the wind turbine.

[0130] For the bus voltage transformer PT1 of the collector line on the fan side of the #1 main transformer, assume that the effective value of the fundamental voltage of PT1 is U PT1 , the rated voltage of the collector line bus is U e When the system detects U PT1 <0.9U e or U PT1 >1.1U e When the judgment is positive, the voltage judgment logic starts:

[0131] Assume the voltage determination period is Δt PT (Every time Δt PTThe time period determines the voltage once), and the PT1 voltage determines the overvoltage timing element is t P1TU , PT1 voltage judgment undervoltage timing element is t PT1D .

[0132] ①. The specific logic of the voltage discrimination overvoltage timing element of the bus voltage transformer PT1 of the collector line on the fan side of the #1 main transformer is:

[0133] When the voltage of the collector line bus voltage transformer PT1 of the fan side of the #1 main transformer in the nth cycle is:

[0134] 1.1U e PT1 <1.3U e , then:

[0135] t PT1U(n) =t PT1U(n-1) +Δt PT

[0136] where t PT1U(n) is the PT1 voltage judgment overvoltage timing element value of the nth cycle, t PT1U ( n-1) It is the PT1 voltage judgment overvoltage timing element value of the n-1th cycle.

[0137] At any time t PT1U >500ms, the voltage overvoltage detection element of the bus voltage transformer PT1 of the collector line on the fan side of the #1 main transformer is set to 1.

[0138] ② The specific logic of the voltage discrimination undervoltage timing element of the bus voltage transformer PT1 of the collector line on the fan side of the #1 main transformer is:

[0139] When the voltage transformer voltage corresponding to the nth cycle is judged to be 0 PT1 <0.2U e , then:

[0140] t PT1D(n) =t PT1D(n-1) +Δt PT

[0141] When the PT1 voltage is judged to be 0.2U in the nth cycle e PT1 <0.9U e , then

[0142]

[0143] where t PT1D(n) is the PT1 voltage judgment undervoltage timing element value in the nth cycle, t PT1D(n-1) ​​​It is the PT1 voltage judgment undervoltage timing element value of the n-1th cycle.

[0144] At any time t PT1D >625ms, the voltage overvoltage detection element of the bus voltage transformer PT1 of the collector line on the fan side of the #1 main transformer is set to 1.

[0145] ③ Voltage discrimination overvoltage timing element t of the bus voltage transformer PT1 of the collector line on the fan side of the #1 main transformer PT1U The voltage discrimination undervoltage timing element t of the bus voltage transformer PT1 of the collector line on the fan side of the #1 main transformer PT1D After the voltage discrimination element logic is activated, the value of will be reset to 0 only in the following two cases:

[0146] Case 1: The reset command is manually started;

[0147] Case 2: 0.9U is met within 1s of continuous accumulation e PT1 <1.1U e Condition, then return to t PT1U and t PT1D .

[0148] Similarly, for the bus voltage transformer PT2 of the collector line on the fan side of the #2 main transformer, assume that the effective value of the fundamental voltage of PT2 is U PT2 , the rated voltage of the collector line bus is U e When the system detects U PT2 <0.9U e or U PT2 >1.1U e When the judgment criterion is positive, the voltage discrimination element logic is activated.

[0149] Assume the voltage determination period is Δt PT (Every time Δt PT The time period determines the voltage once), and the PT2 voltage determination overvoltage timing element is t P2TU , PT2 voltage judgment undervoltage timing element is t PT2D .

[0150] ①, Voltage discrimination overvoltage timing element of the bus voltage transformer PT2 of the collector line on the fan side of the #2 main transformer:

[0151] When the PT2 voltage is judged to be 1.1U in the nth cycle e PT2 <1.3U e , then:

[0152] t PT2U(n) =t PT2U(n-1) +Δt PT ​​

[0153] where t PT2U(n) is the PT2 voltage judgment overvoltage timing element value of the nth cycle, t PT2U(n-1) It is the PT2 voltage judgment overvoltage timing element value of the n-1th cycle.

[0154] At any time t PT2U >500ms, the voltage overvoltage discrimination element value of the bus voltage transformer PT2 of the collector line on the fan side of the #2 main transformer is set to 1.

[0155] ②, Voltage discrimination undervoltage timing element of the bus voltage transformer PT2 of the collector line on the fan side of the #2 main transformer:

[0156] When the PT2 voltage is judged to be 0 in the nth cycle PT2 <0.2U e , then:

[0157] t PT2D(n) =t PT2D(n-1) +Δt PT

[0158] When the PT2 voltage is judged to be 0.2U in the nth cycle e PT2 <0.9U e , then:

[0159]

[0160] where t PT2D(n) is the PT2 voltage judgment undervoltage timing element value in the nth cycle, t PT2D(n-1) It is the PT2 voltage judgment undervoltage timing element value of the n-1th cycle.

[0161] At any time t PT2D >625ms, the voltage undervoltage judgment element value of the bus voltage transformer PT2 of the collector line on the fan side of the #2 main transformer is set to 1.

[0162] ③ Voltage discrimination timing element reset:

[0163] Voltage discrimination overvoltage timing element t of the bus voltage transformer PT2 of the collector line on the fan side of the #2 main transformer PT2U The voltage discrimination undervoltage timing element t of the bus voltage transformer PT2 of the collector line on the fan side of the #2 main transformer PT2D After the voltage discrimination element logic is activated, the value can be reset to 0 in only the following two cases:

[0164] Case 1: The reset command is manually started;

[0165] Case 2: 0.9U is met within 1s of continuous accumulation​​e PT2 <1.1U e Condition, then return to t PT2U and t PT2D .

[0166] As a preferred implementation of this embodiment, the frequency discrimination logic is specifically as follows:

[0167] Assume that the sampling frequency of the collector busbar on the fan side of the #1 main transformer is f 1 , assuming the frequency discrimination period is Δt f (Every time Δt f The time period determines the frequency once), the #1 main transformer fan side collector line bus frequency exceeds the limit timing element is t f1 .

[0168] When the frequency of the collector line busbar of the fan side of the main transformer #1 in the nth cycle is determined to be f 1 <46.5Hz or f 1 >51.5Hz, then:

[0169] t f1(n) =t f1(n-1) +Δt f

[0170] where t f1(n) is the frequency over-limit timing element value of the collector line busbar of the fan side of the #1 main transformer in the nth cycle, t f1(n-1) It is the frequency over-limit timing element value of the collector line busbar on the fan side of the #1 main transformer in the n-1th cycle.

[0171] At any time t f1 >t fdef , where t fdef If the frequency over-limit time setting value is exceeded, the frequency over-limit judgment element value of the #1 main transformer is set to 1.

[0172] The frequency over-limit timing element of the collector line busbar on the fan side of #1 main transformer is t f1 After the frequency discrimination element logic is started, the value can be reset to 0 in only the following two cases:

[0173] Case 1: The reset command is manually started;

[0174] Case 2: 48.5 points within 1 second of continuous accumulation <f 1 <50.5, then return to t f1 .

[0175] Similarly, the frequency discrimination element logic of the collector line busbar on the fan side of the #2 main transformer is as follows:

[0176] ​Assume that the sampling frequency of the collector busbar on the fan side of the #2 main transformer is f 2 , assuming the frequency discrimination period is Δt f (Every time Δt f The time period determines the frequency once), the bus frequency over-limit timing element of the collector line on the fan side of the #2 main transformer is t f2 .

[0177] When the frequency of the collector line busbar of the fan side of the #2 main transformer in the nth cycle is determined to be f 2 <46.5Hz or f 2 >51.5Hz, then:

[0178] t f2(n) =t f2(n-1) +Δt f

[0179] where t f2(n) is the frequency over-limit timing element value of the collector line busbar of the fan side of the #2 main transformer in the nth cycle, t f2(n-1) It is the frequency over-limit timing element value of the collector line busbar on the fan side of the #2 main transformer in the n-1th cycle.

[0180] At any time t f2 >t fdef , where t fdef If the frequency over-limit time setting value is exceeded, the frequency over-limit judgment element of the #2 main transformer is set to 1.

[0181] The frequency over-limit timing element of the collector line busbar on the fan side of #2 main transformer is t f2 After the frequency discrimination element logic is started, the value can be reset to 0 in only the following two cases:

[0182] Case 1: The reset command is manually started;

[0183] Case 2: 48.5 points within 1 second of continuous accumulation <f 2 <50.5, then return to t f2 .

[0184] As a preferred implementation of this embodiment, the loop closing logic includes multiple closing discrimination elements, specifically including:

[0185] DL3 closing judgment element 1: Digital external signal access, the logic is #1 main transformer power protection or non-power protection starts the command to trip DL1. The signal element is 1 when it is received, and 0 when it is not received.

[0186] DL3 closing judgment element 2: Digital external signal access, the logic is the command for #2 main transformer power protection or non-power protection to start tripping DL2. The signal element is 1 when it is received, and 0 when it is not received.

[0187] DL3 closing judgment element 3: Digital external signal access, the logic is the busbar protection action of the collector line bus on the fan side of #1 main transformer or the busbar protection action command of the collector line bus on the fan side of #2 main transformer and other locking instructions. The signal element is 1 when received and 0 when not received.

[0188] DL3 closing judgment element 4: Digital external signal is connected, DL1 circuit breaker is in the closing and opening state, the closing element is 1, and the opening element is 0.

[0189] DL3 closing judgment element 5: Digital external signal is connected, DL2 circuit breaker is in the closing and opening state, the closing element is 1, and the opening element is 0.

[0190] DL3 closing judgment element 6: analog sampling signal, #1 main transformer fan side current transformer CT1 (sampling current effective value is I CT1 ), assume that the current flowing from the busbar to the main transformer of the CT is positive.

[0191] DL3 closing judgment element 7: analog sampling signal, #2 main transformer fan side current transformer CT2 (sampling current effective value is I CT2 ), assume that the current flowing from the busbar to the main transformer of the CT is positive.

[0192] DL3 closing judgment element 8: analog sampling signal, the bus voltage transformer of the collector line on the fan side of the #1 main transformer is PT1.

[0193] DL3 closing judgment element 9: analog sampling signal, the bus voltage transformer of the collector line on the fan side of #2 main transformer is PT1.

[0194] The specific loop closing logic is:

[0195] Logic 1, #1 main transformer fault starts DL3 section closing:

[0196] The value of DL3 closing judgment element 1 is 1 (determine whether it is a fault trip in the main transformer area, if so, the sectionalizing circuit breaker is allowed to be closed), and the value of DL3 closing judgment element 3 is 0 (determine whether it is a fault trip outside the main transformer area or a manual trip, if so, the sectionalizing circuit breaker is not automatically closed), and the I of DL3 closing judgment element 6 is CT1 If the current direction is positive (double judgment of whether it is a fault trip in the main transformer area), the DL3 pre-closing start state is entered;

[0197] In the DL3 pre-closing start state, when the DL3 closing judgment element 4 value changes from 1 to 0 (judging whether the main transformer fan side circuit breaker has been opened, and after opening, the section circuit breaker is allowed to be closed), and the I of the DL3 closing judgment element 6 CT1 <0.1I CT1e (where I CT1e is the rated current of the fan side of the #1 main transformer, and the dual judgment of whether the circuit breaker on the fan side of the main transformer has tripped) and the U of the DL3 closing judgment element 9 PT2 >0.9U e (Judge whether the other section of the bus is energized. If it is energized, the section circuit breaker is allowed to be closed), and the value of the #1 main transformer frequency over-limit judgment element is 0, and the value of the PT1 voltage overvoltage judgment element is 0, and the value of the PT1 voltage undervoltage judgment element is 0, then enter the DL3 closing start state.

[0198] After the system enters the DL3 closing start state, it sends a closing command to DL3 and a tripping command to DL1.

[0199] Logic 2: #2 main transformer fault starts DL3 section closing:

[0200] The value of DL3 closing discriminant element 2 is 1 (determine whether it is a fault trip in the main transformer area, if so, the sectionalizing circuit breaker is allowed to be closed), and the value of DL3 closing discriminant element 3 is 0 (determine whether it is a fault trip outside the main transformer area or a manual trip, if so, the sectionalizing circuit breaker is not automatically closed), and the I of DL3 closing discriminant element 7 is CT2 If the current direction is positive (double judgment of whether it is a fault trip in the main transformer area), the DL3 pre-closing start state is entered;

[0201] In the DL3 pre-closing start state, when the DL3 closing judgment element 5 value changes from 1 to 0 (judging whether the main transformer fan side circuit breaker has been opened, and after opening, the section circuit breaker is allowed to be closed), and the I of the DL3 closing judgment element 7 is CT2 <0.1I CT2e (where I CT2e is the rated current of the fan side of the #2 main transformer, and the dual judgment of whether the circuit breaker on the fan side of the main transformer has tripped) and the U of the DL3 closing judgment element 8 PT1 >0.9U e (Judge whether the other section of the bus is energized. If it is energized, the section circuit breaker is allowed to be closed), and the value of the #2 main transformer frequency over-limit judgment element is 0, and the value of the PT2 voltage overvoltage judgment element is 0, and the value of the PT2 voltage undervoltage judgment element is 0, then enter the DL3 closing start state.

[0202] After the system enters the DL3 closing start state, it sends a closing command to DL3 and a tripping command to DL2.

[0203] Based on the above implementation, this embodiment realizes the locking of the fast closing sectionalizer by overvoltage judgment, undervoltage judgment and frequency overlimit judgment in view of the characteristics of offshore wind power collection line and wind turbine operation requirements. In view of the characteristics that the bus voltage of offshore wind power collection line drops first and then rises after the main transformer fails, and in order to ensure the smooth closing, the sectionalizer needs to be quickly closed as soon as possible after the fault is removed, the closing element judgment logic of the sectionalizer is proposed, and the closing system malfunction is avoided through multiple judgments, and the sectionalizer is quickly closed after the fault is removed through multiple judgment conditions.

[0204] This embodiment overcomes the shortcoming of the existing offshore wind power project collector line section circuit breaker without automatic fast closing, and according to the electrical characteristics of offshore wind power, realizes high reliability and fast closing of the collector line bus section circuit breaker after the main transformer fails through multiple criteria, thereby ensuring the delivery of offshore wind power after the main transformer fails, greatly improving the economic benefits of the project.

[0205] Embodiment 2:

[0206] This embodiment provides an offshore wind power collection line fast closing system, which is applied to an offshore converter station or booster station with two or more main transformers. The system includes:

[0207] A voltage and frequency discrimination setting module, for any two main transformers, sets voltage discrimination logic and frequency discrimination logic for each main transformer; this module is used to implement the function of step S100 in the first embodiment, and will not be described in detail here;

[0208] The voltage discrimination logic is used to judge whether the voltage transformer of the main transformer is overvoltage or undervoltage and output the corresponding voltage discrimination result, and the frequency discrimination logic is used to judge whether the bus frequency of the collector line on the fan side of the main transformer exceeds the limit and output the corresponding frequency discrimination result;

[0209] The closing logic setting module is used to set the closing logic between the two main transformers. The closing logic obtains the circuit breaker status and current transformer status of the two main transformers, and outputs the closing command of the connection section circuit breaker between the collector line busbars on the fan side of the two main transformers and the corresponding main transformer fan side circuit breaker tripping command according to the corresponding voltage judgment result and the corresponding frequency judgment result; this module is used to implement the function of step S200 in Example 1, which will not be repeated here.

[0210] As a preferred implementation, the voltage and frequency discrimination setting module includes a voltage discrimination logic setting unit, which is specifically used for:

[0211] Set the effective value of the fundamental voltage of the voltage transformer corresponding to the main transformer to U PT , the rated voltage of the collector line bus is Ue When the system detects U PT <0.9U e or U PT >1.1U e When the judgment is positive, the voltage judgment logic starts:

[0212] Assume the voltage determination period is Δt PT , the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is t PTU , the voltage discrimination undervoltage timing element is t PTD ;

[0213] The specific logic of the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is:

[0214] When the voltage transformer voltage corresponding to the nth cycle is determined as:

[0215] 1.1U e PT <1.3U e , then:

[0216] t PTU(n) =t PTU(n-1) +Δt PT

[0217] where t PTU(n) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the nth cycle, t PT1U(n-1) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the n-1th cycle;

[0218] At any time t PT1U >500ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1;

[0219] The specific logic of the voltage transformer voltage discrimination undervoltage timing element corresponding to the main transformer is:

[0220] When the voltage transformer voltage corresponding to the nth cycle is judged to be 0 PT1 <0.2U e , then:

[0221] t PTD(n) =t PTD(n-1) +Δt PT

[0222] When the voltage transformer voltage corresponding to the nth cycle is determined as:

[0223] 0.2U e PT <0.9U e , then: ​​​

[0224]

[0225] where t PTD(n) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTD(n-1) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the n-1th cycle;

[0226] At any time t PTD >625ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1;

[0227] Corresponding voltage transformer voltage discrimination overvoltage timing element t PTU and the corresponding voltage transformer voltage discrimination undervoltage timing element t PTD The value of is reset to 0 in the following two cases after the voltage discrimination element logic is started:

[0228] Case 1: The reset command is manually started;

[0229] Case 2: 0.9U is met within 1s of continuous accumulation e PT <1.1U e Condition, then return to t PTU and t PTD .

[0230] As a preferred implementation, the voltage and frequency discrimination setting module includes a frequency discrimination logic setting unit, which is specifically used for:

[0231] Assume that the sampling frequency of the collector line bus corresponding to the fan side of the main transformer is f, and the frequency determination period is Δt f , the corresponding timing element for the bus frequency exceeding the limit of the collector line on the fan side of the main transformer is t f ;

[0232] When the bus frequency of the collector line on the fan side of the main transformer corresponding to the nth cycle is determined to be f<46.5Hz or f>51.5Hz, then:

[0233] t f(n) =t f(n-1) +Δt f

[0234] where t f(n) is the timing element value of the bus frequency exceeding the limit value of the collector line on the fan side of the main transformer corresponding to the nth cycle, t f(n-1) The value of the timing element for the bus frequency exceeding the limit of the collector line on the fan side of the corresponding main transformer in the n-1th cycle;

[0235] At any time t f >t fdef ​, where t fdef is the time setting value exceeding the frequency limit, then the frequency over-limit discrimination element of the corresponding main transformer is set to 1;

[0236] The time counting element for the bus frequency exceeding the limit of the collector line on the fan side of the corresponding main transformer is t f The value of

[0237] Case 1: Manually start the reset command;

[0238] Case 2: If the condition 48.5 < f < 50.5 is satisfied continuously within 1 s, then reset t f .

[0239] As a preferred implementation, the loop closing logic setting module includes multiple closing discrimination elements, specifically including:

[0240] The first closing discrimination element: The digital quantity external signal is accessed, and the logic is the command for the first main transformer electrical protection or non-electrical protection to start tripping the circuit breaker on the fan side of the first main transformer. When the signal is received, the element value is 1, and when the signal is not received, the element value is 0;

[0241] The second closing discrimination element: The digital quantity external signal is accessed, and the logic is the command for the second main transformer electrical protection or non-electrical protection to start tripping the circuit breaker on the fan side of the second main transformer. When the signal is received, the element value is 1, and when the signal is not received, the element value is 0;

[0242] The third closing discrimination element: The digital quantity external signal is accessed, and the logic is the command for the bus protection of the collector line bus on the fan side of the first main transformer or the bus protection of the collector line bus on the fan side of the second main transformer to act and other blocking instructions. When the signal is received, the element value is 1, and when the signal is not received, the element value is 0;

[0243] The fourth closing discrimination element: The digital quantity external signal is accessed to obtain the closing and opening states of the circuit breaker on the fan side of the first main transformer. When the closing state, the element value is 1, and when the opening state, the element value is 0;

[0244] The fifth closing discrimination element: The digital quantity external signal is accessed to obtain the closing and opening states of the circuit breaker on the fan side of the second main transformer. When the closing state, the element value is 1, and when the opening state, the element value is 0;

[0245] The sixth closing discrimination element: The analog quantity sampling signal samples the effective value of the current of the current transformer on the fan side of the first main transformer, and assumes that the current flowing from the bus to the main transformer is positive for this current effective value;

[0246] The seventh closing discrimination element 7: The analog quantity sampling signal samples the effective value of the current of the current transformer on the fan side of the second main transformer, and assumes that the current flowing from the bus to the main transformer is positive for this current effective value;

[0247] The eighth closing judgment element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the first main transformer;

[0248] Ninth closing discrimination element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the second main transformer;

[0249] The loop logic setting module specifically sets the following two logics:

[0250] Logic 1: The first main transformer fails and starts the sectional closing:

[0251] If the value of the first closing discriminating element is 1, the value of the third closing discriminating element is 0, and the sampling current direction of the sixth closing discriminating element is positive, then the first preparatory closing starting state is entered;

[0252] When in the first preparatory closing start state, when the value of the fourth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the sixth closing discriminating element is less than 0.1 times the rated current of the fan side of the first main transformer, and the effective value of the fundamental voltage of the ninth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the first main transformer does not exceed the limit, and the voltage transformer of the first main transformer does not have overvoltage and undervoltage, then enter the first main transformer fault start segmented closing start state;

[0253] After entering the first main transformer fault start-up sectional closing start-up state, a closing command is sent to the connecting sectional circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the first main transformer;

[0254] Logic 2: The second main transformer fault initiates the sectional closing:

[0255] If the value of the second closing discriminating element is 1, and the value of the third closing discriminating element is 0, and the sampling current direction of the seventh closing discriminating element 7 is positive, then the second preparatory closing starting state is entered;

[0256] When in the second preparatory closing start state, when the value of the fifth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the seventh closing discriminating element is less than 0.1 times the rated current of the fan side of the second main transformer, and the effective value of the fundamental voltage of the eighth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the second main transformer does not exceed the limit, and the voltage transformer of the second main transformer does not have overvoltage and undervoltage, then enter the second main transformer fault start segmented closing start state;

[0257] After entering the second main transformer fault-started segmented closing start state, a closing command is sent to the connecting segmented circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the second main transformer.

[0258] Embodiment three:

[0259] This embodiment provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method described in any embodiment of the present invention when executing the program.

[0260] Embodiment 4:

[0261] This embodiment provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the method described in any embodiment of the present invention is implemented.

[0262] In the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. Among them, A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can be represented by: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, c can be single or multiple.

[0263] Those of ordinary skill in the art will appreciate that the various units and algorithm steps described in the embodiments disclosed herein can be implemented in a combination of electronic hardware, computer software, and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0264] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0265] In several embodiments provided in the present application, if any function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory; hereinafter referred to as: ROM), random access memory (Random Access Memory; hereinafter referred to as: RAM), disk or optical disk, and other media that can store program codes.

[0266] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A method for rapid loop closing of offshore wind power collection lines, characterized in that: Applied to an offshore converter station or a booster station with two or more main transformers, the method comprises the following steps: For any two main transformers, set voltage discrimination logic and frequency discrimination logic for each main transformer; The voltage discrimination logic is used to judge whether the voltage transformer of the main transformer is overvoltage or undervoltage and output the corresponding voltage discrimination result, and the frequency discrimination logic is used to judge whether the bus frequency of the collector line on the fan side of the main transformer exceeds the limit value and output the corresponding frequency discrimination result; A closing logic is set between the two main transformers, and the closing logic obtains the circuit breaker status and current transformer status of the two main transformers. At the same time, according to the corresponding voltage judgment result and the corresponding frequency judgment result, a closing command of the connection section circuit breaker between the collector line busbars on the fan side of the two main transformers and a tripping command of the corresponding main transformer fan side circuit breaker are output.

2. A method for rapid loop closing of offshore wind power collection lines according to claim 1, characterized in that: The voltage discrimination logic is specifically as follows: Set the effective value of the fundamental voltage of the voltage transformer corresponding to the main transformer to U PT , the rated voltage of the collector line bus is U e When the system detects U PT <0.9U e or U PT >1.1U e When the judgment is positive, the voltage judgment logic starts: Assume the voltage determination period is Δt PT , the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is t PTU , the voltage discrimination undervoltage timing element is t PTD ; The specific logic of the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is: When the voltage transformer voltage corresponding to the nth cycle is determined as: 1.1U e PT <1.3U e , then:​ t PTU(n) =t PTU(n-1) +Δt PT where t PTU(n) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTU(n-1) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the n-1th cycle; At any time t PTU >500ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1; The specific logic of the voltage transformer voltage discrimination undervoltage timing element corresponding to the main transformer is: When the voltage transformer voltage corresponding to the nth cycle is judged to be 0 PT <0.2U e , then:​ t PTD(n) =t PTD(n-1) +Δt PT When the voltage transformer voltage corresponding to the nth cycle is determined as: 0.2U e PT <0.9U e , then:​ where t PTD ( n) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTD(n-1) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the n-1th cycle; At any time t PTD >625ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1; Corresponding voltage transformer voltage discrimination overvoltage timing element t PTU and the corresponding voltage transformer voltage discrimination undervoltage timing element t PTD The value of is reset to 0 in the following two cases after the voltage discrimination element logic is started: Case 1: The reset command is manually started; Case 2: 0.9U is met within 1s of continuous accumulation e PT <1.1U e Condition, then return to t PTU and t PTD .​ 3. A method for rapid loop closing of offshore wind power collection lines according to claim 1, characterized in that: The frequency discrimination logic is specifically as follows: Assume that the sampling frequency of the collector line bus corresponding to the fan side of the main transformer is f, and the frequency determination period is Δt f , the corresponding timing element for the bus frequency exceeding the limit of the collector line on the fan side of the main transformer is t f ; When the bus frequency of the collector line on the fan side of the main transformer corresponding to the nth cycle is determined to be f<46.5Hz or f>51.5Hz, then: t f(n) =t f(n-1) +Δt f where t f(n) is the timing element value of the bus frequency exceeding the limit value of the collector line on the fan side of the main transformer corresponding to the nth cycle, t f(n-1) The value of the timing element for the bus frequency exceeding the limit of the collector line on the fan side of the corresponding main transformer in the n-1th cycle; At any time t f >t fdef , where t fdef If the frequency exceeds the limit time setting value, the corresponding main transformer frequency limit judgment element is set to 1; The timing element corresponding to the bus frequency exceeding the limit value of the collector line on the fan side of the main transformer is t f The value of is reset to 0 in the following two cases after the frequency discrimination element logic is started: Case 1: The reset command is manually started; Case 2: If the condition 48.5 < f < 50.5 is satisfied within 1 second of continuous accumulation, then reset t f .

4. A method for rapid closing of offshore wind power collection lines according to claim 1, characterized in that: The closing logic includes a plurality of closing discrimination elements, specifically including: First closing judgment element: digital external signal access, the logic is the command for the first main transformer electric quantity protection or non-electric quantity protection to start tripping the first main transformer fan side circuit breaker, the signal element value is 1 when receiving the signal, and the signal element value is 0 when not receiving the signal; Second closing discrimination element: digital external signal access, the logic is the command for the second main transformer electric quantity protection or non-electric quantity protection to start tripping the second main transformer fan side circuit breaker, the signal element value is 1 when receiving the signal, and the signal element value is 0 when not receiving the signal; The third closing judgment element: digital external signal access, the logic is the busbar protection action of the collector line busbar on the fan side of the first main transformer or the busbar protection action command of the collector line busbar on the fan side of the second main transformer and other blocking instructions. The value of the signal element is 1 when it is received, and the value of the signal element is 0 when it is not received; Fourth closing judgment element: digital external signal access, obtain the opening and closing status of the circuit breaker on the fan side of the first main transformer, the closing state element value is 1, and the opening state element value is 0; Fifth closing discrimination element: digital external signal access, obtain the closing and opening status of the circuit breaker on the fan side of the second main transformer, the closing state element value is 1, and the opening state element value is 0; The sixth closing judgment element: an analog sampling signal, sampling the effective value of the current transformer current on the fan side of the first main transformer, and assuming that the effective value of the current flows from the bus to the main transformer as positive; The seventh closing judgment element 7: analog sampling signal, sampling the effective value of the current transformer current on the fan side of the second main transformer, assuming that the effective value of the current flowing from the bus to the main transformer is positive; The eighth closing judgment element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the first main transformer; Ninth closing discrimination element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the second main transformer; The specific loop closing logic is: Logic 1: The first main transformer fails and starts the sectional closing: If the value of the first closing discriminating element is 1, the value of the third closing discriminating element is 0, and the sampling current direction of the sixth closing discriminating element is positive, then the first preparatory closing starting state is entered; When in the first preparatory closing start state, when the value of the fourth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the sixth closing discriminating element is less than 0.1 times the rated current of the fan side of the first main transformer, and the effective value of the fundamental voltage of the ninth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the first main transformer does not exceed the limit, and the voltage transformer of the first main transformer does not have overvoltage and undervoltage, then enter the first main transformer fault start segmented closing start state; After entering the first main transformer fault start-up sectional closing start-up state, a closing command is sent to the connecting sectional circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the first main transformer; Logic 2: The second main transformer fault initiates the sectional closing: If the value of the second closing discriminating element is 1, and the value of the third closing discriminating element is 0, and the sampling current direction of the seventh closing discriminating element 7 is positive, then the second preparatory closing starting state is entered; When in the second preparatory closing start state, when the value of the fifth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the seventh closing discriminating element is less than 0.1 times the rated current of the fan side of the second main transformer, and the effective value of the fundamental voltage of the eighth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the second main transformer does not exceed the limit, and the voltage transformer of the second main transformer does not have overvoltage and undervoltage, then enter the second main transformer fault start segmented closing start state; After entering the second main transformer fault-started segmented closing start state, a closing command is sent to the connecting segmented circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the second main transformer.

5. An offshore wind power collection line rapid loop closing system, characterized in that: Applicable to offshore converter stations or booster stations with two or more main transformers. The system includes: The voltage and frequency discrimination setting module sets the voltage discrimination logic and frequency discrimination logic for each of any two main transformers; The voltage discrimination logic is used to judge whether the voltage transformer of the main transformer is overvoltage or undervoltage and output the corresponding voltage discrimination result, and the frequency discrimination logic is used to judge whether the bus frequency of the collector line on the fan side of the main transformer exceeds the limit and output the corresponding frequency discrimination result; The closing logic setting module is used to set the closing logic between the two main transformers. The closing logic obtains the circuit breaker status and current transformer status of the two main transformers, and outputs the closing command of the connecting section circuit breaker between the collector line busbars on the fan side of the two main transformers and the corresponding main transformer fan side circuit breaker tripping command according to the corresponding voltage judgment result and the corresponding frequency judgment result.

6. The offshore wind power collection line rapid loop closing system according to claim 5, characterized in that: The voltage and frequency determination setting module includes a voltage determination logic setting unit, which is specifically used for: Set the effective value of the fundamental voltage of the voltage transformer corresponding to the main transformer to U PT , the rated voltage of the collector line bus is U e When the system detects U PT <0.9U e or U PT >1.1U e When the judgment is positive, the voltage judgment logic starts: Assume the voltage determination period is Δt PT , the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is t PTU , the voltage discrimination undervoltage timing element is t PTD ; The specific logic of the voltage transformer voltage discrimination overvoltage timing element corresponding to the main transformer is: When the voltage transformer voltage corresponding to the nth cycle is determined as: 1.1U e PT <1.3U e , then:​ t PTU(n) =t PTU(n-1) +Δt PT where t PTU(n) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTU(n-1) is the voltage discrimination overvoltage timing element value of the voltage transformer corresponding to the n-1th cycle; At any time t PTU >500ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1; The specific logic of the voltage transformer voltage discrimination undervoltage timing element corresponding to the main transformer is: When the voltage transformer voltage corresponding to the nth cycle is judged to be 0 PT <0.2U e , then:​ t PTD(n) =t PTD(n-1) +Δt PT When the voltage transformer voltage corresponding to the nth cycle is determined as: 0.2U e PT <0.9U e , then:​ where t PTD(n) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the nth cycle, t PTD(n-1) is the voltage discrimination undervoltage timing element value of the voltage transformer corresponding to the n-1th cycle; At any time t PTD >625ms, the voltage overvoltage discrimination element of the corresponding voltage transformer is set to 1; Corresponding voltage transformer voltage discrimination overvoltage timing element t PTU and the corresponding voltage transformer voltage discrimination undervoltage timing element t PTD The value of is reset to 0 in the following two cases after the voltage discrimination element logic is started: Case 1: The reset command is manually started; Case 2: 0.9U is met within 1s of continuous accumulation e PT <1.1U e Condition, then return to t PTU and t PTD .​ 7. The offshore wind power collection line rapid loop closing system according to claim 5, characterized in that: The voltage and frequency determination setting module includes a frequency determination logic setting unit, which is specifically used for: Assume that the sampling frequency of the collector line bus corresponding to the fan side of the main transformer is f, and the frequency determination period is Δt f , the corresponding timing element for the bus frequency exceeding the limit of the collector line on the fan side of the main transformer is t f ; When the bus frequency of the collector line on the fan side of the main transformer corresponding to the nth cycle is determined to be f<46.5Hz or f>51.5Hz, then: t f(n) =t f(n-1) +Δt f where t f(n) is the timing element value of the bus frequency exceeding the limit value of the collector line on the fan side of the main transformer corresponding to the nth cycle, t f(n-1) The value of the timing element for the bus frequency exceeding the limit of the collector line on the fan side of the corresponding main transformer in the n-1th cycle; At any time t f >t fdef , where t fdef If the frequency exceeds the limit time setting value, the corresponding main transformer frequency limit judgment element is set to 1; The timing element corresponding to the bus frequency exceeding the limit value of the collector line on the fan side of the main transformer is t f The value of is reset to 0 in the following two cases after the frequency discrimination element logic is started: Case 1: The reset command is manually started; Case 2: If the condition 48.5 < f < 50.5 is satisfied within 1 s of continuous accumulation, then reset t f .

8. The offshore wind power collection line rapid loop closing system according to claim 5, characterized in that: The closing logic setting module includes a plurality of closing judgment elements, specifically including: First closing judgment element: digital external signal access, the logic is the command for the first main transformer electric quantity protection or non-electric quantity protection to start tripping the first main transformer fan side circuit breaker, the signal element value is 1 when receiving the signal, and the signal element value is 0 when not receiving the signal; Second closing discrimination element: digital external signal access, the logic is the command for the second main transformer electric quantity protection or non-electric quantity protection to start tripping the second main transformer fan side circuit breaker, the signal element value is 1 when receiving the signal, and the signal element value is 0 when not receiving the signal; The third closing judgment element: digital external signal access, the logic is the busbar protection action of the collector line busbar on the fan side of the first main transformer or the busbar protection action command of the collector line busbar on the fan side of the second main transformer and other blocking instructions. The value of the signal element is 1 when it is received, and the value of the signal element is 0 when it is not received; Fourth closing judgment element: digital external signal access, obtain the opening and closing status of the circuit breaker on the fan side of the first main transformer, the closing state element value is 1, and the opening state element value is 0; Fifth closing discrimination element: digital external signal access, obtain the closing and opening status of the circuit breaker on the fan side of the second main transformer, the closing state element value is 1, and the opening state element value is 0; The sixth closing judgment element: an analog sampling signal, sampling the effective value of the current transformer current on the fan side of the first main transformer, and assuming that the effective value of the current flows from the bus to the main transformer as positive; The seventh closing judgment element 7: analog sampling signal, sampling the effective value of the current transformer current on the fan side of the second main transformer, assuming that the effective value of the current flowing from the bus to the main transformer is positive; The eighth closing judgment element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the first main transformer; Ninth closing discrimination element: analog sampling signal, sampling the effective value of the fundamental voltage of the bus voltage transformer of the collector line on the fan side of the second main transformer; The loop logic setting module specifically sets the following two logics: Logic 1: The first main transformer fails and starts the sectional closing: If the value of the first closing discriminating element is 1, the value of the third closing discriminating element is 0, and the sampling current direction of the sixth closing discriminating element is positive, then the first preparatory closing starting state is entered; When in the first preparatory closing start state, when the value of the fourth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the sixth closing discriminating element is less than 0.1 times the rated current of the fan side of the first main transformer, and the effective value of the fundamental voltage of the ninth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the first main transformer does not exceed the limit, and the voltage transformer of the first main transformer does not have overvoltage and undervoltage, then enter the first main transformer fault start segmented closing start state; After entering the first main transformer fault start-up sectional closing start-up state, a closing command is sent to the connecting sectional circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the first main transformer; Logic 2: The second main transformer fault initiates the sectional closing: If the value of the second closing discriminating element is 1, and the value of the third closing discriminating element is 0, and the sampling current direction of the seventh closing discriminating element 7 is positive, then the second preparatory closing starting state is entered; When in the second preparatory closing start state, when the value of the fifth closing discriminating element changes from 1 to 0, and the effective value of the current sampled by the seventh closing discriminating element is less than 0.1 times the rated current of the fan side of the second main transformer, and the effective value of the fundamental voltage of the eighth closing discriminating element is greater than 0.9 times the rated voltage of the collector line bus, and the frequency of the collector line bus on the fan side of the second main transformer does not exceed the limit, and the voltage transformer of the second main transformer does not have overvoltage and undervoltage, then enter the second main transformer fault start segmented closing start state; After entering the second main transformer fault-started segmented closing start state, a closing command is sent to the connecting segmented circuit breaker between the collector line busbars on the fan side of the two main transformers, and a tripping command is sent to the circuit breaker on the fan side of the second main transformer.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the method according to any one of claims 1 to 4 is implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to any one of claims 1 to 4 is implemented.

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