Digital variable gain amplifier

Abstract

The invention belongs to the field of radio frequency integrated circuits, particularly relates to a digital variable gain amplifier, and aims to solve the problems that a traditional variable gain amplifier cannot achieve low additional phase shift and high gain precision at the same time and is large in area. The circuit comprises an input stage amplification circuit, a gain control circuit and an output balun, the input stage amplification circuit adopts an L-shaped matching structure, and provides gain through a common-emitter amplifier; the gain control circuit realizes a signal gain adjusting function through a numerical control current-steering array structure; and the output Balun converts the differential signal received from the gain control circuit into a single-ended signal, and simultaneously realizes output matching. The digital variable gain amplifier has the advantages of high gain precision, low additional phase shift and small area, and can promote a phased array system to develop towards the directions of high performance, miniaturization, low cost and high integration level.

Description

Technical Field

[0001] The invention belongs to the field of radio frequency integrated circuits, and in particular relates to a digital variable gain amplifier. Background Art

[0002] As one of the key active devices in the phased array T / R chip, the variable gain amplifier (VGA) realizes beam shaping by adjusting the amplitude of each antenna array, improving the signal-to-noise ratio of the receiving link and suppressing the side lobes of the transmitting link. The variable gain amplifier greatly affects the overall performance of the phased array system in the phased array system. In order to achieve high performance, miniaturization, low cost and high integration of the phased array system, the variable gain amplifier needs to develop in the direction of high gain accuracy, low additional phase shift, low power consumption and small area. Among them, the gain accuracy and additional phase shift of the variable gain amplifier directly affect the radar beamforming and direction finding accuracy, which is an important direction for the development of the variable gain amplifier.

[0003] Phased array T / R chip design processes mostly use III-V semiconductor (GaAs, InP, GaN) processes, but III-V semiconductor processes have high unit area costs and poor circuit integration. SiGe BiCMOS processes have the advantages of good high-frequency characteristics, mature processes, high integration, and low cost. Using them to design phased array variable gain amplifiers can achieve both high performance and low cost.

[0004] Currently, variable gain amplifiers in the RF band cannot achieve both low additional phase shift and high gain accuracy at the same time, and the chip area is large. How to reduce the additional phase shift while improving gain accuracy and reducing the area is the current design difficulty and focus of variable gain amplifiers. Summary of the invention

[0005] In order to solve the above problems in the prior art, namely, the conventional variable gain amplifier cannot achieve low additional phase shift and high gain accuracy at the same time and has a large area, the present invention provides a digital variable gain amplifier, the amplifier comprising an input stage amplification circuit, a gain control circuit and an output balun electrically connected in sequence;

[0006] The input stage amplifier circuit is used to obtain the differential RF input signal and perform preliminary gain;

[0007] The gain control circuit sets the gain of the differential RF input signal with a preliminary gain by setting a digitally controlled current steering array to obtain a set gain differential RF signal;

[0008] The output balun is used to convert the set gain differential radio frequency signal into a single-ended radio frequency signal and output it.

[0009] In some preferred embodiments, the input stage amplification circuit adopts an L-type matching structure and performs preliminary gain of the radio frequency input signal through a common-emitter amplifier.

[0010] In some preferred embodiments, the input stage amplifier circuit includes NPN transistor Q1, NPN transistor Q2, resistor R1, resistor R2, capacitor C1, capacitor C2 and inductor L1;

[0011] One end of the capacitor C1 and the capacitor C2 are respectively the Vinp end and the Vinn end of the RF input signal, and the other end is respectively connected to the base of the NPN transistor Q1 and the NPN transistor Q2;

[0012] The inductor L1 is connected between the bases of the NPN transistor Q1 and the NPN transistor Q2, and the center tap of the inductor L1 is connected to the bias signal Vb1;

[0013] One end of the resistor R1 and the resistor R2 are connected to the emitter of the NPN transistor Q1 and the NPN transistor Q2 respectively, and the other end is grounded;

[0014] The collectors of the NPN transistor Q1 and the NPN transistor Q2 output the I+ and I- ends of the differential RF input signal with preliminary gain.

[0015] In some preferred embodiments, the digitally controlled current steering array includes two digitally controlled current steering units;

[0016] The two digitally controlled current steering units respectively set the gain of the differential RF input signal with a preliminary gain under the control of the control signal VC1 and the control signal VC2.

[0017] In some preferred embodiments, one of the digitally controlled current steering units includes an NPN transistor Q3, an NPN transistor Q4, a resistor R3, a resistor R4, a capacitor C3, and a capacitor C4; another of the digitally controlled current steering units includes an NPN transistor Q5, an NPN transistor Q6, a resistor R5, a resistor R6, a capacitor C5, and a capacitor C6;

[0018] The I+ end of the differential RF input signal with preliminary gain reaches the emitters of NPN transistors Q3 and Q4 through resistors R3 and R4 respectively;

[0019] The I-end of the differential RF input signal with preliminary gain reaches the emitters of NPN transistors Q5 and Q6 through resistors R5 and R6 respectively;

[0020] The bases of NPN transistors Q3 and Q5 are connected to the control signal VC1; the bases of NPN transistors Q4 and Q6 are connected to the control signal VC2;

[0021] Capacitors C4, C5 and C6 are connected in series and connected between the collector of NPN transistor Q5 and the I+ terminal of the differential RF input signal of the initial gain; capacitors C3 and C6 are connected in series and connected between the collector of NPN transistor Q3 and the I- terminal of the differential RF input signal of the initial gain;

[0022] The collectors of the NPN transistor Q4 and the NPN transistor Q6 are connected to the bias signal Vb2, and the collectors of the NPN transistor Q3 and the NPN transistor Q5 output the Ioutp terminal and the Ioutn terminal of the set gain differential RF signal.

[0023] In some preferred embodiments, the control signal VC1 and the control signal VC2 are digital signals with the same value and opposite polarities.

[0024] In some preferred embodiments, the set gain, its gain step and gain adjustment range are determined by the resistance ratio of the two digitally controlled current steering units.

[0025] In some preferred embodiments, the output balun includes an inductor L2, an inductor L3, a capacitor C7, a capacitor C8 and a capacitor C9;

[0026] The inductor L2 and the inductor L3 are coupled to each other, and the inductor L2 is respectively connected to the Ioutp terminal and the Ioutn terminal of the set gain differential RF signal;

[0027] The center tap of the inductor L2 is connected to one end of the capacitor C9 and the bias signal Vb2, and the other end of the capacitor C9 is grounded;

[0028] One end of the capacitor C8 is connected to one end of the capacitor C7 and outputs a single-ended RF signal;

[0029] The other end of the capacitor C8 is grounded, the other end of the capacitor C7 is connected to one end of the inductor L3, and the other end of the inductor L3 is grounded.

[0030] In some preferred embodiments, the turns ratio of the inductor L2 and the inductor L3 is 1:2.

[0031] In some preferred embodiments, the output balun matches the output resistance to 50Ω without providing an additional output matching circuit.

[0032] Beneficial effects of the present invention:

[0033] (1) A digital variable gain amplifier of the present invention has a gain control circuit that adopts a designed digitally controlled current steering array structure and uses HBT tubes instead of MOS tubes. The circuit has good dB linearity and uniform gain steps.

[0034] (2) In a digital variable gain amplifier of the present invention, the HBT switch tube is directly controlled by a digital signal, and no additional digital-to-analog conversion circuit is required. The designed output balun has an impedance matching function, and no additional matching circuit is required. The circuit structure is simple, area is saved, and cost is reduced.

[0035] (3) A digital variable gain amplifier of the present invention, the gain step and gain adjustment range of the variable gain amplifier are determined by the resistance ratio of each unit in the digitally controlled current steering array, the gain step is accurate, and the resistance is insensitive to changes in temperature and voltage, the gain error is small, and the gain accuracy is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0037] Figure 1 It is a structural schematic diagram of a digital variable gain amplifier of the present invention;

[0038] Figure 2 It is a schematic diagram of the structure of an input stage amplifier circuit and a gain control circuit of a digital variable gain amplifier of the present invention;

[0039] Figure 3 It is a schematic diagram of the circuit structure of a single digitally controlled current steering unit in a gain control circuit of a digital variable gain amplifier of the present invention;

[0040] Figure 4 The present invention is a schematic diagram of an output balun equivalent circuit structure of a digital variable gain amplifier. DETAILED DESCRIPTION

[0041] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the relevant invention are shown in the accompanying drawings.

[0042] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0043] A digital variable gain amplifier of the present invention comprises an input stage amplifier circuit, a gain control circuit and an output balun which are electrically connected in sequence;

[0044] The input stage amplifier circuit is used to obtain the differential RF input signal and perform preliminary gain;

[0045] The gain control circuit sets the gain of the differential RF input signal with a preliminary gain by setting a digitally controlled current steering array to obtain a set gain differential RF signal;

[0046] The output balun is used to convert the set gain differential radio frequency signal into a single-ended radio frequency signal and output it.

[0047] In order to more clearly explain the digital variable gain amplifier of the present invention, Figure 1 Each module in the embodiment of the present invention is described in detail.

[0048] A digital variable gain amplifier of the present invention includes an input stage amplifier circuit 100, a gain control circuit 200 and an output balun 300, and each module is described in detail as follows:

[0049] The input stage amplifier circuit 100 adopts an L-type matching structure and performs preliminary gain of the RF input signal through a common-emitter amplifier.

[0050] like Figure 2 As shown, the input stage amplifier circuit 100 includes an NPN transistor Q1, an NPN transistor Q2, a resistor R1, a resistor R2, a capacitor C1, a capacitor C2 and an inductor L1;

[0051] One end of the capacitor C1 and the capacitor C2 are respectively the Vinp end and the Vinn end of the RF input signal, and the other end is respectively connected to the base of the NPN transistor Q1 and the NPN transistor Q2;

[0052] The inductor L1 is connected between the bases of the NPN transistor Q1 and the NPN transistor Q2, and the center tap of the inductor L1 is connected to the bias signal Vb1;

[0053] One end of the resistor R1 and the resistor R2 are connected to the emitter of the NPN transistor Q1 and the NPN transistor Q2 respectively, and the other end is grounded;

[0054] The collectors of the NPN transistor Q1 and the NPN transistor Q2 output the I+ and I- ends of the differential RF input signal with preliminary gain.

[0055] The input RF input signal is initially amplified by the common-emitter amplifier and then output to the gain control circuit 200 through the collectors of the NPN transistors Q1 and Q2.

[0056] The working principle of the input stage amplifier circuit 100 is as follows: the capacitors C1 and C2 play a role of blocking direct current and realize input impedance matching together with the inductor L1. The direct current bias Vb1 is transmitted to the base of the NPN transistor Q1 and the NPN transistor Q2 through the center tap of the inductor L1, and determines the static operating point of the NPN transistor Q1 and the NPN transistor Q2. The circuit amplifies the signal through the common emitter amplifier, and the gain of the circuit determines the maximum gain of the variable gain amplifier.

[0057] The gain control circuit 200 includes a digitally controlled current steering array, which is controlled by a control signal VC1, a control signal VC2 and a bias signal Vb2.

[0058] like Figure 3 As shown, the digitally controlled current steering array includes two digitally controlled current steering units, and the two digitally controlled current steering units respectively set the gain of the differential RF input signal with a preliminary gain under the control of a control signal VC1 and a control signal VC2.

[0059] The control signal VC1 and the control signal VC2 are digital signals with the same value and opposite polarities.

[0060] One of the digitally controlled current steering units includes an NPN transistor Q3, an NPN transistor Q4, a resistor R3, a resistor R4, a capacitor C3 and a capacitor C4; another of the digitally controlled current steering units includes an NPN transistor Q5, an NPN transistor Q6, a resistor R5, a resistor R6, a capacitor C5 and a capacitor C6;

[0061] The I+ end of the differential RF input signal with preliminary gain passes through resistor R3 and resistor R4 to reach the emitters of NPN transistor Q3 and NPN transistor Q4 respectively;

[0062] The I-end of the differential RF input signal with preliminary gain reaches the emitters of NPN transistors Q5 and Q6 through resistors R5 and R6 respectively;

[0063] The bases of NPN transistors Q3 and Q5 are connected to the control signal VC1; the bases of NPN transistors Q4 and Q6 are connected to the control signal VC2;

[0064] Capacitors C4, C5 and C6 are connected in series and connected between the collector of NPN transistor Q5 and the I+ terminal of the differential RF input signal of the initial gain; capacitors C3 and C6 are connected in series and connected between the collector of NPN transistor Q3 and the I- terminal of the differential RF input signal of the initial gain;

[0065] The collectors of the NPN transistor Q4 and the NPN transistor Q6 are connected to the bias signal Vb2, and the collectors of the NPN transistor Q3 and the NPN transistor Q5 output the Ioutp terminal and the Ioutn terminal of the set gain differential RF signal.

[0066] The working principle of the gain control circuit 200 is as follows: in a single digitally controlled current steering unit, the NPN transistors Q3 and Q5 are current steering tubes, and the NPN transistors Q4 and Q6 are discharge tubes. When the current steering tube is turned on, the discharge tube is turned off, and the input current flows into the load through the current steering tube; when the current steering tube is turned off, the discharge tube is turned on, and the input current is discharged to the ground through the discharge tube, and no current flows into the load. The four tubes of NPN transistor Q3, NPN transistor Q5, NPN transistor Q4, and NPN transistor Q6 form a group, and the structure has a total of 18 groups. By selecting the number of branches connected to the load, the size of the current flowing into the load is changed, thereby changing the gain, including a group in which the current steering tube is normally open and the discharge tube is normally closed. Capacitors C3, C4, C5, and C6 are cross-coupling capacitors, which play a role in reducing additional phase shift.

[0067] The gain is set, and its gain step and gain adjustment range are determined by the resistance ratio of the two digitally controlled current steering units.

[0068] The HBT switch tube designed in the gain control circuit 200 is directly controlled by a digital signal, and no additional digital-to-analog conversion circuit is required; the step and gain adjustment range of the variable gain amplifier is adjusted by changing the resistance ratio of each digitally controlled current steering unit. The specific ratio relationship is as follows:

[0069]

[0070] Where x is the number of current-conducting steering tubes, R 18 is the resistance value corresponding to the normally open current steering tube, A I is the current gain of the circuit, I in is the input current, I out is the output current.

[0071] The control word VC1 ranges from 0 0000 to 1 0001, with a total of 18 states. When the control word is 0 0000, all current steering tubes except the normally open current steering tube are disconnected, and the gain is minimum at this time. When the control word increases by 1, one more current steering tube is turned on, and the gain increases by 1dB. When the control word is 1 0001, all current steering tubes are turned on, and the gain is maximum at this time. The maximum gain is the same as the gain of the input stage amplifier circuit 100. The control word VC2 is opposite to the control word VC1.

[0072] like Figure 4 As shown, the output balun includes an inductor L2, an inductor L3, a capacitor C7, a capacitor C8 and a capacitor C9;

[0073] The inductor L2 and the inductor L3 are coupled to each other, and the inductor L2 is respectively connected to the Ioutp terminal and the Ioutn terminal of the set gain differential RF signal;

[0074] The center tap of the inductor L2 is connected to one end of the capacitor C9 and the bias signal Vb2, and the other end of the capacitor C9 is grounded;

[0075] One end of the capacitor C8 is connected to one end of the capacitor C7 and outputs a single-ended RF signal;

[0076] The other end of the capacitor C8 is grounded, the other end of the capacitor C7 is connected to one end of the inductor L3, and the other end of the inductor L3 is grounded.

[0077] The working principle of the output balun 300 is as follows: the differential RF signal is converted into a single-ended RF signal after passing through the inductors L2 and L3; the inductors L2, L3 and their mutual inductance together with the capacitors C7 and C8 realize output matching, and the capacitor C7 plays a DC isolation role; the center tap of the inductor L2 is connected to the capacitor C9 and then grounded to ensure the amplitude and phase consistency of the balun; the bias signal Vb2 is input from the center tap of the inductor L2 and one end of the inductor L3 to provide a DC bias for the transistor in the variable gain control circuit 200. The transformer-type balun itself has a DC isolation characteristic, so a DC bias can be provided through the center tap. This structure directly realizes output matching and matches the output resistance to 50Ω without the need for an additional output matching circuit.

[0078] In one embodiment of the present invention, the turns ratio of the inductor L2 and the inductor L3 in the output balun 300 is 1:2, the outer diameter is 100 μm, the line width is 6 μm, and the line spacing is 2 μm; at a frequency of 28 GHz, the self-inductance Lp is 171 pH, the self-inductance Ls is 587 pH, and the mutual inductance M is 216 pH.

[0079] The digital variable gain amplifier implemented by the present invention operates in the frequency range of 24-29.5GHz, achieves 1dB stepping, the maximum gain is greater than 9dB, the gain fluctuation is less than ±0.5dB, the gain error is less than 0.1dB, and the additional phase shift is less than ±3°. The circuit of the present invention can operate in the temperature range of -55℃ to 125℃, and the maximum gain is greater than 9dB, the gain fluctuation is less than ±0.5dB, the gain error is less than 0.1dB, and the stability satisfies K greater than 1.

[0080] It should be noted that the digital variable gain amplifier provided in the above embodiment is only illustrated by the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the modules or steps in the embodiments of the present invention can be decomposed or combined. For example, the modules in the above embodiment can be combined into one module, or further divided into multiple sub-modules to complete all or part of the functions described above. The names of the modules and steps involved in the embodiments of the present invention are only for distinguishing the modules or steps, and are not regarded as improper limitations of the present invention.

[0081] The terms "first", "second", etc. are used to distinguish similar objects rather than to describe or indicate a particular order or sequence.

[0082] The term "comprise" or any other similar term is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus / device that includes a list of elements includes not only those elements but also other elements not expressly listed, or also includes elements inherent to such process, method, article, or apparatus / device.

[0083] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A digital variable gain amplifier, characterized in that: The amplifier includes an input stage amplification circuit, a gain control circuit and an output balun electrically connected in sequence; The input stage amplifier circuit is used to obtain the differential RF input signal and perform preliminary gain; The gain control circuit sets the gain of the differential RF input signal with a preliminary gain by setting a digitally controlled current steering array to obtain a set gain differential RF signal; The output balun is used to convert the set gain differential radio frequency signal into a single-ended radio frequency signal and output it.

2. A digital variable gain amplifier according to claim 1, characterized in that: The input stage amplifier circuit adopts an L-type matching structure and performs preliminary gain of the radio frequency input signal through a common-emitter amplifier.

3. A digital variable gain amplifier according to claim 2, characterized in that: The input stage amplifier circuit includes NPN transistor Q1, NPN transistor Q2, resistor R1, resistor R2, capacitor C1, capacitor C2 and inductor L1; One end of the capacitor C1 and the capacitor C2 are respectively the Vinp end and the Vinn end of the RF input signal, and the other end is respectively connected to the base of the NPN transistor Q1 and the NPN transistor Q2; The inductor L1 is connected between the bases of the NPN transistor Q1 and the NPN transistor Q2, and the center tap of the inductor L1 is connected to the bias signal Vb1; One end of the resistor R1 and the resistor R2 are connected to the emitter of the NPN transistor Q1 and the NPN transistor Q2 respectively, and the other end is grounded; The collectors of the NPN transistor Q1 and the NPN transistor Q2 output the I+ and I- ends of the differential RF input signal with preliminary gain.

4. A digital variable gain amplifier according to claim 1, characterized in that: The digitally controlled current steering array comprises two digitally controlled current steering units; The two digitally controlled current steering units respectively set the gain of the differential RF input signal with a preliminary gain under the control of the control signal VC1 and the control signal VC2.

5. A digital variable gain amplifier according to claim 4, characterized in that: One of the digitally controlled current steering units includes an NPN transistor Q3, an NPN transistor Q4, a resistor R3, a resistor R4, a capacitor C3 and a capacitor C4; another of the digitally controlled current steering units includes an NPN transistor Q5, an NPN transistor Q6, a resistor R5, a resistor R6, a capacitor C5 and a capacitor C6; The I+ end of the differential RF input signal with preliminary gain passes through resistor R3 and resistor R4 to reach the emitters of NPN transistor Q3 and NPN transistor Q4 respectively; The I-end of the differential RF input signal with preliminary gain reaches the emitters of NPN transistors Q5 and Q6 through resistors R5 and R6 respectively; The bases of NPN transistors Q3 and Q5 are connected to the control signal VC1; the bases of NPN transistors Q4 and Q6 are connected to the control signal VC2; Capacitors C4, C5 and C6 are connected in series and connected between the collector of NPN transistor Q5 and the I+ terminal of the differential RF input signal of the initial gain; capacitors C3 and C6 are connected in series and connected between the collector of NPN transistor Q3 and the I- terminal of the differential RF input signal of the initial gain; The collectors of the NPN transistor Q4 and the NPN transistor Q6 are connected to the bias signal Vb2, and the collectors of the NPN transistor Q3 and the NPN transistor Q5 output the Ioutp terminal and the Ioutn terminal of the set gain differential RF signal.

6. A digital variable gain amplifier according to claim 4 or 5, characterized in that: The control signal VC1 and the control signal VC2 are digital signals with the same value and opposite polarities.

7. A digital variable gain amplifier according to claim 6, characterized in that: The set gain, its gain step and gain adjustment range are determined by the resistance ratio of the two digitally controlled current steering units.

8. A digital variable gain amplifier according to claim 6, characterized in that: The output balun includes an inductor L2, an inductor L3, a capacitor C7, a capacitor C8 and a capacitor C9; The inductor L2 and the inductor L3 are coupled to each other, and the inductor L2 is respectively connected to the Ioutp terminal and the Ioutn terminal of the set gain differential RF signal; The center tap of the inductor L2 is connected to one end of the capacitor C9 and the bias signal Vb2, and the other end of the capacitor C9 is grounded; One end of the capacitor C8 is connected to one end of the capacitor C7 and outputs a single-ended RF signal; The other end of the capacitor C8 is grounded, the other end of the capacitor C7 is connected to one end of the inductor L3, and the other end of the inductor L3 is grounded.

9. A digital variable gain amplifier according to claim 8, characterized in that: The turns ratio of the inductor L2 and the inductor L3 is 1:

2.

10. A digital variable gain amplifier according to claim 9, characterized in that: The output balun matches the output resistance to 50Ω without setting an additional output matching circuit.

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