Switch trigger capable of suppressing surge current

By adopting a precharge circuit structure in switch control, the heat loss and switch damage caused by surge current suppression in traditional methods are solved, and zero voltage switching and short circuit protection are achieved, which improves system efficiency and reliability.

CN119496491APending Publication Date: 2025-02-21DELTA ELECTRONICS INC(CN)
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Patent Information

Application Number
CN202311044893.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-18
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

Traditional switching control methods, when suppressing surge current, cause the switching element to suffer more heat loss, reduce efficiency, and may lead to problems such as damage to the switch and inability to turn off immediately.

Method used

By reducing the voltage change when the switch is turned on, the pre-charge circuit structure includes a first switch, a bypass resistor, an output capacitor, a diode, a second switch and a discharge resistor, and zero voltage switching and short circuit protection are achieved.

Benefits of technology

Effectively suppress surge current, reduce switching losses, avoid efficiency reduction and switch damage, and achieve instant protection and stable output.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a switch trigger. The switch trigger comprises an input end, an output end, a first switch, a bypass resistor, an output capacitor, a diode, a second switch, a discharge resistor and two divider resistors. The first end and the second end of the first switch are electrically connected to the input end and the output end respectively. The two ends of the bypass resistor are electrically connected to the input end and the output end respectively. Two ends of the output capacitor are electrically connected with the output end and the grounding end respectively. The anode of the diode is electrically connected to the input end. The first end and the second end of the second switch are electrically connected to the cathode of the diode and the third end of the first switch respectively. The two ends of the discharge resistor are electrically connected to the third end of the first switch and the grounding end respectively. The two divider resistors are connected in series between the output end and the grounding end, and a connection point between the two divider resistors is electrically connected to the third end of the second switch.
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Description

Technical Field

[0001] This case relates to a switch trigger, and in particular to a switch trigger capable of suppressing surge current. Background Art

[0002] The traditional switch control method suppresses the inrush current by slow-starting the switch. However, due to the extended on-time of the switch, the switch element must bear more heat loss, which not only reduces efficiency but also makes the switch more susceptible to damage. In addition, when the on-time of the switch is extended, the off-time of the switch also increases. Therefore, when the system triggers the protection mechanism, the longer off-time will make it impossible for the switch to be turned off immediately and achieve protection immediately.

[0003] Therefore, how to invent a switch trigger that can improve the above-mentioned prior art is an urgent need. Summary of the invention

[0004] The purpose of this case is to provide a switch trigger that reduces the voltage change when the switch is turned on by precharging, thereby suppressing the inrush current, while avoiding the problems of reduced efficiency, switch damage, and failure to turn off immediately when the protection is triggered due to the increase in the on and off time of the switch in the traditional method. In addition, the switch trigger of this case can achieve zero voltage switching and has short-circuit protection function.

[0005] To achieve the above-mentioned purpose, the present invention provides a switch trigger, comprising an input terminal, an output terminal, a first switch, a bypass resistor, an output capacitor, a diode, a second switch, a discharge resistor, a first voltage-dividing resistor and a second voltage-dividing resistor. The first end and the second end of the first switch are electrically connected to the input terminal and the output terminal, respectively. The two ends of the bypass resistor are electrically connected to the input terminal and the output terminal, respectively. The two ends of the output capacitor are electrically connected to the output terminal and the ground terminal, respectively. The anode of the diode is electrically connected to the input terminal. The first end and the second end of the second switch are electrically connected to the cathode of the diode and the third end of the first switch, respectively. The two ends of the discharge resistor are electrically connected to the third end of the first switch and the ground terminal, respectively. The first voltage-dividing resistor and the second voltage-dividing resistor are connected in series between the output terminal and the ground terminal, wherein the connection point between the first voltage-dividing resistor and the second voltage-dividing resistor is electrically connected to the third end of the second switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a schematic diagram of the circuit structure of a switch trigger according to the first embodiment of the present invention;

[0007] Figure 2 is a schematic diagram of the circuit structure of a switch trigger according to the second embodiment of the present case;

[0008] Figure 3A and Figure 3B exemplify Figure 1The key voltage and current waveforms of the switch trigger when achieving inrush current suppression;

[0009] Figure 4A and Figure 4B exemplify Figure 1 The key voltage and current waveforms when the switch trigger of the first switch turns on the first switch in advance in response to the operation of the subsequent converter;

[0010] Figure 5A and Figure 5B exemplify Figure 1 The switch trigger realizes the key voltage and current waveform of short-circuit protection when the output is short-circuited.

[0011] Description of Figure Numbers:

[0012] 1: Switch trigger

[0013] 11: Input terminal

[0014] 12: Output terminal

[0015] Q1: First switch

[0016] R1: bypass resistor

[0017] Co: output capacitance

[0018] D: diode

[0019] Q2, Q3: Second switch

[0020] R2: Discharge resistor

[0021] R3: The first voltage divider resistor

[0022] R4: The second voltage divider resistor

[0023] Cin: input capacitance

[0024] 13: Post-stage detection circuit

[0025] Vin: input voltage

[0026] Vo: output voltage

[0027] C1: Detection capacitor

[0028] R5: Detection resistor

[0029] 14: Detection end

[0030] V2nd: post-stage voltage

[0031] Vg, Vsen: voltage

[0032] Iin, I1, Io: current DETAILED DESCRIPTION

[0033] Some typical embodiments that embody the features and advantages of the present invention will be described in detail in the following description. It should be understood that the present invention can have various variations in different embodiments without departing from the scope of the present invention.

[0034] Figure 1 FIG. 1 is a schematic diagram of the circuit structure of a switch trigger according to the first embodiment of the present invention. Figure 1 As shown, the switch trigger 1 includes an input terminal 11, an output terminal 12, a first switch Q1, a bypass resistor R1, an output capacitor Co, a diode D, a second switch Q2, a discharge resistor R2, a first voltage-dividing resistor R3, a second voltage-dividing resistor R4, an input capacitor Cin and a post-stage detection circuit 13. The first voltage-dividing resistor R3 and the second voltage-dividing resistor R4 form a voltage divider.

[0035] In terms of structure, the input terminal 11 is configured to receive an input voltage Vin, and the output terminal 12 is configured to provide an output voltage Vo. The first terminal and the second terminal of the first switch Q1 are electrically connected to the input terminal 11 and the output terminal 12, respectively. The two ends of the bypass resistor R1 are electrically connected to the input terminal 11 and the output terminal 12, respectively. The two ends of the output capacitor Co are electrically connected to the output terminal 12 and the ground, respectively. The anode of the diode D is electrically connected to the input terminal 11 and is configured to prevent current backflow. The first terminal and the second end of the second switch Q2 are electrically connected to the cathode of the diode D and the third end of the first switch Q1, respectively. The two ends of the discharge resistor R2 are electrically connected to the third end of the first switch Q1 and the ground, respectively. The first voltage-dividing resistor R3 and the second voltage-dividing resistor R4 are connected in series between the output terminal 12 and the ground, wherein the first voltage-dividing resistor R3 and the second voltage-dividing resistor R4 are coupled to the output terminal 12 and the ground, respectively, and the connection point between the first voltage-dividing resistor R3 and the second voltage-dividing resistor R4 is electrically connected to the third end of the second switch Q2. Two ends of the input capacitor Cin are electrically connected to the input terminal 11 and the ground terminal respectively, and are configured for decoupling.

[0036] In operation, when the power is just turned on, the first switch Q1 is turned off, and the input voltage Vin charges the output capacitor Co through the bypass resistor R1 to gradually increase the output voltage Vo of the output terminal 12; at the same time, the second switch Q2 is turned on, so that the input voltage Vin generates a voltage Vg on the discharge resistor R2. Then, the first voltage-dividing resistor R3 and the second voltage-dividing resistor R4 divide the output voltage Vo to generate a voltage Vsen; when the voltage Vsen rises to a threshold value and is sufficient to turn off the second switch Q2, the voltage Vg is discharged to the ground through the discharge resistor R2, turning on the first switch Q1. Therefore, when the first switch Q1 is turned on, the input voltage Vin is transmitted to the output terminal 12 as the output voltage Vo.

[0037] It is worth noting that, since the voltage of the output terminal 12 has been increased by charging the output capacitor Co through the bypass resistor R1, when the first switch Q1 is turned on, the voltage difference between the input terminal 11 and the output terminal 12 has been reduced, so that the surge current caused by the large voltage difference can be avoided. In addition, when the voltage of the output terminal 12 is gradually increased, the voltage of the second terminal of the first switch Q1 is also gradually increased, so when the first switch Q1 is turned on, the voltage difference between the first terminal and the second terminal of the first switch Q1 has been reduced, which can effectively suppress the surge current and avoid the electromotive force generated by Faraday's law of electromagnetic induction from damaging the body diode of the first switch Q1.

[0038] The switch trigger 1 further includes a post-stage detection circuit 13, which is electrically connected to the voltage divider and configured to provide a post-stage voltage V2nd to a voltage Vsen to adjust the conduction time of the first switch Q1. The post-stage detection circuit 13 includes a detection capacitor C1, a detection resistor R5 and a detection terminal 14. The two ends of the detection capacitor C1 are electrically connected to the third end of the second switch Q2 and the detection terminal 14, respectively. The two ends of the detection resistor R5 are electrically connected to the detection terminal 14 and the ground terminal, respectively. The detection terminal 14 is configured to detect the output of the post-stage power supply. For example, when the output terminal 12 is electrically connected to a post-stage converter (not shown), the post-stage converter converts the output voltage Vo provided by the output terminal 12 of the switch trigger 1 into a post-stage voltage V2nd. The detection terminal 14 is electrically connected to the post-stage voltage V2nd to thereby detect the output of the post-stage converter. The post-stage voltage V2nd generates an instantaneous voltage change on the detection capacitor C1, which simultaneously changes the voltage Vsen, so that the second switch Q2 is turned off early, thereby turning on the first switch Q1 early.

[0039] In a multi-stage power conversion system, a switch trigger can be set in the first-stage power protector to avoid surge current when the power supply is powered on. In order to speed up the power-on speed of the entire system, when the output voltage Vo reaches the reference voltage (e.g., 80% or 90% of the input voltage Vin), the subsequent converter will draw the output voltage Vo for voltage conversion. Therefore, it is necessary to turn on the first switch Q1 in advance to provide sufficient output voltage Vo to cooperate with the operation of the subsequent converter.

[0040] In the first embodiment, the first switch Q1 may be a P-type MOSFET (metal oxide semiconductor field effect transistor), and the first end, the second end and the third end of the first switch Q1 are the source, the drain and the gate, respectively. The second switch Q2 may be a P-type BJT (bipolar junction transistor), and the first end, the second end and the third end of the second switch Q2 are the emitter, the collector and the base, respectively.

[0041] Figure 2 FIG. 4 is a schematic diagram of the circuit structure of a switch trigger according to the second embodiment of the present invention. Figure 2 The second switch Q3 can be replaced by Figure 1 The second switch Q2 is a P-type MOSFET, and the first end, the second end and the third end of the second switch Q3 are a source, a drain and a gate respectively.

[0042] See also Figure 1 , Figure 3A and Figure 3B ,in Figure 3A and Figure 3B exemplify Figure 1 The key voltage and current waveforms of the switch trigger 1 when achieving inrush current suppression. Figure 3A In the figure, Vg is the voltage on the third terminal of the first switch Q1, and Vsen is the voltage on the third terminal of the second switch Q2; Figure 3B In FIG. 1 , Iin, I1 and Io are currents flowing through the first switch Q1, the bypass resistor R1 and the output capacitor Co respectively. Figure 1 , Figure 3A and Figure 3B As shown, when the input terminal 11 starts to receive the input voltage Vin (i.e., when the input voltage Vin rises), the input voltage Vin is provided to the second switch Q2 via the diode D, and the second switch Q2 is in the on state, so that the voltage Vg on the third terminal of the first switch Q1 is at a high level, and the first switch Q1 is in the off state. At this time, the input voltage Vin charges the output capacitor Co via the bypass resistor R1, so that the output voltage Vo on the output capacitor Co gradually rises. When the output voltage Vo is lower than the threshold voltage, the first switch Q1 is maintained in the off state, the second switch Q2 is maintained in the on state, the output capacitor Co is continuously charged, and the output voltage Vo gradually rises. When the output voltage Vo rises to the threshold voltage, the second switch Q2 is turned off, and the voltage Vg on the third terminal of the first switch Q1 is discharged through the discharge resistor R2 and drops to zero, so that the first switch Q1 is turned on, and the input voltage Vin is provided to the output terminal 12 via the first switch Q1. It should be noted that those skilled in the art can select the resistance of the first voltage-dividing resistor R3 and the second voltage-dividing resistor R4 according to the application requirements, and can determine the time point when the second switch Q2 is turned off by changing the resistance of the first voltage-dividing resistor R3 and the second voltage-dividing resistor R4. In addition, in this embodiment, the subsequent converter does not operate, so the subsequent voltage V2nd is fixed to zero.

[0043] Thus, the first switch Q1 can be turned on at zero voltage, reducing the switching loss. Furthermore, since the output voltage Vo is already at a higher level when the first switch Q1 is turned on, the voltage variation can be reduced and the surge current can be reduced, thereby achieving surge current suppression.

[0044] See also Figure 1 , Figure 4A and Figure 4B ,in Figure 4A and Figure 4B exemplify Figure 1 The key voltage and current waveforms when the switch trigger 1 turns on the first switch Q1 in advance in response to the operation of the subsequent converter. Figure 1 , Figure 4A and Figure 4B As shown, when the input terminal 11 starts to receive the input voltage Vin (i.e., when the input voltage Vin rises), the second switch Q2 is in the on state, the first switch Q1 is in the off state, and the input voltage Vin charges the output capacitor Co via the bypass resistor R1, so that the output voltage Vo on the output capacitor Co gradually rises. When the output voltage Vo rises to the reference voltage, the post-stage converter converts the output voltage Vo into a post-stage voltage V2nd, and the post-stage voltage V2nd is transmitted to the third end of the second switch Q2 via the post-stage detection circuit 13, thereby increasing the voltage Vsen on the third end of the second switch Q2 and triggering the second switch Q2 to turn off. Then, the voltage Vg on the third end of the first switch Q1 is discharged through the discharge resistor R2 and drops to zero, turning on the first switch Q1, and the input voltage Vin is provided to the output terminal 12 via the first switch Q1. Generally speaking, the reference voltage is lower than the threshold voltage, so compared to Figure 3A and Figure 3B In the embodiment shown, the second switch Q2 in this embodiment is turned off in advance in response to the operation of the subsequent converter, thereby turning on the first switch Q1 in advance to provide power to the subsequent converter via the first switch Q1, so that the subsequent converter can maintain a stable output. The reference voltage can be, for example but not limited to, 80% or 90% of the input voltage Vin.

[0045] See also Figure 1 , Figure 5A and Figure 5B ,in Figure 5A and Figure 5B exemplify Figure 1 The key voltage and current waveforms of the switch trigger 1 to achieve short-circuit protection when the output is short-circuited. Figure 1 , Figure 5A and Figure 5B As shown, when the input terminal 11 receives the input voltage Vin and the output terminal 12 is short-circuited to the ground, the output voltage Vo is zero, the second switch Q2 is maintained in the on state, and the voltage Vg on the third terminal of the first switch Q1 is maintained at a high level, so the first switch Q1 is maintained in the off state and will not be triggered to turn on, thereby achieving short-circuit protection.

[0046] In summary, the present invention provides a switch trigger that reduces the voltage change when the switch is turned on by precharging, thereby suppressing the inrush current, while avoiding the problems of reduced efficiency, switch damage, and failure to turn off immediately when the protection is triggered due to increasing the on and off time of the switch in the traditional method. In addition, the switch trigger of the present invention can achieve zero voltage switching and has a short-circuit protection function, and can ensure the output stability of the subsequent converter.

[0047] It should be noted that the above are only preferred embodiments for illustrating the present invention, and the present invention is not limited to the embodiments described. The scope of the present invention is determined by the scope of the appended claims. Moreover, the present invention may be modified in various ways by those skilled in the art, but all of them are within the scope of the appended claims.

Claims

1. A switch trigger, comprising: Input and output terminals; A first switch, a first end and a second end of which are electrically connected to the input end and the output end respectively; A bypass resistor, two ends of which are electrically connected to the input end and the output end respectively; An output capacitor, two ends of which are electrically connected to the output terminal and the ground terminal respectively; a diode, an anode of which is electrically connected to the input terminal; a second switch, wherein a first end and a second end thereof are electrically connected to a cathode of the diode and a third end of the first switch respectively; a discharge resistor, two ends of which are electrically connected to the third end of the first switch and the ground end respectively; and The first voltage-dividing resistor and the second voltage-dividing resistor are connected in series between the output terminal and the ground terminal, wherein a connection point between the first voltage-dividing resistor and the second voltage-dividing resistor is electrically connected to a third terminal of the second switch.

2. The switch trigger according to claim 1, wherein when the input terminal receives an input voltage, the first switch is in an off state, the second switch is in an on state, and the input voltage charges the output capacitor via the bypass resistor, causing the output voltage on the output capacitor to rise.

3. A switch trigger according to claim 2, wherein when the output voltage rises to a threshold voltage, the second switch is turned off, the voltage on the third end of the first switch is discharged through the discharge resistor and drops to zero, so that the first switch is turned on, and the input voltage is provided to the output end through the first switch.

4. The switch trigger according to claim 1 further comprises a post-stage detection circuit, comprising: A detection terminal electrically connected to a subsequent voltage, wherein the output terminal is electrically connected to a subsequent converter, and the subsequent converter is configured to convert the output voltage provided by the output terminal into the subsequent voltage; a detection capacitor, two ends of which are electrically connected to the third end of the second switch and the detection end respectively; and The detection resistor has two ends electrically connected to the detection end and the ground end respectively.

5. A switch trigger according to claim 4, wherein when the input terminal receives an input voltage, the first switch is in an off state, the second switch is in an on state, and the input voltage charges the output capacitor via the bypass resistor, so that the output voltage on the output capacitor increases.

6. A switch trigger according to claim 5, wherein when the output voltage rises to the reference voltage, the post-stage converter converts the output voltage into the post-stage voltage, the post-stage voltage triggers the second switch to turn off via the post-stage detection circuit, and the voltage on the third end of the first switch is discharged via the discharge resistor and drops to zero, so that the first switch is turned on, and the input voltage is provided to the output end via the first switch. 7 . The switch trigger according to claim 6 , wherein the reference voltage is 80% or 90% of the input voltage.

8. The switch trigger according to claim 5, wherein the post-stage voltage generates a momentary voltage on the detection capacitor, and the momentary voltage changes the voltage on the third end of the second switch, so that the second switch is turned off early, thereby turning on the first switch early. 9 . The switch trigger according to claim 1 , wherein the resistance value of the first voltage-dividing resistor and the resistance value of the second voltage-dividing resistor are optional and are used to determine a time point when the second switch is turned off. 10 . The switch trigger according to claim 1 , wherein the first switch is a P-type metal oxide semiconductor field effect transistor, and the first end, the second end, and the third end of the first switch are a source, a drain, and a gate, respectively.

11. The switch trigger according to claim 1, wherein the second switch is a bipolar junction transistor, and the first end, the second end and the third end of the second switch are an emitter, a collector and a base, respectively. 12 . The switch trigger according to claim 1 , wherein the second switch is a P-type metal oxide semiconductor field effect transistor, and the first end, the second end and the third end of the second switch are a source, a drain and a gate, respectively. 13 . The switch trigger according to claim 1 , further comprising an input capacitor, wherein two ends of the input capacitor are electrically connected to the input terminal and the ground terminal respectively and are configured to perform decoupling.

14. A switch trigger according to claim 1, wherein when the input terminal receives an input voltage and the output terminal is short-circuited to the ground terminal, the output voltage is zero, the second switch is maintained in an on state, the voltage on the third terminal of the first switch is maintained at a high level, and the first switch is maintained in an off state.