Memory system, operating method, and electronic device

Abstract

The embodiment of the invention discloses a storage system, an operation method and electronic equipment, and relates to but not limited to the technical field of semiconductors. The storage system includes a memory and a controller coupled to each other, the memory including a first storage space and a second storage space, the access rate of the first storage space being greater than the access rate of the second storage space. The controller is configured to control the memory to write first data in the second storage space into the first storage space, wherein the first data is hot data stored in the second storage space. Therefore, the data reading rate of the memory can be improved.

Description

Technical Field

[0001] The embodiments of the present application relate to but are not limited to the field of semiconductor technology, and in particular to a storage system, an operating method, and an electronic device. Background Art

[0002] With the development of flash memory, the number of bits of storage cells has increased from 1 bit to 2 bits, 3 bits, and 4 bits. Correspondingly, the storage cells have evolved from single-level cells (SLC) to multiple-level cells (MLC), triple-level cells (TLC), and quad-level cells (QLC). Correspondingly, the storage states in the memory have increased from 2 to 4, 8, and 16. Summary of the invention

[0003] The present application provides a storage system, an operation method and an electronic device, which solve the problem of slow memory data reading rate.

[0004] In order to achieve the above objectives, this application adopts the following technical solutions:

[0005] In a first aspect, a storage system is provided, the storage system comprising a memory and a controller. The memory comprises a first storage space and a second storage space, the access rate of the first storage space is greater than the access rate of the second storage space. The controller is coupled to the memory and configured to: control the memory to write first data in the second storage space into the first storage space, the first data being hot data stored in the second storage space.

[0006] In the above technical solution, the second storage space stores multiple data, which may include hot data, and the access rate of the second storage space is relatively slow. The hot data (such as the first data) in the second storage space is migrated to the first storage space with a faster access rate. When the host coupled to the storage system reads the hot data, it can read from the first storage space with a faster access rate instead of reading from the second storage space with a slower access rate. In this way, the reading rate of hot data can be increased, the application access performance can be improved, and the reading time can be reduced.

[0007] In a possible implementation of the first aspect, the controller is further configured to: determine that the first data is hot data according to the reading frequency of the first data in the second storage space. In the above possible implementation, the criterion for the first data to be hot data may be: the reading frequency of the first data is greater than or equal to the specified frequency. In this way, data with a higher reading frequency can be read from the first storage space with a faster access rate. Since the reading operations of data with a higher reading frequency account for the majority of the overall reading operations, the data reading rate can be improved as a whole, the application access performance can be improved, and the reading time can be reduced.

[0008] In a possible implementation of the first aspect, the controller is further configured to: when the available space capacity of the first storage space is less than the specified capacity, control the memory to write data in the first storage space whose reading frequency is less than the specified frequency into the second storage space. In the above possible implementation, the data written from the second storage space to the first storage space is hot data when it is just written, but may no longer be hot data after a period of time. If the first storage space continues to receive hot data from the second storage space, the capacity of the first storage space may be insufficient. When the available space capacity of the first storage space is less than the specified capacity, the data in the first storage space whose reading frequency is less than the specified frequency is written into the second storage space, and the data in the first storage space other than the hot data can be written into the second storage space, saving the capacity of the first storage space.

[0009] In a possible implementation of the first aspect, the first data is data of a specified data type. In the above possible implementation, the criterion for the first data to be hot data may be: the first data is data of a specified data type. In this way, the data of the specified data type can be read from the first storage space with a faster access rate, thereby improving the reading rate of the data of the specified data type, improving the application access performance, and reducing the reading time.

[0010] In a possible implementation of the first aspect, the controller is further configured to: detect the frequency of reading data in the second storage space in units of a preset number of logical block addresses to determine the first data. In the above possible implementation, the controller may detect the frequency of reading data in the second storage space in units of a preset number of logical block addresses to determine the first data. In this way, on the one hand, by detecting in units of a preset number of logical block addresses rather than in units of a single logical block address, hot data can be determined with a larger granularity, reducing the number of calculations and improving firmware performance. On the other hand, by dividing the units by logical addresses, it is possible to align with the commands of the front-end components such as the host, making it easier to divide the units and determine the first data.

[0011] In a possible implementation of the first aspect, the first storage space includes a first storage area, and the first storage area is used to store hot data from the second storage space. In the above possible implementation, the first storage area is set in the first storage space to store the hot data from the second storage space, and the hot data from the second storage space and other data (such as data from the host) can be stored separately for easy management.

[0012] In a possible implementation of the first aspect, the first storage space corresponds to a plurality of first storage units, the second storage space corresponds to a plurality of second storage units, and the number of bits stored in the first storage unit is less than the number of bits stored in the second storage unit. In the above possible implementation, the number of bits stored in the first storage unit corresponding to the first storage space is less than the number of bits corresponding to the second storage unit corresponding to the second storage space, the storage state corresponding to the first storage space is less than the storage state corresponding to the second storage space, and the voltage control of the storage unit corresponding to the first storage space when accessing data is simpler, so the access rate of the first storage space is greater than the access rate of the second storage space. In this way, a basis is provided for improving the reading rate of hot data, improving application access performance, and reducing reading time.

[0013] In a possible implementation of the first aspect, the controller is further configured to: when the available space capacity of the first storage space is less than the specified capacity, allocate the available physical storage block to the first storage space. In the above possible implementation, if the available space capacity of the first storage space is insufficient, the controller allocates the available physical storage block to the first storage space. In this way, the size of the first storage space can be dynamically adjusted to avoid insufficient capacity of the first storage space.

[0014] In a possible implementation of the first aspect, after the first data in the second storage space is written into the first storage space, the controller is configured to: control the memory to erase the first data in the second storage space. In the above possible implementation, after the first data in the second storage space is written into the first storage space, the first data in the second storage space is erased. In this way, the capacity of the second storage space can be saved.

[0015] In a possible implementation of the first aspect, the controller is further configured to: receive a read command from the host for the first data in the second storage space. In response to the read command, record the number of reads, read time, or read frequency of the first data. In the above possible implementation, the controller records the number of reads, read time, or read frequency of the first data through the read command for the first data on the host side. In this way, the reading frequency of the first data in the second storage space can be obtained, and based on the reading frequency of the first data, the first data is determined to be hot data, providing a basis for increasing the reading rate of hot data, improving application access performance, and reducing reading time.

[0016] In a second aspect, a method for operating a storage system is provided, the method comprising: determining that first data stored in a second storage space is hot data, and writing the first data stored in the second storage space into the first storage space, wherein an access rate of the first storage space is greater than an access rate of the second storage space.

[0017] In the above technical solution, the first data stored in the second storage space is determined to be hot data, and the first data stored in the storage space with a slower access rate is migrated to the storage space with a faster access rate, and the first data is hot data. In this way, the reading rate of hot data can be increased, the application access performance can be improved, and the reading time can be reduced.

[0018] In a possible implementation of the second aspect, the method further includes: determining that the first data is hot data based on the frequency of reading the first data in the second storage space. In the above possible implementation, the first data is determined to be hot data based on the frequency of reading the first data in the second storage space. In this way, data with a higher reading frequency can be read from the first storage space with a faster access rate. Since the read operations of data with a higher reading frequency account for the majority of the overall read operations, the data reading rate can be improved as a whole, the application access performance can be improved, and the reading time can be reduced.

[0019] In a possible implementation of the second aspect, the method further includes: when the available space capacity of the first storage space is less than the specified capacity, controlling the memory to write the data in the first storage space whose read frequency is less than the specified frequency into the second storage space. In the above possible implementation, when the available space capacity of the first storage space is less than the specified capacity, writing the data in the first storage space whose read frequency is less than the specified frequency into the second storage space. In this way, data other than hot data in the first storage space can be written into the second storage space, saving the capacity of the first storage space.

[0020] In a possible implementation of the second aspect, the first data is data of a specified data type. In the above possible implementation, the first data is data of a specified data type. In this way, the data of the specified data type can be read from the first storage space with a faster access rate, thereby improving the reading rate of the data of the specified data type, improving the application access performance, and reducing the reading time.

[0021] In a possible implementation of the second aspect, the method further includes: detecting the frequency of reading data in the second storage space in units of a preset number of logical block addresses to determine the first data. In the above possible implementation, detecting the frequency of reading data in the second storage space in units of a preset number of logical block addresses to determine the first data. In this way, on the one hand, by detecting in units of a preset number of logical block addresses rather than in units of a single logical block address, hot data can be determined with a larger granularity, reducing the number of calculations and improving firmware performance. On the other hand, by dividing the units by logical addresses, it is possible to align with the commands of the front-end components such as the host, making it easier to divide the units and determine the first data.

[0022] In a possible implementation of the second aspect, the first storage space includes a first storage area, and the first storage area is used to store hot data from the second storage space. In the above possible implementation, a dedicated first storage area is set in the first storage space to store hot data from the second storage space, which does not interfere with the writing of other data (for example, new data from the host), and takes into account the writing rate of other data and the reading rate of hot data.

[0023] In a possible implementation of the second aspect, the first storage space corresponds to a plurality of first storage units, the second storage space corresponds to a plurality of second storage units, and the number of bits stored in the first storage unit is less than the number of bits stored in the second storage unit. In the above possible implementation, when the number of bits stored in the first storage unit corresponding to the first storage space is less than the number of bits corresponding to the second storage unit corresponding to the second storage space, the access rate of the first storage space is greater than the access rate of the second storage space. In this way, a basis is provided for migrating hot data stored in a storage space with a slower access rate to a storage space with a faster access rate, improving the read rate of hot data, improving application access performance, and reducing read time.

[0024] In a possible implementation of the second aspect, the method further includes: when the available space capacity of the first storage space is less than the specified capacity, allocating the available physical storage block to the first storage space. In the above possible implementation, if the available space capacity of the first storage space is insufficient, the controller allocates the available physical storage block to the first storage space. In this way, the size of the first storage space can be dynamically adjusted to avoid insufficient capacity of the first storage space.

[0025] In a possible implementation of the second aspect, after writing the first data stored in the second storage space into the first storage space, the method further includes: erasing the first data in the second storage space. In the above possible implementation, writing the first data stored in the second storage space into the first storage space, the second storage space also stores the first data, which will occupy the capacity of the second storage space. By erasing the first data in the second storage space, the capacity of the second storage space can be saved.

[0026] In a possible implementation of the second aspect, the method further includes: receiving a read command from the host for the first data in the second storage space. In response to the read command, recording the number of reads, the read time, or the read frequency of the first data. In the above possible implementation, the number of reads, the read time, or the read frequency of the first data is recorded by the read command for the first data on the host side. In this way, a basis can be provided for improving the read rate of hot data, improving application access performance, and reducing read time.

[0027] According to a third aspect, an electronic device is provided. The electronic device includes a processor and a storage system provided by the first aspect or any possible implementation of the first aspect.

[0028] In a fourth aspect, a computer-readable storage medium is provided, in which a program code is stored. The program code can be called by a processor to execute an operating method of a storage system provided by the second aspect or any possible implementation of the second aspect.

[0029] In another aspect of the present application, a computer program product is provided. When the computer program product is run on a computer, the computer is enabled to execute the storage system operation method provided by the second aspect or any possible implementation of the second aspect.

[0030] It can be understood that any of the electronic devices, computer-readable storage media or computer program products provided above are applied to execute the operating method of the corresponding storage system provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the operating method of the corresponding storage system provided above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0032] Figure 2 A schematic diagram of the structure of a storage system provided in an embodiment of the present application;

[0033] Figure 3A schematic diagram of the structure of a controller provided in an embodiment of the present application;

[0034] Figure 4 A schematic diagram of the structure of a memory provided in an embodiment of the present application;

[0035] Figure 5 A schematic diagram of the structure of a storage cell array provided in an embodiment of the present application;

[0036] Figure 6 A schematic diagram of a storage state of a memory provided in an embodiment of the present application;

[0037] Figure 7 A schematic diagram of a storage system provided in an embodiment of the present application;

[0038] Figure 8 A storage system interaction diagram provided in an embodiment of the present application Figure 1 ;

[0039] Fig. 9 A storage system interaction diagram provided in an embodiment of the present application Figure 2 ;

[0040] Fig.10 A flowchart of a storage system operation method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0041] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.

[0042] In the description of the present application, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more.

[0043] When describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" may also refer to two or more components that are not in direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0044] "At least one of A, B, and C" has the same meaning as "at least one of A, B, or C", and both include the following combinations of A, B, and C: only A, only B, only C, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B, and C. "A and / or B" includes the following three combinations: only A, only B, and a combination of A and B. The use of "suitable for" or "configured to" herein is meant to be open and inclusive language that does not exclude devices that are suitable for or configured to perform additional tasks or steps.

[0045] Before introducing the embodiments of the present application, the application scenarios of the embodiments of the present application are first introduced and described. The technical solution provided in the present application can be applied to electronic devices, or can be applied to components of electronic devices (such as chips built into the electronic devices). The electronic devices include but are not limited to: mobile phones, tablet computers, computers, laptops, video cameras, cameras, wearable devices, vehicle-mounted devices or terminal devices, etc.

[0046] Figure 1 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device 100 may include: a storage system 120 and a host 110 (host). The host 110 may include: a processor 111, an input / output interface 112, a sensor component 113, and a multimedia component 114. Among them, the storage system 120, the processor 111, the input / output interface 112, the sensor component 113, and the multimedia component 114 may be coupled respectively through a bus 115.

[0047] The storage system 120 can be used to store data, software programs and modules; it mainly includes a storage program area and a storage data area, wherein the storage program area can store software programs, including instructions formed in code, including but not limited to an operating system and an application required for at least one function; the storage data area can store data created according to the use of the electronic device 100. In some feasible embodiments, the storage system 120 may include one memory or multiple memories; the memory may include a floppy disk, a hard disk such as a built-in hard disk and a mobile hard disk, a magnetic disk, an optical disk, a magneto-optical disk such as a compact disc read-only memory (CD-ROM), a non-volatile storage device such as a random access memory (RAM), a read-only memory (ROM), a programmable readonly memory (PROM), an electrical programmable read only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, or any other form of storage medium known in the art.

[0048] The processor 111 is the control center of the electronic device 100. It uses various interfaces and lines to connect various parts of the entire device. By running or executing software programs and / or software modules stored in the memory, and calling data stored in the memory, it executes various functions of the electronic device 100 and processes data, thereby monitoring the electronic device 100 as a whole. In some feasible embodiments, the processor 111 can be a single processor 111 structure, a multi-processor 111 structure, a single-thread processor 111, and a multi-thread processor 111; in some feasible embodiments, the processor 111 may include at least one of a central processing unit 111 unit, a general processor 111, a digital signal processor 111, a neural network processor 111, a graphics processing unit (GPU), an image signal processor 111, a microcontroller or a microprocessor 111, etc. In addition, the processor 111 may further include other hardware circuits or accelerators, such as application-specific integrated circuits, field programmable gate arrays or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The processor 111 may also be a combination that implements computing functions, such as a combination of one or more microprocessors 111 , a combination of a digital signal processor 111 and a microprocessor 111 , and the like.

[0049] The sensor component 113 includes one or more sensors for providing various aspects of status evaluation for the electronic device 100. The sensor component 113 may include an optical sensor, an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor or a temperature sensor, and the sensor component 113 may detect the surrounding image, acceleration / deceleration, orientation, open / closed state, relative positioning of components, or temperature changes of the electronic device 100.

[0050] The multimedia component 114 provides a screen of an output interface between the electronic device 100 and the user. When the screen is a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor can not only sense the boundary of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation.

[0051] The input / output interface 112 provides an interface between the processor 111 and a peripheral interface module, for example, the peripheral interface module may include a keyboard, a mouse, or a USB (Universal Serial Bus 115) device, etc. In a possible implementation, there may be only one or more input / output interfaces 112.

[0052] In some embodiments, the electronic device 100 may further include an audio component and a communication component, for example, the audio component includes a microphone, and the communication component includes a wireless fidelity (WiFi) module, a Bluetooth module, etc., which will not be described in detail in the embodiments of the present application.

[0053] Next, the storage system in the electronic device is introduced. Figure 2 A schematic diagram of the structure of a storage system provided in an embodiment of the present application. The storage system 210 may include a coupled memory 212 and a controller 211. The memory 212 may include a floppy disk, a hard disk such as a built-in hard disk and a mobile hard disk, a magnetic disk, an optical disk, a magneto-optical disk such as a compact disc read-only memory (CD_ROM), a non-volatile storage device such as a random access memory (RAM), a read-only memory (ROM), a programmable read-only memory (PROM), an electrical programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory (such as a NAND flash memory), or any other form of storage medium known in the art. The controller 211 may be coupled to a host 220. The controller 211 may receive an operation command from the host 220, and send a command (CMD), an address (ADD), and data (data) to the memory 212 according to the operation command. The memory 212 may receive the address sent by the controller 211 and perform an operation corresponding to the command on the area selected according to the address.

[0054] Exemplarily, there may be one or more memories 212 , and the memories 212 and the controller 211 may be integrated on the same chip or may be respectively arranged on different chips.

[0055] In one example, the controller 211 and the single memory 212 may be integrated into a memory card. The memory card may include a personal computer memory card international association (PCMCIA) card, a compact flash card (CF card), a smart media card (SM card), a memory stick, a multimedia card (MMC), a secure digital card (SD card), a universal flash storage (UFS), etc. Among them, the multimedia card can be divided into MMC, reduced-size MMC (RS-MMC), mini MMC (MMCmicro), etc.; the secure digital card includes SD, mini SD card (miniSD), micro SD card (microSD), high-capacity SD card (secure digital high capacity, SDHC), etc. Further, the memory card may also include a memory card connector for coupling the memory card with the host 220.

[0056] In another example, the controller 211 and the plurality of memories 212 may be integrated into a solid state disk (SSD). The SSD may further include an SSD connector for coupling the SSD to the host 220. In some embodiments, the storage capacity of the SSD is greater than the storage capacity of the memory card, and / or the operation rate of the SSD is greater than the operation rate of the memory card.

[0057] Below through Figure 3A possible structure of the controller 310 in the storage system 300 is introduced. The controller 310 may include: a front-end interface 311, a processing device 312, a back-end interface 313 and other modules 314, wherein the front-end interface 311, the processing device 312, the back-end interface 313 and other modules 314 may be respectively coupled through a bus 315. Exemplarily, the bus 315 may be an advanced extensible interface (AXI) bus 315. Other modules 314 may include a write buffer, a read buffer, an error correcting code (ECC) module, a wear leveling (WL) module, a garbage collection (GC) module, etc. The controller 310 may be coupled to the host 400 through the front-end interface 311 and coupled to the memory 320 through the back-end interface 313. The controller 310 may control the general operation of the memory 320 in response to a request received from the host 400.

[0058] The memory provided in the embodiment of the present application includes but is not limited to NAND flash memory. The embodiment of the present application takes NAND flash memory as an example for explanation. Figure 4 The memory 500 may include a memory cell array 510, an input / output circuit 520, a control circuit 530, a register 540, a voltage generator 550, a row decoder 560, a column decoder 570, a page buffer 580, etc., wherein the input / output circuit 520, the control circuit 530, the register 540, the voltage generator 550, the row decoder 560, the column decoder 570 and the page buffer 580 outside the memory cell array 510 may be referred to as a peripheral circuit.

[0059] The memory cell array 510 may include a plurality of memory cells, a plurality of bit lines (BL) and a plurality of word lines (WL). Each memory cell is coupled to a word line and a bit line. When data needs to be read from a selected memory cell, a read voltage may be applied to the word line coupled to the selected memory cell, and a turn-on voltage may be applied to the word line of the unselected memory cell. Figure 5 A possible structural diagram of the memory cell array 510 is shown. The multiple bit lines of the memory cell array 510 may include BL1, BL2, BL3, BL4, BL5, BL6, BL7, etc., and the multiple word lines of the memory cell array 510 may include WL1, WL2, WL3, etc.

[0060] The input / output circuit 520 is mainly used to receive read instructions and write instructions sent by the controller and send the read data to the controller, etc. The input / output circuit 520 can be coupled to the control circuit 530 and act as a control buffer to buffer the control command received from the host and relay it to the control circuit 530, and buffer the status information received from the control circuit 530 and relay it to the host. The input / output circuit 520 can also be coupled to the column decoder 570 via the data bus, and act as a data interface and data buffer to buffer the data and relay it to the memory cell array 510 or relay or buffer the data from the memory cell array 510.

[0061] The control circuit 530 may be configured to control the operation of the memory cell array 510 and the page buffer 580. The control circuit 530 is mainly used to control the row decoder 560 to conduct the voltage generator 550 with the corresponding word line and control the column decoder 570 to conduct the voltage generator 550 with the corresponding bit line according to the received read instruction, so as to read the corresponding data.

[0062] The register 540 includes an address register 540, a status register 540, etc. Among them, the address register 540 is used to store the word line address (word line address) and the string address (string address) in the read request instruction. The status register 540 is used to store the current state of the memory 500, including two states: ready and busy. When the control circuit 530 is reading data from the memory cell array 510 or writing data to the memory cell array 510, the state stored in the status register 540 is a "busy" state, and the next read or write operation cannot be performed. When the memory cell array 510 completes the reading process or the writing process, the state stored in the status register 540 switches to the "ready" state, and the next read or write operation can be performed.

[0063] The voltage generator 550 may be configured to be controlled by the control circuit 530 and generate word line voltages (eg, read voltages, write voltages, pass voltages, local voltages, verification voltages, etc.), bit line voltages, and source line voltages to be supplied to the memory cell array 510 .

[0064] The row decoder 560 can be configured to be controlled by the control circuit 530, and select / deselect the memory block of the memory cell array 510 and select / deselect the word line of the memory block. The row decoder 560 can also be configured to drive the word line using the word line voltage generated from the voltage generator 550. In some embodiments, the row decoder 560 can also select / deselect and drive the source selection gate line and the drain selection gate line. For example, the row decoder 560 is configured to perform an erase operation on the memory cell coupled to (one or more) selected word lines.

[0065] The column decoder 570 may be configured to be controlled by the control circuit 530 , and select one or more memory strings by applying a bit line voltage generated from the voltage generator 550 .

[0066] The page buffer 580 may be configured to read data from the memory cell array 510 or write (or program) data to the memory cell array 510 according to a control signal from the control circuit 530. Specifically, in one example, the page buffer 580 may store a page of write data (programming data) to be programmed into a memory page of the memory cell array 510. In another example, the page buffer 580 may perform a program verification operation to ensure that the data has been correctly programmed into the memory cell coupled to the selected word line. In yet another example, the page buffer 580 may also sense a low-power signal from a bit line representing a data bit stored in a memory cell, and amplify a small voltage swing to a recognizable logic level in a read operation.

[0067] After introducing the possible structures of the memory, the storage states of the memory are introduced. With the development of flash memory, the number of bits stored in the storage unit of the flash memory has increased from 1 bit to 2 bits, 3 bits, 4 bits, and 5 bits. Accordingly, the storage unit of the flash memory has evolved from a single level cell (SLC) to a multiple level cell (MLC), such as a double level cell (DLC), a triple level cell (TLC), a quad-level cell (QLC), a penta level cell (PLC), etc. Accordingly, the storage states in the flash memory have increased from 2 to 4, 8, 16, 32, etc.

[0068] The storage mode of flash memory corresponds to the number of bits stored in its storage unit. For example, if flash memory uses SLC storage mode, each storage unit can store 1 bit of data; if flash memory uses DLC storage mode, each storage unit can store 2 bits of data; if flash memory uses TLC storage mode, each storage unit can store 3 bits of data; if flash memory uses QLC storage mode, each storage unit can store 4 bits of data. Figure 6 The storage states corresponding to flash memories of different storage modes are introduced.

[0069] like Figure 6 As shown in (a) in the figure, the storage state of the memory whose storage mode is the SLC mode includes 1 erased state and 1 programmed state, the erased state is denoted as E, the programmed state is denoted as P, Vth represents the threshold voltage, and the threshold voltage of the programmed state P is greater than the threshold voltage of the erased state E.

[0070] like Figure 6 As shown in (b) in the figure, the storage state of the memory whose storage mode is the DLC mode includes 1 erased state and 3 programmed states, the erased state is denoted as E, and the programmed states are denoted as P1, P2 and P3 from the 1st state to the 3rd state, respectively. From the P1 state to the P3 state, the threshold voltage gradually increases.

[0071] like Figure 6 As shown in (c) in the figure, the storage state of the memory in the TLC mode includes 1 erased state and 7 programmed states, the erased state is denoted by E, and the programmed states are denoted by P1, P2, P3, P4, P5, P6 and P7 from the 1st state to the 7th state, and the threshold voltage gradually increases from the P1 state to the P7 state.

[0072] like Figure 6 As shown in (d) in the figure, the storage state of the memory with the QLC mode includes 1 erased state and 15 programmed states, the erased state is denoted as E, and the programmed states are denoted as P1, P2, P3, P4, P5, P6, P7, P8, P9, P, P11, P12, P13, P14 and P15 from the 1st state to the 15th state, and the threshold voltage gradually increases from the P1 state to the P15 state.

[0073] According to the above example, for a memory with a fixed number of storage cells, the more bits each storage cell stores, the larger its storage capacity and the lower its cost. However, its storage states are more numerous and the voltage control is more complex, so the write rate, read rate and erase rate are slower and the reliability is lower.

[0074] In the present application, the storage system may include two types of storage space. For example, one is a storage space with a faster access rate, such as a storage space using an SLC storage mode, and the other is a storage space with a slower access rate, such as an MLC storage space (such as a storage space using a DLC storage mode, a storage space using a TLC storage mode, and a storage space using a QLC storage mode).

[0075] Exemplarily, the data writing process of the storage system may include: when writing data, writing the data into a storage space with a faster access rate so as to make the writing rate faster. When the storage system is in an idle state, writing the data from the storage space with a faster access rate into the storage space with a slower access rate so as to avoid insufficient capacity of the storage space with a faster access rate. In this way, the user writing rate and the storage capacity of the storage space with a faster access rate can be dynamically taken into account. However, after writing the data into the storage space with a slower access rate, when reading the data, there is a problem of a slow data reading rate.

[0076] Based on this, in order to improve the problem of slow data reading speed, an embodiment of the present application provides a system, which can be a storage system or a data processing system. The storage system is taken as an example for introduction and description below. Figure 7 A schematic diagram of a storage system provided in an embodiment of the present application. The storage system 600 includes: a memory 620 and a controller 610 .

[0077] The memory 620 includes a first storage space and a second storage space, and the access rate V1 of the first storage space is greater than the access rate V2 of the second storage space. The controller 610 is coupled to the memory 620 and is configured to: control the memory 620 to write the first data in the second storage space into the first storage space, and the first data is hot data stored in the second storage space.

[0078] For example, the structure of the controller 610 can refer to Figure 3 The structure of the controller 310 and the structure of the memory 620 can refer to Figure 4 The structure of the memory 500 in FIG.

[0079] Wherein, access may include reading and / or writing. The access rate of the storage space may include: the rate of reading data from the storage space. Optionally, if the rate of reading data from the storage space is proportional to the rate of writing data to the storage space, the access rate of the storage space may also include: the rate of writing data to the storage space.

[0080] Furthermore, the first storage space and the second storage space may correspond to the same memory or to different memories. In one example, the memory 620 includes a first memory and a second memory, the storage space of the first memory is configured as the first storage space, and the storage space of the second memory is configured as the second storage space. The first memory may be a spin-transfer torque-magnetoresistive random access memory (STT-MRAM), a NAND flash memory or other memory, and the second memory may be a NAND flash memory or other memory. In another example, a portion of the storage space of the memory 620 is configured as the first storage space, and another portion of the space of the third memory 620 is configured as the second storage space. The memory 620 may be a NAND flash memory or other memory 620. The embodiment of the present application takes the example that the first storage space and the second storage space may correspond to the same memory, and the memory is a NAND flash memory for subsequent explanation.

[0081] In a possible implementation, the controller 610 controls the memory 620 to write the first data in the second storage space into the first storage space. The specific process may be: the controller 610 sends a command CMD11 to the memory 620, and CMD11 instructs the memory 620 to read the first data stored in the second storage space. In response to CMD11, the memory 620 reads the first data stored in the second storage space and sends the first data to the controller 610. The controller 610 sends a command CMD12 to the memory 620, and CMD12 instructs the memory 620 to write the first data into the first storage space. In response to CMD12, the memory 620 writes the first data into the first storage space.

[0082] In another possible implementation, before the controller 610 controls the memory 620 to write the first data in the second storage space into the first storage space, when the application or user writes multiple data, the multiple data can be written into the first storage space first to ensure a faster write rate. Then the multiple data are written from the first storage space to the second storage space to avoid insufficient capacity of the first storage space. Then the hot data (such as the first data) among the multiple data are written into the first storage space. In this way, both the write rate and storage capacity can be dynamically taken into account, and the read rate of the hot data can be improved.

[0083] In the technical solution provided in the embodiment of the present application, the second storage space stores multiple data, which may include hot data, and the access rate of the second storage space is slow. The hot data (such as the first data) in the second storage space is migrated to the first storage space with a faster access rate. When the host coupled to the storage system reads the hot data, it can be read from the first storage space with a faster access rate, instead of from the second storage space with a slower access rate. In this way, the reading rate of hot data can be increased, the application access performance can be improved, and the reading time can be reduced.

[0084] After the first data is written from the second storage space to the first storage space, the first data is stored in both the first storage space and the second storage space, and the first data stored in the second storage space will waste the capacity of the second storage space. Therefore, the first data in the second storage space can be deleted to save the capacity of the second storage space. Next, several possible implementation methods are used to illustrate the deletion of the first data in the second storage space.

[0085] In a first possible implementation, if the first data is data occupying an integer number of physical storage blocks, after writing the first data in the second storage space into the first storage space, the controller 610 may also be configured to: control the memory 620 to erase the first data in the second storage space.

[0086] Among them, controlling the memory 620 to erase the first data in the second storage space, the specific process may be: the controller 610 sends a command CMD13 to the memory 620, CMD13 instructs the memory 620 to erase the first data stored in the second storage space, and the memory 620 responds to CMD13 and erases the first data in the second storage space.

[0087] In a second possible implementation, if the first data does not occupy an entire physical storage block, after the first data in the second storage space is written into the first storage space, the controller 610 may also be configured to: control the memory 620 to mark the first data stored in the second storage space as invalid. In this way, when a garbage collection operation is performed on the physical storage block storing the first data in the second storage space, all data in the physical storage block is erased, thereby erasing the first data.

[0088] In a third possible implementation, if the first data does not occupy an entire physical storage block, after writing the first data in the second storage space into the first storage space, the controller 610 may also be configured to: control the memory 620 to mark the physical storage block storing the first data in the second storage space as an available storage block. In this way, when the controller 610 controls the memory 620 to write new data into the available storage block, the memory 620 first erases the available storage block and then writes the new data, thereby erasing the first data.

[0089] According to the above several possible implementations, after the first data in the second storage space is written into the first storage space, the first data in the second storage space may be deleted, so that the capacity of the second storage space may be saved.

[0090] It can be seen from the above embodiments that the first storage space receives both data from the host (for example, new data to be written sent by the host to the storage system) and hot data from the first storage space (for example, hot data that has been written to the first storage space but needs to be migrated to the second storage space). If these two types of data are stored together, it will be inconvenient to manage. Therefore, dedicated storage areas can be set for these two types of data to store them separately. In one possible implementation, the first storage space includes a first storage area, which is used to store hot data from the second storage space. The first storage space may also include a second storage area, which is used to store data from the host. Different storage areas are set for these two types of data, and the two types of data are stored separately to avoid a large amount of hot data from the first storage space, resulting in insufficient capacity of the first storage space to store new data from the host.

[0091] In the storage system provided in the embodiment of the present application, a first storage area is set in the first storage space to store hot data from the second storage space, and a second storage area is set to store data from the host. The hot data from the second storage space and other data (such as data from the host) can be stored separately for easy management.

[0092] Next, how to determine whether the first data is hot data is introduced. In a possible implementation manner, the controller 610 is further configured to: determine whether the first data is hot data according to the reading frequency of the first data in the second storage space.

[0093] The controller 610 may include a counting circuit. In one example, the counting circuit may be used to record the number of times the first data is read within a specified time. The frequency of reading the first data being greater than or equal to the specified frequency may mean that the number of times the first data is read is greater than or equal to the specified number.

[0094] In another example, the counting circuit may be used to record the time when the number of times the first data is read reaches a specified number. The frequency of reading the first data is greater than or equal to the specified frequency, which may mean that the time is less than or equal to the specified time.

[0095] In another example, the counting circuit can be used to record the number of times and the reading time of the first data, and calculate the reading frequency of the first data. The reading frequency of the first data is greater than or equal to the specified frequency, which can mean that the reading frequency is greater than or equal to the specified frequency.

[0096] In the technical solution provided in the embodiment of the present application, the criterion for the first data to be hot data may be: the reading frequency of the first data is greater than or equal to the specified frequency. In this way, data with a higher reading frequency can be read from the first storage space with a faster access rate. Since the reading operation of data with a higher reading frequency accounts for the majority of the overall reading operations, the data reading rate can be improved as a whole, the application access performance can be improved, and the reading time can be reduced.

[0097] In a possible implementation, the controller 610 is further configured to: detect the reading frequency of data in the second storage space in units of a preset number of logical block addresses to determine the first data.

[0098] The preset number of logical block addresses may range from 4MB to 128MB of logical block addresses.

[0099] Furthermore, the reading frequency of the data in the second storage space is detected by taking a preset number of logical block addresses as a unit, which can be: taking a plurality of data of the preset number of logical block addresses as a data group (for example, 4MB of data as a data group), and detecting the reading frequency of each data group as a unit of data group, wherein the first data is a data group. The plurality of data in a data group are data with continuous logical block addresses.

[0100] In addition, the first data is hot data if the reading frequency of any data in the data group of the first data is greater than or equal to the specified frequency.

[0101] In the technical solution provided in the embodiment of the present application, the controller 610 can detect the frequency of reading data in the second storage space in units of a preset number of logical block addresses to determine the first data. In this way, on the one hand, by detecting in units of a preset number of logical block addresses rather than in units of a single logical block address, hot data can be determined with a larger granularity, reducing the number of calculations and improving firmware performance. On the other hand, by dividing units by logical addresses, it can be aligned with the commands of front-end components such as the host, making it easier to divide units and determine the first data.

[0102] In a possible implementation, the controller 610 is further configured to: receive a read command from the host for the first data in the second storage space, and in response to the read command, record the number of reads, the read time, or the read frequency of the first data.

[0103] Optionally, a read command sent by the host to the controller 610 may instruct to read multiple data in the second storage space. In response to a read command, the controller 610 records the number of reads, the read time or the read frequency of multiple data, which may include the first data.

[0104] In the technical solution provided in the embodiment of the present application, the controller 610 records the number of reads, read time or read frequency of the first data through the read command for the first data on the host side. In this way, the read frequency of the first data in the second storage space can be obtained, and the first data is determined to be hot data according to the read frequency of the first data, which provides a basis for improving the read rate of hot data, improving the access performance of application programs, and reducing the read time.

[0105] In another possible implementation, the first data is determined to be hot data according to the data type of the first data in the second storage space. Specifically, the first data is data of a specified data type.

[0106] The data type may be a file type where the data is located. The data type of the first data may be determined according to the file suffix of the first data. The specified data type may be other data types other than the image data type, the video data type, and the image file data type, such as a text data type.

[0107] Optionally, the storage system 600 can change the specified data type. For example, when the electronic device is in power saving mode, the host does not access data such as image data and video data. At this time, the storage system 600 can set the specified data type to a text data type. When the terminal exits power saving mode and is in normal mode, the host can access image data and video data. At this time, the storage system 600 can set the data type other than the image file data type to the specified data type.

[0108] In a possible implementation, the embodiment of the present application can also determine whether the first data is hot data in combination with the data type and the frequency of data reading. For example, the controller 610 can be configured to determine that the first data is hot data when the reading frequency of the first data is greater than the specified frequency and the first data is data of the specified data type. By limiting the standard for the first data to be hot data based on the data type and the frequency of reading, it is avoided that too much data is determined to be hot data and migrated from the second storage space to the first storage space, resulting in insufficient capacity of the first storage space.

[0109] In the technical solution provided in the embodiment of the present application, the criterion for the first data to be hot data may be: the first data is data of a specified data type. In this way, the data of the specified data type can be read from the first storage space with a faster access rate, thereby improving the reading rate of the data of the specified data type, improving the application access performance, and reducing the reading time.

[0110] If the first storage space receives both data from the host and hot data from the second storage space, the capacity of the first storage space may be insufficient. Next, taking the criterion that the first data is hot data: the reading frequency of the first data is greater than or equal to the specified frequency as an example, how to release the capacity of the first storage space is introduced.

[0111] In a possible implementation, the controller 610 is further configured to: when the available space capacity of the first storage space is less than the specified capacity, control the memory 620 to write data in the first storage space whose read frequency is less than the specified frequency into the second storage space. The data whose read frequency is less than the specified frequency may be data other than hot data.

[0112] In one example, after controlling the memory 620 to write the first data in the second storage space into the first storage space, when the available space capacity of the first storage space is less than the specified capacity and the reading frequency of the first data is less than the specified frequency, the controller 610 sends a command CMD14 to the memory 620, and CMD14 instructs the memory 620 to read the first data stored in the first storage space. In response to CMD14, the memory 620 reads the first data stored in the first storage space and sends the first data to the controller 610. The controller 610 sends CMD15 to the memory 620, and CMD15 instructs the memory 620 to write the first data into the second storage space. In response to CMD15, the memory 620 writes the first data into the second storage space.

[0113] In another example, after the control memory 620 writes the data in the first storage space whose read frequency is less than the specified frequency into the second storage space, the controller 610 may also be configured as follows: if the first data is data occupying an integer number of physical storage blocks, the control memory 620 erases the data in the first storage space whose read frequency is less than the specified frequency. Alternatively, if the first data does not occupy an entire physical storage block, the control memory 620 marks the data stored in the first storage space whose read frequency is less than the specified frequency as invalid, or, if the first data does not occupy an entire physical storage block, the control memory 620 marks the physical storage block in the first storage space storing the data whose read frequency is less than the specified frequency as an available storage block.

[0114] In the technical solution provided in the embodiment of the present application, the data written from the second storage space to the first storage space is hot data when it is just written, but may no longer be hot data after a period of time. If the first storage space continues to receive hot data from the second storage space, the capacity of the first storage space may be insufficient. When the available space capacity of the first storage space is less than the specified capacity, the data in the first storage space with a reading frequency less than the specified frequency is written to the second storage space, and the data in the first storage space except the hot data can be written to the second storage space, saving the capacity of the first storage space.

[0115] Next, some differences between the first storage space and the second storage space are introduced. In a possible implementation, the first storage space corresponds to a plurality of first storage units, the second storage space corresponds to a plurality of second storage units, and the number of bits stored in the first storage unit is less than the number of bits stored in the second storage unit.

[0116] The first storage unit may be a storage unit in a physical storage block corresponding to the first storage space, and the second storage unit may be a storage unit in a physical storage block corresponding to the second storage space. For example, the memory 620 includes a first physical storage block and a second physical storage block, the first physical storage block is allocated to the first storage space, and the second physical storage block is allocated to the second storage space. The first storage unit refers to a storage unit of the first physical storage block, and the second storage unit refers to a storage unit of the second physical storage block.

[0117] Furthermore, by configuring the first physical storage block as a storage mode of the first storage space (e.g., SLC storage mode) and configuring the second physical storage block as a storage mode of the second storage space (e.g., QLC storage mode), the number of bits stored in the first storage unit is smaller than the number of bits stored in the second storage unit, so that the access rate of the first storage space is greater than the access rate of the second storage space. Exemplarily, if the second storage unit is QLC, the first storage unit may be SLC, DLC, or TLC.

[0118] In the technical solution provided in the embodiment of the present application, the number of bits stored in the first storage unit corresponding to the first storage space is less than the number of bits corresponding to the second storage unit corresponding to the second storage space, the storage state corresponding to the first storage space is less than the storage state corresponding to the second storage space, and the voltage control of the storage unit corresponding to the first storage space when accessing data is simpler, so the access rate of the first storage space is greater than the access rate of the second storage space. In this way, a basis is provided for increasing the reading rate of hot data, improving the access performance of application programs, and reducing the reading time.

[0119] In a possible implementation, the storage unit in the physical storage block corresponding to the first storage space is used to store data with a fixed number of bits.

[0120] Among them, the physical storage block corresponding to the first storage space can be: the memory 620 includes multiple physical storage blocks, the first storage space corresponds to a fixed physical storage block in the multiple physical storage blocks, and the storage unit of the fixed physical storage block is pre-set to store data with a fixed number of bits.

[0121] Optionally, the first storage space may include multiple logical block addresses, and the controller 610 pre-sets a mapping relationship between each logical block address and a physical block address, and stores the mapping relationship in the memory 620. The storage unit in the physical storage block indicated by the physical block address is used to store data with a fixed number of bits.

[0122] Exemplarily, the storage unit in the physical storage block corresponding to the first storage space is used to store fixed-bit data, which may be: the storage unit of the physical storage block corresponding to the first storage space only supports the storage of n-bit data, or only supports the storage of m-bit data, and the storage unit of the physical storage block cannot support both the storage of n-bit data and the storage of m-bit data, where n is not equal to m. The first storage space is a static SLC storage space. For example, the storage mode of the physical storage block corresponding to the first storage space has been pre-set to: each storage unit is only used to store 1 bit of data,

[0123] In another possible implementation, the storage unit in the physical storage block corresponding to the first storage space is used to store data with a non-fixed number of bits.

[0124] The physical storage block corresponding to the first storage space may be: the memory 620 includes multiple physical storage blocks, and the physical storage blocks in the multiple physical storage blocks corresponding to the first storage space are variable. When writing data, the controller 610 searches for a physical storage block that can be used to write the data according to the first storage space where the data is to be written, thereby determining that the physical storage block corresponds to the first storage space.

[0125] Optionally, the first storage space may include multiple logical block addresses. When the controller 610 receives a data write command including a logical block address, the controller 610 allocates a physical block address to the logical block address, establishes a mapping relationship between the logical block address and the physical block address, and stores the mapping relationship in the memory 620. The storage unit in the physical storage block indicated by the physical block address is used to store data with an unfixed number of bits.

[0126] Exemplarily, the storage unit in the physical storage block corresponding to the first storage space is used to store data of a non-fixed number of bits, which may be: the storage unit of the physical storage block corresponding to the first storage space may support both storage of n-bit data and storage of m-bit data, where n is not equal to m. The first storage space is a dynamic SLC storage space. For example, the storage unit of a physical storage block may be used to store 1-bit data, 2-bit data, or 3-bit data. When the physical storage block is determined as the physical storage block corresponding to the first storage space, the storage mode of the physical storage block is set to store 1-bit data per storage unit.

[0127] In another possible implementation, storage units in a portion of physical storage blocks corresponding to the first storage space are used to store data with a fixed number of bits, and storage units in another portion of physical storage space corresponding to the first storage space are used to store data with a non-fixed number of bits.

[0128] In another possible implementation, the storage unit in the physical storage block corresponding to the second storage space can be used to store data with a fixed number of bits; or, the storage unit in the physical storage block corresponding to the second storage space can be used to store data with a non-fixed number of bits; or, the storage unit in a part of the physical storage blocks corresponding to the second storage space is used to store data with a fixed number of bits, and the storage unit in another part of the physical storage space corresponding to the second storage space is used to store data with a non-fixed number of bits. The corresponding description can refer to the description of the first storage space above, and the embodiments of the present application will not be repeated here.

[0129] In a possible implementation, the controller 610 is further configured to: when the available space capacity of the first storage space is less than the specified capacity, allocate the available physical storage blocks to the first storage space.

[0130] The available space capacity of the first storage space may be: the capacity of a fixed physical storage block in the memory 620 corresponding to the first storage space, where a storage unit of the fixed physical storage block is used to store data of a fixed number of bits.

[0131] Furthermore, the available physical storage block may be an available physical storage block in which no data is written. The storage unit in the available physical storage block is used to store data of a non-fixed number of bits, and the number of data bits stored supported by the storage unit in the available physical storage block includes the number of bits corresponding to the first storage space.

[0132] Exemplarily, each storage unit of the available physical storage block can be used to store 1 bit, 2 bits or 3 bits of data. The storage mode of the first storage space is the SLC storage mode. When the capacity of the fixed physical storage block corresponding to the first storage space is insufficient, the controller 610 sets the available physical storage block to the SLC storage mode and allocates it to the first storage space, thereby expanding the capacity of the first storage space.

[0133] In the technical solution provided by the embodiment of the present application, if the available space capacity of the first storage space is insufficient, the controller 610 allocates available physical storage blocks to the first storage space. In this way, the size of the first storage space can be dynamically adjusted to avoid insufficient capacity of the first storage space.

[0134] After introducing the structure and functions of the storage system provided in the embodiments of the present application, several possible interaction scenarios of the storage system are illustrated.

[0135] Figure 8 A storage system interaction diagram provided in an embodiment of the present application Figure 1 The storage system is coupled to a host 710, and includes a controller 720 and a memory 730. The host 710 may send a command CMD01 to the controller 720, and CMD01 indicates that the first data is written into the memory 730. In response to CMD01, the controller 720 sends a command CMD02 to the memory 730, and the memory 730 writes the first data into the first storage space in response to CMD02. In this way, a user or an application may write the first data into the first storage space through the host 710, and the write rate is relatively fast.

[0136] When the storage system is in an idle state, or the storage system can be configured to perform the following steps at a preset time: the controller 720 sends a command CMD03 to the memory 730, and the memory 730 responds to CMD03 to read the first data from the first storage space and sends it to the controller 720. The controller 720 sends a command CMD04 to the memory 730, and the memory 730 responds to CMD04 to write the first data to the second storage space. In this way, the first data can be migrated to the second storage space to save the capacity of the first storage space.

[0137] When the first data needs to be read, the host 710 sends a command CMD05 to the controller 720, and CMD05 indicates to read the first data from the memory 730. In response to CMD05, the controller 720 sends CMD06 to the memory 730, and the memory 730 responds to CMD06 to read the first data from the second storage space and send it to the controller 720, and the controller 720 sends the first data to the host 710. Each time the controller 720 receives CMD06 for the first data in the second storage space from the host 710, the number of reads, the read time, or the read frequency of the first data is recorded. The controller 720 determines that the first data is hot data according to the number of reads, the read time, or the read frequency of the first data.

[0138] Fig. 9 A storage system interaction diagram provided in an embodiment of the present application Figure 2 . The storage system includes a controller 810 and a memory 820. After the controller 810 determines that the first data is hot data, the controller 810 sends a command CMD11 to the memory 820, and the memory 820 reads the first data from the second storage space in response to CMD11 and sends it to the controller 810. The controller 810 sends a command CMD12 to the memory 820, and the memory 820 writes the first data to the first storage space in response to CMD12. The controller 810 sends a command CMD13 to the memory 820, and the memory 820 erases the first data in the second storage space in response to CMD13. In this way, when the user or application reads the first data again, the reading rate is faster.

[0139] When the available space capacity of the first storage space is less than the specified capacity and the frequency of reading the first data is less than the specified frequency, the controller 810 sends a command CMD14 to the memory 820, and the memory 820 reads the first data from the first storage space in response to CMD14 and sends it to the controller 810. The controller 810 sends CMD15 to the memory 820, and the memory 820 writes the first data to the second storage space in response to CMD15. The controller 810 sends CMD16 to the memory 820, and the memory 820 erases the first data in the first storage space in response to CMD16. In this way, if the first data is no longer hot data, the first data is migrated to the second storage space.

[0140] Optionally, for data that has always been in the first storage space, when the available space capacity of the first storage space is less than the specified capacity and the reading frequency of the first data is less than the specified frequency, if the data is not hot data, the data can also be migrated to the second storage space.

[0141] The embodiment of the present application further provides a controller. The controller is coupled to a memory. The memory includes a first storage space and a second storage space, and the access rate of the first storage space is greater than the access rate of the second storage space.

[0142] The controller is configured to: control the memory to write first data in the second storage space into the first storage space, where the first data is hot data stored in the second storage space.

[0143] Specifically, the controller may be configured to: send a read command to the memory, the read command indicating reading the first data in the second storage space, receive the first data read from the second storage space from the memory, and send a write command to the memory, the write command indicating writing the first data read from the second storage space into the first storage space.

[0144] In a possible implementation, the controller is further configured to: determine that the first data is hot data according to a reading frequency of the first data in the second storage space.

[0145] In a possible implementation, the controller is further configured to: when the available space capacity of the first storage space is less than the specified capacity, control the memory to write data in the first storage space whose reading frequency is less than the specified frequency into the second storage space.

[0146] In a possible implementation manner, the first data is data of a specified data type.

[0147] In a possible implementation, the controller is further configured to: detect a reading frequency of data in the second storage space using a preset number of logical block addresses as units to determine the first data.

[0148] In a possible implementation, the first storage space includes a first storage area, and the first storage area is used to store hot data from the second storage space.

[0149] In a possible implementation, the first storage space corresponds to a plurality of first storage units, the second storage space corresponds to a plurality of second storage units, and the number of bits stored in the first storage unit is smaller than the number of bits stored in the second storage unit.

[0150] In a possible implementation, the controller is further configured to: when the available space capacity of the first storage space is less than a specified capacity, allocate available physical storage blocks to the first storage space.

[0151] In a possible implementation, after writing the first data in the second storage space into the first storage space, the controller is configured to: control the memory to erase the first data in the second storage space.

[0152] In a possible implementation, the controller is further configured to: receive a read command from the host for the first data in the second storage space, and in response to the read command, record the number of reads, the read time, or the read frequency of the first data.

[0153] The relevant contents of the controller provided in the embodiment of the present application can be specifically referred to the relevant contents of the controller in the above storage system. The controller provided in the embodiment of the present application can realize the functions and effects of the above storage system. Since they have been described in the above storage system embodiment, the embodiment of the present application will not be repeated here.

[0154] The embodiment of the present application further provides a memory, which is coupled to a controller, and includes a first storage space and a second storage space, wherein an access rate of the first storage space is greater than an access rate of the second storage space.

[0155] The memory is configured to: write first data in the second storage space into the first storage space, the first data being hot data stored in the second storage space.

[0156] Specifically, the memory may be configured to: receive a read command from the controller, and in response to the read command, send the first data read from the second storage space to the controller; receive a write command from the controller, and in response to the write command, write the first data read from the second storage space into the first storage space.

[0157] In a possible implementation, the memory is further configured to: when the available space capacity of the first storage space is less than the specified capacity, write data in the first storage space with a reading frequency less than the specified frequency into the second storage space.

[0158] In a possible implementation manner, the first data is data of a specified data type.

[0159] In a possible implementation, the first storage space includes a first storage area, and the first storage area is used to store hot data from the second storage space.

[0160] In a possible implementation, the first storage space corresponds to a plurality of first storage units, the second storage space corresponds to a plurality of second storage units, and the number of bits stored in the first storage unit is smaller than the number of bits stored in the second storage unit.

[0161] In a possible implementation, after the first data in the second storage space is written into the first storage space, the memory is configured to: erase the first data in the second storage space.

[0162] The relevant contents of the memory provided in the embodiment of the present application can be specifically referred to the relevant contents of the memory in the above-mentioned storage system. The memory provided in the embodiment of the present application can realize the functions and effects of the above-mentioned storage system. Since they have been explained in the above-mentioned storage system embodiment, the embodiment of the present application will not be repeated here.

[0163] The embodiment of the present application also provides a method, which may be an operating method of the storage system. Fig.10 A flowchart of an operation method of a storage system provided in an embodiment of the present application. The storage system may be as follows Figure 2 The storage system 210 shown in FIG. 1 includes a coupled controller and a memory, the memory includes a first storage space and a second storage space, the access rate of the first storage space is greater than the access rate of the second storage space, and the method includes:

[0164] S110: Determine that the first data stored in the second storage space is hot data.

[0165] S120: Writing the first data stored in the second storage space into the first storage space, wherein an access rate of the first storage space is greater than an access rate of the second storage space.

[0166] In the technical solution provided in the embodiment of the present application, it is determined that the first data stored in the second storage space is hot data, and the first data stored in the storage space with a slower access rate is migrated to the storage space with a faster access rate, and the first data is hot data. In this way, the reading rate of hot data can be increased, the application access performance can be improved, and the reading time can be reduced.

[0167] In a possible implementation, the method further includes: determining that the first data is hot data based on the frequency of reading the first data in the second storage space. In the technical solution provided in the embodiment of the present application, the first data is determined to be hot data based on the frequency of reading the first data in the second storage space. In this way, data with a higher reading frequency can be read from the first storage space with a faster access rate. Since the reading operations of data with a higher reading frequency account for the majority of the overall reading operations, the data reading rate can be improved as a whole, the application access performance can be improved, and the reading time can be reduced.

[0168] In a possible implementation, the method further includes: when the available space capacity of the first storage space is less than the specified capacity, controlling the memory to write data in the first storage space whose read frequency is less than the specified frequency into the second storage space. In the technical solution provided in the embodiment of the present application, when the available space capacity of the first storage space is less than the specified capacity, writing data in the first storage space whose read frequency is less than the specified frequency into the second storage space. In this way, data other than hot data in the first storage space can be written into the second storage space, saving the capacity of the first storage space.

[0169] In a possible implementation, the first data is data of a specified data type. In the technical solution provided in the embodiment of the present application, the first data is data of a specified data type. In this way, the data of the specified data type can be read from the first storage space with a faster access rate, thereby improving the reading rate of the data of the specified data type, improving the application access performance, and reducing the reading time.

[0170] In a possible implementation, the method further includes: detecting the frequency of reading data in the second storage space in units of a preset number of logical block addresses to determine the first data. In the technical solution provided in the embodiment of the present application, the frequency of reading data in the second storage space is detected in units of a preset number of logical block addresses to determine the first data. In this way, on the one hand, by detecting in units of a preset number of logical block addresses rather than in units of a single logical block address, hot data can be determined with a larger granularity, reducing the number of calculations and improving firmware performance. On the other hand, by dividing the units by logical addresses, it is possible to align with the commands of the front-end components such as the host, making it easier to divide the units and determine the first data.

[0171] In a possible implementation, the first storage space includes a first storage area, and the first storage area is used to store hot data from the second storage space. In the technical solution provided in the embodiment of the present application, a dedicated first storage area is set in the first storage space to store hot data from the second storage space, which does not interfere with the writing of other data (for example, new data from the host), and takes into account the writing rate of other data and the reading rate of hot data.

[0172] In a possible implementation, the first storage space corresponds to a plurality of first storage units, the second storage space corresponds to a plurality of second storage units, and the number of bits stored in the first storage unit is less than the number of bits stored in the second storage unit. In the technical solution provided in the embodiment of the present application, when the number of bits stored in the first storage unit corresponding to the first storage space is less than the number of bits corresponding to the second storage unit corresponding to the second storage space, the access rate of the first storage space is greater than the access rate of the second storage space. In this way, a basis is provided for migrating hot data stored in a storage space with a slower access rate to a storage space with a faster access rate, improving the reading rate of hot data, improving application access performance, and reducing reading time.

[0173] In a possible implementation, the method further includes: when the available space capacity of the first storage space is less than the specified capacity, allocating the available physical storage block to the first storage space. In the technical solution provided in the embodiment of the present application, if the available space capacity of the first storage space is insufficient, the controller allocates the available physical storage block to the first storage space. In this way, the size of the first storage space can be dynamically adjusted to avoid insufficient capacity of the first storage space.

[0174] In a possible implementation, after writing the first data stored in the second storage space into the first storage space, the method further includes: erasing the first data in the second storage space. In the technical solution provided in the embodiment of the present application, writing the first data stored in the second storage space into the first storage space, the second storage space also stores the first data, which will occupy the capacity of the second storage space. By erasing the first data in the second storage space, the capacity of the second storage space can be saved.

[0175] In a possible implementation, the method further includes: receiving a read command from the host for the first data in the second storage space. In response to the read command, recording the number of reads, the read time, or the read frequency of the first data. In the technical solution provided in the embodiment of the present application, the number of reads, the read time, or the read frequency of the first data is recorded by the read command for the first data on the host side. In this way, a basis can be provided for increasing the read rate of hot data, improving application access performance, and reducing read time.

[0176] The present application also provides an electronic device. The structure of the electronic device can refer to Figure 1 The electronic device 100 in the embodiment of the present invention may include a processor, a controller and a memory. The controller and the memory may be used to support the electronic device to perform at least one method step in the above method embodiment.

[0177] Optionally, the controller and the memory may be integrated on a chip as a storage system, and the processor is coupled to the storage system.

[0178] Optionally, the controller and the memory may be separately arranged on different chips, the memory is coupled to the controller, and the controller is coupled to the processor.

[0179] An embodiment of the present application further provides a computer-readable storage medium, in which a program code is stored. The program code can be called by a processor to execute all or part of the steps of the method of the above method embodiment.

[0180] Based on this understanding, the embodiments of the present application also provide a computer program product comprising instructions. The essence of the technical solution of the present application or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) or a storage system therein to execute all or part of the steps of the method of the embodiment of the method of the present application.

[0181] The electronic device, computer-readable storage medium, and computer program product provided in the embodiments of the present application can realize the functions and effects of the above-mentioned storage system. Since they have been explained in the aforementioned storage system embodiments, the embodiments of the present application will not be repeated here.

[0182] It should be understood that the "some embodiments" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiments are included in at least one embodiment of the present disclosure. Therefore, "in some embodiments" or "in other embodiments" appearing throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present disclosure, the size of the serial number of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages and disadvantages of the embodiments.

[0183] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0184] In the several embodiments provided in the present disclosure, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored, or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0185] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0186] In addition, all functional units in the embodiments of the present disclosure may be integrated into one processing unit, or each unit may be separately configured as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0187] Finally, it should be noted that the above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A storage system, characterized in that: include: A memory, the memory comprising a first storage space and a second storage space, wherein an access rate of the first storage space is greater than an access rate of the second storage space; A controller is coupled to the memory and configured to: The memory is controlled to write first data in the second storage space into the first storage space, where the first data is hot data stored in the second storage space.

2. The storage system according to claim 1, characterized in that: The controller is also configured to: According to the reading frequency of the first data in the second storage space, the first data is determined to be the hot data.

3. The storage system according to claim 2, characterized in that: The controller is also configured to: When the available space capacity of the first storage space is less than the specified capacity, the memory is controlled to write data in the first storage space whose reading frequency is less than the specified frequency into the second storage space.

4. The storage system according to claim 1, characterized in that: The first data is data of a specified data type.

5. The storage system according to claim 1, characterized in that: The controller is also configured to: The reading frequency of the data in the second storage space is detected in units of a preset number of logical block addresses to determine the first data.

6. The storage system according to claim 1, characterized in that: The first storage space includes a first storage area, and the first storage area is used to store hot data from the second storage space.

7. The storage system according to claim 1, characterized in that: The first storage space corresponds to a plurality of first storage units, the second storage space corresponds to a plurality of second storage units, and the number of bits stored in the first storage unit is smaller than the number of bits stored in the second storage unit.

8. The storage system according to claim 7, characterized in that: The controller is also configured to: When the available space capacity of the first storage space is less than the specified capacity, an available physical storage block is allocated to the first storage space.

9. The storage system according to claim 1, characterized in that: After writing the first data in the second storage space into the first storage space, the controller is configured to: control the memory to erase the first data in the second storage space.

10. The storage system according to claim 1, characterized in that: The controller is also configured to: receiving a read command from a host for first data in the second storage space; In response to the read command, the number of reads, the read time or the read frequency of the first data is recorded.

11. A method for operating a storage system, characterized in that: The method comprises: determining that the first data stored in the second storage space is hot data; The first data stored in the second storage space is written into the first storage space, wherein an access rate of the first storage space is greater than an access rate of the second storage space.

12. The method according to claim 11, characterized in that The method further comprises: According to the reading frequency of the first data in the second storage space, the first data is determined to be the hot data.

13. The method according to claim 12, characterized in that The method further comprises: When the available space capacity of the first storage space is less than the specified capacity, data in the first storage space with a reading frequency less than the specified frequency is written into the second storage space.

14. The method according to claim 11, characterized in that The first data is data of a specified data type.

15. The method according to claim 11, characterized in that The method further comprises: The reading frequency of the data in the second storage space is detected in units of a preset number of logical block addresses to determine the first data.

16. The method according to claim 11, characterized in that The first storage space includes a first storage area, and the first storage area is used to store hot data from the second storage space.

17. The method according to claim 11, characterized in that The first storage space corresponds to a plurality of first storage units, the second storage space corresponds to a plurality of second storage units, and the number of bits stored in the first storage unit is smaller than the number of bits stored in the second storage unit.

18. The method according to claim 17, characterized in that The method further comprises: When the available space capacity of the first storage space is less than the specified capacity, an available physical storage block is allocated to the first storage space.

19. The method according to claim 11, characterized in that After writing the first data stored in the second storage space into the first storage space, the method further includes: The first data in the second storage space is erased.

20. The method according to claim 11, characterized in that The method further comprises: receiving a read command from a host for first data in the second storage space; In response to the read command, the number of reads, the read time or the read frequency of the first data is recorded.

21. An electronic device, characterized in that: The electronic device comprises a processor and the storage system according to any one of claims 1 to 10.

22. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores program code, which can be called by a processor to execute the method according to any one of claims 11 to 20.

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