Display panel and display device

By designing the first sub-edge in the OLED display panel to be located between the second sub-edge and the main body, and making the edge value on the signal transmission direction side greater than the edge value on the non-signal transmission direction side, the problem of breakage of conductive parts at vias is solved, signal transmission performance is improved and the risk of display abnormalities is reduced, thus promoting high-resolution design.

CN119562714BActive Publication Date: 2026-03-03HEFEI VISIONOX TECH CO LTD +1
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Patent Information

Application Number
CN202411753081.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-29
Publication Date
2026-03-03
Estimated Expiration
2044-11-29

AI Technical Summary

Technical Problem

Existing OLED display panels have display abnormalities, mainly due to insufficient edge protection of the conductive part on the signal transmission side of the via, causing the electrodes to lift and break inside the via, affecting signal transmission.

Method used

In the display panel design, the orthographic projection of the first sub-edge is located between the second sub-edge and the main body. The first conductive part wraps around the first sub-edge to ensure that the wrapping value on the signal transmission direction side is greater than the wrapping value on the non-signal transmission direction side, thereby reducing the risk of breakage of the conductive part at the first sub-edge.

Benefits of technology

By enhancing the edge value on the signal transmission direction side, the signal transmission performance of the conductive part is improved, the possibility of display abnormalities is reduced, and pixel resolution is improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to a display panel and a display device. A first conductive part of the display panel comprises a first edge part and a second edge part; a first insulating layer is provided with a first via hole, and the first via hole exposes a first connection area; a first sub-edge of the first via hole is located in the projection of the first conductive part on a substrate; a second conductive part comprises a main body part and a first connecting part connected to the main body part, at least part of the first connecting part is located in the first via hole and connected with the first connection area; the projection of the first sub-edge on the substrate is located between the projection of a second sub-edge on the substrate and the projection of the main body part on the substrate; wherein the projection of the second sub-edge on the substrate is located outside the projection of the first conductive part on the substrate; or the projection of the second sub-edge on the substrate and the projection of the first conductive part on the substrate overlap, and the minimum distance between the first sub-edge and the first edge part is greater than the minimum distance between the second sub-edge and the second edge part. The application can guarantee the signal transmission performance of the second conductive part and reduce the risk of display abnormalities of the display panel.
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Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0002] Organic Light Emitting Diode (OLED) display technology is considered the most promising next-generation flat panel display technology. Compared to LCD technology, OLED technology has advantages such as low energy consumption, low cost, self-emissiveness, wide viewing angle, and fast response speed. However, current OLED display panels still suffer from display anomalies. Summary of the Invention

[0003] Therefore, it is necessary to provide a display panel and display device that can improve display defects.

[0004] In a first aspect, embodiments of this application provide a display panel, including:

[0005] substrate;

[0006] A first conductive portion is disposed on a substrate. The surface of the first conductive portion away from the substrate includes a first connection area. The first conductive portion includes a first side and a second side.

[0007] A first insulating layer is disposed on a substrate and covers a portion of the first conductive portion on the side away from the substrate. The first insulating layer is provided with a first via, which exposes a first connection area. The outer edge of the first via on the side near the substrate includes a first sub-edge near the first side and a second sub-edge near the second side. The orthographic projection of the first sub-edge on the substrate is located within the orthographic projection of the first conductive portion on the substrate.

[0008] The second conductive portion includes a main body portion and a first connecting portion connected to the main body portion. The main body portion is disposed on the side of the first insulating layer away from the substrate. At least a portion of the first connecting portion is located in the first via and connected to the first connecting area. The orthographic projection of the first sub-edge on the substrate is located between the orthographic projection of the second sub-edge on the substrate and the orthographic projection of the main body portion on the substrate.

[0009] Wherein, the orthographic projection of the second sub-side on the substrate is located outside the orthographic projection of the first conductive part on the substrate; or, the orthographic projection of the second sub-side on the substrate overlaps with the orthographic projection of the first conductive part on the substrate, and the minimum distance between the first sub-side and the first side portion is greater than the minimum distance between the second sub-side and the second side portion.

[0010] The display panel provided in this application embodiment has a first sub-edge whose orthographic projection on the substrate is located between the second sub-edge's orthographic projection on the substrate and the main body's orthographic projection on the substrate. This means that, in a direction parallel to the substrate surface, the first sub-edge is located between the second sub-edge and the main body; that is, the first sub-edge is the side edge on the signal transmission direction side of the first via, and the second sub-edge is the side edge on the non-signal transmission direction side of the first via. The first sub-edge's orthographic projection on the substrate is located within the first conductive portion's orthographic projection on the substrate, meaning the first conductive portion has an edge covering the first sub-edge. When the second sub-edge's orthographic projection on the substrate is outside the first conductive portion's orthographic projection on the substrate, the first conductive portion does not cover the second sub-edge. When the second sub-edge's orthographic projection on the substrate overlaps with the first conductive portion's orthographic projection on the substrate, the minimum distance between the first sub-edge and the first side portion is greater than the minimum distance between the second sub-edge and the second side portion; that is, the edge covering value of the first sub-edge is greater than the edge covering value of the second sub-edge. This is equivalent to making the edge value on the signal transmission direction side greater than the edge value on the non-signal transmission direction side. This reduces the risk of the second conductive part breaking at the first sub-edge, thereby ensuring the signal transmission performance of the second conductive part and reducing the possibility of display abnormalities in the display panel.

[0011] In one embodiment, the first conductive portion further includes a third side portion, and the first side portion, the third side portion, and the second side portion are arranged sequentially along the circumference of the first conductive portion;

[0012] The outer edge of the first via near the substrate also includes a third sub-edge near the third side, the orthographic projection of the third sub-edge on the substrate is outside the orthographic projection of the first conductive part on the substrate; or, the orthographic projection of the third sub-edge on the substrate overlaps with the orthographic projection of the first conductive part on the substrate, and the minimum distance between the first sub-edge and the first side is greater than or equal to the minimum distance between the third sub-edge and the third side.

[0013] In one embodiment, the orthographic projection of the third sub-side on the substrate overlaps with the orthographic projection of the first conductive portion on the substrate, and the minimum distance between the second sub-side and the second side portion is equal to the minimum distance between the third sub-side and the third side portion.

[0014] In one embodiment, the first conductive portion further includes a fourth side portion, and the first side portion, the third side portion, the second side portion and the fourth side portion are arranged sequentially along the circumference of the first conductive portion;

[0015] The outer edge of the first via near the substrate also includes a fourth sub-edge near the fourth side, the orthographic projection of the fourth sub-edge on the substrate is outside the orthographic projection of the first conductive part on the substrate; or, the orthographic projection of the fourth sub-edge on the substrate overlaps with the orthographic projection of the first conductive part on the substrate, and the minimum distance between the first sub-edge and the first side is greater than or equal to the minimum distance between the fourth sub-edge and the fourth side.

[0016] In one embodiment, the orthographic projection of the fourth sub-side on the substrate overlaps with the orthographic projection of the first conductive portion on the substrate, and the minimum distance between the second sub-side and the second side portion is equal to the minimum distance between the fourth sub-side and the fourth side portion.

[0017] In one embodiment, the display panel further includes:

[0018] A second insulating layer is disposed between the film layer containing the first conductive portion and the substrate; the second insulating layer is provided with a second via; the orthographic projection of the first via on the substrate is located outside the orthographic projection of the second via on the substrate.

[0019] A third conductive portion is located between the substrate and the second insulating layer. The surface of the third conductive portion away from the substrate includes a second connection area, and a second via exposes the second connection area.

[0020] The second connecting part is connected to the first conductive part. The second connecting part is disposed in the same layer as the first conductive part. At least a portion of the second connecting part is located in the second through hole and is connected to the second connecting area.

[0021] Optionally, the second side, the third side, or the fourth side is connected to the second connecting part;

[0022] Optionally, the fourth side is connected to the second connecting portion; the orthographic projections of the main body portion on the substrate, the first side portion on the substrate, and the second side portion on the substrate are arranged sequentially along a first direction, and the orthographic projections of the third side portion on the substrate, the fourth side portion on the substrate, and the second connecting portion on the substrate are arranged sequentially along a second direction, with the first and second directions intersecting; or,

[0023] The second side portion is connected to the second connecting portion; the orthographic projection of the main body portion on the substrate, the orthographic projection of the first side portion on the substrate, the orthographic projection of the second side portion on the substrate, and the orthographic projection of the second connecting portion on the substrate are arranged sequentially along the first direction, and the third side portion and the fourth side portion are arranged along the second direction, and the first direction and the second direction intersect.

[0024] In one embodiment, the first conductive portion further includes a third side portion, and the first side portion, the third side portion, and the second side portion are arranged sequentially along the circumference of the first conductive portion;

[0025] The outer edge of the first via near the substrate also includes a third sub-edge near the third side, the orthographic projection of the third sub-edge on the substrate is outside the orthographic projection of the first conductive part on the substrate; or, the orthographic projection of the third sub-edge on the substrate overlaps with the orthographic projection of the first conductive part on the substrate, and the minimum distance between the second sub-edge and the second side is less than or equal to the minimum distance between the third sub-edge and the third side.

[0026] In one embodiment, the orthographic projection of the third sub-side on the substrate overlaps with the orthographic projection of the first conductive portion on the substrate, and the minimum distance between the first sub-side and the first side portion is equal to the minimum distance between the third sub-side and the third side portion.

[0027] In one embodiment, the first conductive portion further includes a fourth side portion, and the first side portion, the third side portion, the second side portion and the fourth side portion are arranged sequentially along the circumference of the first conductive portion;

[0028] The outer edge of the first via near the substrate also includes a fourth sub-edge near the fourth side, the orthographic projection of the fourth sub-edge on the substrate is outside the orthographic projection of the first conductive part on the substrate; or, the orthographic projection of the fourth sub-edge on the substrate overlaps with the orthographic projection of the first conductive part on the substrate, and the minimum distance between the second sub-edge and the second side is less than or equal to the minimum distance between the fourth sub-edge and the fourth side.

[0029] In one embodiment, the orthographic projection of the fourth sub-side on the substrate overlaps with the orthographic projection of the first conductive portion on the substrate, and the minimum distance between the first sub-side and the first side portion is equal to the minimum distance between the fourth sub-side and the fourth side portion.

[0030] In one embodiment, the display panel further includes:

[0031] A second insulating layer is disposed between the film layer containing the first conductive portion and the substrate; the second insulating layer is provided with a second via; the orthographic projection of the first via on the substrate overlaps with the orthographic projection of the second via on the substrate;

[0032] A third conductive portion is located between the substrate and the second insulating layer. The surface of the third conductive portion away from the substrate includes a second connection area, and a second via exposes the second connection area. At least a portion of the first conductive portion is located in the second via and is connected to the second connection area.

[0033] Optionally, the display panel further includes: a second connecting portion connected to the first conductive portion, the second connecting portion being disposed on the same layer as the first conductive portion, at least a portion of the second connecting portion and at least a portion of the first conductive portion being located in the second via and connected to the second connecting area;

[0034] Optionally, the second side, the third side, or the fourth side is connected to the second connecting portion; and / or, the orthographic projection of the second sub-side, the third sub-side, or the fourth sub-side on the substrate overlaps with the orthographic projection of the second via on the substrate.

[0035] Optionally, the fourth side is connected to the second connecting portion; the orthographic projections of the main body portion on the substrate, the first side portion on the substrate, and the second side portion on the substrate are arranged sequentially along a first direction, and the orthographic projections of the third side portion on the substrate, the fourth side portion on the substrate, and the second connecting portion on the substrate are arranged sequentially along a second direction, with the first and second directions intersecting; or,

[0036] The second side is connected to the second connecting part; the orthographic projection of the main body on the substrate, the orthographic projection of the first side on the substrate, the orthographic projection of the second side on the substrate, and the orthographic projection of the second connecting part on the substrate are arranged sequentially along the first direction, and the third side and the fourth side are arranged along the second direction, and the first direction and the second direction intersect.

[0037] Optionally, the first insulating layer may comprise an organic material.

[0038] In one embodiment, the first side and the second side are arranged along a first direction;

[0039] Optionally, the third and fourth sides are arranged along the second direction, and the first and second directions intersect.

[0040] Optionally, the first side and the second side extend along a second direction;

[0041] Optionally, the third and fourth sides extend along the first direction;

[0042] Optionally, the outer edge of the first via on the side closest to the substrate is a circle, an ellipse, a rectangle, a rounded rectangle, a polygon with a side length greater than or equal to 5, or a rounded polygon with a side length greater than or equal to 5.

[0043] Optionally, the first conductive part is circular, elliptical, rectangular, rounded rectangle, polygon with a side length greater than or equal to 5, or rounded polygon with a side length greater than or equal to 5.

[0044] Optionally, the first conductive part is a rounded rectangle; the outer edge of the first via near the substrate is circular; or, the first conductive part is a rounded square; the outer edge of the first via near the substrate is elliptical.

[0045] Optionally, the length of the first side of the first conductive portion of the rounded rectangle is less than the length of the third side; or, the major axis of the ellipse corresponding to the outer edge of the first via near the substrate is parallel to the extending direction of the first side.

[0046] In one embodiment, the first side and the second side are arranged along a first direction, and the third side and the fourth side are arranged along a second direction, wherein the first direction and the second direction intersect.

[0047] Optionally, the orthographic projection of the first conductive part on the substrate is located at the outer periphery of the orthographic projection of the first via on the side closer to the substrate.

[0048] Optionally, the minimum distance between the second sub-edge and the second side, the minimum distance between the third sub-edge and the third side, and the minimum distance between the fourth sub-edge and the fourth side are all equal;

[0049] Optionally, the maximum dimension of the first via along the first direction is equal to the maximum dimension of the first via along the second direction; the minimum distance between the first side and the second side is greater than the minimum distance between the third side and the fourth side;

[0050] Alternatively, the maximum dimension of the first via along the first direction is less than the maximum dimension of the first via along the second direction; the minimum distance between the first side and the second side is equal to the minimum distance between the third side and the fourth side.

[0051] In one embodiment, the display panel further includes a pixel defining layer, which has pixel openings. The pixel defining layer is located on the side of the film layer where the second conductive portion is located away from the substrate, and the pixel openings expose at least a portion of the main body portion.

[0052] Optionally, at least a portion of the main body may serve as a pixel electrode;

[0053] Optionally, the display panel may also include a light-emitting functional layer, at least a portion of which is located within the pixel openings;

[0054] Optionally, the display panel may also include a second electrode located on the side of the light-emitting functional layer away from the substrate.

[0055] In one embodiment, the display panel further includes at least one light-emitting unit, the light-emitting unit including a first electrode, a light-emitting functional layer and a second electrode stacked sequentially in a direction away from the substrate, with the main body serving as the first electrode;

[0056] Optionally, the second side of the same light-emitting unit is parallel to the fifth side of the first connecting part of the light-emitting unit on the side away from the main body.

[0057] In one embodiment, at least one light-emitting unit includes a first light-emitting unit and a second light-emitting unit;

[0058] The first side, second side, first connecting part, and main body of the first light-emitting unit are arranged along the third direction;

[0059] The first side, second side, first connecting part, and main body of the second light-emitting unit are arranged along the fourth direction; the third direction and the fourth direction intersect.

[0060] In one embodiment, the aperture of the outer edge of the first via on the side closest to the substrate, when projected onto the substrate, is greater than or equal to 1.5 micrometers and less than or equal to 5 micrometers.

[0061] Optionally, the aperture of the outer edge of the first via on the substrate side, when projected onto the substrate, is greater than or equal to 2.5 micrometers and less than or equal to 3 micrometers.

[0062] Optionally, the first conductive portion includes a titanium layer, an aluminum layer, and a titanium layer sequentially stacked along the thickness direction of the substrate.

[0063] Optionally, the first insulating layer may include an organic material;

[0064] The display panel also includes power signal lines disposed on the substrate. The power signal lines are disposed on the same layer and material as the first conductive part and are insulated from each other.

[0065] Optionally, the display panel also includes data signal lines disposed on the substrate, wherein the data signal lines are disposed on the same layer and material as the first conductive part and are insulated from each other;

[0066] Optionally, the display panel also includes fan-out traces disposed on the substrate, at least a portion of which is disposed on the same layer and material as the first conductive portion and is insulated from each other; the fan-out traces are connected to corresponding data signal lines; at least a portion of the fan-out traces are located in the display area of ​​the display panel.

[0067] Optionally, the display panel also includes a reference potential line disposed on the substrate. The reference potential line is disposed on the same layer and material as the first conductive part and is insulated from each other.

[0068] In one embodiment, the orthographic projection of the third sub-side on the substrate overlaps with the orthographic projection of the first conductive portion on the substrate, and the difference between the minimum distance between the first sub-side and the first side portion and the minimum distance between the second sub-side and the second side portion is greater than or equal to 0 micrometers and less than or equal to 5 micrometers.

[0069] Optionally, the difference between the minimum distance between the first sub-side and the first side and the minimum distance between the second sub-side and the second side is greater than or equal to 0.5 micrometers and less than or equal to 5 micrometers;

[0070] Optionally, the minimum distance between the second sub-edge and the second side is greater than or equal to 0.

[0071] Secondly, embodiments of this application provide a display panel, including:

[0072] substrate;

[0073] A first conductive portion is disposed on a substrate. The surface of the first conductive portion away from the substrate includes a first connection area. The first conductive portion includes a first side portion, a second side portion, and a third side portion arranged sequentially along the circumference of the first conductive portion.

[0074] A first insulating layer is disposed on a substrate and covers a portion of the first conductive portion on the side away from the substrate. The first insulating layer is provided with a first via, which exposes a first connection area. The outer edge of the first via on the side near the substrate includes a first sub-edge near the first side, a second sub-edge near the second side, and a third sub-edge near the third side. The orthographic projection of the first sub-edge on the substrate is located within the orthographic projection of the first conductive portion on the substrate.

[0075] The second conductive portion includes a main body portion and a first connecting portion connected to the main body portion. The main body portion is disposed on the side of the insulating layer away from the substrate. At least a portion of the first connecting portion is located in the first via and connected to the first connecting area. The orthographic projection of the first sub-edge on the substrate is located between the orthographic projection of the second sub-edge on the substrate and the orthographic projection of the main body portion on the substrate.

[0076] Wherein, the orthographic projection of the third sub-side on the substrate is outside the orthographic projection of the first conductive part on the substrate; or, the orthographic projection of the third sub-side on the substrate overlaps with the orthographic projection of the first conductive part on the substrate, and the minimum distance between the first sub-side and the first side portion is greater than the minimum distance between the third sub-side and the third side portion.

[0077] The display panel provided in this application embodiment has a first sub-edge whose orthographic projection on the substrate is located between the second sub-edge's orthographic projection on the substrate and the main body's orthographic projection on the substrate. This means that, in a direction parallel to the substrate surface, the first sub-edge is located between the second sub-edge and the main body; that is, the first sub-edge is the side edge on the signal transmission direction side of the first via, and the second and third sub-edges are the sides edge on the non-signal transmission direction side of the first via. The first sub-edge's orthographic projection on the substrate is located within the first conductive portion's orthographic projection on the substrate, meaning the first conductive portion has an edge covering the first sub-edge. When the third sub-edge's orthographic projection on the substrate is outside the first conductive portion's orthographic projection on the substrate, the first conductive portion does not cover the third sub-edge. When the third sub-edge's orthographic projection on the substrate overlaps with the first conductive portion's orthographic projection on the substrate, the minimum distance between the first sub-edge and the first side portion is greater than the minimum distance between the third sub-edge and the second side portion; that is, the edge covering value of the first sub-edge is greater than the edge covering value of the third sub-edge. This is equivalent to making the edge value on the signal transmission direction side greater than the edge value on the non-signal transmission direction side. This can reduce the risk of the second conductive part breaking at the first sub-edge, thereby ensuring the signal transmission performance of the second conductive part and reducing the risk of display abnormalities in the display panel.

[0078] Thirdly, embodiments of this application provide a display device, including a display panel as described in the first or second aspect. The display device provided by embodiments of this application can reduce the risk of display malfunctions. Attached Figure Description

[0079] To more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of this application, the drawings used in the description of the embodiments or exemplary embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0080] Figure 1This is a partial cross-sectional structural diagram of a display panel provided in an embodiment of this application.

[0081] Figure 2 for Figure 1 A planar schematic diagram of the first and second conductive parts in the display panel shown.

[0082] Figure 3A for Figure 2 A planar schematic diagram of the first conductive part and the first via in the process.

[0083] Figure 3B for Figure 3A A cross-sectional schematic diagram of the first conductive part and the first via in the image.

[0084] Figure 4A This is another planar schematic diagram of the first and second conductive parts in the display panel.

[0085] Figure 4B This is a schematic diagram of the structure of the film layer containing the first conductive part and the second conductive part of another display panel provided in an embodiment of this application.

[0086] Figure 5 for Figure 4A The diagram shows a cross-sectional view of the first and second vias in the display panel, where they do not overlap.

[0087] Figure 6 This is a schematic diagram of the structure of the film layer containing the first conductive portion and the second conductive portion of another display panel provided in an embodiment of this application.

[0088] Figure 7 This is a plan view of the first conductive portion and the second conductive portion of a display panel provided in an embodiment of this application.

[0089] Figure 8A This is a schematic diagram of the structure of the film layer containing the first conductive part and the second conductive part of another display panel provided in an embodiment of this application.

[0090] Figure 8B This is a schematic diagram of the structure of the film layer containing the first conductive part and the second conductive part of another display panel provided in an embodiment of this application.

[0091] Figure 9 for Figure 6 The diagram shows a cross-sectional view of the overlapping first and second vias in the display panel.

[0092] Figure 10 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0093] Figure 11for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0094] Figure 12 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0095] Figure 13 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0096] Figure 14 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0097] Figure 15 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0098] Figure 16 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0099] Figure 17 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0100] Figure 18 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0101] Figure 19 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0102] Figure 20 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0103] Figure 21 for Figure 2 Another planar schematic diagram of the first conductive part and the first via in the middle.

[0104] Figure 22 This is a schematic diagram of the structure of the film layer containing the first conductive part and the second conductive part of another display panel provided in an embodiment of this application.

[0105] Explanation of reference numerals in the attached drawings: 10, display panel; 11, substrate; 12, first conductive portion; 12a, first connection area; 121, first edge portion; 122, second edge portion; 123, third edge portion; 124, fourth edge portion; 13, first insulating layer; 13a, first via; 13a1, first sub-edge; 13a2, second sub-edge; 13a3, third sub-edge; 13a4, fourth sub-edge; 14, second conductive portion; 141, main body portion; 142, first connection portion; 1421, Fifth edge; 15, Second insulating layer; 15a, Second via; 16, Third conductive part; 16a, Second connection area; 17, Second connection part; 18, Pixel limiting layer; 19, Light-emitting unit; 191, First electrode; 192, Light-emitting functional layer; 193, Second electrode; 19a, First light-emitting unit; 19b, Second light-emitting unit; 110, Power signal line; 111, Data signal line; 112, Fan-out trace; 113, Reference potential line. Detailed Implementation

[0106] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of this application.

[0107] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, this does not indicate any order, quantity, or importance, but is merely used to distinguish different components. These terms are used only to distinguish one element from another. For example, without departing from the scope of this application, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. Words such as “comprising” or “including” mean that the element or object preceding the word covers the element or object listed following the word and its equivalents, without excluding other elements or objects.

[0108] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0109] In the relevant display panels, there is a problem with display abnormalities. Through research, the inventors discovered that when the electrode is connected to the conductive part below through a via, the edge of the conductive part is not sufficiently wrapped (or not wrapped) on the signal transmission side of the via, causing the edge of the conductive part to lift up inside the via. This leads to breakage of the electrode on the conductive part and the electrode on the sidewall of the via, affecting signal transmission and causing display abnormalities.

[0110] In view of at least one of the above-mentioned problems, embodiments of this application provide a display panel and a display device. The orthographic projection of a first sub-edge on the substrate is located between the orthographic projection of a second sub-edge on the substrate and the orthographic projection of a main body portion on the substrate. This is equivalent to: in a direction parallel to the substrate surface, the first sub-edge is located between the second sub-edge and the main body portion, that is: the first sub-edge is the side edge on the signal transmission direction side of the first via, and the second sub-edge is the side edge on the non-signal transmission direction side of the first via. The orthographic projection of the first sub-edge on the substrate is located within the orthographic projection of the first conductive portion on the substrate, which is equivalent to: the first conductive portion has an edge covering the first sub-edge. When the orthographic projection of the second sub-edge on the substrate is outside the orthographic projection of the first conductive portion on the substrate, the first conductive portion does not cover the second sub-edge. When the orthographic projection of the second sub-edge on the substrate overlaps with the orthographic projection of the first conductive portion on the substrate, the minimum distance between the first sub-edge and the first side portion is greater than the minimum distance between the second sub-edge and the second side portion, that is: the edge covering value of the first sub-edge is greater than the edge covering value of the second sub-edge. This effectively increases the edge value on the signal transmission direction side compared to the non-signal transmission direction side. This reduces the risk of breakage at the first sub-edge of the second conductive part, thus ensuring its signal transmission performance and reducing the likelihood of display abnormalities in the display panel. For example, a smaller or non-existent edge value on the second sub-edge reduces the size of the first conductive part, which is beneficial for improving pixel resolution.

[0111] Specifically, refer to Figures 1-22 As shown, this application embodiment provides a display panel 10, which can be an organic light-emitting diode (OLED) display or a quantum dot light-emitting diode (QLED) display.

[0112] Specifically, the display panel 10 includes a substrate 11, a first conductive portion 12, a first insulating layer 13, and a second conductive portion 14. The first conductive portion 12 is disposed on the substrate 11, and the surface of the first conductive portion 12 away from the substrate 11 includes a first connection area 12a. The first conductive portion 12 includes a first edge 121 and a second edge 122. The first insulating layer 13 is disposed on the substrate 11 and covers a portion of the first conductive portion 12 away from the substrate 11. The first insulating layer 13 has a first via 13a, which exposes the first connection area 12a. The outer edge of the first via 13a near the substrate 11 includes a first sub-edge 13a1 near the first edge 121 and a second sub-edge 13a2 near the second edge 122. The outer edge of the first via 13a near the substrate 11 may correspond to the outline of the first insulating layer 13 facing and surrounding the sidewall of the first via 13a near the substrate 11.

[0113] The orthographic projection of the first sub-edge 13a1 on the substrate 11 lies within the orthographic projection of the first conductive portion 12 on the substrate 11, which is equivalent to the first conductive portion 12 having an edge surrounding the first sub-edge 13a1. The second conductive portion 14 includes a main body 141 and a first connecting portion 142 connected to the main body 141. The main body 141 is disposed on the side of the first insulating layer 13 facing away from the substrate 11. At least a portion of the first connecting portion 142 is located in the first via 13a and connected to the first connecting area 12a. Here, the main body 141 corresponds to the functional area of ​​the second conductive portion 14. Electrical signals are transmitted from the first connecting area 12a of the first conductive portion 12 to the first connecting portion 142, and then to the main body 141. The orthographic projection of the first sub-edge 13a1 on the substrate 11 lies between the orthographic projection of the second sub-edge 13a2 on the substrate 11 and the orthographic projection of the main body 141 on the substrate 11. This can be equivalent to the following: in a direction parallel to the surface of the substrate 11, the first sub-side 13a1 is located between the second sub-side 13a2 and the main body 141, that is: the first sub-side 13a1 is the side of the first via 13a on the signal transmission direction side, and the second sub-side 13a2 is the side of the first via 13a on the non-signal transmission direction side. For example, in Figure 2 and Figure 3B In the diagram, a one-way arrow indicates the direction of signal transmission. Figure 3B Can be along Figure 3A A cross-sectional view along the A1A2 direction.

[0114] Wherein, the orthographic projection of the second sub-side 13a2 on the substrate 11 is outside the orthographic projection of the first conductive portion 12 on the substrate 11; or, the orthographic projection of the second sub-side 13a2 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11, and the minimum distance between the first sub-side 13a1 and the first side portion 121 is greater than the minimum distance between the second sub-side 13a2 and the second side portion 122.

[0115] It is understood that the substrate 11 can be a flexible substrate 11, such as a polyimide (PI) substrate 11, a polyethylene terephthalate (PET) substrate 11, or a polymethyl methacrylate (PMMA) substrate 11. The substrate 11 can also be a rigid substrate 11, such as glass.

[0116] The display panel 10 provided in this embodiment of the application, such as Figure 12 As shown, when the orthographic projection of the second sub-edge 13a2 on the substrate 11 is outside the orthographic projection of the first conductive portion 12 on the substrate 11, the first conductive portion 12 does not surround the second sub-edge 13a2. For example, the distance (e.g., minimum distance) between the second sub-edge 13a2 and the second edge portion 122 can be less than or equal to 0.5 micrometers, such as 0, 0.1 micrometers, 0.2 micrometers, 0.3 micrometers, 0.4 micrometers, or 0.5 micrometers.

[0117] like Figure 3A and 3B As shown, when the orthographic projection of the second sub-edge 13a2 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11, the minimum distance 'a' between the first sub-edge 13a1 and the first side portion 121 is greater than the minimum distance 'b' between the second sub-edge 13a2 and the second side portion 122. That is, the edge coverage value of the first sub-edge 13a1 is greater than the edge coverage value of the second sub-edge 13a2. This effectively makes the edge coverage value on the signal transmission direction side greater than the edge coverage value on the non-signal transmission direction side. This reduces the risk of breakage of the second conductive portion 14 at the first sub-edge 13a1, thereby ensuring the signal transmission performance of the second conductive portion 14 and reducing the possibility of display abnormalities in the display panel 10.

[0118] It should also be noted that, in this embodiment, by making the edge-covering value of the first conductive portion 12 to the first sub-edge 13a1 greater than the edge-covering value of the first conductive portion 12 to the second sub-edge 13a2, it is equivalent to increasing the edge-covering value on the signal transmission direction side of the first via 13a, without increasing the edge-covering value on the second sub-edge 13a2 side of the first via 13a. Thus, only a small increase in area is needed for the original first conductive portion 12 to solve the display anomaly problem, thereby saving horizontal space in the display panel 10 and facilitating high-resolution (PPI) design. The first sub-edge 13a1 and the first edge 121 may be parallel or non-parallel. The second sub-edge 13a2 and the second edge 122 may be parallel or non-parallel. The first sub-edge 13a1 may include a straight edge, a curved edge, or a polygonal edge. The first edge 121 may include a straight edge, a curved edge, or a polygonal edge. The second sub-edge 13a2 may include a straight edge, a curved edge, or a polygonal edge. The second edge 122 may include a straight edge, a curved edge, or a polygonal edge.

[0119] In one embodiment, such as Figure 3A and Figure 4A , Figure 4B As shown, the first conductive portion 12 further includes a third side portion 123. The first side portion 121, the third side portion 123, and the second side portion 122 are arranged sequentially along the circumferential direction (e.g., the circumferential direction) of the first conductive portion 12. The outer edge of the first via 13a near the substrate 11 also includes a third sub-side 13a3 near the third side portion 123. The third sub-side 13a3 and the third side portion 123 may be parallel or non-parallel. The third sub-side 13a3 may include a straight edge, a curved edge, or a polygonal edge. The third side portion 123 may include a straight edge, a curved edge, or a polygonal edge.

[0120] In one example, such as Figure 13 As shown, the orthographic projection of the third sub-edge 13a3 on the substrate 11 is outside the orthographic projection of the first conductive portion 12 on the substrate 11. That is, the first conductive portion 12 does not enclose the third sub-edge 13a3, thereby reducing the size of the first conductive portion 12 and improving pixel resolution. For example, the distance (e.g., minimum distance) between the third sub-edge 13a3 and the third side portion 123 can be less than or equal to 0.5 micrometers, such as 0, 0.1 micrometers, 0.2 micrometers, 0.3 micrometers, 0.4 micrometers, or 0.5 micrometers.

[0121] In another example, combined Figure 10 As shown, the orthographic projection of the third sub-side 13a3 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11. The minimum distance 'a' between the first sub-side 13a1 and the first side portion 121 is greater than or equal to the minimum distance 'c' between the third sub-side 13a3 and the third side portion 123. That is, the edge coverage value of the first sub-side 13a1 is greater than or equal to the edge coverage value of the third sub-side 13a3.

[0122] For example, the minimum distance 'a' between the first sub-edge 13a1 and the first side portion 121 is equal to the minimum distance 'c' between the third sub-edge 13a3 and the third side portion 123, meaning the edge coverage of the first sub-edge 13a1 is equal to the edge coverage of the third sub-edge 13a3. Thus, the first connecting portion 142 is less prone to breakage at the third sub-edge 13a3, ensuring a larger connection area between the first connecting portion 142 located on the sidewall of the first via 13a and the first connecting portion 142 located on the first connecting area 12a, which helps reduce connection resistance.

[0123] For example, the minimum distance 'a' between the first sub-side 13a1 and the first side portion 121 is greater than the minimum distance 'c' between the third sub-side 13a3 and the third side portion 123, meaning the edge value of the first sub-side 13a1 is greater than the edge value of the third sub-side 13a3. The edge value of the third sub-side 13a3 is smaller, which reduces the size of the first conductive portion 12 and helps improve pixel resolution.

[0124] In one embodiment, the minimum distance b between the second sub-edge 13a2 and the second side portion 122 is equal to the minimum distance c between the third sub-edge 13a3 and the third side portion 123. That is, the edge value of the second sub-edge 13a2 is equal to the edge value of the third sub-edge 13a3. Thus, the edge value of the third sub-edge 13a3 is smaller, thereby reducing the size of the first conductive portion 12 and improving pixel resolution.

[0125] It is understandable that the minimum distance b between the second sub-edge 13a2 and the second side 122 and the minimum distance c between the third sub-edge 13a3 and the third side 123 may not be equal. For example, b may be greater than c. Or b may be less than c.

[0126] In one embodiment, the first conductive portion 12 further includes a fourth side portion 124, wherein the first side portion 121, the third side portion 123, the second side portion 122, and the fourth side portion 124 are arranged sequentially along the circumference of the first conductive portion 12. The outer edge of the first via 13a near the substrate 11 also includes a fourth sub-side 13a4 near the fourth side portion 124. The fourth sub-side 13a4 and the fourth side portion 124 may be parallel or non-parallel. The fourth sub-side 13a4 may include a straight edge, a curved edge, or a polygonal edge. The fourth side portion 124 may include a straight edge, a curved edge, or a polygonal edge.

[0127] In one example, such as Figure 14As shown, the orthographic projection of the fourth sub-edge 13a4 on the substrate 11 is outside the orthographic projection of the first conductive portion 12 on the substrate 11. That is, the first conductive portion 12 does not enclose the fourth sub-edge 13a4, thereby reducing the size of the first conductive portion 12 and improving pixel resolution. For example, the distance (e.g., minimum distance) between the fourth sub-edge 13a4 and the fourth side portion 124 can be less than or equal to 0.5 micrometers, such as 0.1 micrometers, 0.2 micrometers, 0.3 micrometers, 0.4 micrometers, or 0.5 micrometers.

[0128] For example, the first conductive part 12 does not have a border around one or more of the second sub-side 13a2, the third sub-side 13a3, and the fourth sub-side 13a4, such as Figures 12-14 , Figure 18 , Figure 19 , Figure 20 , Figure 21 As shown.

[0129] In another example, combined Figure 10 As shown, the orthographic projection of the fourth sub-side 13a4 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11. The minimum distance 'a' between the first sub-side 13a1 and the first side portion 121 is greater than or equal to the minimum distance 'd' between the fourth sub-side 13a4 and the fourth side portion 124. That is, the edge coverage value of the first sub-side 13a1 is greater than or equal to the edge coverage value of the fourth sub-side 13a4.

[0130] For example, the minimum distance 'a' between the first sub-edge 13a1 and the first side portion 121 is equal to the minimum distance 'd' between the fourth sub-edge 13a4 and the fourth side portion 124. That is, the edge coverage of the first sub-edge 13a1 is equal to the edge coverage of the fourth sub-edge 13a4. Thus, the first connecting portion 142 is less prone to breakage at the fourth sub-edge 13a4, ensuring a larger connection area between the first connecting portion 142 located on the sidewall of the first via 13a and the first connecting portion 142 located in the first connecting area 12a, which helps reduce connection resistance.

[0131] In one embodiment, the minimum distance b between the second sub-edge 13a2 and the second side portion 122 is equal to the minimum distance d between the fourth sub-edge 13a4 and the fourth side portion 124. That is, the edge value of the second sub-edge 13a2 is equal to the edge value of the fourth sub-edge 13a4. Thus, the edge value of the fourth sub-edge 13a4 is smaller, thereby reducing the size of the first conductive portion 12 and improving pixel resolution.

[0132] It is understandable that the minimum distance b between the second sub-edge 13a2 and the second side 122 and the minimum distance d between the fourth sub-edge 13a4 and the fourth side 124 may not be equal. For example, b may be greater than d. Or b may be less than d.

[0133] For example, the minimum distance c between the third sub-edge 13a3 and the third side 123 and the minimum distance d between the fourth sub-edge 13a4 and the fourth side 124 can be equal or unequal. For example, d can be greater than c. For example, d can be less than c.

[0134] In one embodiment, reference Figure 5 As shown, the display panel 10 also includes a second insulating layer 15, a third conductive portion 16, and a second connecting portion 17. The second insulating layer 15 is disposed between the film layer containing the first conductive portion 12 and the substrate 11; the second insulating layer 15 is provided with a second via 15a, and the orthographic projection of the first via 13a on the substrate 11 is located outside the orthographic projection of the second via 15a on the substrate 11, that is, in the thickness direction Z of the display panel 10, the first via 13a and the second via 15a do not overlap. The orthographic projection of the first via 13a on the substrate 11 and the orthographic projection of the second via 15a on the substrate 11 do not overlap, or the minimum distance between the orthographic projection of the first via 13a on the substrate 11 and the orthographic projection of the second via 15a on the substrate 11 is greater than 3 micrometers, for example greater than 5 micrometers, for example, it can be 3 micrometers, 4 micrometers, 5 micrometers, or 6 micrometers. The required edge value of the third sub-edge 13a3 and / or the edge value of the fourth sub-edge 13a4 is small, which can ensure the reliability of signal transmission and is beneficial to improving pixel resolution. Figure 5 Can be along Figure 4A A cross-sectional view along the B1B2 direction. The large spacing between the first via 13a and the second via 15a reduces the impact of the first conductive part 12 on the edge values ​​of each side of the first via.

[0135] The third conductive portion 16 is located between the substrate 11 and the second insulating layer 15. The surface of the third conductive portion 16 away from the substrate 11 includes a second connection area 16a, and the second via 15a exposes the second connection area 16a.

[0136] The second connecting portion 17 is connected to the first conductive portion 12, and the second connecting portion 17 and the first conductive portion 12 are disposed in the same layer. At least a portion of the second connecting portion 17 is located in the second via 15a and is connected to the second connecting area 16a. Multiple structures disposed in the same layer can be obtained by patterning the same film layer, thereby simplifying the process. It is understood that other film layers may be disposed between the film layer where the third conductive portion 16 is located and the film layer where the first conductive portion 12 is located, and this embodiment of the application does not impose any limitations on this.

[0137] It should be noted that the film layer above the area where the via is located will have undulations. The above arrangement prevents the first via 13a and the second via 15a from overlapping, which can reduce the degree of undulation of the second conductive part 14 at the first via 13a, which is beneficial to the subsequent film layer fabrication.

[0138] Optionally, the second side 122, the third side 123, or the fourth side 124 (e.g., one of the second side 122, the third side 123, or the fourth side 124) is connected to the second connecting portion 17. Compared to a configuration where multiple sides (e.g., at least two of the second side 122, the third side 123, and the fourth side 124) are connected to the second connecting portion 17, the above arrangement reduces the area of ​​the second connecting portion 17, which is beneficial for high PPI design.

[0139] It is understandable that at least two of the second side portion 122, the third side portion 123, and the fourth side portion 124 may be connected to the second connecting portion 17.

[0140] Optional, such as Figure 4A and Figure 4B As shown, the fourth side portion 124 is connected to the second connecting portion 17. The orthographic projections of the main body portion 141 on the substrate 11, the first side portion 121 on the substrate 11, and the second side portion 122 on the substrate 11 are arranged sequentially along the first direction X. The orthographic projections of the third side portion 123 on the substrate 11, the fourth side portion 124 on the substrate 11, and the second connecting portion 17 on the substrate 11 are arranged sequentially along the second direction Y. The first direction X and the second direction Y intersect, for example, perpendicularly.

[0141] Or, such as Figure 6 As shown, the second side portion 122 is connected to the second connecting portion 17. The orthographic projections of the main body portion 141 on the substrate 11, the first side portion 121 on the substrate 11, the second side portion 122 on the substrate 11, and the second connecting portion 17 on the substrate 11 are arranged sequentially along the first direction X. The third side portion 123 and the fourth side portion 124 are arranged along the second direction Y. The first direction X and the second direction Y intersect, for example, perpendicularly.

[0142] The above settings allow designers to create layouts based on actual needs, improving space utilization and enabling high PPI designs. It is understood that the two different layout methods described above can be applied to the layout design of the same display panel 10.

[0143] In one embodiment, such as Figure 6 As shown, the first conductive portion 12 also includes a third side portion 123, and the first side portion 121, the third side portion 123, and the second side portion 122 are arranged sequentially along the circumference of the first conductive portion 12. The outer edge of the first via 13a near the substrate 11 also includes a third sub-side 13a3 near the third side portion 123.

[0144] In one example, the orthographic projection of the third sub-edge 13a3 on the substrate 11 is outside the orthographic projection of the first conductive portion 12 on the substrate 11, that is, the first conductive portion 12 does not enclose the third sub-edge 13a3, so as to reduce the size of the first conductive portion 12 and improve the pixel resolution.

[0145] In another example, combined Figure 10 As shown, the orthographic projection of the third sub-side 13a3 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11. The minimum distance b between the second sub-side 13a2 and the second side portion 122 is less than or equal to the minimum distance c between the third sub-side 13a3 and the third side portion 123. That is, the edge value of the second sub-side 13a2 is less than or equal to the edge value of the third sub-side 13a3.

[0146] For example, the minimum distance b between the second sub-side 13a2 and the second side 122 is equal to the minimum distance c between the third sub-side 13a3 and the third side 123. That is, the edge value of the second sub-side 13a2 is equal to the edge value of the third sub-side 13a3. The edge value of the third sub-side 13a3 is smaller, so as to reduce the size of the first conductive part 12, which is beneficial to improving the pixel resolution.

[0147] For example, the minimum distance b between the second sub-side 13a2 and the second side portion 122 is less than the minimum distance c between the third sub-side 13a3 and the third side portion 123. That is, the edge coverage of the second sub-side 13a2 is less than the edge coverage of the third sub-side 13a3. Thus, the first connecting portion 142 is less likely to break at the third sub-side 13a3, ensuring that the first connecting portion 142 located on the sidewall of the first via 13a and the first connecting portion 142 located on the first connecting area 12a have a larger connection area, which helps to reduce connection resistance.

[0148] In one embodiment, the orthographic projection of the third sub-edge 13a3 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11, and the minimum distance 'a' between the first sub-edge 13a1 and the first side portion 121 is equal to the minimum distance 'c' between the third sub-edge 13a3 and the third side portion 123. That is, the edge coverage of the third sub-edge 13a3 is equal to the edge coverage of the first sub-edge 13a1. Thus, the first connecting portion 142 is less prone to breakage at the third sub-edge 13a3, ensuring that the first connecting portion 142 located on the sidewall of the first via 13a and the first connecting portion 142 located on the first connecting area 12a have a large connection area, which is beneficial for reducing connection resistance.

[0149] It is understandable that the minimum distance 'a' between the first sub-edge 13a1 and the first side 121 and the minimum distance 'c' between the third sub-edge 13a3 and the third side 123 may not be equal. For example, 'a' may be greater than 'c'.

[0150] In one embodiment, the first conductive portion 12 further includes a fourth side portion 124, wherein the first side portion 121, the third side portion 123, the second side portion 122, and the fourth side portion 124 are arranged sequentially along the circumference of the first conductive portion 12. The outer edge of the first via 13a near the substrate 11 also includes a fourth sub-side 13a4 near the fourth side portion 124.

[0151] In one example, the orthographic projection of the fourth sub-edge 13a4 on the substrate 11 is outside the orthographic projection of the first conductive portion 12 on the substrate 11, that is, the first conductive portion 12 does not enclose the fourth sub-edge 13a4, so as to reduce the size of the first conductive portion 12 and improve the pixel resolution.

[0152] In another example, combined Figure 10 As shown, the orthographic projection of the fourth sub-side 13a4 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11. The minimum distance b between the second sub-side 13a2 and the second side portion 122 is less than or equal to the minimum distance d between the fourth sub-side 13a4 and the fourth side portion 124. That is, the edge coverage value of the fourth sub-side 13a4 is less than or equal to the edge coverage value of the second sub-side 13a2.

[0153] For example, the minimum distance b between the second sub-side 13a2 and the second side 122 is equal to the minimum distance d between the fourth sub-side 13a4 and the fourth side 124. That is, the edge coverage value of the fourth sub-side 13a4 is equal to the edge coverage value of the second sub-side 13a2. This results in a smaller edge coverage value for the second sub-side 13a2, which helps save space in the horizontal direction of the display panel 10, thus facilitating high PPI design.

[0154] For example, the minimum distance b between the second sub-side 13a2 and the second side portion 122 is less than the minimum distance d between the fourth sub-side 13a4 and the fourth side portion 124. That is, the edge coverage of the fourth sub-side 13a4 is less than the edge coverage of the second sub-side 13a2. Thus, the first connecting portion 142 is less prone to breakage at the fourth sub-side 13a4, ensuring that the first connecting portion 142 located on the sidewall of the first via 13a and the first connecting portion 142 located in the first connecting area 12a have a larger connection area, which helps to reduce connection resistance.

[0155] In one embodiment, the orthographic projection of the fourth sub-edge 13a4 onto the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 onto the substrate 11, and the minimum distance 'a' between the first sub-edge 13a1 and the first side portion 121 is equal to the minimum distance 'd' between the fourth sub-edge 13a4 and the fourth side portion 124. Thus, the first connecting portion 142 is less prone to breakage at the fourth sub-edge 13a4, ensuring that the first connecting portion 142 located on the sidewall of the first via 13a and the first connecting portion 142 located in the first connecting area 12a have a large connection area, which is beneficial for reducing connection resistance. In other embodiments, 'a' may be greater than 'd'.

[0156] In one embodiment, such as Figure 9 As shown, the display panel 10 also includes a second insulating layer 15 and a third conductive portion 16. The second insulating layer 15 is disposed between the film layer containing the first conductive portion 12 and the substrate 11. The second insulating layer 15 is provided with a second via 15a. The orthographic projection of the first via 13a on the substrate 11 overlaps with the orthographic projection of the second via 15a on the substrate 11, which is beneficial to improving pixel resolution. The orthographic projection of the first via 13a on the substrate 11 overlaps with the orthographic projection of the second via 15a on the substrate 11, or the minimum distance between the orthographic projection of the first via 13a on the substrate 11 and the orthographic projection of the second via 15a on the substrate 11 is less than or equal to 3 micrometers, for example, less than or equal to 1 micrometer, for example, it can be 0.5 micrometers, 1 micrometer, 2 micrometers, or 3 micrometers. The required edge value of the third sub-edge 13a3 and / or the edge value of the fourth sub-edge 13a4 are relatively large to ensure the reliability of signal transmission. Figure 9 Can be along Figure 7 Cross-sectional view along the C1C2 direction.

[0157] The third conductive portion 16 is located between the substrate 11 and the second insulating layer 15. The surface of the third conductive portion 16 away from the substrate 11 includes a second connection region 16a, and a second via 15a exposes the second connection region 16a. At least a portion of the first conductive portion 12 is located in the second via 15a and is connected to the second connection region 16a. It is understood that other film layers may also be disposed between the film layer containing the third conductive portion 16 and the film layer containing the first conductive portion 12, and this embodiment of the application does not impose any limitations on this.

[0158] It should be noted that the above settings are conducive to maximizing the use of the horizontal space of the display panel 10, which is beneficial for high PPI design.

[0159] Optionally, the display panel 10 further includes a second connecting portion 17, which is connected to the first conductive portion 12. The second connecting portion 17 and the first conductive portion 12 are disposed on the same layer. At least a portion of the second connecting portion 17 and at least a portion of the first conductive portion 12 are located in the second via 15a and connected to the second connecting area 16a. Optionally, the orthographic projection of the second sub-edge, the third sub-edge, or the fourth sub-edge on the substrate overlaps with the orthographic projection of the second via on the substrate.

[0160] Optionally, the second side 122, the third side 123, or the fourth side 124 is connected to the second connecting portion 17. Compared to a configuration where multiple sides (such as at least two of the second side 122, the third side 123, and the fourth side 124) are connected to the second connecting portion 17, the above configuration reduces the area of ​​the second connecting portion 17, which is beneficial for high PPI design.

[0161] It is understandable that at least two of the second side portion 122, the third side portion 123, and the fourth side portion 124 may be connected to the second connecting portion 17.

[0162] Optional, such as Figure 8A As shown, the fourth side portion 124 is connected to the second connecting portion 17; the orthographic projection of the main body portion 141 on the substrate 11, the orthographic projection of the first side portion 121 on the substrate 11 and the orthographic projection of the second side portion 122 on the substrate 11 are arranged sequentially along the first direction X, and the orthographic projection of the third side portion 123 on the substrate 11, the orthographic projection of the fourth side portion 124 on the substrate 11 and the orthographic projection of the second connecting portion 17 on the substrate 11 are arranged sequentially along the second direction Y, and the first direction X and the second direction Y intersect.

[0163] Or, such as Figure 8B As shown, the second side portion 122 is connected to the second connecting portion 17. The orthographic projections of the main body portion 141 on the substrate 11, the first side portion 121 on the substrate 11, the second side portion 122 on the substrate 11, and the second connecting portion 17 on the substrate 11 are arranged sequentially along the first direction X, while the third side portion 123 and the fourth side portion 124 are arranged along the second direction Y. The first direction X and the second direction Y intersect.

[0164] The above settings allow designers to create layouts based on actual needs, improving space utilization and enabling high PPI designs. It is understood that the two different layout methods described above can be applied to the layout design of the same display panel 10.

[0165] In one embodiment, the first insulating layer 13 comprises an organic material, and further, the first insulating layer 13 is a planarization layer. It is understood that the first insulating layer 13 can be a single-layer structure or a multi-layer stacked structure.

[0166] In one embodiment, the second insulating layer 15 comprises an organic or inorganic material. For example, the second insulating layer 15 is a planarization layer.

[0167] In one embodiment, reference Figure 10 and Figure 11 As shown, the first side 121 and the second side 122 are arranged along the first direction X, that is, the first side 121 and the second side 122 are opposite to each other along the first direction X.

[0168] Optionally, the third side 123 and the fourth side 124 are arranged along the second direction Y, and the first direction X intersects the second direction Y. That is, the third side 123 and the fourth side 124 are opposite each other along the second direction Y.

[0169] Optionally, the first direction X is perpendicular to the second direction Y.

[0170] Optionally, the first side 121 extends along the second direction Y, and / or the second side 122 extends along the second direction Y, that is: the extension directions of the first side 121 and the second side 122 are parallel to the second direction Y.

[0171] Optionally, the third side 123 extends along the first direction X, and / or the fourth side 124 extends along the first direction X, that is: the extension directions of the third side 123 and the fourth side 124 are parallel to the first direction X.

[0172] Optional, combined Figures 12-17 As shown, the outer edge of the first via 13a on the side near the substrate 11 is a circle, an ellipse, a rectangle, a rounded rectangle, a polygon with a side length greater than or equal to 5, or a rounded polygon with a side length greater than or equal to 5. That is, the orthographic projection of the outer edge of the first via 13a on the substrate 11 is the shape described above.

[0173] Optionally, the first conductive portion 12 can be circular, elliptical, rectangular, rounded rectangle, a polygon with a side length greater than or equal to 5, or a rounded polygon with a side length greater than or equal to 5. That is, the orthographic projection of the first conductive portion 12 on the substrate 11 is the shape described above.

[0174] In one example, such as Figure 15 As shown, the first conductive portion 12 is a polygon, rectangle, chamfered polygon, chamfered long side, or rounded rectangle, and the outer edge of the first via 13a near the substrate 11 is circular. The length of the first side of the first conductive portion, which is a polygon, rectangle, chamfered polygon, chamfered long side, or rounded rectangle, is less than the length of the third side. The distance between the first side 121 and the second side 122 along the first direction can be greater than the distance between the third side 123 and the fourth side 124 in the second direction.

[0175] In another example, the first conductive part 12 is a rectangle, a chamfered long side, or a rounded rectangle, and the outer edge of the first via 13a near the substrate 11 is a circle, a square, a chamfered regular side, or a rounded square.

[0176] In another example, such as Figure 16 As shown, the first conductive portion 12 is a polygon or a square with chamfered polygons or chamfered regular polygons or rounded squares, and the outer edge of the first via 13a near the substrate 11 is elliptical. For example, the major axis of the ellipse corresponding to the outer edge of the first via near the substrate is parallel to the extending direction of the first side. The distance between the first side 121 and the second side 122 along the first direction can be equal to the distance between the third side 123 and the fourth side 124 in the second direction.

[0177] In another example, the first conductive part 12 is a square, a chamfered regular side, or a rounded square, and the outer edge of the first via 13a near the substrate 11 is an ellipse, a rectangle, a chamfered long side, or a rounded rectangle.

[0178] In one embodiment, such as Figure 17 As shown, the first conductive part 12 is a polygon (e.g., the number of sides is greater than or equal to 4), and the polygon has chamfers. The first via 13a is a polygon, and the polygon has chamfers. The chamfers can be straight-edge chamfers (non-rounded chamfers) or rounded chamfers. By setting chamfers, such as rounded corners, right angles can be avoided, thereby reducing the risk of tip discharge.

[0179] In one embodiment, reference Figure 10 As shown, the first side 121 and the second side 122 are arranged along the first direction X, and the third side 123 and the fourth side 124 are arranged along the second direction Y. The first direction X and the second direction Y intersect.

[0180] Optionally, the outer contour of the orthographic projection of the first conductive portion 12 on the substrate 11 is located at the outer edge of the first via 13a on the side near the substrate 11, which is outside the outer contour of the orthographic projection on the substrate 11.

[0181] Optionally, the minimum distance b between the second sub-side 13a2 and the second side 122, the minimum distance c between the third sub-side 13a3 and the third side 123, and the minimum distance d between the fourth sub-side 13a4 and the fourth side 124 are all equal.

[0182] In one example, such as Figure 10 As shown, the maximum dimension e of the first via 13a along the first direction X is equal to the maximum dimension f of the first via 13a along the second direction Y; the minimum distance g between the first side 121 and the second side 122 is greater than the minimum distance h between the third side 123 and the fourth side 124. In related technologies, the minimum distance g between the first side 121 and the second side 122 is equal to the minimum distance h between the third side 123 and the fourth side 124. Based on related technologies, the embodiments of this application increase the minimum distance g between the first side 121 and the second side 122, thereby increasing the minimum distance a between the first sub-side 13a1 and the first side 121, making a greater than b, c, and d.

[0183] In another example, such as Figure 11As shown, the maximum dimension e of the first via 13a along the first direction X is less than the maximum dimension f of the first via 13a along the second direction Y; the minimum distance g between the first side 121 and the second side 122 is equal to the minimum distance h between the third side 123 and the fourth side 124. Thus, based on related technologies, this embodiment does not increase the area of ​​the first conductive part 12, but adjusts the inner diameter of the first via 13a, thereby increasing the minimum distance a between the first sub-side 13a1 and the first side 121, making a greater than b, c, and d. This arrangement is beneficial for achieving a high PPI design.

[0184] In one embodiment, the display panel 10 further includes a pixel defining layer 18, which has pixel openings. The pixel defining layer 18 is located on the side of the film layer where the second conductive portion 14 is located away from the substrate 11, and the pixel openings expose at least a portion of the main body portion 141.

[0185] Optionally, at least a portion of the main body 141 may serve as a pixel electrode, such as an anode.

[0186] Optionally, the display panel 10 also includes a light-emitting functional layer 192, at least a portion of which is located in the pixel opening.

[0187] Optionally, the display panel 10 also includes a second electrode 193 located on the side of the light-emitting functional layer 192 away from the substrate 11. It is understood that one of the main body portion 141 and the second electrode 193 is an anode, and the other is a cathode.

[0188] In one embodiment, the display panel 10 further includes at least one light-emitting unit 19. For example, the light-emitting unit 19 includes a first electrode 191, a light-emitting functional layer 192, and a second electrode 193 sequentially stacked along a direction away from the substrate 11, with the main body 141 serving as the first electrode 191. It is understood that one of the first electrode 191 and the second electrode 193 is an anode, and the other is a cathode.

[0189] Optional, see reference Figure 2 As shown, the second side 122 corresponding to the same light-emitting unit 19 is parallel to the fifth side 1421 of the first connecting portion 142 corresponding to the light-emitting unit 19 on the side away from the main body portion 141. That is, the second side 122 is parallel to the fifth side 1421. In this way, even if the relative orientation of the main body portion 141 and the first connecting portion 142 is adjusted, it can be ensured that the outer edge of the first conductive portion 12 and the outer edge of the first connecting portion 142 remain parallel, which is beneficial to have a good edge coverage in all directions of the first via 13a within the limited area of ​​the first conductive portion 12.

[0190] In one embodiment, such as Figure 22As shown, at least one light-emitting unit 19 includes a first light-emitting unit 19a and a second light-emitting unit 19b. The first side portion 121, the second side portion 122, the first connecting portion 142, and the main body portion 141 of the first light-emitting unit 19a are arranged along a third direction A. The first side portion 121, the second side portion 122, the first connecting portion 142, and the main body portion 141 of the second light-emitting unit 19b are arranged along a fourth direction B; the third direction A and the fourth direction B intersect, for example, perpendicularly.

[0191] It should be noted that the colors of the light emitted by the first light-emitting unit 19a and the second light-emitting unit 19b can be the same or different. In the first light-emitting unit 19a, the first side 121, the second side 122, the first connecting part 142, and the main body 141 are along the first direction X1 (same as...). Figure 22 The third side 123 and the fourth side 124 are arranged along the second direction Y1 (same as A). Figure 22 The fourth direction (B) is arranged in the second light-emitting unit 19b. The first side 121, the second side 122, the first connecting part 142, and the main body 141 are arranged along the first direction X2 (same as...). Figure 22 The fourth direction (B) is arranged, and the third side 123 and the fourth side 124 are along the second direction Y2 (same as). Figure 22 The third direction of A) is arranged.

[0192] For example, the orthographic projections of the first via and the second via corresponding to one of the first light-emitting units 19a and 19b on the substrate overlap, while the orthographic projections of the first via and the second via corresponding to the other do not overlap. For example, the orthographic projections of the first via and the second via corresponding to the first light-emitting unit 19a on the substrate do not overlap, or the minimum distance between the orthographic projection of the first via 13a corresponding to the first light-emitting unit 19a on the substrate 11 and the orthographic projection of the second via 15a corresponding to the first light-emitting unit 19a on the substrate 11 is less than or equal to 3 micrometers, for example, less than or equal to 1 micrometer, for example, it can be 0.5 micrometers, 1 micrometer, 2 micrometers, or 3 micrometers; the orthographic projections of the first via and the second via corresponding to the second light-emitting unit 19b on the substrate overlap, for example, the minimum distance between the orthographic projection of the first via 13a corresponding to the second light-emitting unit 19b on the substrate 11 and the orthographic projection of the second via 15a corresponding to the second light-emitting unit 19b on the substrate 11 is greater than 3 micrometers, for example, greater than 5 micrometers, for example, it can be 3 micrometers, 4 micrometers, 5 micrometers, or 6 micrometers. For example, the minimum distance *a* between the first sub-side 13a1 and the first side 121 of the second light-emitting unit 19b is greater than, less than, or equal to the minimum distance *a* between the first sub-side 13a1 and the first side 121 of the first light-emitting unit 19a. Similarly, the minimum distance *b* between the second sub-side 13a2 and the second side 122 of the second light-emitting unit 19b is greater than, less than, or equal to the minimum distance *b* between the second sub-side 13a2 and the second side 122 of the first light-emitting unit 19a. Likewise, the minimum distance *c* between the third sub-side 13a3 and the third side 123 of the second light-emitting unit 19b is greater than, less than, or equal to the minimum distance *c* between the third sub-side 13a3 and the third side 123 of the first light-emitting unit 19a. Finally, the minimum distance *d* between the fourth sub-side 13a4 and the fourth side 124 of the second light-emitting unit 19b is greater than, less than, or equal to the minimum distance *d* between the fourth sub-side 13a4 and the fourth side 124 of the first light-emitting unit 19a.

[0193] The above settings allow designers to create layouts based on actual needs, which helps improve space utilization and enable high PPI designs.

[0194] In one embodiment, the aperture of the outer edge of the first via 13a near the substrate 11, projected onto the substrate 11, is greater than or equal to 1.5 micrometers and less than or equal to 5 micrometers. Exemplarily, this aperture can be 1.5 μm, 2 μm, 3 μm, 4.2 μm, or 5 μm, etc. This configuration allows the first connecting portion 142 and the first conductive portion 12 to have sufficient contact area, which is beneficial for reducing connection resistance. It should be noted that when the first via 13a is irregularly shaped or polygonal, the aperture refers to the minimum inner diameter of the projected image of the first via 13a.

[0195] Optionally, the aperture of the outer edge of the first via 13a near the substrate 11, projected onto the substrate 11, is greater than or equal to 2.5 micrometers and less than or equal to 3 micrometers. For example, the aperture can be 2.5 μm, 2.6 μm, 2.7 μm, 2.8 μm, 2.9 μm, or 3 μm. This configuration allows for sufficient contact area between the first connecting portion 142 and the first conductive portion 12, and also facilitates a high PPI design.

[0196] Optionally, the first conductive portion 12 includes multiple metal layers stacked sequentially along the thickness direction Z of the substrate 11. For example, the first conductive portion 12 includes a titanium layer, an aluminum layer, and a titanium layer stacked sequentially along the thickness direction Z of the substrate 11.

[0197] Optional, refer to Figure 4B As shown, the display panel 10 also includes a power signal line 110 disposed on the substrate 11. The power signal line 110 and the first conductive portion 12 are disposed on the same layer and made of the same material, and are insulated from each other. Furthermore, the power signal line 110 is an ELVDD signal line. In this way, the power signal line 110 and the first conductive portion 12 can be manufactured simultaneously in the same process, which helps to reduce manufacturing costs.

[0198] Optional, refer to Figure 4B As shown, the display panel 10 also includes a data signal line 111 disposed on the substrate 11. The data signal line 111 and the first conductive part 12 are disposed on the same layer and made of the same material, and are insulated from each other. In this way, the data signal line 111 and the first conductive part 12 can be manufactured simultaneously in the same process, which helps to reduce manufacturing costs.

[0199] Optional, refer to Figure 4B As shown, the display panel 10 also includes fan-out traces 112 disposed on the substrate 11. At least a portion of the fan-out traces 112 is disposed on the same layer and material as the first conductive portion 12 and is insulated from each other. For example, the fan-out traces 112 are connected to corresponding data signal lines 111, and at least a portion of the fan-out traces 112 is located in the display area of ​​the display panel 10 to reduce the bezel of the display panel.

[0200] In this way, the fan-out wiring 112 and the first conductive part 12 can be manufactured simultaneously in the same process, which helps to reduce manufacturing costs.

[0201] Optional, refer to Figure 8A As shown, the display panel 10 also includes a reference potential line 113 disposed on the substrate 11. The reference potential line 113 and the first conductive part 12 are disposed on the same layer and made of the same material, and are insulated from each other. In this way, the reference potential line 113 and the first conductive part 12 can be manufactured simultaneously in the same process, which helps to reduce manufacturing costs.

[0202] In one embodiment, the orthographic projection of the second sub-edge 13a2 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11. The difference between the minimum distance 'a' between the first sub-edge 13a1 and the first side portion 121 and the minimum distance 'b' between the second sub-edge 13a2 and the second side portion 122 is greater than or equal to 0 micrometers and less than or equal to 5 micrometers. For example, this difference can be 0 μm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, etc.

[0203] Optionally, the difference between the minimum distance a between the first sub-side 13a1 and the first side 121 and the minimum distance b between the second sub-side 13a2 and the second side 122 is greater than or equal to 0.5 micrometers and less than or equal to 5 micrometers.

[0204] Optionally, the minimum distance b between the second sub-edge 13a2 and the second side portion 122 is greater than or equal to 0. This reduces the risk of breakage of the second conductive portion 14 at the second sub-edge 13a2, thereby ensuring the signal transmission performance of the second conductive portion 14 and reducing the possibility of display abnormalities in the display panel 10.

[0205] Secondly, embodiments of this application provide a display panel 10, including a substrate 11, a first conductive portion 12, a first insulating layer 13, and a second conductive portion 14. The first conductive portion 12 is disposed on the substrate 11, and the surface of the first conductive portion 12 away from the substrate 11 includes a first connection area 12a. The first conductive portion 12 includes a first side portion 121, a second side portion 122, and a third side portion 123 arranged sequentially along the circumference of the first conductive portion 12. The first insulating layer 13 is disposed on the substrate 11 and covers a portion of the first conductive portion 12 away from the substrate 11. The first insulating layer 13 is provided with a first via 13a, which exposes the first connection area 12a. The outer edge of the first via 13a near the substrate 11 includes a first sub-side 13a1 near the first side portion 121, a second sub-side 13a2 near the second side portion 122, and a third sub-side 13a3 near the third side portion 123. The orthographic projection of the first sub-side 13a1 on the substrate 11 is located within the orthographic projection of the first conductive portion 12 on the substrate 11. The second conductive portion 14 includes a main body portion 141 and a first connecting portion 142 connected to the main body portion 141. The main body portion 141 is disposed on the side of the insulating layer away from the substrate 11. At least a portion of the first connecting portion 142 is located in the first via 13a and connected to the first connecting area 12a. The orthographic projection of the first sub-side 13a1 on the substrate 11 is located between the orthographic projection of the second sub-side 13a2 on the substrate 11 and the orthographic projection of the main body portion 141 on the substrate 11.

[0206] Wherein, the orthographic projection of the third sub-side 13a3 on the substrate 11 is outside the orthographic projection of the first conductive portion 12 on the substrate 11; or, the orthographic projection of the third sub-side 13a3 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11, and the minimum distance between the first sub-side 13a1 and the first side portion 121 is greater than or equal to the minimum distance between the third sub-side 13a3 and the third side portion 123.

[0207] Figures 10 to 21 Applicable to Figure 4A , Figure 4B , Figure 6 , Figure 7 , Figure 8A , Figure 8B , Figure 22 wait.

[0208] The display panel 10 provided in this application embodiment has a first sub-edge 13a1 projected onto the substrate 11, with its orthographic projection located between the second sub-edge 13a2 and the main body 141 projected onto the substrate 11. This means that, in a direction parallel to the surface of the substrate 11, the first sub-edge 13a1 is located between the second sub-edge 13a2 and the main body 141. Specifically, the first sub-edge 13a1 is the side edge on the signal transmission direction side of the first via 13a, while the second sub-edge 13a2 and the third sub-edge 13a3 are the sides edge on the non-signal transmission direction side of the first via 13a. The orthographic projection of the first sub-edge 13a1 onto the substrate 11 is located within the orthographic projection of the first conductive portion 12 onto the substrate 11, meaning that the first conductive portion 12 surrounds the first sub-edge 13a1. When the orthographic projection of the third sub-edge 13a3 onto the substrate 11 is outside the orthographic projection of the first conductive portion 12 onto the substrate 11, the first conductive portion 12 does not surround the third sub-edge 13a3. When the orthographic projection of the third sub-edge 13a3 on the substrate 11 overlaps with the orthographic projection of the first conductive portion 12 on the substrate 11, the minimum distance between the first sub-edge 13a1 and the first side portion 121 is greater than the minimum distance between the third sub-edge 13a3 and the second side portion 122. That is, the edge coverage value of the first sub-edge 13a1 is greater than the edge coverage value of the third sub-edge 13a3. This effectively makes the edge coverage value on the signal transmission direction side greater than the edge coverage value on the non-signal transmission direction side. This reduces the risk of breakage of the second conductive portion 14 at the first sub-edge 13a1, thereby ensuring the signal transmission performance of the second conductive portion 14 and reducing the risk of display abnormalities in the display panel 10. It is understood that the specific structure of the display panel 10 in the second aspect can be the same as the specific structure of the display panel 10 in the first aspect, and will not be repeated here. This embodiment can be combined with some or all of the features in the above embodiments, and will not be repeated here.

[0209] Thirdly, embodiments of this application provide a display device, including a display panel as described in the first or second aspect.

[0210] The display device can be a mobile phone, tablet computer, wearable device, laptop computer, mobile phone, wireless device, personal digital assistant (PDA), handheld or portable computer, GPS receiver / navigator, camera, MP4 video player, camcorder, game console, watch, clock, calculator, TV monitor, flat panel display, computer monitor, car display (e.g., odometer display), navigator, cockpit controller and / or display, camera view display (e.g., display of a rearview camera in a vehicle), electronic photograph, electronic billboard or sign, projector, etc.

[0211] When using the terms “including,” “having,” and “comprising” as described herein, another component may be added unless explicitly qualifying terms such as “only,” “consisting of,” etc. are used. Unless otherwise stated, singular terms may include plural forms and should not be construed as having a quantity of one.

[0212] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0213] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A display panel, characterized by, The display panel comprises: a substrate; a first conductive part provided on the substrate, the first conductive part comprising a first connecting region away from a surface of the substrate, the first conductive part comprising a first edge part and a second edge part; a first insulating layer provided on the substrate and covering part of the first conductive part away from the substrate, the first insulating layer being provided with a first via hole, the first via hole exposing the first connecting region; an outer edge of the first via hole close to the substrate comprising a first sub-edge close to the first edge part and a second sub-edge close to the second edge part; a normal projection of the first sub-edge on the substrate being located within a normal projection of the first conductive part on the substrate; a second conductive part comprising a main body part and a first connecting part connected to the main body part, the main body part being provided on a side of the first insulating layer away from the substrate, at least part of the first connecting part being located in the first via hole and connected to the first connecting region; a normal projection of the first sub-edge on the substrate being located between a normal projection of the second sub-edge on the substrate and a normal projection of the main body part on the substrate; wherein the normal projection of the second sub-edge on the substrate is located outside the normal projection of the first conductive part on the substrate; or the normal projection of the second sub-edge on the substrate overlaps the normal projection of the first conductive part on the substrate, a minimum distance between the first sub-edge and the first edge part being greater than a minimum distance between the second sub-edge and the second edge part; a side of a signal transmission direction having a greater edge value than a non-signal transmission direction side; the first conductive part further comprising a third edge part and a fourth edge part, the first edge part, the third edge part, the second edge part and the fourth edge part being arranged in sequence along a circumferential direction of the first conductive part; the display panel further comprising: a second insulating layer provided between a film layer where the first conductive part is located and the substrate; the second insulating layer being provided with a second via hole; a third conductive part located between the substrate and the second insulating layer, a surface of the third conductive part away from the substrate comprising a second connecting region, the second via hole exposing the second connecting region; a second connecting part connected to the first conductive part, the second connecting part being provided in the same layer as the first conductive part, at least part of the first conductive part and / or at least part of the second connecting part being located in the second via hole and connected to the second connecting region; the fourth edge part being connected to the second connecting part; a normal projection of the main body part on the substrate, a normal projection of the first edge part on the substrate and a normal projection of the second edge part on the substrate being arranged in sequence along a first direction, a normal projection of the third edge part on the substrate, a normal projection of the fourth edge part on the substrate and a normal projection of the second connecting part on the substrate being arranged in sequence along a second direction, the first direction and the second direction intersecting; or The second edge portion is connected with the second connecting portion; the normal projection of the main body portion on the substrate, the normal projection of the first edge portion on the substrate, the normal projection of the second edge portion on the substrate, and the normal projection of the second connecting portion on the substrate are arranged in a first direction in sequence, and the third edge portion and the fourth edge portion are arranged in a second direction, and the first direction and the second direction intersect.

2. The display panel of claim 1, wherein, The outer edge of the first via near one side of the substrate further comprises a third sub-edge portion near the third edge portion, and the normal projection of the third sub-edge portion on the substrate is located outside the normal projection of the first conductive portion on the substrate; Or, the normal projection of the third sub-edge portion on the substrate overlaps the normal projection of the first conductive portion on the substrate, and the minimum distance between the first sub-edge portion and the first edge portion is greater than or equal to the minimum distance between the third sub-edge portion and the third edge portion.

3. The display panel of claim 2, wherein, The normal projection of the third sub-edge portion on the substrate overlaps the normal projection of the first conductive portion on the substrate, and the minimum distance between the second sub-edge portion and the second edge portion is equal to the minimum distance between the third sub-edge portion and the third edge portion.

4. The display panel of claim 2, wherein, The outer edge of the first via near one side of the substrate further comprises a fourth sub-edge portion near the fourth edge portion, and the normal projection of the fourth sub-edge portion on the substrate is located outside the normal projection of the first conductive portion on the substrate; or, the normal projection of the fourth sub-edge portion on the substrate overlaps the normal projection of the first conductive portion on the substrate, and the minimum distance between the first sub-edge portion and the first edge portion is greater than or equal to the minimum distance between the fourth sub-edge portion and the fourth edge portion.

5. The display panel of claim 4, wherein, The normal projection of the fourth sub-edge portion on the substrate overlaps the normal projection of the first conductive portion on the substrate, and the minimum distance between the second sub-edge portion and the second edge portion is equal to the minimum distance between the fourth sub-edge portion and the fourth edge portion.

6. The display panel according to any one of claims 2-5, wherein, The normal projection of the first via on the substrate is located outside the normal projection of the second via on the substrate.

7. The display panel of claim 1, wherein, The outer edge of the first via near one side of the substrate further comprises a third sub-edge portion near the third edge portion, and the normal projection of the third sub-edge portion on the substrate is located outside the normal projection of the first conductive portion on the substrate; Or, the normal projection of the third sub-edge portion on the substrate overlaps the normal projection of the first conductive portion on the substrate, and the minimum distance between the second sub-edge portion and the second edge portion is less than or equal to the minimum distance between the third sub-edge portion and the third edge portion.

8. The display panel of claim 7, wherein, The normal projection of the third sub-edge portion on the substrate overlaps the normal projection of the first conductive portion on the substrate, and the minimum distance between the first sub-edge portion and the first edge portion is equal to the minimum distance between the third sub-edge portion and the third edge portion.

9. The display panel of claim 7, wherein, The first via further comprises a fourth sub-edge adjacent to the fourth edge portion, a projection of the fourth sub-edge on the substrate is located outside a projection of the first conductive portion on the substrate; or, a projection of the fourth sub-edge on the substrate overlaps with a projection of the first conductive portion on the substrate, and a minimum distance between the second sub-edge and the second edge portion is less than or equal to a minimum distance between the fourth sub-edge and the fourth edge portion.

10. The display panel of claim 9, wherein, The fourth sub-edge overlaps with the projection of the first conductive portion on the substrate, and a minimum distance between the first sub-edge and the first edge portion is equal to a minimum distance between the fourth sub-edge and the fourth edge portion.

11. The display panel according to any one of claims 7-10, characterized in that, The first via overlaps with the second via on the substrate; And / or, a projection of the second sub-edge, the third sub-edge or the fourth sub-edge on the substrate overlaps with a projection of the second via on the substrate.

12. The display panel of claim 4 or 9, wherein, The first edge portion and the second edge portion are arranged along a first direction.

13. The display panel of claim 12, wherein, The third edge portion and the fourth edge portion are arranged along a second direction, and the first direction intersects with the second direction.

14. The display panel of claim 13, wherein, The first edge portion and the second edge portion extend along the second direction.

15. The display panel of claim 13, wherein, The third edge portion and the fourth edge portion extend along the first direction.

16. The display panel of claim 12, wherein, The first via has a circular, elliptical, rectangular, rounded rectangular, polygonal with a number of sides greater than or equal to 5, or rounded polygonal with a number of sides greater than or equal to 5 shape adjacent to an outer edge of a side of the substrate.

17. The display panel of claim 12, wherein, The first conductive portion has a circular, elliptical, rectangular, rounded rectangular, polygonal with a number of sides greater than or equal to 5, or rounded polygonal with a number of sides greater than or equal to 5 shape.

18. The display panel of claim 12, wherein, The first conductive portion is a rounded rectangular shape, and the first via has a circular shape adjacent to an outer edge of a side of the substrate; or, the first conductive portion is a rounded square shape, and the first via has an elliptical shape adjacent to an outer edge of a side of the substrate.

19. The display panel of claim 18, wherein, The length of the first edge portion of the first conductive portion in the rounded rectangular shape is less than the length of the third edge portion; or, the major axis of the elliptical shape corresponding to the outer edge of the first via adjacent to a side of the substrate is parallel to the extension direction of the first edge portion.

20. The display panel of claim 4 or 9, wherein, An outer contour of a projection of the first conductive portion on the substrate is located on the periphery of an outer contour of a projection of the first via adjacent to a side of the substrate on the substrate.

21. The display panel of claim 20, wherein, The minimum distances between the second sub-edge and the second edge portion, the third sub-edge and the third edge portion, and the fourth sub-edge and the fourth edge portion are equal.

22. The display panel of claim 20, wherein, The maximum dimension of the first via along the first direction is equal to the maximum dimension of the first via along the second direction; and the minimum distance between the first edge portion and the second edge portion is greater than the minimum distance between the third edge portion and the fourth edge portion. Or, the maximum dimension of the first via along the first direction is less than the maximum dimension of the first via along the second direction; and the minimum distance between the first edge portion and the second edge portion is equal to the minimum distance between the third edge portion and the fourth edge portion.

23. The display panel of claim 1, wherein, The display panel further comprises a pixel definition layer provided with a pixel opening, the pixel definition layer is located on a side of a film layer where the second conductive part is away from the substrate, and the pixel opening exposes at least part of the main body part.

24. The display panel of claim 23, wherein, At least part of the main body part serves as a pixel electrode.

25. The display panel of claim 24, wherein, The display panel further comprises a light-emitting functional layer, at least part of the light-emitting functional layer is located in the pixel opening.

26. The display panel of claim 25, wherein, The display panel further comprises a second electrode, the second electrode is located on a side of the light-emitting functional layer away from the substrate.

27. The display panel of claim 1, wherein, The display panel further comprises at least one light-emitting unit, the light-emitting unit comprises a first electrode, a light-emitting functional layer and a second electrode which are sequentially stacked in a direction away from the substrate, and the main body part serves as the first electrode.

28. The display panel of claim 27, wherein, The second edge part corresponding to the same light-emitting unit is parallel to a fifth edge part on a side of the first connecting part corresponding to the light-emitting unit away from the main body part.

29. The display panel of claim 27, wherein, The at least one light-emitting unit comprises a first light-emitting unit and a second light-emitting unit. The first edge part, the second edge part, the first connecting part and the main body part corresponding to the first light-emitting unit are arranged in a third direction. The first edge part, the second edge part, the first connecting part and the main body part corresponding to the second light-emitting unit are arranged in a fourth direction; and the third direction and the fourth direction intersect.

30. The display panel of claim 1, wherein, An aperture of a normal projection of an outer edge of the first via on a side close to the substrate on the substrate is greater than or equal to 1.5 microns and less than or equal to 5 microns.

31. The display panel of claim 30, wherein, An aperture of a normal projection of an outer edge of the first via on a side close to the substrate on the substrate is greater than or equal to 2.5 microns and less than or equal to 3 microns.

32. The display panel of claim 30, wherein, The first conductive part comprises a titanium layer, an aluminum layer and a titanium layer which are sequentially stacked in a thickness direction of the substrate. The first insulating layer comprises an organic material.

33. The display panel of claim 30, wherein, The display panel further comprises a power signal line provided on the substrate, the power signal line and the first conductive part are provided in the same layer and the same material and are insulated from each other.

34. The display panel of claim 30, wherein, The display panel further comprises a data signal line provided on the substrate, the data signal line and the first conductive part are provided in the same layer and the same material and are insulated from each other.

35. The display panel of claim 34, wherein, The display panel further comprises a fan-out wire provided on the substrate, at least part of the fan-out wire and the first conductive part are provided in the same layer and the same material and are insulated from each other; the fan-out wire is connected with the corresponding data signal line; and at least part of the fan-out wire is located in a display area of the display panel.

36. The display panel of claim 30, wherein, The display panel further comprises a reference potential line provided on the substrate, the reference potential line and the first conductive part are provided in the same layer and the same material and are insulated from each other.

37. The display panel of claim 1, wherein, A normal projection of the second sub-edge on the substrate overlaps a normal projection of the first conductive part on the substrate, and a difference between a minimum distance between the first sub-edge and the first edge part and a minimum distance between the second sub-edge and the second edge part is greater than or equal to 0 microns and less than or equal to 5 microns.

38. The display panel of claim 37, wherein, The difference between the minimum distance between the first sub-edge and the first edge part and the minimum distance between the second sub-edge and the second edge part is greater than or equal to 0.5 microns and less than or equal to 5 microns.

39. The display panel of claim 37, wherein, The minimum distance of the second sub-edge from the second edge portion is greater than or equal to 0.

40. A display device comprising: A display panel comprising any of claims 1-39.

Citation Information

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