A training method and system based on circuit board defect detection model

Abstract

The present invention relates to the field of image processing technology, and in particular to a training method and system based on a circuit board defect detection model. The method comprises the following steps: obtaining an automatic optical monitoring image of a circuit board, and performing circuit board surface defect detection on the automatic optical monitoring image of the circuit board, thereby obtaining circuit board surface defect data; marking a circuit board defect area according to the circuit board surface defect data, thereby obtaining circuit board defect area data; performing solder joint three-dimensional contour imaging according to the automatic optical monitoring image of the circuit board, thereby obtaining solder joint three-dimensional contour data, and performing circuit board cold soldering analysis according to the solder joint three-dimensional contour data, thereby obtaining circuit board cold soldering data; performing electrical connection defect analysis according to the circuit board defect area data, thereby obtaining electrical connection defect data. The present invention improves the accuracy of the circuit board defect detection model based on computer vision technology.

Description

Technical Field

[0001] The present invention relates to the field of computer vision technology, and in particular to a training method and system based on a circuit board defect detection model. Background Art

[0002] Existing circuit board defect detection methods and systems mainly rely on traditional automatic optical inspection (AOI) technology and image processing algorithms based on fixed rules. Although these traditional methods can provide certain effects in some simple defect detection scenarios, they show many shortcomings and limitations when dealing with increasingly complex production environments and diverse defect types. Traditional defect detection systems are relatively low in data processing capabilities and intelligence levels. In the existing detection process, the extraction and analysis of defect features are often carried out through predefined fixed algorithms. These algorithms show certain limitations when dealing with defects with strong randomness and uncertainty, such as solder joints, wire breaks, and open circuits. Existing defect detection models have problems with high data dependence and long model training cycles during training and optimization, making it difficult to quickly adapt to the changing needs of the production line, reducing the flexibility and response speed of the detection system. Summary of the invention

[0003] Based on this, it is necessary for the present invention to provide a training method based on a circuit board defect detection model to solve at least one of the above technical problems.

[0004] To achieve the above purpose, a training method based on a circuit board defect detection model comprises the following steps:

[0005] Step S1: acquiring an automatic optical monitoring image of a circuit board, and performing circuit board surface defect detection on the automatic optical monitoring image of the circuit board, thereby obtaining circuit board surface defect data;

[0006] Step S2: marking defective areas of the circuit board according to the surface defect data of the circuit board, thereby obtaining defective area data of the circuit board; performing three-dimensional contour imaging of solder joints according to the automatic optical monitoring image of the circuit board, thereby obtaining three-dimensional contour data of solder joints, and performing cold solder joint analysis of the circuit board according to the three-dimensional contour data of solder joints, thereby obtaining cold solder joint data of the circuit board;

[0007] Step S3: performing electrical connection defect analysis based on the circuit board defect area data to obtain electrical connection defect data; performing circuit board circuit open correlation analysis on the electrical connection defect data based on the circuit board cold soldering data to obtain circuit board circuit open data;

[0008] Step S4: obtaining a circuit board defect detection model, and performing model training on the circuit board defect detection model according to the circuit board circuit open data, thereby obtaining a circuit board defect detection training model; performing circuit open confusion matrix analysis on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, thereby obtaining circuit open confusion matrix data;

[0009] Step S5: adjusting the classification threshold of the defect detection model of the circuit board defect detection training model according to the circuit open confusion matrix data, thereby obtaining the classification threshold adjustment data, and uploading it to the circuit board defect detection training model to perform the circuit board defect detection model optimization task.

[0010] The present invention acquires the appearance information of the circuit board through automatic optical inspection (AOI) images, can obtain high-resolution image data in real time, effectively identify and detect defects on the surface of the circuit board, improve the efficiency and consistency of detection, reduce the errors and inefficiency of manual detection, and the surface defect detection can cover scratches, stains, gaps and other defects, ensuring the comprehensive coverage of the circuit board surface in the initial detection stage. By marking the defective area, the system can automatically identify and track the potential problem area, which is helpful for subsequent in-depth analysis. The three-dimensional contour imaging technology of the solder joint can accurately capture the height, shape and other information of the solder joint, especially for small defects such as cold solder joints that affect the function, effectively avoiding the problem that traditional plane detection technology cannot accurately identify, so that the system can not only identify surface defects, but also deeply identify more complex solder joint problems, improving the comprehensiveness of circuit board detection. The electrical connection defect analysis enables the system to further evaluate the functionality of the circuit board, not only stopping at the detection of appearance defects, but also deeply analyzing potential problems in electrical performance. Through the correlation analysis with the cold soldering data, the system can more accurately locate and evaluate the open circuit problems on the circuit board, especially the circuit break caused by cold soldering. The correlation analysis step links structural defects with functional defects, greatly improving the detection accuracy. By acquiring and training the circuit board defect detection model, the system can establish an accurate prediction model based on large-scale historical data, improve the accuracy and efficiency of detection, and use confusion matrix analysis to effectively evaluate the prediction accuracy of the model. Through the visualization of classification errors, the system can quickly identify the shortcomings of the model and then perform targeted optimization, which improves the automation and intelligence level of model training and reduces the workload of manual adjustment of the model. Adjusting the model classification threshold according to the confusion matrix analysis results can dynamically optimize the model's sensitivity and specificity, ensuring that the model has stable detection capabilities under different production conditions. By adjusting and optimizing the model's classification threshold, the system can reduce missed detection rates and false detection rates, further improving detection accuracy and reliability. Through an automated adjustment mechanism, the circuit board defect detection model is continuously optimized to ensure its adaptability and detection efficiency in practical applications.

[0011] Optionally, step S2 specifically includes:

[0012] Step S21: performing grayscale image conversion according to the circuit board surface defect data, thereby obtaining the circuit board surface defect grayscale image data;

[0013] Step S22: Calculating the number of grayscale pixels according to the grayscale image data of the circuit board surface defects, thereby obtaining grayscale pixel number data;

[0014] Step S23: Calculating the maximum inter-class variance threshold value according to the grayscale pixel quantity data, thereby obtaining the maximum inter-class variance threshold data;

[0015] Step S24: dividing the grayscale pixel quantity data into circuit board defect areas according to the maximum inter-class variance threshold data, thereby obtaining circuit board defect area data;

[0016] Step S25: perform three-dimensional contour imaging of solder joints based on the circuit board automatic optical monitoring image to obtain three-dimensional contour data of solder joints, and perform circuit board cold solder joint analysis based on the three-dimensional contour data of solder joints to obtain circuit board cold solder joint data.

[0017] The present invention reduces the complexity and color dimension of the image by converting the surface defect data into a grayscale image, which helps to improve the computational efficiency of subsequent processing. The grayscale image retains key morphological and structural information, and can retain the characteristics of the defect area at a low computational cost, especially for defects with fine textures. The calculation of the number of grayscale pixels can effectively count the distribution of pixels in different brightness intervals in the image, and provide basic data for subsequent threshold segmentation. Through this calculation step, the area with significant brightness changes in the image can be accurately captured, which helps to further distinguish normal areas from defect areas. The maximum inter-class variance threshold (such as the Otsu algorithm) is used to determine the optimal segmentation point, so that the defect area and the background area can be better divided in defect detection. The method can adaptively select the threshold without human intervention, and is particularly suitable for application in complex and diverse detection scenarios, which helps to improve the automation and robustness of detection. The defect area is divided by the maximum inter-class variance threshold, which can achieve accurate binary segmentation, thereby effectively isolating the defect area from the normal area. This step ensures accurate identification of defective areas, improves the overall detection accuracy of the detection system, and effectively reduces false detections and missed detections. The automated segmentation mechanism can handle complex surface defects such as tiny scratches and poor solder joints. The solder joint 3D profile imaging technology can capture 3D feature information such as the height, shape, and volume of solder joints, and can accurately detect subtle defects in solder joints, such as cold solder joints and uneven solder joints. Cold solder joint analysis can effectively distinguish good solder joints from potential cold solder joints through these precise 3D data, improve the accuracy of cold solder joint detection, and further enhance the detection range and depth of the circuit board detection system.

[0018] Optionally, step S24 is specifically:

[0019] Step S241: binarizing the grayscale pixel quantity data according to the maximum inter-class variance threshold data to generate an image, thereby obtaining a foreground defect image and a background image;

[0020] Step S242: setting a structure element kernel according to the foreground defect image, thereby obtaining structure element kernel data;

[0021] Step S243: performing morphological dilation on the foreground defect image and the background image according to the structure element kernel data, thereby obtaining a foreground defect dilated image;

[0022] Step S244: performing morphological erosion according to the foreground defect dilation image, so as to obtain an accurate foreground defect dilation image;

[0023] Step S245: marking the defective area of ​​the circuit board according to the foreground defect precise expansion image, thereby obtaining the defective area data of the circuit board.

[0024] The present invention uses the maximum inter-class variance threshold to perform binarization processing, which can accurately segment the defect area and the background area, thereby generating a foreground defect image and a background image, determining the boundary between the defect and the non-defect part in the image, effectively reducing the need for human intervention, and improving the segmentation accuracy. It is particularly suitable for processing complex surfaces and uneven images. By setting the structural element kernel data, it can provide a basis for subsequent morphological operations. The setting of the structural element kernel is flexible and can be adjusted according to the shape, size and complexity of the defect, so as to better adapt to different types of circuit board defects, so that the subsequent morphological operations have strong adaptability and accuracy. The morphological expansion operation can expand the defect area so that small defects or fine gaps are filled and connected, thereby improving the coherence and visibility of the defect area. Through the expansion process, the system can capture the boundary of the defect area more comprehensively, ensuring that the detection in the subsequent processing is more accurate. Morphological erosion is the inverse operation of expansion, which can remove excess noise and small irregular areas, making the edge of the defect area smoother and more accurate. By removing the redundant parts generated by the expansion operation, the actual defect area contour is finally retained, which helps to improve the accuracy of defect marking. Through the aforementioned morphological operations, accurate defect area data is obtained, and the defect area has been accurately marked. The system can perform subsequent analysis and processing based on the marked data, ensuring the automation and accuracy of defect detection, providing an efficient and reliable data basis for circuit board defect detection, and can greatly improve detection accuracy and speed.

[0025] Optionally, step S25 is specifically:

[0026] Step S251: extracting multi-angle solder joint features according to the circuit board automatic optical monitoring image, thereby obtaining multi-angle solder joint data;

[0027] Step S252: performing laser emission simulation according to the multi-angle welding point data, thereby obtaining laser emission data;

[0028] Step S253: capturing the laser reflected beam according to the laser emission data, thereby obtaining the laser reflected beam data;

[0029] Step S254: measuring the height of the weld spot according to the laser reflected beam data and the multi-angle weld spot data, thereby obtaining the weld spot height data;

[0030] Step S255: mapping the two-dimensional coordinates of the welding points according to the welding point height data, thereby obtaining the two-dimensional coordinate data of the welding points;

[0031] Step S256: generating a three-dimensional contour of the solder joint according to the two-dimensional coordinate data of the solder joint, thereby obtaining the three-dimensional contour data of the solder joint;

[0032] Step S257: Perform cold solder joint analysis on the circuit board according to the three-dimensional contour data of the solder joints, thereby obtaining cold solder joint data on the circuit board.

[0033] The present invention can comprehensively and three-dimensionally reflect the geometric morphology and surface features of the solder joints by extracting the features of the solder joints from multiple angles. This multi-angle feature extraction overcomes the visual angle blind spot problem caused by traditional single-angle observation, making the solder joint detection more accurate, and providing rich basic data for subsequent three-dimensional contour generation. The process of simulating laser emission can accurately locate the reflected beam path at each angle of the solder joint surface, so as to better capture the solder joint surface morphology, ensure that the laser can irradiate the solder joint at an appropriate angle, enhance the accuracy of solder joint detection, and especially improve the detail capture ability when processing solder joints of complex shapes. By capturing the reflected beam after laser emission, the subtle features and irregularities of the solder joint surface can be further obtained. The laser reflection data can clearly reflect the tiny defects and height differences on the solder joint surface, ensure the fine detection of the solder joint, and effectively reduce missed detection and false detection. The combination of laser reflection and multi-angle data can accurately measure the height information of the solder joint. The height is a key parameter in the detection of cold solder joints. Through accurate height measurement, problems such as cold solder joints and low solder joints can be effectively identified, and the firmness and welding quality of the solder joints can be evaluated. By mapping the height data into two-dimensional coordinates, the planar distribution information of the solder joint can be generated. This conversion process allows the three-dimensional structural information of the solder joint to be clearly presented in two-dimensional space, which helps to analyze the distribution of the solder joint on the circuit board, especially for detecting the position accuracy and alignment of the solder joint on the two-dimensional plane. Generating the three-dimensional contour of the solder joint through two-dimensional coordinate data can provide a more three-dimensional and intuitive display of the solder joint morphology. The generation of the three-dimensional contour of the solder joint can not only be used to identify the surface defects of the solder joint, but also to analyze the structural integrity, geometry and welding quality of the solder joint, providing more reliable data support for the detection of cold solder joints. Through the three-dimensional contour data of the solder joint, the system can accurately analyze whether the solder joint has quality problems such as cold solder joints. Cold solder joints are a common problem in circuit board welding, which will lead to poor electrical connections. Through three-dimensional contour analysis, the system can accurately identify the tiny defects and height anomalies of the solder joints, improve the accuracy of cold solder joint detection, and effectively avoid circuit board failures caused by cold solder joints.

[0034] Optionally, step S257 is specifically:

[0035] Solder point height feature extraction and solder point diameter feature extraction are performed based on the solder point three-dimensional contour data, thereby obtaining solder point height data and solder point diameter data;

[0036] Calculate the solder volume according to the solder spot height data and the solder spot diameter data, so as to obtain the solder volume data;

[0037] Obtain standard solder volume data and standard solder joint-pad contact area data;

[0038] Compare the solder volume data with the cold solder volume according to the standard solder volume data, so as to obtain the cold solder volume data;

[0039] Solder point contour feature extraction and pad contour feature extraction are performed according to the solder point three-dimensional contour data, so as to obtain solder point contour data and pad contour data;

[0040] The contact area is calculated according to the solder joint contour data and the solder pad contour data, so as to obtain the solder joint-pad contact area data;

[0041] Comparing the poor electrical contact data of the solder joint-pad contact area with the standard solder joint-pad contact area data, thereby obtaining the poor electrical contact data;

[0042] The circuit board cold solder joint features are integrated according to the electrical contact failure data and the cold solder joint volume data, so as to obtain the circuit board cold solder joint data.

[0043] The present invention can accurately measure the geometric shape of the solder joint by extracting the height and diameter characteristics of the solder joint. The height and diameter of the solder joint are important parameters for judging the welding quality of the solder joint. These data can effectively identify the problem of too high, too low or uneven solder joints, and prevent poor electrical connection caused by improper solder joints. The solder volume calculation can provide information on whether the solder is sufficient during the welding process, prevent the phenomenon of insufficient or excessive solder, and the solder volume is too large or too small, which will lead to welding quality problems, and can help to find potential cold soldering risks in advance. By obtaining standard solder volume and standard contact area data, a benchmark can be provided for subsequent comparative analysis, which makes the system have higher accuracy and consistency when detecting welding quality, and the introduction of standard data also improves the standardization and scientificity of welding detection. Comparing the solder volume with the standard data can effectively identify the cold soldering situation. When the solder volume is too small, it will cause the solder joint to be insufficiently in contact with the pad, thereby causing the cold soldering problem. This comparative analysis provides strong support for identifying cold soldering. The contour feature extraction of solder joints and pads can provide a basis for the subsequent contact area calculation, ensuring that the system can identify the actual contact area of ​​solder joints and pads. Through these feature extractions, the system can effectively detect the integrity of solder joints and the matching of pads, which helps to improve the accuracy of welding quality analysis. Calculating the contact area between solder joints and pads can determine whether the solder joints are in full contact with the pads. Too small contact area leads to problems of cold solder joints or poor electrical contact. This step can timely discover potential hidden dangers in welding. By comparing the contact area with the standard value, the system can accurately identify the problem of poor electrical contact. When the contact area is less than the standard value, there is an incomplete connection between the solder joint and the pad. This step provides an accurate reference for the subsequent electrical performance detection. By integrating the data of poor electrical contact and cold solder joint volume, comprehensive data support can be provided for the comprehensive analysis of cold solder joints. Cold solder joint problems can be identified from multiple angles, including insufficient solder, poor contact, etc., making cold solder joint detection more comprehensive and accurate. The integrated cold solder joint data can be used for subsequent welding quality control and repair processes.

[0044] Optionally, step S3 specifically includes:

[0045] Step S31: extracting wire defect features according to the circuit board defect area data, thereby obtaining wire defect image data;

[0046] Step S32: performing wire direction statistics according to the wire defect image data, so as to obtain straight wire defect image data and curved wire defect image data;

[0047] Step S33: performing straight line wire defect detection on the straight line wire defect image data, thereby obtaining straight line wire defect data;

[0048] Step S34: performing curved direction wire defect detection on the curved direction wire defect image data, thereby obtaining curved direction wire defect data;

[0049] Step S35: integrating electrical connection wire defects according to the straight-line wire defect data and the curved-line wire defect data, thereby obtaining electrical connection defect data;

[0050] Step S36: performing circuit board circuit open correlation analysis on the electrical connection defect data according to the circuit board cold soldering data, thereby obtaining circuit board circuit open data.

[0051] The present invention can accurately identify the appearance defects of the wire, such as fracture, scratch, open circuit, etc., by extracting the defect features of the wire from the defect area data of the circuit board, which helps to accurately locate the problem area of ​​the wire, lay the foundation for the subsequent defect type analysis, and reduce the error and missed detection rate of the detection. The direction of the wire is very important for detecting wire defects. By statistically analyzing the direction of the wire, the data of the straight wire and the curved wire can be processed separately, which improves the pertinence and efficiency of the analysis, so that it can better meet the defect detection needs of different wire directions and avoid misjudgment caused by direction differences. Defect detection is specifically performed on the straight wire, which can ensure the rapid and accurate identification of wire defects (such as open circuit or fracture) in the straight part. Since the defects of the wires in the straight direction are more easily analyzed by the processing algorithm, the special detection method improves the overall detection speed and accuracy of the system. Curved wires are more likely to have defects in the production process, such as fracture or poor contact caused by stress concentration at the bend. By specifically detecting the curved wire, the defects in these complex structures can be accurately captured, and the detection system can improve the recognition ability of complex defects. By integrating the defect data of straight and curved wires, the overall electrical connection quality of the wires can be comprehensively analyzed to ensure the continuity and integrity of the wires as a whole, providing a reliable data basis for subsequent electrical connection detection and preventing electrical connection failures caused by wire defects. Combining the cold solder joint data with the electrical connection defect data can further analyze the circuit open circuit, allowing the system to identify the potential causes of the circuit open circuit from the perspective of solder joints and wire defects, and provide comprehensive troubleshooting information. Through this multi-level analysis, the circuit open circuit problem can be more accurately located and solved, thereby improving the overall quality and reliability of the circuit board.

[0052] Optionally, step S33 is specifically:

[0053] Step S331: performing HSV color space conversion according to the image data of the straight line wire defect, so as to obtain an HSV color image of the straight line wire defect;

[0054] Step S332: performing saturation statistics on the HSV color image of the straight-line wire defect, thereby obtaining a low-saturation HSV color image of the straight-line wire defect;

[0055] Step S333: performing brightness statistics according to the HSV color image of the straight-line wire defect, thereby obtaining a low-brightness HSV color image of the straight-line wire defect;

[0056] Step S334: generating an oxidation spot mask image according to the low-saturation straight line wire defect HSV color image and the low-brightness straight line wire defect HSV color image, thereby obtaining an oxidation spot mask image;

[0057] Step S335: extracting the oxidation defect features of the straight-line wire according to the oxidation spot mask image, thereby obtaining the oxidation defect data of the straight-line wire;

[0058] Step S336: performing oxidation defect chromaticity enhancement segmentation on the HSV color image of the straight line wire defect according to the straight line wire oxidation defect data, thereby obtaining the straight line wire defect data.

[0059] The present invention helps to improve the sensitivity to color changes by converting the image data of the straight-line wire defects into the HSV color space, especially under different lighting conditions, the HSV color space is more in line with the perceptual characteristics of human vision, making the subsequent color analysis and defect detection more effective. Through saturation statistics, low-saturation image areas can be identified and screened out, which indicate oxidation or other surface defects, effectively reducing background interference, highlighting defect areas, and improving the accuracy of subsequent analysis. Brightness statistics can identify low-brightness areas in the image, which are usually related to oxidation spots or dirt, helping to further refine the identification of defect areas and enhance the detection ability of potential defects. By combining low-saturation and low-brightness image data to generate an oxidation spot mask image, the oxidation defect area is effectively extracted, and the mask image can provide clear area definition for subsequent feature extraction and reduce the false detection rate. Using the oxidation spot mask image for feature extraction, the nature and location of the oxidation defect can be deeply analyzed, helping to identify the type and severity of the defect, thereby providing a basis for subsequent processing and laying a foundation for the confirmation and analysis of specific defect types. By performing chromatic enhancement and segmentation on oxidation defect data, the visibility of oxidation defects can be significantly improved, the contrast of the image can be enhanced, and the defect identification can be made more accurate, thereby improving the accuracy and efficiency of the detection system.

[0060] Optionally, step S34 is specifically:

[0061] Step S341: performing edge detection of the curved wire according to the curved wire defect image data, thereby obtaining the curved wire edge data;

[0062] Step S342: performing curved wire morphology polynomial fitting according to the curved wire edge data, thereby obtaining curved wire morphology data;

[0063] Step S343: generating a two-dimensional path map of the curved wire according to the curved wire shape data, thereby obtaining a two-dimensional path map of the curved wire;

[0064] Step S344: marking the bending area according to the two-dimensional path diagram of the bending wire, thereby obtaining the bending area data of the bending wire;

[0065] Step S345: Calculating the width of the curved wire according to the curved area data, thereby obtaining the curved area width data of the curved wire;

[0066] Step S346: performing wire fracture analysis according to the bending area width data of the bent wire, thereby obtaining wire fracture data;

[0067] Step S347: marking the curved wire defect image data with a conductor breakage defect according to the conductor breakage data, thereby obtaining the curved wire defect data.

[0068] The present invention can clearly identify the boundary of the wire by performing edge detection on the defect image of the curved wire, provide a clear wire outline for subsequent analysis, and help improve the accuracy of defect detection, especially in complex circuit board layout. The edge data of the curved wire is used for morphological polynomial fitting, which can accurately describe the bending shape of the wire, provide a mathematical model, make the wire morphology analysis more accurate, and provide a basis for subsequent path map generation. Generating a two-dimensional path map based on the curved wire morphology data helps to intuitively display the direction and bending degree of the wire. This visual representation can provide a better basis for defect identification and analysis, so that engineers can quickly understand the layout of the wire and its defective area. By marking the bending area of ​​the two-dimensional path map, the area with problems in the wire can be efficiently identified. This identification step helps to focus on a specific bending position and improves the pertinence of subsequent analysis and processing. According to the bending area data of the curved wire, the actual size information of the bending area can be obtained, which is very important for subsequent fracture analysis and helps to determine whether the wire has a potential fracture risk caused by excessive bending. By analyzing the width data, it can be determined whether the wire is broken, which is directly related to the reliability of the electrical connection, and the key defects affecting the performance of the circuit board can be identified in time, thereby providing a basis for repair. Defect marking of the defect image of the curved wire is performed based on the wire fracture data, which can visually mark the problem area in the image, providing not only an intuitive basis for subsequent processing, but also a reference for subsequent quality control and improvement measures.

[0069] Optionally, step S4 is specifically:

[0070] Step S41: obtaining a circuit board defect detection model, and training the circuit board defect detection model according to the circuit board circuit open data, thereby obtaining a circuit board defect detection training model;

[0071] Step S42: performing circuit board circuit open detection on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, thereby obtaining circuit board circuit open detection data;

[0072] Step S43: constructing a detection model confusion matrix according to the circuit board circuit open detection data, thereby obtaining detection model confusion matrix data;

[0073] Step S44: performing an analysis of the falsely identified open circuit samples according to the detection model confusion matrix data, thereby obtaining falsely identified open circuit sample data;

[0074] Step S45: Calculate the accuracy of the detection model according to the detection model confusion matrix data, so as to obtain the detection model accuracy data;

[0075] Step S46: Visualizing the circuit open confusion matrix according to the falsely identified open circuit sample data and the detection model accuracy data, thereby obtaining the circuit open confusion matrix data.

[0076] The present invention can create a detection model specifically for a specific defect type (such as an open circuit) by acquiring a circuit board defect detection model and using circuit open data for training. The training of this model will improve its accuracy and reliability in practical applications, making subsequent detection more targeted and effective. Using the optimized circuit board defect detection model to perform circuit open detection on the automatic optical monitoring image can directly identify potential open circuit defects, which is crucial in the production process because circuit open circuits lead to product failures. Timely discovery of these defects helps to improve product quality. Constructing a confusion matrix based on the detection data can quantify the recognition of the model in different categories (such as open circuit, normal, and other defects), providing important basic data for subsequent analysis and helping to evaluate the overall performance of the model. Analyzing the misidentified samples in the confusion matrix can reveal the specific problems existing in the model during the recognition process, which helps to optimize the model and improve the algorithm to make it more robust when facing complex and uncertain defects. Calculating the accuracy of the detection model through the confusion matrix data can provide a quantitative indicator of the model performance. This accuracy data can not only be used to evaluate the current effectiveness of the model, but also provide direction for subsequent improvements to ensure the reliability of the detection system in production.

[0077] Optionally, the present specification further provides a training system based on a circuit board defect detection model, which is used to execute the training method based on the circuit board defect detection model as described above. The training system based on the circuit board defect detection model includes:

[0078] Circuit board surface defect detection module: used to obtain the circuit board automatic optical monitoring image, and perform circuit board surface defect detection on the circuit board automatic optical monitoring image, so as to obtain circuit board surface defect data;

[0079] Circuit board cold solder joint analysis module: used to mark the defective area of ​​the circuit board according to the surface defect data of the circuit board, so as to obtain the defective area data of the circuit board; perform three-dimensional contour imaging of the solder joint according to the automatic optical monitoring image of the circuit board, so as to obtain the three-dimensional contour data of the solder joint, and perform cold solder joint analysis of the circuit board according to the three-dimensional contour data of the solder joint, so as to obtain the cold solder joint data of the circuit board;

[0080] Circuit board circuit open circuit analysis module: used to perform electrical connection defect analysis based on circuit board defect area data, thereby obtaining electrical connection defect data; perform circuit board circuit open circuit correlation analysis on the electrical connection defect data based on circuit board false soldering data, thereby obtaining circuit board circuit open circuit data;

[0081] Circuit board defect detection model training module: used to obtain a circuit board defect detection model, and train the circuit board defect detection model according to the circuit board circuit open data, so as to obtain a circuit board defect detection training model; perform circuit open confusion matrix analysis on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, so as to obtain circuit open confusion matrix data;

[0082] Defect detection training model classification threshold adjustment module: used to adjust the defect detection model classification threshold of the circuit board defect detection training model according to the circuit open confusion matrix data, so as to obtain the classification threshold adjustment data, and upload it to the circuit board defect detection training model to perform the circuit board defect detection model optimization task.

[0083] The present invention provides a training system based on a circuit board defect detection model. The system can implement any training method based on a circuit board defect detection model of the present invention, and is used to combine the operation and signal transmission medium between various modules to complete the training method based on the circuit board defect detection model. The internal modules of the system cooperate with each other to improve the accuracy of the circuit board defect detection model. BRIEF DESCRIPTION OF THE DRAWINGS

[0084] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments thereof made with reference to the following drawings:

[0085] Figure 1It is a schematic diagram of the steps of the training method based on the circuit board defect detection model of the present invention;

[0086] Figure 2 Detailed step flow diagram of step S2 in the present invention;

[0087] Figure 3 Detailed step flow diagram of step S24 in the present invention;

[0088] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0089] The following is a clear and complete description of the technical method of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by technicians in this field without creative work are within the scope of protection of the present invention.

[0090] In addition, the accompanying drawings are only schematic illustrations of the present invention and are not necessarily drawn to scale. The same reference numerals in the figures represent the same or similar parts, and their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities. The functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor methods and / or microcontroller methods.

[0091] It should be understood that, although the terms "first", "second", etc. may be used herein to describe various units, these units should not be limited by these terms. These terms are used only to distinguish one unit from another unit. For example, without departing from the scope of the exemplary embodiments, the first unit may be referred to as the second unit, and similarly the second unit may be referred to as the first unit. The term "and / or" used herein includes any and all combinations of one or more of the listed associated items.

[0092] To achieve this, please refer to Figures 1 to 3 The present invention provides a training method based on a circuit board defect detection model, the method comprising the following steps:

[0093] Step S1: acquiring an automatic optical monitoring image of a circuit board, and performing circuit board surface defect detection on the automatic optical monitoring image of the circuit board, thereby obtaining circuit board surface defect data;

[0094] In this embodiment, when obtaining the automatic optical monitoring image of the circuit board, a high-resolution industrial camera is used to shoot the surface of the circuit board to ensure the clarity and details of the image. The camera is illuminated by a light source to form a uniform lighting condition to avoid shadows and reflections affecting the image quality. After the shooting is completed, the image is pre-processed using image processing software, including noise removal and contrast enhancement, so that surface defects can be clearly displayed. By setting an appropriate threshold (such as 128) for binarization, the defective area in the image is separated from the background. By analyzing the contour and color histogram, the surface defect data of the circuit board is finally obtained, including the defect type (such as scratches, dents, stains) and its location in the image.

[0095] Step S2: marking defective areas of the circuit board according to the surface defect data of the circuit board, thereby obtaining defective area data of the circuit board; performing three-dimensional contour imaging of solder joints according to the automatic optical monitoring image of the circuit board, thereby obtaining three-dimensional contour data of solder joints, and performing cold solder joint analysis of the circuit board according to the three-dimensional contour data of solder joints, thereby obtaining cold solder joint data of the circuit board;

[0096] In this embodiment, the defective area is marked by image processing technology based on the surface defect data of the circuit board. The connected domain analysis algorithm is used to classify and mark the defects according to the preset area size and shape characteristics (such as roundness greater than 0.7). After marking, the defect area data is saved, including information such as the coordinates, shape and size of the defect. At the same time, based on the original monitoring image, the three-dimensional reconstruction technology is used to perform contour imaging of the solder joint, and the three-dimensional coordinate data of the solder joint is obtained using structured light scanning or laser ranging methods. The three-dimensional contour data is compared with the standard contour of the solder joint, and the deviation of the shape and volume of the solder joint from the standard value is analyzed to obtain the circuit board cold soldering data, including the cold soldering area and cold soldering volume.

[0097] Step S3: performing electrical connection defect analysis based on the circuit board defect area data to obtain electrical connection defect data; performing circuit board circuit open correlation analysis on the electrical connection defect data based on the circuit board cold soldering data to obtain circuit board circuit open data;

[0098] In this embodiment, based on the defective area data of the circuit board, an image analysis algorithm is used to detect the electrical connection. By extracting the characteristics of the electrical connection, such as the wire width, spacing and contact area, the geometric model is used for comparison to obtain the electrical connection defect data. Certain standards are set (such as the wire width should be greater than 0.3 mm and the spacing should be less than 0.5 mm) to screen out electrical connections that do not meet the standards. After the analysis is completed, the circuit board cold soldering data and the electrical connection defect data are correlated and analyzed, and the logistic regression model is used to judge the electrical open circuit to obtain the circuit board circuit open circuit data, including the open circuit location, cause and open circuit length.

[0099] Step S4: obtaining a circuit board defect detection model, and performing model training on the circuit board defect detection model according to the circuit board circuit open data, thereby obtaining a circuit board defect detection training model; performing circuit open confusion matrix analysis on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, thereby obtaining circuit open confusion matrix data;

[0100] In this embodiment, after obtaining the circuit board defect detection model, the circuit board circuit open data is used for model training. A deep learning algorithm (such as a convolutional neural network) is used to extract features of the circuit open, and the input data set includes images of open defects and their annotation data. During the training process, the learning rate is set to 0.001, the batch size is 32, and the number of training iterations is 50 to ensure that the model can fully learn the characteristics of open defects. After the training is completed, the circuit open confusion matrix analysis is performed, and the TP (true positive), TN (true negative), FP (false positive) and FN (false negative) values ​​are counted, and the accuracy (Accuracy), recall (Recall) and F1 score are calculated to provide a basis for model performance evaluation.

[0101] Step S5: adjusting the classification threshold of the defect detection model of the circuit board defect detection training model according to the circuit open confusion matrix data, thereby obtaining the classification threshold adjustment data, and uploading it to the circuit board defect detection training model to perform the circuit board defect detection model optimization task.

[0102] In this embodiment, the classification threshold of the defect detection model is adjusted for the circuit board defect detection training model based on the circuit open confusion matrix data. By calculating the accuracy of each category, a suitable classification threshold (such as 0.5) is selected to optimize the model's ability to detect defects. The adjusted threshold is applied to the model, and the test on the validation set is performed to ensure that the accuracy and sensitivity of defect identification are improved. After the optimization is completed, the new threshold parameters are uploaded to the training model to complete the optimization task of the circuit board defect detection model, ensuring that the model has higher accuracy and reliability in actual detection.

[0103] Optionally, step S2 specifically includes:

[0104] Step S21: performing grayscale image conversion according to the circuit board surface defect data, thereby obtaining the circuit board surface defect grayscale image data;

[0105] In this embodiment, the surface defect data of the circuit board is obtained and stored in an image file format (such as JPEG or PNG). The color image is converted to grayscale using an image processing library (such as OpenCV). In the specific operation, the RGB value of each pixel is converted to a grayscale value by calling the corresponding function, and the calculation formula is: grayscale value = 0.2989*R+0.5870*G 0.1140*B. This formula is weighted according to the sensitivity of the human eye to different colors to ensure that the grayscale image can truly reflect the brightness characteristics of the original image. After the conversion is completed, the generated grayscale image will be used as the basic data for subsequent analysis to represent the defect characteristics of the circuit board surface.

[0106] Step S22: Calculating the number of grayscale pixels according to the grayscale image data of the circuit board surface defects, thereby obtaining grayscale pixel number data;

[0107] In this embodiment, the number of pixels of the grayscale image is calculated. A histogram is constructed by counting the number of pixels corresponding to each grayscale level (0 to 255) in the grayscale image. The number of pixels of each grayscale level can be quickly calculated using the histogram function in the NumPy library. For example, call np.histogram(image.flatten(), bins=256, range=[0,256]) to obtain the pixel count of each grayscale level. Finally, the obtained grayscale pixel number data is stored as an array, reflecting the grayscale distribution characteristics of the image, providing a basis for subsequent threshold calculations.

[0108] Step S23: Calculating the maximum inter-class variance threshold value according to the grayscale pixel quantity data, thereby obtaining the maximum inter-class variance threshold data;

[0109] In this embodiment, the grayscale pixel number data obtained in step S22 is used to calculate the maximum inter-class variance (Otsu threshold). First, the total number of pixels N is calculated, and then the probability distribution P(i)=n(i) / N of each gray level is calculated, where n(i) is the number of pixels of gray level i. Next, for each threshold t (range 0 to 255), the inter-class variance σ²_b(t)=ω_0(t)*ω_1(t)*(μ_0(t)-μ_1(t))² is calculated, where ω_0(t) and ω_1(t) are the weights of the foreground and background, and μ_0(t) and μ_1(t) are their means. The threshold that maximizes σ²_b(t) is selected as the maximum inter-class variance threshold. This threshold will effectively divide the image into foreground (defective area) and background, improving the accuracy of subsequent processing.

[0110] Step S24: dividing the grayscale pixel quantity data into circuit board defect areas according to the maximum inter-class variance threshold data, thereby obtaining circuit board defect area data;

[0111] In this embodiment, the grayscale pixel number data is divided into circuit board defect areas according to the maximum inter-class variance threshold data. The grayscale image is binarized using the threshold, and the pixels with grayscale values ​​higher than the maximum inter-class variance threshold are set to 255 (white), and the remaining pixels are set to 0 (black). This process can be implemented using the cv2.threshold function of OpenCV, for example, calling cv2.threshold(gray_image,threshold_value,255,cv2.THRESH_BINARY). After binarization, the resulting binary image will display the defect area, and subsequent morphological operations (such as corrosion and expansion) will further clean and enhance the defect area, and finally form complete circuit board defect area data, including the outline and position of the defect.

[0112] Step S25: perform three-dimensional contour imaging of solder joints based on the circuit board automatic optical monitoring image to obtain three-dimensional contour data of solder joints, and perform circuit board cold solder joint analysis based on the three-dimensional contour data of solder joints to obtain circuit board cold solder joint data.

[0113] In this embodiment, the automatic optical monitoring image of the circuit board is used to perform three-dimensional contour imaging of the solder joint. Stereoscopic vision technology is used to capture the solder joint from different angles through at least two industrial cameras to obtain two-dimensional image data of the solder joint. Camera calibration technology is used to calculate the internal and external parameters of the camera to ensure the accuracy of image registration. Combined with deep learning algorithms or traditional stereo matching algorithms (such as block matching or disparity map generation), three-dimensional coordinate data of the solder joint is generated. Finally, the circuit board virtual solder joint analysis is performed based on the three-dimensional contour data, and the virtual solder joint standard (such as the height of the solder joint is less than the standard value) is set for judgment, and the circuit board virtual solder joint data is output, including the location of the virtual solder joint, the degree of virtual solder joint and related parameters. This analysis result provides a basis for subsequent quality control and repair work.

[0114] Optionally, step S24 is specifically:

[0115] Step S241: binarizing the grayscale pixel quantity data according to the maximum inter-class variance threshold data to generate an image, thereby obtaining a foreground defect image and a background image;

[0116] In this embodiment, the grayscale pixel quantity data is binarized according to the maximum inter-class variance threshold data, thereby generating a foreground defect image and a background image. The cv2.threshold function in the OpenCV library is used, and the threshold parameter threshold_value is set to the maximum inter-class variance threshold, and the max_value is set to 255. After inputting the original grayscale image, the function will judge each pixel, and pixels greater than the threshold will be assigned a value of 255 (i.e., foreground), and pixels less than or equal to the threshold will be assigned a value of 0 (i.e., background). The image generated by this binarization operation clearly distinguishes the potential defect area (foreground) from the defect-free area (background), providing an effective basis for subsequent morphological processing.

[0117] Step S242: setting a structure element kernel according to the foreground defect image, thereby obtaining structure element kernel data;

[0118] In this embodiment, after the binarization process is completed, the structure element kernel is set according to the generated foreground defect image. The structure element is used for morphological operations to determine the effects of dilation and erosion. The structure element is created by the cv2.getStructuringElement function in OpenCV, and the parameter shape is set to cv2.MORPH_RECT to generate a rectangular structure element. Next, the parameter ksize is set to (5,5), that is, a 5x5 structure element matrix is ​​created. The structure element will be used for subsequent dilation and erosion operations to enhance the morphological characteristics of the foreground defect and ensure that the actual defect situation is accurately reflected during the processing.

[0119] Step S243: performing morphological dilation on the foreground defect image and the background image according to the structure element kernel data, thereby obtaining a foreground defect dilated image;

[0120] In this embodiment, a morphological dilation operation is performed on the foreground defect image using a structural element kernel. The cv2.dilate function in OpenCV is called, and the input parameters are the foreground defect image and the constructed structural element kernel. The dilation operation is implemented by sliding the structural element on the foreground image, updating the values ​​of all pixels in the pixel area covered by the structural element to 255, so that the defect area expands outward. The result of this operation generates a foreground defect dilation image, which enhances the connectivity and visibility of the defect, and is particularly suitable for processing defect areas caused by noise or discontinuity.

[0121] Step S244: performing morphological erosion according to the foreground defect dilation image, so as to obtain an accurate foreground defect dilation image;

[0122] In this embodiment, after obtaining the foreground defect expansion image, morphological erosion processing is performed to refine the edge of the defect area. The cv2.erode function of OpenCV is used, and the input parameters are the foreground defect expansion image and the previously set structural element kernel. The erosion operation process is to slide the structural element on the foreground image. If any pixel value in the pixel area covered by the structural element is 0, the corresponding center pixel value will be updated to 0. This process effectively removes noise and irrelevant areas in the foreground image, and the obtained foreground defect precise expansion image can more accurately display the defect contour, providing a reliable basis for subsequent defect area marking.

[0123] Step S245: marking the defective area of ​​the circuit board according to the foreground defect precise expansion image, thereby obtaining the defective area data of the circuit board.

[0124] In this embodiment, the defective area of ​​the circuit board is marked according to the precise expansion image of the foreground defect. The cv2.findContours function of OpenCV is used to detect the contours in the image. This function can identify and extract all connected foreground areas in the image. The parameter is set to cv2.RETR_EXTERNAL to extract the outermost contour, and the parameter cv2.CHAIN_APPROX_SIMPLE is used to reduce the number of stored points and only retain the endpoint information of the contour. The extracted contour data is used to draw the defective area onto the original image through the cv2.drawContours function, and the defect number or attribute can be attached to facilitate subsequent defect analysis and processing. The circuit board defect area data generated by this step can provide the necessary basis for quality control and improvement of the welding process.

[0125] Optionally, step S25 is specifically:

[0126] Step S251: extracting multi-angle solder joint features according to the circuit board automatic optical monitoring image, thereby obtaining multi-angle solder joint data;

[0127] In this embodiment, multi-angle solder joint feature extraction is performed based on the automatic optical monitoring image of the circuit board. Use a high-resolution camera to capture images of the solder joint at different angles to ensure that data is obtained from at least three different viewing angles. Use image processing algorithms, such as Canny edge detection and Hough transform, to analyze the solder joint features in images at each angle. Edge detection is performed using the cv2.Canny function, and the thresholds are set to 100 and 200 to optimize the accuracy of edge recognition. Afterwards, the cv2.HoughCircles function is used to detect the circular features of the solder joint, extract its position coordinates and radius, and form multi-angle solder joint data. This data provides rich feature information for subsequent solder joint analysis.

[0128] Step S252: performing laser emission simulation according to the multi-angle welding point data, thereby obtaining laser emission data;

[0129] In this embodiment, after obtaining the multi-angle weld data, laser emission simulation is performed to simulate the irradiation of the laser on the weld surface. Laser simulation software is used to set the laser emission angle, wavelength and power parameters for simulation. The emission angle is calculated based on the coordinate information extracted from the weld feature to ensure that the laser emission direction is consistent with the weld center. The wavelength is set to 532 nm green laser to increase the reflection contrast with the weld surface. During the simulation process, the laser intensity distribution of each weld at different emission angles is recorded to generate laser emission data, which provides a basis for subsequent reflected beam capture.

[0130] Step S253: capturing the laser reflected beam according to the laser emission data, thereby obtaining the laser reflected beam data;

[0131] In this embodiment, the laser reflected light beam is captured according to the laser emission data. A photoelectric sensor and a high-sensitivity camera are used in combination to monitor the reflected light at the solder joint in real time. The photoelectric sensor sets a detection threshold to ensure that only reflected light beams exceeding a certain intensity are captured. During the image acquisition process, image enhancement techniques such as histogram equalization are applied to improve image quality to ensure the clarity of the reflected light from the solder joint. The laser reflected light beam data finally obtained contains the light intensity information and reflection angle of the solder joint surface, providing data basis for solder joint height measurement.

[0132] Step S254: measuring the height of the weld spot according to the laser reflected beam data and the multi-angle weld spot data, thereby obtaining the weld spot height data;

[0133] In this embodiment, the solder joint height is measured based on the laser reflected beam data and the multi-angle solder joint data. The triangulation method is used to combine the angle information of laser emission and reflection to calculate the relative height of the solder joint and the sensor. The reference height value is set to 0, and the measurement angle is solved using the intensity distribution data of the reflected beam. The obtained solder joint height data can be used for subsequent cold solder joint analysis to ensure that the solder joint meets the design standards.

[0134] Step S255: mapping the two-dimensional coordinates of the welding points according to the welding point height data, thereby obtaining the two-dimensional coordinate data of the welding points;

[0135] In this embodiment, on the basis of obtaining the height data of the weld, two-dimensional coordinate mapping of the weld is performed. The three-dimensional coordinate data of the weld is converted into two-dimensional plane coordinates, and the X, Y, and Z coordinates of the weld are converted into plane coordinates (X′, Y′)(X', Y')(X′, Y′) using a mapping formula. During the mapping process, projection parameters are set to ensure accuracy, and the projection parameters are obtained by calibrating the relative position of the camera and the measurement platform. The final generated two-dimensional coordinate data of the weld provides the necessary information for the subsequent three-dimensional contour generation to ensure the traceability of welding quality.

[0136] Step S256: generating a three-dimensional contour of the solder joint according to the two-dimensional coordinate data of the solder joint, thereby obtaining the three-dimensional contour data of the solder joint;

[0137] In this embodiment, the three-dimensional contour of the solder joint is generated based on the two-dimensional coordinate data of the solder joint. By using an interpolation algorithm (such as bilinear interpolation or cubic interpolation), the two-dimensional coordinates are combined with the solder joint height data to generate a three-dimensional model of the solder joint. The interpolation method used generates a continuous three-dimensional surface by analyzing the relative position and height difference between the solder joints. The interpolation parameters are set to ensure the smoothness and accuracy of the generated model. The final three-dimensional contour data of the solder joint provides a visual basis for the subsequent virtual solder joint analysis, ensuring that the shape and height of the solder joint meet the design requirements.

[0138] Step S257: Perform cold solder joint analysis on the circuit board according to the three-dimensional contour data of the solder joints, thereby obtaining cold solder joint data on the circuit board.

[0139] In this embodiment, the circuit board cold solder joint analysis is performed based on the three-dimensional profile data of the solder joint. Special analysis software is used to set the cold solder joint standard, including the height threshold, shape standard and surface smoothness of the solder joint. By comparing the actual three-dimensional profile of the solder joint with the standard model, the potential cold solder joint area is identified. In the specific analysis process, the cluster analysis method (such as K-means algorithm) is used to group the solder joint data, determine the abnormal solder joints, and generate a cold solder joint report. This step provides data support for optimizing the welding process and helps to improve production quality and efficiency.

[0140] Optionally, step S257 is specifically:

[0141] Solder point height feature extraction and solder point diameter feature extraction are performed based on the solder point three-dimensional contour data, thereby obtaining solder point height data and solder point diameter data;

[0142] In this embodiment, the height and diameter features of the weld are extracted based on the three-dimensional contour data of the weld. The height data of the weld is directly extracted by obtaining the Z-axis coordinate of the three-dimensional contour of the weld. The height of the weld is defined as the height difference between its Z-axis maximum value and the reference plane. Next, the diameter feature of the weld is realized by extracting the X and Y coordinates of the bottom of the weld from the three-dimensional contour, and the minimum circumscribed circle algorithm is used to calculate the diameter of the weld on the plane. The algorithm finds the extreme points of the weld contour and calculates in combination with the geometric characteristics of the minimum circumscribed circle to ensure that the extracted weld height and diameter data have high accuracy and reliability.

[0143] Calculate the solder volume according to the solder spot height data and the solder spot diameter data, so as to obtain the solder volume data;

[0144] In this embodiment, the solder volume is calculated based on the solder point height data and the solder point diameter data. The solder volume can be regarded as the volume of a cylinder, and the formula is:

[0145]

[0146] Where d is the solder joint diameter and h is the solder joint height. The solder volume data is obtained by substituting the extracted solder joint height and diameter data into the above formula. This volume calculation process ensures the accuracy of the solder volume and provides a basis for the subsequent comparison of the virtual solder joint volume data.

[0147] Obtain standard solder volume data and standard solder joint-pad contact area data;

[0148] In this embodiment, standard solder volume data and standard solder joint-pad contact area data are obtained. The standard solder volume data is derived from industry specifications and welding process standards, and is usually a standard value summarized after many years of actual welding experience. The standard solder joint-pad contact area data is calculated based on the design drawings of the pad using computational geometry methods to ensure the accuracy and reliability of the standard data. These standard data provide important benchmarks for subsequent cold solder volume comparisons and electrical contact failure analysis.

[0149] Compare the solder volume data with the cold solder volume according to the standard solder volume data, so as to obtain the cold solder volume data;

[0150] In this embodiment, the solder volume data is compared with the cold solder volume according to the standard solder volume data. In the specific implementation, the difference between the solder volume and the standard solder volume is calculated to obtain the cold solder volume data. The threshold is set to 0.2 mm³. If the solder volume is less than the standard value minus the threshold, it is judged as a cold solder. The actual solder volume is compared with the standard solder volume one by one, and all cold solder situations are recorded to ensure the integrity and accuracy of the cold solder volume data, so as to provide support for the subsequent welding quality evaluation.

[0151] Solder point contour feature extraction and pad contour feature extraction are performed according to the solder point three-dimensional contour data, so as to obtain solder point contour data and pad contour data;

[0152] In this embodiment, solder joint contour feature extraction and pad contour feature extraction are performed based on solder joint three-dimensional contour data. The solder joint contour data extracts edge information by analyzing the three-dimensional contour shape of the solder joint. A contour extraction algorithm, such as edge detection and shape fitting, is used to obtain the outer contour of the solder joint. The pad contour feature extraction adopts a method similar to that of the solder joint. Based on the design parameters of the pad, the pad edge information is extracted by contour extraction technology to ensure that the obtained solder joint and pad contour data are both highly accurate and highly comparable.

[0153] The contact area is calculated according to the solder joint contour data and the solder pad contour data, so as to obtain the solder joint-pad contact area data;

[0154] In this embodiment, the contact area is calculated based on the solder joint contour data and the pad contour data. The contact area is obtained by overlapping the solder joint and the pad contour and applying the geometric intersection calculation method. The specific steps include using the numerical integration method to calculate the area of ​​the intersection area of ​​the solder joint and the pad to ensure the accuracy of the contact area data. By setting a standard threshold value for the contact area, the subsequent analysis of poor electrical contact is facilitated. The calculation results of the contact area provide the necessary data basis for electrical performance evaluation.

[0155] Comparing the poor electrical contact data of the solder joint-pad contact area with the standard solder joint-pad contact area data, thereby obtaining the poor electrical contact data;

[0156] In this embodiment, the solder joint-pad contact area data is compared with the standard solder joint-pad contact area data for poor electrical contact. In a specific implementation, by comparing the calculated solder joint-pad contact area with the standard contact area, a minimum contact area threshold is set, such as 0.5 mm². If the actual contact area is lower than the threshold, it is recorded as poor electrical contact. This step can effectively identify potential electrical faults and ensure the quality of welding.

[0157] The circuit board cold solder joint features are integrated according to the electrical contact failure data and the cold solder joint volume data, so as to obtain the circuit board cold solder joint data.

[0158] In this embodiment, the circuit board cold soldering characteristics are integrated according to the electrical contact failure data and the cold soldering volume data. The identified electrical contact failure is combined with the cold soldering volume information and analyzed by constructing a comprehensive evaluation model. The model uses a multivariate statistical analysis method to comprehensively consider the influence of poor contact and cold soldering volume, and outputs the final circuit board cold soldering data. The integration results provide an important basis for subsequent welding process optimization and troubleshooting, ensuring the quality management and control of the entire welding process.

[0159] Optionally, step S3 specifically includes:

[0160] Step S31: extracting wire defect features according to the circuit board defect area data, thereby obtaining wire defect image data;

[0161] In this embodiment, the wire defect feature extraction is performed based on the circuit board defect area data, the circuit board defect area data is converted into image data, and the outline and features of the wire are extracted through image processing technology. In the specific operation, an edge detection algorithm, such as the Canny algorithm, is used to identify the edge of the wire and extract the defect area. Then, morphological processing, such as expansion and corrosion, is applied to eliminate noise and strengthen the wire outline, and finally generate wire defect image data. The extracted wire defect image data is used for subsequent analysis to ensure that the defect features are accurately identified and extracted.

[0162] Step S32: performing wire direction statistics according to the wire defect image data, so as to obtain straight wire defect image data and curved wire defect image data;

[0163] In this embodiment, the wire direction statistics are performed based on the wire defect image data. The Hough transform algorithm is used to identify the direction of the straight lines and curves in the image. The algorithm classifies the wire direction by detecting the straight line and curve parameter space of the image. In the specific implementation, the angle range is set to 0° to 180°, the step size is 1°, and the wire defect image data of each direction is counted in combination with the distribution of image pixels. Finally, the straight line direction wire defect image data and the curved direction wire defect image data are generated, which provide a basis for subsequent defect detection.

[0164] Step S33: performing straight line wire defect detection on the straight line wire defect image data, thereby obtaining straight line wire defect data;

[0165] In this embodiment, the linear direction wire defect image data is subjected to linear direction wire defect detection. Template matching technology is used to define a standard template of linear defects, and the template is compared with the wire defect image data. The similarity between the template and the image to be detected is calculated, and a similarity threshold (such as 0.85) is set. When the similarity is higher than the threshold, it is determined that a linear direction wire defect exists. During the detection process, morphological operations can also be applied to remove artifacts to ensure the accuracy and reliability of the detection results, thereby obtaining linear direction wire defect data.

[0166] Step S34: performing curved direction wire defect detection on the curved direction wire defect image data, thereby obtaining curved direction wire defect data;

[0167] In this embodiment, curved wire defect detection is performed on curved wire defect image data. A detection method based on curve fitting is adopted. First, the characteristic curve of the curved wire is fitted by a polynomial regression algorithm, the goodness of fit (R²) is calculated, and a goodness of fit threshold (such as 0.9) is set. When the actual image data is consistent with the fitting curve, it is determined that there is a curved wire defect. At the same time, by analyzing the second-order derivative of the curve, the abnormal point of curvature change is detected, and the curved defect is further confirmed, and finally the curved wire defect data is obtained.

[0168] Step S35: integrating electrical connection wire defects according to the straight-line wire defect data and the curved-line wire defect data, thereby obtaining electrical connection defect data;

[0169] In this embodiment, the defects of the electrical connection wires are integrated according to the defect data of the straight-line wires and the defect data of the curved-line wires. By establishing a defect integration model, the two types of defect data are merged, and the type and severity of the defects are comprehensively considered using data fusion technology. In the specific operation, the defect impact weight is set, for example, the weight of the straight-line defect is 0.6, the weight of the curved defect is 0.4, and the overall defect score is calculated, and the threshold (such as 0.5) is set for classification, and finally the electrical connection defect data is output to ensure the accuracy and rationality of the integration process.

[0170] Step S36: performing circuit board circuit open correlation analysis on the electrical connection defect data according to the circuit board cold soldering data, thereby obtaining circuit board circuit open data.

[0171] In this embodiment, the circuit board circuit open circuit correlation analysis is performed on the electrical connection defect data according to the circuit board cold soldering data. A statistical model is established to perform correlation analysis on the electrical connection defect data and the cold soldering data, and the Pearson correlation coefficient is used to calculate the degree of correlation between the defects. A correlation threshold (such as 0.6) is set to determine whether there is a significant open circuit relationship. During the analysis process, the influence of external factors must also be considered, and multivariate regression analysis is performed to ensure the accuracy and reliability of the results. Finally, the circuit board circuit open circuit data is output to provide support for subsequent quality control and defect repair.

[0172] Optionally, step S33 is specifically:

[0173] Step S331: performing HSV color space conversion according to the image data of the straight line wire defect, so as to obtain an HSV color image of the straight line wire defect;

[0174] In this embodiment, an image processing tool (such as OpenCV) is used to read the image of the straight-line wire defect, and the color space of the image is converted from RGB to HSV. This conversion can calculate the HSV value of each pixel through a formula. When it is implemented specifically, the maximum and minimum values ​​are calculated to determine the maximum value (Max) and minimum value (Min) of the red, green, and blue channels of the current pixel. Calculate the hue H: If Max is equal to Min, then H=0; otherwise:

[0175] H=60×[(GB) / (Max-Min)] (if Max=R);

[0176] H=60×[(BR) / (Max-Min)]+120 (if Max=G);

[0177] H=60×[(RG) / (Max-Min)]+240 (if Max=B);

[0178] Calculate the saturation S = 0 (if Max = 0); otherwise S = (Max-Min) / Max×100. Calculate the brightness V = Max. Through these calculations, the HSV color image of the straight line wire defect retains the information of hue, saturation and brightness, providing rich color features for subsequent defect detection.

[0179] Step S332: performing saturation statistics on the HSV color image of the straight-line wire defect, thereby obtaining a low-saturation HSV color image of the straight-line wire defect;

[0180] In this embodiment, saturation statistics are performed based on the HSV color image of the straight line wire defect. A saturation threshold is set to define the standard for low saturation. For example, pixels with a saturation of less than 20% are set as low saturation pixels. Subsequently, the saturation value of each pixel is traversed, and the pixels that meet the conditions are recorded to generate a low saturation straight line wire defect HSV color image. During the implementation process, the NumPy library can be used to filter the S channel of each pixel to generate a new image matrix. This process not only helps to identify areas with low saturation, but also provides an important basis for the subsequent analysis of oxidation defects.

[0181] Step S333: performing brightness statistics according to the HSV color image of the straight-line wire defect, thereby obtaining a low-brightness HSV color image of the straight-line wire defect;

[0182] In this embodiment, brightness statistics are performed based on the HSV color image of the straight-line wire defect. The brightness V channel is processed and a brightness threshold is set. For example, pixels with a brightness lower than 30% are considered to be low-brightness pixels. The image processing tool is used to traverse the brightness value of each pixel in the image, and low-brightness pixels are filtered out according to the threshold to generate a low-brightness straight-line wire defect HSV color image. In the implementation, the brightness value of each pixel in the image is calculated, the pixels that meet the conditions are recorded, and a new image is generated. This step lays the foundation for the subsequent feature extraction of defects. By identifying low-brightness areas, the oxidation spots can be better focused.

[0183] Step S334: generating an oxidation spot mask image according to the low-saturation straight line wire defect HSV color image and the low-brightness straight line wire defect HSV color image, thereby obtaining an oxidation spot mask image;

[0184] In this embodiment, an oxidation spot mask image is generated based on a low-saturation straight line wire defect HSV color image and a low-brightness straight line wire defect HSV color image. First, the two images are combined using a logical operation. Specifically, the logical "AND" operator is used to retain only pixels that are true (i.e., meet the conditions) in both the low-saturation and low-brightness images, thereby obtaining an oxidation spot mask image. In implementation, each pixel is judged and merged one by one to ensure that only areas that meet the low-saturation and low-brightness conditions are retained. This mask image helps in subsequent feature extraction, allowing the analysis to focus more on areas with oxidation risks.

[0185] Step S335: extracting the oxidation defect features of the straight-line wire according to the oxidation spot mask image, thereby obtaining the oxidation defect data of the straight-line wire;

[0186] In this embodiment, the oxidation defect feature extraction of the straight line wire is performed based on the oxidation spot mask image. First, the oxidation spot mask image is used to perform a pixel-by-pixel multiplication operation on the HSV color image of the straight line wire defect to extract the area indicated by the mask image. In the obtained result, only the oxidation defect area is retained. Then, through morphological operations such as closing and opening operations, small noise is eliminated and the defect edges are smoothed. Finally, the image feature extraction technology is used to analyze the shape, area, edge features, etc. of these areas to generate the oxidation defect data of the straight line wire. This data can be used to further evaluate the nature and severity of the defects.

[0187] Step S336: performing oxidation defect chromaticity enhancement segmentation on the HSV color image of the straight line wire defect according to the straight line wire oxidation defect data, thereby obtaining the straight line wire defect data.

[0188] In this embodiment, the oxidation defect chromaticity enhancement segmentation is performed on the HSV color image of the straight line wire defect according to the oxidation defect data of the straight line wire. First, the hue range of the oxidation defect is set. Usually, pixels with a hue of 0-60° are considered to be oxidation spots. Then, the image is processed by applying chromaticity enhancement techniques such as histogram equalization to improve the contrast of the oxidation defect area. During the processing, the segmentation effect is enhanced by enhancing the color and brightness of these areas, making the oxidation defects more obvious in the image. Finally, the extracted straight line wire defect data provides a reliable basis for defect analysis and subsequent repair.

[0189] Optionally, step S34 is specifically:

[0190] Step S341: performing edge detection of the curved wire according to the curved wire defect image data, thereby obtaining the curved wire edge data;

[0191] In this embodiment, edge detection is performed on the defective image data of the curved conductor to obtain the edge data of the curved conductor. First, the original image is read through an image processing tool (such as OpenCV), which should be a grayscale image or a preprocessed color image. Use Gaussian blur (cv2.GaussianBlur()) to smooth the image to reduce the influence of noise. The blur kernel size is set to 5×5 and the standard deviation is 1.5. Use the Canny edge detection algorithm (cv2.Canny()) to extract edges. Set the low threshold to 50 and the high threshold to 150 to ensure that the edge of the wire can be effectively identified. Binarize the image after edge detection to generate an edge image, in which the edge part is white and the other parts are black. Perform contour detection (cv2.findContours()) on the binary image to extract all edge contour data, and save the contour data as the edge data of the curved conductor.

[0192] Step S342: performing curved wire morphology polynomial fitting according to the curved wire edge data, thereby obtaining curved wire morphology data;

[0193] In this embodiment, the coordinates of the edge points are extracted from the edge data to form a point set of (x, y). The order of the polynomial is set to 3 according to the actual situation, which is suitable for fitting most curved shapes. The numpy.polyfit() function in the NumPy library is used for polynomial fitting, the x and y coordinates of the edge points are passed in, and the coefficients of the fitting polynomial are obtained. The obtained polynomial coefficients are used to generate a fitting function so that the curved wire morphology data can be generated later.

[0194] Step S343: generating a two-dimensional path map of the curved wire according to the curved wire shape data, thereby obtaining a two-dimensional path map of the curved wire;

[0195] In this embodiment, a blank image is initialized as a path image, the size is the same as the original image, and the background color is set to white. According to the polynomial fitting function, a series of x values ​​(for example, from the minimum x value to the maximum x value, with a step size of 1) are calculated, and the corresponding y values ​​are calculated using the fitting function to form a path point set. The cv2.polylines() function in OpenCV is used to draw the path of the curved wire on the blank image according to the path point set, and the line color is set to blue and the line width is set to 2. The generated two-dimensional path map is saved as an image file for subsequent processing.

[0196] Step S344: marking the bending area according to the two-dimensional path diagram of the bending wire, thereby obtaining the bending area data of the bending wire;

[0197] In this embodiment, the identification standard of the curved area is set. For example, the distance from the center line on the path map exceeding a certain threshold (for example, 10 pixels) is set to be regarded as a curved area. The two-dimensional path map is traversed, and the distance from each pixel to the path line is calculated using a distance calculation formula. For each pixel, if its distance is greater than the set threshold, the pixel is marked as a curved area, and its pixel value is changed to red to form an image after identification. All the identified areas are extracted from the identified image, and their coordinates, size and other information are recorded to form the curved area data of the curved wire.

[0198] Step S345: Calculating the width of the curved wire according to the curved area data, thereby obtaining the curved area width data of the curved wire;

[0199] In this embodiment, the coordinates of all identified areas are extracted from the bending area data. For each identified bending area, the width is obtained by calculating its maximum and minimum values ​​in the x-axis direction. The calculation formula is: width = maximum x value - minimum x value. The width of each bending area is recorded in a list or array to form a complete width data set. The width data is summarized and a report is generated to provide statistical information about the width of the curved wire.

[0200] Step S346: performing wire fracture analysis according to the bending area width data of the bent wire, thereby obtaining wire fracture data;

[0201] In this embodiment, the judgment standard of wire fracture is set. If the width of a certain bending area is lower than the set threshold (for example, 3 mm), it is considered that there is a fracture in the area. The obtained bending area width data is traversed, and each width value is judged one by one. If a certain width value is found to be less than the set threshold, the coordinates and width information of the area are recorded and marked as a fracture area. The analysis results are summarized to generate a wire fracture data report, providing information such as the fracture location and quantity.

[0202] Step S347: marking the curved wire defect image data with a conductor breakage defect according to the conductor breakage data, thereby obtaining the curved wire defect data.

[0203] In this embodiment, OpenCV is used to read the defect image of the curved wire and prepare for the marking operation. The wire fracture data is traversed to obtain the coordinates and width information of each fracture area. Each fracture area is marked on the defect image, and a rectangular box or circle is used to mark the fracture position. The color is set to red and the line width is set to 2. The marked defect image is saved as a new file for subsequent analysis and recording.

[0204] Optionally, step S4 is specifically:

[0205] Step S41: obtaining a circuit board defect detection model, and training the circuit board defect detection model according to the circuit board circuit open data, thereby obtaining a circuit board defect detection training model;

[0206] In this embodiment, a circuit board defect detection model is constructed, and a convolutional neural network (CNN) is used as the basic architecture. A deep learning framework such as Keras or PyTorch is selected to design a network structure containing multiple convolutional layers, pooling layers, and fully connected layers to enhance the feature extraction capability. During the training process, a circuit board circuit open circuit dataset is used, which includes sample images marked as "normal" and "open circuit". The image data is divided into 80% training set and 20% validation set, and the model is optimized using the cross entropy loss function. The learning rate is set to 0.001 and the batch size is 32. The model parameters are adjusted through multiple cycles of training (for example, 100 epochs). After completion, save the trained model for subsequent use.

[0207] Step S42: performing circuit board circuit open detection on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, thereby obtaining circuit board circuit open detection data;

[0208] In this embodiment, after obtaining a trained circuit board defect detection model, the model is used to perform circuit open detection on the circuit board automatic optical inspection (AOI) image. The AOI image to be detected is input into the model, forward propagated, and the probability value is output. The probability threshold is set to 0.5. If the output probability is greater than the threshold, it is judged as "open circuit", otherwise it is "normal". Through this process, the circuit board circuit open detection data is obtained, and the prediction results of each image and the corresponding confidence are recorded to evaluate the accuracy of the detection.

[0209] Step S43: constructing a detection model confusion matrix according to the circuit board circuit open detection data, thereby obtaining detection model confusion matrix data;

[0210] In this embodiment, the circuit board circuit open detection data is used to construct the confusion matrix of the detection model. First, the actual labels and model prediction results are sorted for comparison. The confusion matrix is ​​a 2x2 table, which represents true positive (TP), false positive (FP), true negative (TN) and false negative (FN). By traversing the detection results, the actual label of each sample is matched with the model prediction result, and the number of each category is counted. Finally, a confusion matrix containing four values ​​is formed to reflect the classification performance of the model in circuit open detection.

[0211] Step S44: performing an analysis of the falsely identified open circuit samples according to the detection model confusion matrix data, thereby obtaining falsely identified open circuit sample data;

[0212] In this embodiment, based on the constructed confusion matrix data, the incorrectly identified open circuit samples are analyzed. Focus on false positive (FP) and false negative (FN) samples, and analyze each error in detail. For false positive samples, check the characteristics of these samples and why the model misjudged them as open circuits, involving image quality, lighting conditions, or areas similar to normal circuits. For false negative samples, analyze why these samples were not correctly identified, involving insufficient characteristics of the open circuit or similarity that caused the model to be unable to identify. Record the incorrect samples for subsequent adjustment and optimization of the model.

[0213] Step S45: Calculate the accuracy of the detection model according to the detection model confusion matrix data, so as to obtain the detection model accuracy data;

[0214] In this embodiment, the accuracy of the detection model is calculated based on the confusion matrix data. The calculation formula for accuracy is: Accuracy = TP / (TP+FP). The number of true positives and false positives is extracted from the confusion matrix and substituted into the formula to calculate the accuracy value. At the same time, other evaluation indicators, such as recall and F1-score, are calculated to comprehensively evaluate the performance of the model. The calculation formula for recall is: Recall = TP / (TP+FN), and F1-score is the harmonic average of accuracy and recall. Through these indicators, the effectiveness of the model in detecting circuit open defects is evaluated.

[0215] Step S46: Visualizing the circuit open confusion matrix according to the falsely identified open circuit sample data and the detection model accuracy data, thereby obtaining the circuit open confusion matrix data.

[0216] In this embodiment, the circuit open confusion matrix is ​​visualized according to the error recognition open sample data and the detection model accuracy data. Matplotlib is used to draw a heat map of the confusion matrix in the Python environment. The confusion matrix data is passed in through the seaborn.heatmap function, and the color mapping parameters are set so that different values ​​are displayed in different colors to enhance readability. Labels and titles are added to the figure to clearly identify the number of true, false positive, true negative, and false negative for each category. This visualization result can not only intuitively show the classification effect of the model, but also provide a basis for subsequent model optimization.

[0217] Optionally, the present specification further provides a training system based on a circuit board defect detection model, which is used to execute the training method based on the circuit board defect detection model as described above. The training system based on the circuit board defect detection model includes:

[0218] Circuit board surface defect detection module: used to obtain the circuit board automatic optical monitoring image, and perform circuit board surface defect detection on the circuit board automatic optical monitoring image, so as to obtain circuit board surface defect data;

[0219] Circuit board cold solder joint analysis module: used to mark the defective area of ​​the circuit board according to the surface defect data of the circuit board, so as to obtain the defective area data of the circuit board; perform three-dimensional contour imaging of the solder joint according to the automatic optical monitoring image of the circuit board, so as to obtain the three-dimensional contour data of the solder joint, and perform cold solder joint analysis of the circuit board according to the three-dimensional contour data of the solder joint, so as to obtain the cold solder joint data of the circuit board;

[0220] Circuit board circuit open circuit analysis module: used to perform electrical connection defect analysis based on circuit board defect area data, thereby obtaining electrical connection defect data; perform circuit board circuit open circuit correlation analysis on the electrical connection defect data based on circuit board false soldering data, thereby obtaining circuit board circuit open circuit data;

[0221] Circuit board defect detection model training module: used to obtain a circuit board defect detection model, and train the circuit board defect detection model according to the circuit board circuit open data, so as to obtain a circuit board defect detection training model; perform circuit open confusion matrix analysis on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, so as to obtain circuit open confusion matrix data;

[0222] Defect detection training model classification threshold adjustment module: used to adjust the defect detection model classification threshold of the circuit board defect detection training model according to the circuit open confusion matrix data, so as to obtain the classification threshold adjustment data, and upload it to the circuit board defect detection training model to perform the circuit board defect detection model optimization task.

[0223] The present invention provides a training system based on a circuit board defect detection model. The system can implement any training method based on a circuit board defect detection model of the present invention, and is used to combine the operation and signal transmission medium between various modules to complete the training method based on the circuit board defect detection model. The internal modules of the system cooperate with each other to improve the accuracy of the circuit board defect detection model.

[0224] Therefore, the embodiments should be regarded as illustrative and non-restrictive from all points, and the scope of the present invention is limited by the appended claims rather than the above description, and it is therefore intended that all changes falling within the meaning and range of equivalent elements of the application documents are included in the present invention.

[0225] The above description is only a specific embodiment of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but should conform to the widest scope consistent with the principles and novel features invented herein.

Claims

1. A training method based on a circuit board defect detection model, characterized in that: The following steps are involved: Step S1: acquiring an automatic optical monitoring image of a circuit board, and performing circuit board surface defect detection on the automatic optical monitoring image of the circuit board, thereby obtaining circuit board surface defect data; Step S2: marking defective areas of the circuit board according to the surface defect data of the circuit board, thereby obtaining defective area data of the circuit board; performing three-dimensional contour imaging of solder joints according to the automatic optical monitoring image of the circuit board, thereby obtaining three-dimensional contour data of solder joints, and performing cold solder joint analysis of the circuit board according to the three-dimensional contour data of solder joints, thereby obtaining cold solder joint data of the circuit board; Step S3: Perform electrical connection defect analysis based on the circuit board defect area data to obtain electrical connection defect data; perform circuit board circuit open correlation analysis on the electrical connection defect data based on the circuit board cold soldering data to obtain circuit board circuit open data; Step S3 is specifically as follows: Step S31: extracting wire defect features according to the circuit board defect area data, thereby obtaining wire defect image data; Step S32: performing wire direction statistics according to the wire defect image data, so as to obtain straight wire defect image data and curved wire defect image data; Step S33: performing straight line wire defect detection on the straight line wire defect image data, thereby obtaining straight line wire defect data; Step S33 is specifically as follows: Step S331: performing HSV color space conversion according to the image data of the straight line wire defect, so as to obtain an HSV color image of the straight line wire defect; Step S332: performing saturation statistics on the HSV color image of the straight-line wire defect, thereby obtaining a low-saturation HSV color image of the straight-line wire defect; Step S333: performing brightness statistics according to the HSV color image of the straight-line wire defect, thereby obtaining a low-brightness HSV color image of the straight-line wire defect; Step S334: generating an oxidation spot mask image according to the low-saturation straight line wire defect HSV color image and the low-brightness straight line wire defect HSV color image, thereby obtaining an oxidation spot mask image; Step S335: extracting the oxidation defect features of the straight-line wire according to the oxidation spot mask image, thereby obtaining the oxidation defect data of the straight-line wire; Step S336: performing oxidation defect chromaticity enhancement segmentation on the HSV color image of the straight line wire defect according to the straight line wire oxidation defect data, thereby obtaining the straight line wire defect data; Step S34: performing curved direction wire defect detection on the curved direction wire defect image data, thereby obtaining curved direction wire defect data; Step S35: integrating electrical connection wire defects according to the straight-line wire defect data and the curved-line wire defect data, thereby obtaining electrical connection defect data; Step S36: performing circuit board circuit open correlation analysis on the electrical connection defect data according to the circuit board cold soldering data, thereby obtaining circuit board circuit open data; Step S4: obtaining a circuit board defect detection model, and performing model training on the circuit board defect detection model according to the circuit board circuit open data, thereby obtaining a circuit board defect detection training model; performing circuit open confusion matrix analysis on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, thereby obtaining circuit open confusion matrix data; Step S5: adjusting the classification threshold of the defect detection model of the circuit board defect detection training model according to the circuit open confusion matrix data, thereby obtaining the classification threshold adjustment data, and uploading it to the circuit board defect detection training model to perform the circuit board defect detection model optimization task.

2. The training method based on the circuit board defect detection model according to claim 1 is characterized in that: Step S2 is specifically as follows: Step S21: performing grayscale image conversion according to the circuit board surface defect data, thereby obtaining the circuit board surface defect grayscale image data; Step S22: Calculating the number of grayscale pixels according to the grayscale image data of the circuit board surface defects, thereby obtaining grayscale pixel number data; Step S23: Calculating the maximum inter-class variance threshold value according to the grayscale pixel quantity data, thereby obtaining the maximum inter-class variance threshold data; Step S24: dividing the grayscale pixel quantity data into circuit board defect areas according to the maximum inter-class variance threshold data, thereby obtaining circuit board defect area data; Step S25: perform three-dimensional contour imaging of solder joints based on the circuit board automatic optical monitoring image to obtain three-dimensional contour data of solder joints, and perform circuit board cold solder joint analysis based on the three-dimensional contour data of solder joints to obtain circuit board cold solder joint data.

3. The training method based on the circuit board defect detection model according to claim 2 is characterized in that: Step S24 is specifically as follows: Step S241: binarizing the grayscale pixel quantity data according to the maximum inter-class variance threshold data to generate an image, thereby obtaining a foreground defect image and a background image; Step S242: setting a structure element kernel according to the foreground defect image, thereby obtaining structure element kernel data; Step S243: performing morphological dilation on the foreground defect image and the background image according to the structure element kernel data, thereby obtaining a foreground defect dilated image; Step S244: performing morphological erosion according to the foreground defect dilation image, so as to obtain an accurate foreground defect dilation image; Step S245: marking the defective area of ​​the circuit board according to the foreground defect precise expansion image, thereby obtaining the defective area data of the circuit board.

4. The training method based on the circuit board defect detection model according to claim 2 is characterized in that: Step S25 is specifically as follows: Step S251: extracting multi-angle solder joint features according to the circuit board automatic optical monitoring image, thereby obtaining multi-angle solder joint data; Step S252: performing laser emission simulation according to the multi-angle welding point data, thereby obtaining laser emission data; Step S253: capturing the laser reflected beam according to the laser emission data, thereby obtaining the laser reflected beam data; Step S254: measuring the height of the weld spot according to the laser reflected beam data and the multi-angle weld spot data, thereby obtaining the weld spot height data; Step S255: mapping the two-dimensional coordinates of the welding points according to the welding point height data, thereby obtaining the two-dimensional coordinate data of the welding points; Step S256: generating a three-dimensional contour of the solder joint according to the two-dimensional coordinate data of the solder joint, thereby obtaining the three-dimensional contour data of the solder joint; Step S257: Perform cold solder joint analysis on the circuit board according to the three-dimensional contour data of the solder joints, thereby obtaining cold solder joint data on the circuit board.

5. The training method based on the circuit board defect detection model according to claim 4 is characterized in that: Step S257 is specifically as follows: Solder point height feature extraction and solder point diameter feature extraction are performed based on the solder point three-dimensional contour data, thereby obtaining solder point height data and solder point diameter data; Calculate the solder volume according to the solder spot height data and the solder spot diameter data, so as to obtain the solder volume data; Obtain standard solder volume data and standard solder joint-pad contact area data; Compare the solder volume data with the cold solder volume according to the standard solder volume data, so as to obtain the cold solder volume data; Solder point contour feature extraction and pad contour feature extraction are performed according to the solder point three-dimensional contour data, so as to obtain solder point contour data and pad contour data; The contact area is calculated according to the solder joint contour data and the solder pad contour data, so as to obtain the solder joint-pad contact area data; Comparing the poor electrical contact data of the solder joint-pad contact area with the standard solder joint-pad contact area data, thereby obtaining the poor electrical contact data; The circuit board cold solder joint features are integrated according to the electrical contact failure data and the cold solder joint volume data, so as to obtain the circuit board cold solder joint data.

6. The training method based on the circuit board defect detection model according to claim 1 is characterized in that: Step S34 is specifically as follows: Step S341: performing edge detection of the curved wire according to the curved wire defect image data, thereby obtaining the curved wire edge data; Step S342: performing curved wire morphology polynomial fitting according to the curved wire edge data, thereby obtaining curved wire morphology data; Step S343: generating a two-dimensional path map of the curved wire according to the curved wire shape data, thereby obtaining a two-dimensional path map of the curved wire; Step S344: marking the bending area according to the two-dimensional path diagram of the bending wire, thereby obtaining the bending area data of the bending wire; Step S345: Calculating the width of the curved wire according to the curved area data, thereby obtaining the curved area width data of the curved wire; Step S346: performing wire fracture analysis according to the bending area width data of the bent wire, thereby obtaining wire fracture data; Step S347: marking the curved wire defect image data with a conductor breakage defect according to the conductor breakage data, thereby obtaining the curved wire defect data.

7. The training method based on the circuit board defect detection model according to claim 1 is characterized in that: Step S4 is specifically as follows: Step S41: obtaining a circuit board defect detection model, and training the circuit board defect detection model according to the circuit board circuit open data, thereby obtaining a circuit board defect detection training model; Step S42: performing circuit board circuit open detection on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, thereby obtaining circuit board circuit open detection data; Step S43: constructing a detection model confusion matrix according to the circuit board circuit open detection data, thereby obtaining detection model confusion matrix data; Step S44: performing an analysis of the falsely identified open circuit samples according to the detection model confusion matrix data, thereby obtaining falsely identified open circuit sample data; Step S45: Calculate the accuracy of the detection model according to the detection model confusion matrix data, so as to obtain the detection model accuracy data; Step S46: Visualizing the circuit open confusion matrix according to the falsely identified open circuit sample data and the detection model accuracy data, thereby obtaining the circuit open confusion matrix data.

8. A training system based on a circuit board defect detection model, characterized in that: Used to execute the training method based on the circuit board defect detection model as claimed in claim 1, the training system based on the circuit board defect detection model comprises: Circuit board surface defect detection module: used to obtain the circuit board automatic optical monitoring image, and perform circuit board surface defect detection on the circuit board automatic optical monitoring image, so as to obtain circuit board surface defect data; Circuit board cold solder joint analysis module: used to mark the defective area of ​​the circuit board according to the surface defect data of the circuit board, so as to obtain the defective area data of the circuit board; perform three-dimensional contour imaging of the solder joint according to the automatic optical monitoring image of the circuit board, so as to obtain the three-dimensional contour data of the solder joint, and perform cold solder joint analysis of the circuit board according to the three-dimensional contour data of the solder joint, so as to obtain the cold solder joint data of the circuit board; Circuit board circuit open circuit analysis module: used to perform electrical connection defect analysis based on circuit board defect area data, thereby obtaining electrical connection defect data; perform circuit board circuit open circuit correlation analysis on the electrical connection defect data based on circuit board false soldering data, thereby obtaining circuit board circuit open circuit data; Circuit board defect detection model training module: used to obtain a circuit board defect detection model, and train the circuit board defect detection model according to the circuit board circuit open data, so as to obtain a circuit board defect detection training model; perform circuit open confusion matrix analysis on the circuit board automatic optical monitoring image according to the circuit board defect detection optimization model, so as to obtain circuit open confusion matrix data; Defect detection training model classification threshold adjustment module: used to adjust the defect detection model classification threshold of the circuit board defect detection training model according to the circuit open confusion matrix data, so as to obtain the classification threshold adjustment data, and upload it to the circuit board defect detection training model to perform the circuit board defect detection model optimization task.

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