Manufacturing method of semiconductor module and semiconductor module

Abstract

The invention provides a semiconductor module and a method of manufacturing the same, which can discharge a solvent in a short time and suppress scattering and overflow of sintered metal even if a semiconductor chip is disposed on a sintered metal slurry in which the solvent remains and heated to discharge a solvent component and sinter-bonded to the semiconductor chip. A method for manufacturing a semiconductor module in which a semiconductor chip is sintered and bonded on a wiring layer includes: a rough surface forming step of forming a continuous rough surface in at least a partial region of a wiring layer surface; a slurry preparation step for preparing a sintered metal slurry containing metal particles and a solvent so as to overlap a part of the continuous rough surface; a semiconductor chip arrangement step in which a semiconductor chip is arranged on the sintered metal paste in which the solvent remains; and a sintering step for sintering and bonding the semiconductor chip while discharging the solvent component by heating, the wiring layer being a hydrophilic surface with respect to the solvent, and the continuous rough surface inside the region where the sintered metal paste is disposed being connected to the continuous rough surface outside the region.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor module and a semiconductor module. Background Art

[0002] There is a demand for improving the power cycle life of high-heat-resistant power semiconductor modules used in electric railways, EVs, and industrial applications. In order to meet this demand, a more effective countermeasure is to use sintering bonding with excellent heat resistance instead of the existing conventional solder bonding when joining (bonding) the semiconductor chip to the circuit board.

[0003] As a technique related to sintering bonding, there are Patent Document 1 and Patent Document 2, for example.

[0004] Patent Document 1 Figure 5 Paragraphs 0040 to 0044 describe a technology in which pits having an anchoring effect are formed on the surface of a circuit board using a laser, a sintered metal bonding material in a paste form is then printed, the sintered metal bonding material is then dried, a semiconductor element is mounted on the sintered metal bonding material and semi-fixed, and then pressurized and heated at the same time to bond the circuit board and the semiconductor element using the sintered metal bonding material.

[0005] In addition, Patent Document 2 Figure 4 , paragraphs 0040 to 0045 describe a technique in which a sintered copper paste is printed on a metal wiring on an insulating circuit board, a semiconductor chip is mounted on the sintered copper paste, and then pressure and heating are applied simultaneously to remove the organic solvent, thereby promoting sintering between copper particles to form a sintered copper layer. In addition, paragraph 0060 of Patent Document 2 describes that sintering can also be performed without pressure using the sintered copper paste.

[0006] Prior art literature

[0007] Patent Document 1: International Publication No. 2019 / 087920

[0008] Patent Document 2: Japanese Patent Application Publication No. 2022-35179 Summary of the invention

[0009] Technical problem to be solved by the invention

[0010] As a technique for sinter bonding, a common technique is to mount a semiconductor chip after pre-drying a sintered metal paste as in Patent Document 1. However, it is also possible to mount a semiconductor chip directly on the sintered metal paste without pre-drying as in Patent Document 2.

[0011] However, if the semiconductor chip is mounted without pre-drying in a state where the sintered metal paste contains a large amount of solvent components, and the sintering is performed while the solvent is removed by heating, in this case, since the semiconductor chip covers the sintered metal paste, most of the solvent discharge path is blocked, so there is a problem that it takes time to dry the solvent. In addition, at this time, the side of the sintered metal paste will become the solvent discharge path, but since it is a narrow discharge path, there is a problem that the internal pressure in the sintered metal paste is easy to increase, thereby blowing the sintered metal powder from the side and causing it to scatter and become conductive foreign matter.

[0012] Furthermore, if a semiconductor chip is mounted in a state where the sintered metal paste contains a large amount of solvent components, there is a problem when pressure is applied in this state: the sintered metal paste overflows from the semiconductor chip and may climb onto the semiconductor chip, causing a short circuit between the electrode on the front side and the electrode on the back side of the semiconductor chip, or overflow into the gap between the wiring layer to which the semiconductor chip is bonded and the adjacent wiring layer, causing a short circuit between the two.

[0013] The problem to be solved by the present invention is to provide a method for manufacturing a semiconductor module and a semiconductor module. Even if a semiconductor chip is arranged on a sintered metal paste in a state where a solvent remains, and the semiconductor chip is sintered and bonded by heating to expel the solvent component, the solvent can be expelled in a short time, and the scattering and overflow of the sintered metal can be suppressed.

[0014] Technical solutions to the problem

[0015] In order to solve the above-mentioned problems, the present invention provides a method for manufacturing a semiconductor module in which a semiconductor chip is sintered and bonded on a wiring layer, characterized in that it includes: a rough surface forming step of forming a continuous rough surface on at least a portion of the surface of the wiring layer; a slurry configuration step of configuring a sintered metal slurry containing metal particles and a solvent in a manner overlapping with a portion of the continuous rough surface; a semiconductor chip configuration step of configuring the semiconductor chip on the sintered metal slurry in a state in which the solvent remains; and a sintering step of sintering and bonding the semiconductor chip while expelling the components of the solvent by heating, the wiring layer is a hydrophilic surface for the solvent, and the continuous rough surface inside the area where the sintered metal slurry is configured is connected (continuous) to the continuous rough surface outside the area where the sintered metal slurry is configured.

[0016] In addition, the semiconductor module of the present invention is characterized in that it includes: a wiring layer; a semiconductor chip; a sintered metal layer, which connects the wiring layer to the semiconductor chip; and a continuous rough surface, which is formed in at least a portion of the surface of the wiring layer, wherein the continuous rough surface inside the area where the sintered metal layer is configured is connected to the continuous rough surface outside the area where the sintered metal layer is configured.

[0017] Effects of the Invention

[0018] According to the present invention, a method for manufacturing a semiconductor module and a semiconductor module can be realized. Even if a semiconductor chip is arranged on a sintered metal paste in a state where a solvent remains, and the semiconductor chip is sintered and bonded by heating to expel the solvent component, the solvent can be expelled in a short time, and the scattering and overflow of the sintered metal can be suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a cross-sectional view showing an example of the structure of the semiconductor module according to the first embodiment.

[0020] Figure 2 It is a flowchart and a cross-sectional view showing an example of a method for manufacturing a semiconductor module according to the first embodiment.

[0021] Figure 3 This is a planar photograph showing an example of a flat surface and a continuous rough surface of Example 1.

[0022] Figure 4 This is a cross-sectional view showing a phenomenon that can be explained by the Wenzel equation.

[0023] Figure 5 This is a plan view showing an example of a method for manufacturing the semiconductor module according to the first embodiment.

[0024] Figure 6 This is a plan view showing an example of a method for manufacturing a semiconductor module according to the second embodiment.

[0025] Figure 7 This is a plan view showing an example of a method for manufacturing a semiconductor module according to the second embodiment.

[0026] Figure 8 This is a plan view showing an example of a method for manufacturing a semiconductor module according to the second embodiment.

[0027] Fig. 9 This is a plan view showing an example of a method for manufacturing a semiconductor module according to the second embodiment.

[0028] Fig.10 This is a plan view showing an example of a method for manufacturing a semiconductor module according to the second embodiment.

[0029] Fig.11 This is a plan view showing an example of a method for manufacturing a semiconductor module according to the second embodiment.

[0030] Fig.12 This is a cross-sectional photograph showing an example of the structure of the semiconductor module of Example 2.

[0031] Description of Reference Numerals

[0032] 1: semiconductor chip, 2: sintered metal layer, 3: circuit board, 3a: wiring layer, 3b: back metal layer, 3c: insulating circuit board, 4: base plate, 5: sintered metal layer under the circuit board, 6: lead, 7: terminal, 8: housing, 9: sealing resin, 10: continuous rough surface, 11: sintered metal paste, 11a: metal particles, 11b: solvent, 12: hole, 20: semiconductor module. DETAILED DESCRIPTION

[0033] In the following, the embodiments of the present invention are described using the drawings. In each figure and each embodiment, the same or similar components are denoted by the same reference numerals, and repeated description is omitted.

[0034] [Example 1]

[0035] Figure 1 This is a cross-sectional view showing an example of the structure of the semiconductor module according to the first embodiment.

[0036] The semiconductor module 20 of the present embodiment includes, for example, a semiconductor chip 1, a sintered metal layer 2, a circuit board 3, a base plate 4, a sintered metal layer 5 under the circuit board, leads 6, terminals 7, a housing 8, and a sealing resin 9. Figure 1 In the figure, the continuous rough surface 10 described later is omitted.

[0037] The circuit board 3 includes an insulating circuit board 3c, a wiring layer 3a provided on the front side of the insulating circuit board 3c, and a back metal layer 3b provided on the back side of the insulating circuit board 3c. The wiring layer 3a is composed of a plurality of wiring patterns. For example, the wiring layer 3a can use a conductive metal such as copper. For example, the back metal layer 3b can use copper.

[0038] The semiconductor chip 1 is bonded to the wiring layer 3a via the sintered metal layer 2. The semiconductor chip 1 may be a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or a diode. The sintered metal layer 2 may be a sintered copper layer or a sintered silver layer.

[0039] The bottom plate 4 functions as a heat dissipation member and is bonded to the back metal layer 3b of the circuit board 3 via the under-circuit board sintered metal layer 5. The bottom plate 4 is bonded to the case 8 via, for example, an adhesive (not shown).

[0040] The leads 6 are conductive leads that electrically connect the semiconductor chips 1, the wiring layers 3a, the semiconductor chip 1 and the wiring layer 3a, etc. The terminals 7 are connected to the wiring layer 3a, and a part of them is led out of the box 8 to function as external connection terminals. For example, the sealing resin 9 can use silicone, epoxy resin, etc.

[0041] Figure 2 It is a flowchart and a cross-sectional view showing an example of a method for manufacturing a semiconductor module according to the first embodiment.

[0042] Step S1 is a rough surface forming step of forming a continuous rough surface 10 on at least a partial region of the surface of the wiring layer 3 a .

[0043] Step S2 is a slurry placement step in which a sintered metal slurry 11 containing metal particles 11a and a solvent 11b is placed so as to overlap a portion of the continuous rough surface 10. As a placement method, for example, a coating process using a dispenser or the like, printing, etc. can be used.

[0044] Step S3 is a semiconductor chip placement step in which the semiconductor chip 1 is placed on the sintered metal paste 11 in a state in which the solvent 11 b remains.

[0045] Step S4 is a sintering process, in which the semiconductor chip 1 is sintered and bonded by heating while the components of the solvent 11b are discharged. The temperature of the sintering process is, for example, carried out at 300 to 400°C. The sintering process can be carried out without pressurization, or it can be carried out while applying a slight pressure of 0.01 to 1.00 MPa to the semiconductor chip 1. In conventional sintering bonding with a pre-drying process, sintering is mostly carried out while applying a pressure of 10 to 20 MPa, but the present embodiment can reduce the pressure compared to this, so the cost of the device for pressurization can be suppressed. In addition, since the solvent 11b expands during the sintering process, it is expressed larger than in other processes. After the sintering process is completed, the metal particles 11a are sintered to become Figure 1 The sintered metal layer 2 is shown.

[0046] In this embodiment, the wiring layer 3a is a hydrophilic surface (a surface with high affinity, i.e., a surface with affinity to the solvent) for the solvent 11b, and the continuous rough surface 10 inside the area where the sintered metal paste 11 is arranged is connected (continuous) to the continuous rough surface 10 outside the area where the sintered metal paste 11 is arranged. By forming the continuous rough surface 10 on the hydrophilic surface, the solvent 11b has better wettability than the flat surface, and the solvent 11b is more easily wetted along the surface. Figure 2 The discharge force in the direction indicated by the arrow in the sintering process is increased, so the solvent 11b can be discharged in a short time. In addition, since the discharge force of the solvent 11b is increased, the increase in the internal pressure of the sintered metal paste 11 can be suppressed, and the metal particles 11a of the sintered metal can be suppressed from scattering. Furthermore, since the movement of the metal particles 11a is suppressed by the continuous rough surface 10, the overflow of the sintered metal can be suppressed.

[0047] Figure 3 This is a planar photograph showing an example of a flat surface and a continuous rough surface of Example 1.

[0048] The continuous rough surface 10 can be formed by processing at least a portion of the surface of the wiring layer 3a to have a micro-concave-convex shape. The continuous rough surface 10 can be formed by laser irradiation treatment, oxidation-reduction treatment, etching, sandblasting, roughening plating, applying mechanical dents, etc. Among them, laser irradiation treatment is widely used in printing barcodes to achieve product traceability management, so existing equipment can be used and costs can be suppressed, so it is more preferred. Figure 3 The left side of the figure shows an untreated state in which the surface of the wiring layer 3a is not subjected to the treatment for making the surface rough, and is a flat surface. Figure 3 The figure on the right side of FIG. 1 shows a state where the surface of the wiring layer 3 a is subjected to laser irradiation treatment and a continuous rough surface 10 is formed.

[0049] Figure 4 This is a cross-sectional view showing a phenomenon that can be explained by the Wenzel equation.

[0050] Generally speaking, the wettability of a rough surface is enhanced compared to a flat surface. This can be expressed by the Wenzel equation shown in equation (1).

[0051] cosθw=rcosθ……(1)

[0052] θw: contact angle on the rough surface, θ: contact angle on the flat surface, r: area ratio of the rough surface to the flat surface

[0053] like Figure 4 As shown in the upper part, on a hydrophilic surface with good wettability (θ<90°), the rough surface on the right has a smaller contact angle (θw<θ) than the flat surface on the left, and the rough surface is easier to wet. Figure 4 As shown in the lower part, on a hydrophobic surface with poor wettability (θ>90°), the rough surface on the right has a larger contact angle (θw>θ) than the flat surface on the left, and the rough surface is more difficult to wet.

[0054] Taking advantage of this property, in Example 1, a combination of easily wettable materials is used for the solvent 11b to be dried and the wiring layer 3a forming the continuous rough surface 10. As a result, the solvent 11b, which was previously vaporized during heating and discharged from the gaps between the metal particles 11a, is actively discharged to the outside of the bonding surface through the surface of the wiring layer 3a while remaining in a liquid state, so that the solvent 11b can be discharged and dried in a shorter time than on a flat surface. In addition, since the surface of the wiring layer 3a carries away the components of the solvent 11b of the supplied sintered metal paste 11, the fluidity of the sintered metal paste 11 is reduced and it is not easy to overflow. In addition, when the solvent 11b is dried, there is a new discharge force, which is the wettability of the surface of the wiring layer 3a, so the solvent dries more smoothly and the internal pressure is not easy to increase, so the amount of metal particles 11a scattered is reduced.

[0055] When copper is used as the wiring layer 3a, as the solvent 11b having good wettability with copper, for example, diethylene glycol monobutyl ether, diethylene glycol diethyl ether, ethylene glycol monobutyl ether, etc. can be used. In addition, without limitation thereto, a combination of a wiring layer 3a and a solvent 11b having a hydrophilic surface for the solvent 11b can be used. In addition, a laminated film can also be used as the wiring layer 3a. For example, as the wiring layer 3a, a laminated film having a surface plated with a nickel plating layer or the like can be considered, and a laminated film having a silver plating layer plated on the surface of the wiring layer 3a can be considered as the sintered silver layer as the sintered metal layer 2. In the case of using a laminated film as the wiring layer 3a, in order to make the wiring layer 3a a hydrophilic surface for the solvent 11b, a combination of a material on the surface of the wiring layer 3a and a solvent 11b having hydrophilicity can be used.

[0056] As for the size of the concavoconvexity of the continuous rough surface 10, finer concavoconvexity can make r in the Wenzel equation larger, so it is more preferred. For example, if the arithmetic mean height Ra is 0.01 to 0.6 μm and / or the average length RSm of the concavoconvexity is 4.0 μm or less, the effect is particularly good. In addition, it is found that when the arithmetic mean height Ra is as large as 1.5 μm or more, in the case of Figure 2 Under the condition of no pressure or slight pressure as described in step S4, the pressure cannot be uniformly transmitted to the interface between the sintered metal material and the surface of the wiring layer 3a, and peeling is likely to occur. This is because, unlike solder that can melt and flow along the unevenness, sintering is a solid-phase bonding method, so it can be said that it is difficult to ensure close adhesion.

[0057] In order to discharge the solvent 11b, the rough surfaces need to be connected, so a continuous rough surface 10 is required. Therefore, for example, when pits are discretely formed to obtain an anchor effect, the pits are different from a continuous rough surface 10 because flat surfaces are interposed between the pits.

[0058] Figure 51 is a top view showing an example of a method for manufacturing a semiconductor module according to Embodiment 1. Figure 5 For the sake of convenience in explanation, the continuous rough surface 10 is also shown in the figure in the region blocked by the semiconductor chip 1 and the sintered metal layer 2. In addition, other elements such as the shape of the wiring layer 3a are omitted from the figure.

[0059] The continuous rough surface 10 of this embodiment is formed from the area overlapping with the semiconductor chip 1 to the area outside the periphery of the semiconductor chip 1. By forming the continuous rough surface 10 to the area outside the periphery of the semiconductor chip 1, the solvent 11b can be discharged to the area not covered by the semiconductor chip 1, so the solvent 11b can be easily dried. Figure 5 2 shows an example in which the continuous rough surface 10 is formed in the entire region overlapping with the semiconductor chip 1 , but the present invention is not limited to this.

[0060] As the metal particles 11a of the sintered metal paste 11, silver or copper is usually used, but copper is more preferred. Sintered copper has better mechanical properties than sintered silver. In addition, the diffusion rate of silver is faster, so sintering is easy to advance during the use of the semiconductor module 20. If sintering is advanced during the use of the semiconductor module 20, the density inside the sintered metal layer 2 will be significantly differentiated, and the sparse part will become difficult to dissipate heat, which may reduce reliability. In order to prevent this, it is necessary to apply a large pressure in the sintering process to reduce the void as much as possible and increase the sintering density. In contrast, in the case of copper, because the diffusion rate is relatively low, it is not easy to cause sintering to advance due to self-heating during the use of the semiconductor module 20, so even if the sintering density is low when the bonding is completed, reliability can be maintained. Therefore, sintered copper can reduce the pressure compared to sintered silver, and the sintering process can be carried out under no pressure or slight pressure conditions.

[0061] In the semiconductor chip configuration process, it is preferred to configure the semiconductor chip 1 on the sintered metal paste 11 in which the solvent 11b remains at 30 to 60 Vol%. The so-called solvent 11b here is used as a general term for the liquid component contained in the sintered metal paste 11, such as a dispersion medium, mixed for the purpose of stabilizing the dispersion, adjusting the viscosity, etc. By making it into a state containing 30 to 60 vol% of the solvent component, the sintered metal paste 11 itself is soft and exhibits high fluidity, so that tightness can be ensured even with a smaller pressure, for example, it can be joined below 1 MPa. At this time, if the solvent component is less than 30 vol%, the sintered metal paste 11 is too hard and there is a situation where it cannot be tightly attached under weak pressure. On the contrary, if the solvent component is more, too much solvent component needs to be dried, and drying takes time.

[0062] In addition, Figure 2After the slurry configuration process of step S2, it is preferred to perform the semiconductor chip configuration process of step S3 without pre-drying the sintered metal slurry 11. This allows the pre-drying process to be omitted. However, the present invention is not limited thereto. After the slurry configuration process of step S2, a pre-drying process of pre-drying the sintered metal slurry 11 may be performed in a short time to make the sintered metal slurry 11 a state where the solvent 11b remains at 30 to 60 Vol%, and then the semiconductor chip configuration process of step S3 is performed.

[0063] As the solvent 11b, for example, alcohols with a boiling point of 350°C or less can be used. Here, the reason why the boiling point is set to 350°C or less is that the sintering temperature of the sintered metal is generally about 200 to 400°C, so if the boiling point is too high, it will take too long to evaporate. However, organic substances such as alcohols with a boiling point exceeding this temperature are not absolutely unsuitable, and such organic substances can also be used depending on the purpose. In addition, it is preferred to use a glycol solvent as the solvent 11b. This is because glycol solvents are inexpensive and have low toxicity to the human body. Furthermore, alcohol solvents can act not only as solvents but also as reducing agents for oxidized metals, so they can be adjusted to an appropriate amount corresponding to the amount of metal particles 11a as reducing agents. In addition, it is not limited to organic substances containing hydroxyl groups, and organic substances such as carboxylic acids, amines, aldehyde groups or ester groups, thiol groups, and ketone groups can be used. Furthermore, toluene that does not have the functional groups described above and organic substances composed only of hydrocarbons can also be used. As such examples, n-hexane and cyclohexane can be cited. As the organic solvent used in this way, not only one kind but also a mixture of two or more kinds can be used.

[0064] [Example 2]

[0065] Figure 6 to Figure 11 1 is a top view showing an example of a method for manufacturing a semiconductor module according to Embodiment 2. Figure 6 to Figure 11 and Figure 5 Similarly, for convenience of explanation, the continuous rough surface 10 is also shown in the figure for the region blocked by the semiconductor chip 1 and the sintered metal layer 2. In addition, other elements such as the shape of the wiring layer 3a are omitted from the figure.

[0066] Example 2 is a modification example of the shape of the region where the continuous rough surface 10 is formed when viewed from above.

[0067] When the solvent 11b is discharged using the continuous rough surface 10, it is preferred that the discharge path thereof be as short as possible. Figure 6 As shown, for example, by forming a plurality of short side directions ( Figure 6 The strip-shaped continuous rough surface 10 extending in the vertical direction (in the vertical direction) can efficiently discharge the solvent 11b. The interval between adjacent strip-shaped continuous rough surfaces 10 ( Figure 6The interval in the left and right directions is preferably greater than 0 mm and less than 0.3 mm, but is not limited thereto. Figure 7 As shown, it may extend radially outward from the position overlapping the semiconductor chip 1. In addition, by forming a plurality of continuous rough surfaces 10 in a strip shape, the time required for the step of forming the continuous rough surface 10 by laser irradiation can be shortened compared to the case of forming the continuous rough surface 10 on the entire surface.

[0068] In addition, it is possible to dry more efficiently by transporting the solvent 11b to a certain extent outside the bonding surface, so it is preferable to make the continuous rough surface 10 a size that extends to the outside of the semiconductor chip 1. For example, if the continuous rough surface 10 is formed larger than the outer periphery of the semiconductor chip 1 to more than 0.15mm outside, the mounting accuracy of the chip mounter, i.e., ±0.1mm, can be fully satisfied. In addition, it is preferable to form the continuous rough surface 10 larger than the outer periphery of the semiconductor chip 1 to more than 0.5mm outside. Thus, even if the sintered metal paste 11 exceeds the outer periphery of the semiconductor chip 1 and overflows to the outside of the bonding surface, the exposed concave-convex surface can be fully ensured. In addition, if the continuous rough surface 10 is not connected to the area directly below the semiconductor chip 1, a sufficient solvent discharge effect cannot be obtained. Therefore, considering the mounting accuracy of the chip mounter, i.e., ±0.1mm, it is preferable to have such a portion at least in a part where the continuous rough surface 10 is formed to more than 0.15mm inside the outer periphery of the semiconductor chip 1.

[0069] In addition, due to the formation of the continuous rough surface 10, the adhesion of the sintering interface is reduced, and there is a risk of easy peeling. Figure 8 As shown, the continuous rough surface 10 can also be formed into a frame shape overlapping with the terminal area of ​​the semiconductor chip 1. The semiconductor chip 1 includes an active area in which a semiconductor element is formed and a terminal area surrounding the active area. In the terminal area, a terminal structure such as FLR (Field Limiting Ring) is provided to ensure withstand voltage. Because the active area generates heat, it is better that the thermal resistance of the part overlapping with the active area is small. On the other hand, the terminal area does not generate heat. Thus, as Figure 8 As shown, by forming the continuous rough surface 10 in a frame shape avoiding the active region, the influence on the thermal resistance of the portion overlapping the active region can be suppressed even when peeling occurs. Fig. 9 As shown, the continuous rough surface 10 may be formed in a grid shape. Thus, even when peeling occurs, the influence on the thermal resistance of the portion overlapping the active region can be reduced.

[0070] In addition, the thermal stress is most severe at the periphery and corners of the semiconductor chip 1, so it is also possible to Fig.10 and Fig.11 As shown, the continuous rough surface 10 is formed while avoiding a part of the outer periphery and / or the corner of the semiconductor chip 1. Thus, peeling can be suppressed.

[0071] In addition, sintering is a solid phase bonding method, and unlike soldering, it is difficult to follow the warping and maintain close contact when warping occurs. When the continuous rough surface 10 is formed by heat treatment such as laser irradiation treatment, the warping will increase when the heat input is large, and there is a risk that the close contact during sintering cannot be ensured. For this reason, by reducing the surface roughness of the continuous rough surface 10, or making the continuous rough surface 10 into a strip or grid shape to reduce the heat input as much as possible, the warping can be suppressed and the close contact can be ensured.

[0072] Fig.12 This is a cross-sectional photograph showing an example of the structure of the semiconductor module of Example 2.

[0073] To improve wettability, Fig.12 As shown in FIG. 1 , the surface of the wiring layer 3a is preferably porous. Fig.12 It is found that a plurality of holes 12 are formed between the sintered metal layer 2 and the wiring layer 3a. In order to make the porous structure, it is more preferable to perform processing while partially melting the surface using laser irradiation or the like rather than mechanical notching.

[0074] The embodiments of the present invention are described above, but the present invention is not limited to the structures described in the embodiments, and various changes can be made within the scope of the technical concept of the present invention. In addition, part or all of the structures described in the embodiments can also be combined and applied.

Claims

1. A method for manufacturing a semiconductor module in which a semiconductor chip is sintered and bonded onto a wiring layer, characterized in that: include: a rough surface forming step of forming a continuous rough surface on at least a portion of the surface of the wiring layer; a slurry disposing step of disposing a sintered metal slurry containing metal particles and a solvent so as to overlap a portion of the continuous rough surface; a semiconductor chip placement step of placing the semiconductor chip on the sintered metal paste in a state where the solvent remains; and The sintering step is to heat the semiconductor chip to discharge the solvent components and sinter and bond the semiconductor chip. wherein the wiring layer has a hydrophilic surface with respect to the solvent, The continuous rough surface inside the region where the sintered metal paste is arranged is connected to the continuous rough surface outside the region where the sintered metal paste is arranged.

2. The method for manufacturing a semiconductor module according to claim 1, wherein: The continuous rough surface is formed in a plurality of strips.

3. The method for manufacturing a semiconductor module according to claim 1, wherein: The continuous rough surface extends in the short side direction of the semiconductor chip.

4. The method for manufacturing a semiconductor module according to claim 1, wherein: The continuous rough surface radially extends outward from a position overlapping with the semiconductor chip.

5. The method for manufacturing a semiconductor module according to claim 1, wherein: The semiconductor chip includes an active region formed with semiconductor elements and a terminal region surrounding the active region. The continuous rough surface is formed in a frame shape overlapping the terminal region of the semiconductor chip.

6. The method for manufacturing a semiconductor module according to claim 1, wherein: The continuous rough surface is formed while avoiding a part of the outer periphery of the semiconductor chip.

7. The method for manufacturing a semiconductor module according to claim 1, wherein: The continuous rough surface is formed avoiding corners of the semiconductor chip.

8. The method for manufacturing a semiconductor module according to claim 1, wherein: The continuous rough surface is formed to extend 0.15 mm or more outside the outer periphery of the semiconductor chip.

9. The method for manufacturing a semiconductor module according to claim 1, wherein: The continuous rough surface is formed to extend 0.15 mm or more inside the outer periphery of the semiconductor chip.

10. The method for manufacturing a semiconductor module according to claim 1, wherein: The arithmetic mean height Ra of the continuous rough surface is 0.01 to 0.6 μm.

11. The method for manufacturing a semiconductor module according to claim 1, wherein: The average length RSm of the continuous rough surface is 4.0 μm or less.

12. The method for manufacturing a semiconductor module according to claim 1, wherein: The continuous rough surface is porous.

13. The method for manufacturing a semiconductor module according to claim 1, wherein: The semiconductor chip placement step is a step of placing the semiconductor chip on the sintered metal paste in a state where 30 to 60 vol % of the solvent remains.

14. The method for manufacturing a semiconductor module according to claim 1, wherein: After the paste disposing step, the semiconductor chip disposing step is performed without pre-drying the sintered metal paste.

15. The method for manufacturing a semiconductor module according to claim 1, wherein: The sintering step is performed without applying pressure.

16. The method for manufacturing a semiconductor module according to claim 1, wherein: The sintering step is performed while applying a micro pressure of 0.01 to 1.00 MPa to the semiconductor chip.

17. The method for manufacturing a semiconductor module according to claim 1, wherein: The metal particles are copper.

18. A semiconductor module, characterized in that: include: Wiring layer; Semiconductor chips; a sintered metal layer that bonds the wiring layer to the semiconductor chip; and a continuous rough surface formed on at least a portion of the surface of the wiring layer, The continuous rough surface inside the region where the sintered metal layer is arranged is connected to the continuous rough surface outside the region where the sintered metal layer is arranged.

19. The semiconductor module according to claim 18, wherein: The continuous rough surface is formed in a plurality of strips.

20. The semiconductor module according to claim 18, wherein: The continuous rough surface extends in the short side direction of the semiconductor chip.

21. The semiconductor module according to claim 18, wherein: The continuous rough surface radially extends outward from a position overlapping with the semiconductor chip.

22. The semiconductor module according to claim 18, wherein: The semiconductor chip includes an active region formed with semiconductor elements and a terminal region surrounding the active region. The continuous rough surface is formed in a frame shape overlapping the terminal region of the semiconductor chip.

23. The semiconductor module according to claim 18, wherein: The continuous rough surface is formed while avoiding a part of the outer periphery of the semiconductor chip.

24. The semiconductor module according to claim 18, wherein: The continuous rough surface is formed avoiding corners of the semiconductor chip.

25. The semiconductor module according to claim 18, wherein: The continuous rough surface is formed to extend 0.15 mm or more outside the outer periphery of the semiconductor chip.

26. The semiconductor module according to claim 18, wherein: The continuous rough surface is formed to extend 0.15 mm or more inside the outer periphery of the semiconductor chip.

27. The semiconductor module according to claim 18, wherein: The arithmetic mean height Ra of the continuous rough surface is 0.01 to 0.6 μm.

28. The semiconductor module according to claim 18, wherein: The average length RSm of the continuous rough surface is 4.0 μm or less.

29. The semiconductor module according to claim 18, wherein: The continuous rough surface is porous.

30. The semiconductor module according to claim 18, wherein: The sintered metal layer is a sintered copper layer.

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