High-order configurable current mode low-pass filter circuit

Abstract

The invention discloses a high-order configurable current mode low-pass filter circuit, and belongs to the technical field of low-pass filters. The high-order configurable current mode low-pass filter circuit comprises a first-stage low-pass filter, a second-stage low-pass filter and a third-stage low-pass filter which are sequentially cascaded, wherein the output current of the previous-stage low-pass filter is injected into the input end of the next-stage low-pass filter between two adjacent stages of low-pass filters through a current mirror; each stage of low-pass filter adopts a second-order current type gm-C structure; a super source follower is arranged on one side of the first-stage low-pass filter, and the output end of the super source follower is connected to the input end of the first-stage low-pass filter through two resistors to establish low-resistance connection to the ground. A six-order Butterworth filter is realized by using a gm-C filter in a three-level current mode, and flexible adjustment of bandwidth can be realized by controlling the size of an adjustable capacitor and the size of gm, so that the Butterworth filter is suitable for a multi-standard wireless communication system.

Description

Technical Field

[0001] The invention belongs to the technical field of low-pass filters, and in particular relates to a high-order configurable current mode low-pass filter circuit. Background Art

[0002] In recent years, with the development of broadband WiFi and 5G technology, various standards of wireless communication systems have put forward higher requirements for reconfigurable baseband circuit technology. As an important module in the baseband circuit, the main function of the low-pass filter is to filter out interference signals and improve the signal-to-noise ratio of the overall output signal.

[0003] In order to meet the high bandwidth standard requirements of 5G NR 200 / 400 / 800MHz and 802.11.ad wifi 2.16GHz, the baseband low-pass filter needs to have a configurable bandwidth. The traditional bandwidth adjustment scheme adopts a switched capacitor array scheme, which has the characteristics of simple structure and easy control, but it has the problem of excessive area requirements when the bandwidth adjustment range is large and the precision requirements are high. The single gm tuning method will cause the problem of excessive gain variation. For this reason, a high-order configurable current mode low-pass filter circuit is proposed. Summary of the invention

[0004] In view of the deficiencies in the prior art, an object of the present invention is to provide a high-order configurable current mode low-pass filter circuit to solve the problems in the prior art.

[0005] The purpose of the present invention can be achieved through the following technical solutions:

[0006] A high-order configurable current mode low-pass filter circuit comprises a first-stage low-pass filter, a second-stage low-pass filter and a third-stage low-pass filter which are cascaded in sequence, wherein the output current of the previous stage low-pass filter is fed into the input end of the next stage low-pass filter through a current mirror between two adjacent stages of low-pass filters; and each stage of low-pass filter adopts a second-order current mode gm-C structure;

[0007] A super source follower is provided at one side of the first-stage low-pass filter, and the output end of the super source follower is connected to the input end of the first-stage low-pass filter through two resistors to establish a low-resistance connection to the ground.

[0008] Furthermore, the first-stage low-pass filter comprises: a transistor M 1A , transistor M 1B , transistor M 2A , transistor M 2B , transistor M 3A , transistor M 3B , transistor M 4A , transistor M 4B , variable capacitor C 1A, variable capacitor C 1B , resistor R in1 and resistor R in2 ;

[0009] Transistor M 2A The source is connected to the ground GND, and the drain is connected to the transistor M 1A The source of transistor M 1A The drain of transistor M 3A The drain of transistor M 3A The source of transistor M is connected to the power supply VDD, and the drain is connected to the gate; 2B The source is connected to the ground GND, and the drain is connected to the transistor M 1B The source of transistor M 1B The drain of transistor M 3B The drain of transistor M 3B The source is connected to the power supply VDD, and the drain is connected to the gate; the variable capacitor C 1A One end of the transistor M 1A The other end is connected to the source of transistor M 1B The source of the variable capacitor C 1B One end of the transistor M 3A The other end is connected to the drain of transistor M 3B The drain of transistor M 1A The gate of transistor M 1B The drain of transistor M 1B The gate of transistor M 1A The drain of the resistor R in1 One end of the transistor M 1A The other end is connected to the positive electrode I of the current input terminal of the first stage low-pass filter. in1p , resistor R in2 One end of the transistor M 1B The other end is connected to the negative electrode I of the current input terminal of the first stage low-pass filter. in1n ; Transistor M 4A The gate of transistor M 3A The gate is connected to the power supply VDD, the drain is connected to the negative electrode I of the output terminal of the first stage low-pass filter out1n Connected, transistor M 4B The gate of transistor M 3B The gate is connected to the power supply VDD, the drain is connected to the positive electrode I of the output terminal of the first stage low-pass filter out1p Connected; transistor M 3A , transistor M 4A , transistor M 3B , transistor M 4BA current mirror is formed, and its output is connected to the input of the second-stage low-pass filter.

[0010] Furthermore, the second-stage low-pass filter comprises: a transistor M 5A , transistor M 5B , transistor M 6A , transistor M 6B , transistor M 7A , transistor M 7B , variable capacitor C 2A and variable capacitor C 2A ;

[0011] Transistor M 5A The source of the second stage low pass filter is connected to the negative terminal of the input terminal I in2n , the drain of transistor M is connected 6A The drain and gate of transistor M are connected 5B The source of transistor M 6A The source of transistor M is connected to GND, and the drain is connected to the gate; 5B The source of the second stage low pass filter is connected to the positive terminal of the input terminal I in2p , the drain of transistor M is connected 6B The drain and gate of transistor M are connected 5A The source of transistor M 6B The source is connected to GND, and the drain is connected to the gate; the variable capacitor C 2A One end is connected to transistor M 5A The other end is connected to the source of transistor M 5B The source of the variable capacitor C 2B One end is connected to transistor M 5A The other end is connected to the drain of transistor M 5B The drain of transistor M 7A The gate of transistor M 6A The gate is connected to the ground, the source is connected to the ground GND, and the drain is connected to the positive electrode I of the output end of the second-stage low-pass filter. out2p Connected; transistor M 7B The gate of transistor M 6B The gate is connected to the ground, the source is connected to the ground GND, and the drain is connected to the negative electrode I of the output end of the second stage low-pass filter. out2n Connected; transistor M 6A , transistor M 7A , transistor M 6B , transistor M 7B A current mirror is formed, and its output is connected to the input of the third-stage low-pass filter.

[0012] Furthermore, the third-stage low-pass filter comprises: a transistor M 8A , transistor M8B , transistor M 9A , transistor M 9B , transistor M 10A , transistor M 10B , transistor M 11A , transistor M 11B , variable capacitor C 3A and variable capacitor C 3B ;

[0013] Transistor M 8A The source of the third-stage low-pass filter is connected to the positive terminal I in3p , the drain of transistor M is connected 9A The drain and gate of transistor M are connected 8B The drain of transistor M 9A The source of transistor M is connected to the power supply VDD, and the drain is connected to the gate; 8B The source of the third-stage low-pass filter is connected to the negative terminal I in3n , the drain of transistor M is connected 9B The drain and gate of transistor M are connected 8A The drain of transistor M 9B The source is connected to the power supply VDD, and the drain is connected to the gate; the variable capacitor C 3A One end of transistor M 8A The other end is connected to the source of transistor M 8B The variable capacitor C 3B One end of transistor M 9A The other end is connected to the drain of transistor M 9B The drain of transistor M is connected; 10A The source is connected to the power supply VDD, and the gate is connected to the transistor M 9A The gate of transistor M is connected to the drain of transistor M 11A The drain of transistor M 11A The source is connected to GND, and the drain is connected to the negative electrode V at the output of the third-stage low-pass filter. outn ; Transistor M 10B The source is connected to the power supply VDD, and the gate is connected to the transistor M 9B The gate of transistor M is connected to the drain of transistor M 11B The drain of transistor M 11B The source is connected to GND, and the drain is connected to the positive electrode V at the output of the third-stage low-pass filter. outp .

[0014] Furthermore, the super source follower includes: a transistor M 12A , transistor M 12B , transistor M 13A , transistor M 13B , transistor M14A , transistor M 14B , amplifier A, resistor R 0A and resistor R 0B ;

[0015] Transistor M 14A The source is connected to the power supply VDD, and the drain is connected to the transistor M 12A The drain of transistor M is connected to the gate. 14B The gate of transistor M is connected; 12A The source of transistor M 13A The drain of transistor M is connected to the gate. 12B The gate of transistor M is connected; 13A The source is connected to GND, and the drain is connected to the output virtual voltage V virtual ; Transistor M 14B The source is connected to the power supply VDD, the drain is connected to the gate, and the drain is connected to the transistor M 12B The drain of transistor M 12B The gate of transistor M 14B The gate of transistor M is connected to the source of transistor M 13B The drain of transistor M 13B The source of the amplifier is connected to the ground GND; the input of the amplifier A is connected to the transistor M 12A The output terminal is connected to the drain of transistor M 12A The source of the resistor R 0A One end is connected to transistor M 12A The other end is connected to the positive electrode I of the input end of the first stage low-pass filter. in1p ; Resistance R 0B One end is connected to transistor M 12A The other end is connected to the negative electrode I of the input terminal of the first stage low-pass filter. in1n .

[0016] Furthermore, the transistor M 1A ~M 11A With transistor M 1B ~M 11B The sizes of transistors M are equal one by one; 1A 、M 1B 、M 2A 、M 2B 、M 6A 、M 6B 、M 7A 、M 7B 、M 8A 、M 8B 、M 11A 、M 11B is an NMOS transistor, transistor M 3A 、M 3B 、M4A 、M 4B 、M 5A 、M 5B 、M 9A 、M 9B 、M 10A 、M 10B It is a PMOS transistor; transistor M 11A 、M 11B The gate bias voltage is equal.

[0017] Furthermore, the transistor M 12A ~M 14A With transistor M 1A ~M 3A The sizes of transistors M are equal one by one. 12B ~M 14B With transistor M 1B ~M 3B The sizes of transistors M are equal one by one; 12A 、M 12B 、M 13A 、M 13B is an NMOS transistor, transistor M 14A 、M 14B is a PMOS transistor; transistor M 2A 、M 2B 、M 13A 、M 13B The gate bias voltage is equal.

[0018] Furthermore, the variable capacitor C 1A , C 1B , C 2A , C 2B , C 3A , C 3B They all include a number of switch capacitor units and capacitors in parallel, and the switch capacitor unit includes: a transistor M1, a transistor M2, a capacitor C1 and a capacitor C2; one end of the capacitor C1 is connected to the drain of the transistor M1, and the other end is connected to the port P1 of the switch capacitor, and the source of the transistor M1 is connected to the ground GND; one end of the capacitor C2 is connected to the drain of the transistor M2, and the other end is connected to the port P2 of the switch capacitor, and the source of the transistor M2 is connected to the ground GND; the gates of the transistors M1 and M2 are connected to the control voltage B0, and the capacitance value of the switch capacitor unit is adjusted by setting the control voltage B0 to a high level or a low level; the transistors M1 and M2 are both NMOS transistors.

[0019] Furthermore, the amplifier A includes a transistor M3 and a transistor M4, wherein the source of the transistor M3 is connected to the power supply VDD, the drain is connected to the drain of the transistor M4, and the gate serves as the input terminal IN of the amplifier A; the source of the transistor M4 is connected to the ground GND, and the gate is connected to the bias voltage VB , the drain is connected to the output terminal OUT of the amplifier A; the transistor M3 is a PMOS transistor, and the transistor M4 is an NMOS transistor.

[0020] A communication transceiver comprises the above-mentioned high-order configurable current mode low-pass filter circuit.

[0021] Beneficial effects of the present invention:

[0022] 1. The present invention utilizes a three-stage current mode gm-C filter to implement a 6th-order Butterworth filter. By controlling the size of the adjustable capacitor and gm, the bandwidth can be flexibly adjusted, thereby being applicable to multi-standard wireless communication systems.

[0023] 2. The present invention utilizes a super source follower to enable the filter circuit to be used in both single-ended and double-ended modes. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0025] Figure 1 It is a schematic diagram of the overall structure of the low-pass filter circuit of the present invention;

[0026] Figure 2 is a schematic structural diagram of a switched capacitor unit of the present invention;

[0027] Figure 3 is a circuit diagram of an amplifier A of the present invention;

[0028] Figure 4 It is a schematic diagram of an equivalent circuit of the first-stage low-pass filter of the present invention. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] like Figure 1As shown, a high-order configurable current mode low-pass filter circuit includes a first-stage low-pass filter, a second-stage low-pass filter, a third-stage low-pass filter and a super source follower. The three-stage low-pass filters should be cascaded in sequence, and the output current of the previous stage is directly fed into the input end of the next stage through the current mirror between the stages, so as to avoid the problem of inconsistent DC voltages between the previous and next stages during direct coupling, and at the same time reduce the number of current branches and reduce a certain amount of power consumption. Each stage of the low-pass filter adopts a second-order current type gm-C structure, which improves the signal linearity while meeting the large bandwidth, and each stage of the capacitor adopts an adjustable switching capacitor, so as to realize flexible adjustment of the bandwidth. The output end of the super source follower is connected to the input end of the first-stage low-pass filter through two resistors, which establishes a low-resistance connection to the ground, so that the filter circuit can be used in both single-ended and double-ended modes.

[0031] The low-pass filter circuit also includes: a ground GND and a power supply VDD;

[0032] The first stage low pass filter includes: transistor M 1A , transistor M 1B , transistor M 2A , transistor M 2B , transistor M 3A , transistor M 3B , transistor M 4A , transistor M 4B , variable capacitor C 1A , variable capacitor C 1B , resistor R in1 and resistor R in2 ; Among them, transistor M 2A The source is connected to the ground GND, and the drain is connected to the transistor M 1A The source of transistor M 1A The drain of transistor M 3A The drain of transistor M 3A The source of transistor M is connected to the power supply VDD, and the drain is connected to the gate; 2B The source is connected to the ground GND, and the drain is connected to the transistor M 1B The source of transistor M 1B The drain of transistor M 3B The drain of transistor M 3B The source is connected to the power supply VDD, and the drain is connected to the gate; the variable capacitor C 1A One end of the transistor M 1A The other end is connected to the source of transistor M 1B The source of the variable capacitor C 1B One end of the transistor M 3A The other end is connected to the drain of transistor M 3B The drain of transistor M 1A The gate of transistor M1B The drain of transistor M 1B The gate of transistor M 1A The drain of the resistor R in1 One end of the transistor M 1A The other end is connected to the positive electrode I of the current input terminal of the first stage low-pass filter. in1p , resistor R in2 One end of the transistor M 1B The other end is connected to the negative electrode I of the current input terminal of the first stage low-pass filter. in1n ; Transistor M 4A The gate of transistor M 3A The gate is connected to the power supply VDD, the drain is connected to the negative electrode I of the output terminal of the first stage low-pass filter out1n Connected, transistor M 4B The gate of transistor M 3B The gate is connected to the power supply VDD, the drain is connected to the positive electrode I of the output terminal of the first stage low-pass filter out1p Connected; transistor M 3A , transistor M 4A , transistor M 3B , transistor M 4B A current mirror is formed, and its output is connected to the input of the second-stage low-pass filter.

[0033] The second stage low pass filter includes: transistor M 5A , transistor M 5B , transistor M 6A , transistor M 6B , transistor M 7A , transistor M 7B , variable capacitor C 2A and variable capacitor C 2A ; Among them, transistor M 5A The source of the second stage low pass filter is connected to the negative terminal of the input terminal I in2n , the drain of transistor M is connected 6A The drain and gate of transistor M are connected 5B The source of transistor M 6A The source of transistor M is connected to GND, and the drain is connected to the gate; 5B The source of the second stage low pass filter is connected to the positive terminal of the input terminal I in2p , the drain of transistor M is connected 6B The drain and gate of transistor M are connected 5A The source of transistor M 6B The source is connected to GND, and the drain is connected to the gate; the variable capacitor C 2A One end is connected to transistor M 5AThe other end is connected to the source of transistor M 5B The source of the variable capacitor C 2B One end is connected to transistor M 5A The other end is connected to the drain of transistor M 5B The drain of transistor M 7A The gate of transistor M 6A The gate is connected to the ground, the source is connected to the ground GND, and the drain is connected to the positive electrode I of the output end of the second-stage low-pass filter. out2p Connected; transistor M 7B The gate of transistor M 6B The gate is connected to the ground, the source is connected to the ground GND, and the drain is connected to the negative electrode I of the output end of the second stage low-pass filter. out2n Connected; transistor M 6A , transistor M 7A , transistor M 6B , transistor M 7B A current mirror is formed, and its output is connected to the input of the third-stage low-pass filter.

[0034] The third low-pass filter includes: transistor M 8A , transistor M 8B , transistor M 9A , transistor M 9B , transistor M 10A , transistor M 10B , transistor M 11A , transistor M 11B , variable capacitor C 3A and variable capacitor C 3B ; Among them, transistor M 8A The source of the third-stage low-pass filter is connected to the positive terminal I in3p , the drain of transistor M is connected 9A The drain and gate of transistor M are connected 8B The drain of transistor M 9A The source of transistor M is connected to the power supply VDD, and the drain is connected to the gate; 8B The source of the third-stage low-pass filter is connected to the negative terminal I in3n , the drain of transistor M is connected 9B The drain and gate of transistor M are connected 8A The drain of transistor M 9B The source is connected to the power supply VDD, and the drain is connected to the gate; the variable capacitor C 3A One end of transistor M 8A The other end is connected to the source of transistor M 8B The variable capacitor C 3B One end of transistor M 9A The other end is connected to the drain of transistor M9B The drain of transistor M is connected; 10A The source is connected to the power supply VDD, and the gate is connected to the transistor M 9A The gate of transistor M is connected to the drain of transistor M 11A The drain of transistor M 11A The source is connected to GND, and the drain is connected to the negative electrode V at the output of the third-stage low-pass filter. outn ; Transistor M 10B The source is connected to the power supply VDD, and the gate is connected to the transistor M 9B The gate of transistor M is connected to the drain of transistor M 11B The drain of transistor M 11B The source is connected to GND, and the drain is connected to the positive electrode V at the output of the third-stage low-pass filter. outp .

[0035] The super source follower includes: transistor M 12A , transistor M 12B , transistor M 13A , transistor M 13B , transistor M 14A , transistor M 14B , amplifier A, resistor R 0A and resistor R 0B ; Among them, transistor M 14A The source is connected to the power supply VDD, and the drain is connected to the transistor M 12A The drain of transistor M is connected to the gate. 14B The gate of transistor M is connected; 12A The source of transistor M 13A The drain of transistor M is connected to the gate. 12B The gate of transistor M is connected; 13A The source is connected to GND, and the drain is connected to the output virtual voltage V virtual ; Transistor M 14B The source is connected to the power supply VDD, the drain is connected to the gate, and the drain is connected to the transistor M 12B The drain of transistor M 12B The gate of transistor M 14B The gate of transistor M is connected to the source of transistor M 13B The drain of transistor M 13B The source of the amplifier is connected to the ground GND; the input of the amplifier A is connected to the transistor M 12A The output terminal is connected to the drain of transistor M 12A The source of the resistor R 0A One end is connected to transistor M 12A The other end is connected to the positive electrode I of the input end of the first stage low-pass filter. in1p ; Resistance R 0B One end is connected to transistor M12A The other end is connected to the negative electrode I of the input terminal of the first stage low-pass filter. in1n .

[0036] Transistor M 1A ~M 11A With transistor M 1B ~M 11B The sizes of transistors M are equal one by one; 1A 、M 1B 、M 2A 、M 2B 、M 6A 、M 6B 、M 7A 、M 7B 、M 8A 、M 8B 、M 11A 、M 11B is an NMOS transistor, transistor M 3A 、M 3B 、M 4A 、M 4B 、M 5A 、M 5B 、M 9A 、M 9B 、M 10A 、M 10B It is a PMOS transistor; transistor M 11A 、M 11B The gate bias voltage is equal to V bias2 ;

[0037] Transistor M 12A ~M 14A With transistor M 1A ~M 3A The sizes of transistors M are equal one by one. 12B ~M 14B With transistor M 1B ~M 3B The sizes of transistors M are equal one by one; 12A 、M 12B 、M 13A 、M 13B is an NMOS transistor, transistor M 14A 、M 14B is a PMOS transistor; transistor M 2A 、M 2B 、M 13A 、M 13B The gate bias voltage is equal to V bias1 .

[0038] like Figure 2 As shown, the variable capacitor C 1A, C 1B , C 2A , C 2B , C 3A , C 3B They all include a number of switch capacitor units and capacitors in parallel, and the switch capacitor unit includes: a transistor M1, a transistor M2, a capacitor C1 and a capacitor C2; one end of the capacitor C1 is connected to the drain of the transistor M1, and the other end is connected to the port P1 of the switch capacitor, and the source of the transistor M1 is connected to the ground GND; one end of the capacitor C2 is connected to the drain of the transistor M2, and the other end is connected to the port P2 of the switch capacitor, and the source of the transistor M2 is connected to the ground GND; the gates of the transistors M1 and M2 are connected to the control voltage B0, and the capacitance value of the switch capacitor unit is adjusted by setting the control voltage B0 to a high level or a low level; the transistors M1 and M2 are both NMOS transistors.

[0039] like Figure 3 As shown, the amplifier A includes a transistor M3 and a transistor M4, wherein the source of the transistor M3 is connected to the power supply VDD, the drain is connected to the drain of the transistor M4, and the gate serves as the input terminal IN of the amplifier A; the source of the transistor M4 is connected to the ground GND, and the gate is connected to the bias voltage V B , the drain is connected to the output terminal OUT of the amplifier A; the transistor M3 is a PMOS transistor, and the transistor M4 is an NMOS transistor.

[0040] like Figure 4 As shown, the first-order low-pass filter can be equivalent to the LC second-order low-pass filter network shown in the figure, where C = C 1A , transistor M 1A 、M 1B and capacitor C 1B Equivalent to active inductance, L and C can be expressed as:

[0041]

[0042] Among them, g m For transistor M 1A 、M 1B 、M 3A 、M 3B The transconductance of , s is the complex frequency domain variable in Laplace transform;

[0043] From this we can obtain the current transfer function:

[0044]

[0045] The Q value of the low-pass filter is:

[0046]

[0047] The cutoff frequency ω0 of the low-pass filter is:

[0048]

[0049] The current output in the above formula needs to be multiplied by the amplification factor K of the output current mirror to obtain the gain of the first-order low-pass filter; this formula shows that the transfer function of the first-order low-pass filter has the characteristics of a second-order low-pass filter, and only the g of the capacitor and transistor need to be reasonably designed. m The bandwidth and Q value of the filter can be designed to the desired values ​​by changing the value of the capacitor. The bandwidth of the filter can be flexibly adjusted by changing the size of the capacitor. The principles of the second-stage low-pass filter and the third-stage low-pass filter are similar to those of the first-stage low-pass filter. The second-stage low-pass filter changes the input transistor from an NMOS transistor to a PMOS transistor. It does not require a bias current source and is directly biased by the current mirror output of the first-stage low-pass filter.

[0050] Working principle:

[0051] In the filter circuit of the present invention, the first-order low-pass filter adopts the structure of gm-C, which can be equivalent to a second-order LC filter network. The expected bandwidth and Q value can be obtained by reasonably designing the values ​​of transconductance and variable capacitance; the second-order low-pass filter and the third-order low-pass filter have the same basic principle as the first-order low-pass filter, except that the input tube of the second-order low-pass filter is changed from an NMOS transistor to a PMOS transistor, which does not require a bias current source and is directly biased by the current mirror output of the first-order low-pass filter; the super source follower utilizes the same structure as the half-side circuit of the first-order low-pass filter and sets the same transistor size, thereby replicating the DC voltage of the first-order low-pass filter; its output end is connected to the input end of the first-order low-pass filter through a resistor, so that the single-end impedance to ground of the filter is low resistance, thereby supporting the application in the single-end and double-end mode. The overall circuit is a 6th-order Butterworth filter, which can achieve accurate adjustment of bandwidth by controlling the value of the adjustable capacitor and appropriately adjusting gm by changing Vbias.

[0052] In addition, in some embodiments, the low-pass filter circuit of the present invention can be applied to high-speed circuits such as transceivers and sensor readouts in wireless communication systems, and the broadband and current model characteristics of the present invention can be used to filter out aliasing signals, interference signals, etc., thereby improving the output signal-to-noise ratio. The present invention has a bandwidth configurable function and can realize applications with different bandwidth requirements. In low-bandwidth applications, the integrated noise can be further reduced to improve the signal-to-noise ratio.

[0053] In the description of this specification, the description with reference to the terms "one embodiment", "example", "specific example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0054] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, and these changes and improvements all fall within the scope of the present invention to be protected.

Claims

1. A high-order configurable current mode low-pass filter circuit, characterized in that: It includes a first-stage low-pass filter, a second-stage low-pass filter and a third-stage low-pass filter which are cascaded in sequence, and the output current of the previous low-pass filter is fed into the input end of the next low-pass filter through a current mirror between two adjacent low-pass filters; and each low-pass filter adopts a second-order current type gm-C structure; A super source follower is provided at one side of the first-stage low-pass filter, and the output end of the super source follower is connected to the input end of the first-stage low-pass filter through two resistors to establish a low-resistance connection to the ground.

2. A high-order configurable current mode low-pass filter circuit according to claim 1, characterized in that: The first-stage low-pass filter comprises: a transistor M 1A , transistor M 1B , transistor M 2A , transistor M 2B , transistor M 3A , transistor M 3B , transistor M 4A , transistor M 4B , variable capacitor C 1A , variable capacitor C 1B , resistor R in1 and resistor R in2 ; Transistor M 2A The source is connected to the ground GND, and the drain is connected to the transistor M 1A The source of transistor M 1A The drain of transistor M 3A The drain of transistor M 3A The source of transistor M is connected to the power supply VDD, and the drain is connected to the gate; 2B The source is connected to the ground GND, and the drain is connected to the transistor M 1B The source of transistor M 1B The drain of transistor M 3B The drain of transistor M 3B The source is connected to the power supply VDD, and the drain is connected to the gate; the variable capacitor C 1A One end of the transistor M 1A The other end is connected to the source of transistor M 1B The source of the variable capacitor C 1B One end of the transistor M 3A The other end is connected to the drain of transistor M 3B The drain of transistor M 1A The gate of transistor M 1B The drain of transistor M 1B The gate of transistor M 1A The drain of the resistor R in1 One end of the transistor M 1A The other end is connected to the positive electrode I of the current input terminal of the first stage low-pass filter. in1p , resistor R in2 One end of the transistor M 1B The other end is connected to the negative electrode I of the current input terminal of the first stage low-pass filter. in1n ; Transistor M 4A The gate of transistor M 3A The gate is connected to the power supply VDD, the drain is connected to the negative electrode I of the output terminal of the first stage low-pass filter out1n Connected, transistor M 4B The gate of transistor M 3B The gate is connected to the power supply VDD, the drain is connected to the positive electrode I of the output terminal of the first stage low-pass filter out1p Connected; transistor M 3A , transistor M 4A , transistor M 3B , transistor M 4B A current mirror is formed, and its output is connected to the input of the second-stage low-pass filter.

3. A high-order configurable current mode low-pass filter circuit according to claim 2, characterized in that: The second-stage low-pass filter includes: a transistor M 5A , transistor M 5B , transistor M 6A , transistor M 6B , transistor M 7A , transistor M 7B , variable capacitor C 2A and variable capacitor C 2A ; Transistor M 5A The source of the second stage low pass filter is connected to the negative terminal of the input terminal I in2n , the drain of transistor M is connected 6A The drain and gate of transistor M are connected 5B The source of transistor M 6A The source of transistor M is connected to GND, and the drain is connected to the gate; 5B The source of the second stage low pass filter is connected to the positive terminal of the input terminal I in2p , the drain of transistor M is connected 6B The drain and gate of transistor M are connected 5A The source of transistor M 6B The source is connected to GND, and the drain is connected to the gate; the variable capacitor C 2A One end is connected to transistor M 5A The other end is connected to the source of transistor M 5B The source of the variable capacitor C 2B One end is connected to transistor M 5A The other end is connected to the drain of transistor M 5B The drain of transistor M 7A The gate of transistor M 6A The gate is connected to the ground, the source is connected to the ground GND, and the drain is connected to the positive electrode I of the output end of the second-stage low-pass filter. out2p Connected; transistor M 7B The gate of transistor M 6B The gate is connected to the ground, the source is connected to the ground GND, and the drain is connected to the negative electrode I of the output end of the second-stage low-pass filter. out2n Connected; transistor M 6A , transistor M 7A , transistor M 6B , transistor M 7B A current mirror is formed, and its output is connected to the input of the third-stage low-pass filter.

4. A high-order configurable current mode low-pass filter circuit according to claim 3, characterized in that: The third-stage low-pass filter includes: a transistor M 8A , transistor M 8B , transistor M 9A , transistor M 9B , transistor M 10A , transistor M 10B , transistor M 11A , transistor M 11B , variable capacitor C 3A and variable capacitor C 3B ; Transistor M 8A The source of the third-stage low-pass filter is connected to the positive terminal I in3p , the drain of transistor M is connected 9A The drain and gate of transistor M are connected 8B The drain of transistor M 9A The source of transistor M is connected to the power supply VDD, and the drain is connected to the gate; 8B The source of the third-stage low-pass filter is connected to the negative terminal I in3n , the drain of transistor M is connected 9B The drain and gate of transistor M are connected 8A The drain of transistor M 9B The source is connected to the power supply VDD, and the drain is connected to the gate; the variable capacitor C 3A One end of transistor M 8A The other end is connected to the source of transistor M 8B The variable capacitor C 3B One end of transistor M 9A The other end is connected to the drain of transistor M 9B The drain of transistor M is connected; 10A The source is connected to the power supply VDD, and the gate is connected to the transistor M 9A The gate of transistor M is connected to the drain of transistor M 11A The drain of transistor M 11A The source is connected to GND, and the drain is connected to the negative electrode V at the output of the third-stage low-pass filter. outn ; Transistor M 10B The source is connected to the power supply VDD, and the gate is connected to the transistor M 9B The gate of transistor M is connected to the drain of transistor M 11B The drain of transistor M 11B The source is connected to GND, and the drain is connected to the positive electrode V at the output of the third-stage low-pass filter. outp .

5. The high-order configurable current mode low-pass filter circuit according to claim 4, characterized in that: The super source follower includes: a transistor M 12A , transistor M 12B , transistor M 13A , transistor M 13B , transistor M 14A , transistor M 14B , amplifier A, resistor R 0A and resistor R 0B ; Transistor M 14A The source is connected to the power supply VDD, and the drain is connected to the transistor M 12A The drain of transistor M is connected to the gate. 14B The gate of transistor M is connected; 12A The source of transistor M 13A The drain of transistor M is connected to the gate. 12B The gate of transistor M is connected; 13A The source is connected to GND, and the drain is connected to the output virtual voltage V virtual ; Transistor M 14B The source is connected to the power supply VDD, the drain is connected to the gate, and the drain is connected to the transistor M 12B The drain of transistor M 12B The gate of transistor M 14B The gate of transistor M is connected to the source of transistor M 13B The drain of transistor M 13B The source of the amplifier is connected to the ground GND; the input of the amplifier A is connected to the transistor M 12A The output terminal is connected to the drain of transistor M 12A The source of the resistor R 0A One end is connected to transistor M 12A The other end is connected to the positive electrode I of the input end of the first stage low-pass filter. in1p ; Resistance R 0B One end is connected to transistor M 12A The other end is connected to the negative electrode I of the input terminal of the first stage low-pass filter. in1n .

6. The high-order configurable current mode low-pass filter circuit according to claim 4, characterized in that: The transistor M 1A ~M 11A With transistor M 1B ~M 11B The sizes of transistors M are equal one by one; 1A 、M 1B 、M 2A 、M 2B 、M 6A 、M 6B 、M 7A 、M 7B 、M 8A 、M 8B 、M 11A 、M 11B is an NMOS transistor, transistor M 3A 、M 3B 、M 4A 、M 4B 、M 5A 、M 5B 、M 9A 、M 9B 、M 10A 、M 10B It is a PMOS transistor; Transistor M 11A 、M 11B The gate bias voltage is equal.

7. The high-order configurable current mode low-pass filter circuit according to claim 5, characterized in that: The transistor M 12A ~M 14A With transistor M 1A ~M 3A The sizes of transistors M are equal one by one. 12B ~M 14B With transistor M 1B ~M 3B The sizes of transistors M are equal one by one; 12A 、M 12B 、M 13A 、M 13B is an NMOS transistor, transistor M 14A 、M 14B is a PMOS transistor; transistor M 2A 、M 2B 、M 13A 、M 13B The gate bias voltage is equal.

8. The high-order configurable current mode low-pass filter circuit according to claim 4, characterized in that: The variable capacitor C 1A , C 1B , C 2A , C 2B , C 3A , C 3B They all include a number of switch capacitor units and capacitors in parallel, and the switch capacitor unit includes: a transistor M1, a transistor M2, a capacitor C1 and a capacitor C2; one end of the capacitor C1 is connected to the drain of the transistor M1, and the other end is connected to the port P1 of the switch capacitor, and the source of the transistor M1 is connected to the ground GND; one end of the capacitor C2 is connected to the drain of the transistor M2, and the other end is connected to the port P2 of the switch capacitor, and the source of the transistor M2 is connected to the ground GND; the gates of the transistors M1 and M2 are connected to the control voltage B0, and the capacitance value of the switch capacitor unit is adjusted by setting the control voltage B0 to a high level or a low level; the transistors M1 and M2 are both NMOS transistors.

9. The high-order configurable current mode low-pass filter circuit according to claim 5, characterized in that: The amplifier A comprises a transistor M3 and a transistor M4, wherein the source of the transistor M3 is connected to the power supply VDD, the drain is connected to the drain of the transistor M4, and the gate serves as the input terminal IN of the amplifier A; The source of transistor M4 is connected to ground GND, and the gate is connected to bias voltage V B , the drain is connected to the output terminal OUT of the amplifier A; the transistor M3 is a PMOS transistor, and the transistor M4 is an NMOS transistor.

10. A communication transceiver, comprising: A high-order configurable current mode low-pass filter circuit as described in any one of claims 1 to 9.

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