Data transmission optimization method and system based on receiving registration table mechanism

By introducing a receive registry mechanism and escape channel in the HPC environment, the data transmission delay and processing bottleneck problems between FPGA accelerators are solved, efficient and reliable data transmission is achieved, and system performance and flexibility are improved.

CN119629147BActive Publication Date: 2025-09-19SHANDONG COMP SCI CENTNAT SUPERCOMP CENT IN JINAN
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Patent Information

Application Number
CN202411660756.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-20
Publication Date
2025-09-19
Estimated Expiration
2044-11-20

AI Technical Summary

Technical Problem

In a high-performance computing (HPC) environment based on a field-programmable gate array (FPGA), traditional communication protocols cause data transmission delays, resource occupation, receiving-end processing bottlenecks, and duplicate or delayed packet processing, which affect system performance and reliability.

Method used

A data transmission optimization method based on the receive registry mechanism is adopted. By splitting large RDMA transmission into multiple small transmissions at the sending end and introducing the receive registry mechanism at the receiving end, the accuracy and timeliness of data transmission are ensured by using special status flags and mask mechanisms, and pipeline blocking is avoided through escape channels.

Benefits of technology

It improves the efficiency and reliability of data transmission, reduces delays and resource usage, ensures the accuracy and stability of data transmission, and enhances the flexibility and scalability of the system.

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Abstract

The present disclosure provides a data transmission optimization method and system based on a receive registry mechanism, relating to the technical fields of high-performance computing and data transmission optimization. The method involves splitting a large RDMA transmission into multiple smaller transmissions at the sending end, allowing multiple data segments to be processed and transmitted in parallel; introducing a receive registry mechanism at the receiving end to record and track RDMA operations; using a special status flag and mask mechanism to identify whether a data packet belongs to the same RDMA operation, and providing local and remote notifications when the operation is completed, thereby ensuring the accuracy and timeliness of data transmission. For data packets not yet registered in the receive registry, an escape channel is designed to avoid pipeline blockage. Furthermore, a timeout mechanism is introduced to discard duplicate or delayed data packets, thereby ensuring the stability and reliability of data transmission.
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Description

Technical Field

[0001] The present disclosure relates to the technical field of high-performance computing and data transmission optimization, and in particular to a data transmission optimization method and system based on a receiving registration table mechanism. Background Art

[0002] The statements in this section merely provide background information related to the present disclosure and do not necessarily constitute prior art.

[0003] In the process of optimizing high-performance computing (HPC) system architectures, traditional communication protocols such as Ethernet and InfiniBand, while performing well in many areas, face numerous challenges in HPC environments based on field-programmable gate arrays (FPGAs). These challenges primarily stem from the limitations of traditional protocols in terms of system performance and resource utilization. On the one hand, traditional protocols often rely on frequent participation of the central processing unit (CPU), resulting in unnecessary memory copies and context switches, which in turn increases data processing latency and reduces the system's real-time responsiveness. On the other hand, the implementation of traditional protocols on FPGA platforms consumes a large amount of logic resources, directly restricting further improvements in system performance.

[0004] To address these limitations, existing technologies have begun researching more efficient data transmission mechanisms. Remote Direct Memory Access (RDMA) technology has garnered significant attention due to its unique advantages. By transferring data directly between memories, RDMA bypasses CPU intervention and achieves "zero-copy" data transfer, significantly reducing CPU burden and latency. Furthermore, RDMA's connectionless nature enables direct and efficient communication between FPGA-based accelerators, eliminating the need to establish and maintain complex connection states. This further simplifies the communication process and enhances system flexibility and scalability.

[0005] However, current RDMA-based communication solutions still face numerous challenges in data transmission between FPGA-based accelerators in HPC environments, including:

[0006] (1) Data transmission delay and efficiency issues. In FPGA accelerator applications, large-scale RDMA protocol transmission may lead to excessive occupation of system resources and computing bottlenecks.

[0007] (2) Data processing bottleneck problem at the receiving end. Disordered processing at the receiving end can easily lead to excessive congestion or waste of resources.

[0008] (3) Duplicate or delayed data packet processing problem: Traditional RDMA protocols may cause pipeline congestion when faced with duplicate transmission or delayed arrival of data packets. Summary of the Invention

[0009] To address the aforementioned issues, the present disclosure proposes a data transmission optimization method and system based on a receive registry mechanism. Through microarchitecture design, large RDMA transmissions are divided into multiple smaller transmissions. A receive registry mechanism is introduced at the receiving end. Special status flags and mask mechanisms are used to ensure the accuracy and timeliness of data transmission. An escape channel and timeout mechanism are introduced to avoid pipeline blockage and the processing of duplicate or delayed data packets, thereby ensuring the efficiency, stability, and reliability of data transmission.

[0010] According to some embodiments, the present disclosure adopts the following technical solutions:

[0011] The data transmission optimization method based on the receiving registration table mechanism is applied to the sending end and includes:

[0012] The CPU initiates direct memory access (DMA) operation requests to form an RDMA command queue. The CDMA IP acts as a DMA engine and pulls DMA operations from the RDMA command queue.

[0013] Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and split the large data packets in the large transmission queue into small data packets;

[0014] When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transmitted at the head of the queue, and uses a connectionless segmentation transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local status is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end.

[0015] According to some embodiments, the present disclosure adopts the following technical solutions:

[0016] The data transmission optimization method based on the receiving registration table mechanism is applied to the receiving end and includes:

[0017] Receive the RDMA transaction data packet from the sender, check the type field in the packet header, and if the field is the start of the operation, register the operation in the receive registration table to record the expected address range and number of packets of the operation;

[0018] When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape;

[0019] When all receive operations are completed, a local completion notification is sent to the sender.

[0020] According to some embodiments, the present disclosure adopts the following technical solutions:

[0021] The data transmission optimization system based on the receiving registration table mechanism includes the sending end and the receiving end.

[0022] In the transmitting end, the CPU initiates a direct memory access (DMA) operation request to form an RDMA command queue; the CDMAIP acts as a DMA engine to pull DMA operations from the RDMA command queue;

[0023] Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and split the large data packets in the large transmission queue into small data packets;

[0024] When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transferred at the head of the queue. It uses a connectionless segmentation transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local state is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end.

[0025] In the receiving end, a data packet of the RDMA transaction from the sending end is received, and a type field in the data packet header is checked. If the field is the start part of the operation, a registration operation is performed in a receiving registration table to record the expected address range and number of data packets of the operation;

[0026] When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape;

[0027] When all receive operations are completed, a local completion notification is sent to the sender.

[0028] According to some embodiments, the present disclosure adopts the following technical solutions:

[0029] The transmission optimization method of the data transmission optimization system based on the receiving registration table mechanism includes:

[0030] The sending end uses the CPU to initiate direct memory access (DMA) operation requests to form an RDMA command queue. The CDMA IP acts as a DMA engine to pull DMA operations from the RDMA command queue.

[0031] Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and split the large data packets in the large transmission queue into small data packets;

[0032] When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transferred at the head of the queue. It uses a connectionless segmentation transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local state is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end.

[0033] After receiving the data packet of the RDMA transaction from the sending end, the receiving end checks the type field in the data packet header. If the field is the starting part of the operation, it registers the operation in the receiving registration table and records the expected address range and number of data packets of the operation;

[0034] When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape;

[0035] When all receive operations are completed, a local completion notification is sent to the sender.

[0036] According to some embodiments, the present disclosure adopts the following technical solutions:

[0037] An electronic device comprises: a processor, a memory and a computer program; wherein the processor is connected to the memory, the computer program is stored in the memory, and when the electronic device is running, the processor executes the computer program stored in the memory to enable the electronic device to implement the transmission optimization method of the data transmission optimization system based on the receiving registry mechanism.

[0038] Compared with the prior art, the present invention has the following beneficial effects:

[0039] This disclosed data transmission optimization method, based on a receive register mechanism, proposes a microarchitecture design that supports connectionless reliable transmission. On the sending side, it supports splitting large RDMA transfers into multiple smaller ones to mitigate the latency introduced by large transfers. This approach allows multiple data segments to be processed and transmitted in parallel, more effectively utilizing network bandwidth and improving overall transmission efficiency.

[0040] The data transmission optimization method based on a receive registry mechanism, disclosed in this paper, introduces a receive registry mechanism on the receiving end to record and track RDMA operations. By using a special status flag and mask mechanism, the system can identify whether packets belong to the same RDMA operation and provide local and remote notifications when the operation completes, ensuring accurate and timely data transmission. For packets not yet registered in the receive registry, an escape channel is designed to avoid pipeline blockage. Furthermore, a timeout mechanism is introduced to discard duplicate or delayed packets, thereby ensuring stable and reliable data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The accompanying drawings, which constitute a part of the present disclosure, are used to provide a further understanding of the present disclosure. The exemplary embodiments of the present disclosure and their descriptions are used to explain the present disclosure and do not constitute an improper limitation to the present disclosure.

[0042] Figure 1 This is a flow chart of the data transmission optimization method based on the receiving registration table mechanism according to an embodiment of the present disclosure applied to the sending end;

[0043] Figure 2 This is a flow chart of the data transmission optimization method based on the receiving registration table mechanism according to an embodiment of the present disclosure applied to the receiving end;

[0044] Figure 3 This is a flow chart of the transmission layer receiving and sending control in accordance with an embodiment of the present disclosure;

[0045] Figure 4 This is a mask update flow chart of an embodiment of the present disclosure;

[0046] Figure 5 This is a delay comparison diagram between the segmented transmission mode and the large transmission mode according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0047] The present disclosure will be further described below with reference to the accompanying drawings and embodiments.

[0048] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of the present disclosure. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present disclosure belongs.

[0049] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular form is intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof.

[0050] Example 1

[0051] An embodiment of the present disclosure provides a data transmission optimization method based on a receiving registration table mechanism, which is applied to a sending end and includes:

[0052] The sending CPU initiates a direct memory access (DMA) operation request to form an RDMA command queue. The CDMA IP acts as a DMA engine and pulls DMA operations from the RDMA command queue.

[0053] Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and segment the large data packets in the large transmission queue into small data packets;

[0054] When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transmitted at the head of the queue, and uses a connectionless transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local status is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end.

[0055] Specifically, when data needs to be transferred, the CPU or accelerator initiates a direct memory access (DMA) operation request. During this process, the Xilinx CDMA IP acts as a DMA engine, pulling these DMA operations from the command queue. These operations utilize a scatter-gather model, enabling the DMA engine to efficiently process data scattered across different memory areas.

[0056] The scatter-gather mode enables the DMA engine to effectively process data scattered across different memory areas, including:

[0057] 1) The DMA controller builds a descriptor table that contains the addresses and sizes of multiple memory blocks that may be located in different locations in physical memory.

[0058] 2) Based on the information in the descriptor table, the DMA controller reads data from multiple source memory addresses and writes them to a single destination address, or reads data from a single source address and writes it to multiple destination memory addresses in a dispersed manner;

[0059] 3) After the data transfer is completed, the DMA controller will send an interrupt signal to notify the CPU, which will then perform subsequent processing.

[0060] Furthermore, a transmission threshold is set for RDMA commands, and the large transmission queue and the regular queue are divided according to the preset threshold. For those RDMA commands that exceed the preset threshold size, they will be sent to the large transmission queue for special processing. In this queue, large data packets will be divided into multiple smaller data packets for transmission, thereby reducing system latency. On the contrary, commands that do not exceed the threshold enter the regular queue and wait for processing. When the DMA engine pulls a new segmented command, it only needs to update the base address offset and the number of bytes to be transferred at the head of the queue. When the last command is issued, the special status flag remains inactive, so that a local completion notification of the original complete transmission can be formed.

[0061] Among them, the large transmission queue and the regular queue are divided according to the preset threshold, including:

[0062] RDMA commands issued by the CPU / accelerator contain the memory base address and the number of bytes to be transferred. If the size of a command exceeds a certain threshold, it can be sent to a special "large transfer" queue. The optimal value for segmentation is highly dependent on the application structure and should be defined by the programmer when configuring the network interface (NI).

[0063] Furthermore, for RDMA commands that exceed a preset threshold size, they are sent to the large transfer queue for special processing, including:

[0064] When a command in the large transfer queue is processed, it is assigned a status flag in the DMA operation table. When an operation with this special status flag completes, no local notification is issued; only a notification is sent to the receiver. If the command size is M and the segment size is N, the head of the "large transfer" queue will remain unchanged for M / N operations. When the DMA engine pulls a new segmented command, it simply updates the base address offset and number of bytes to be transferred at the head of the queue. When the last command is issued, the special status flag remains unset, allowing local completion notification of the original complete transfer to occur.

[0065] Furthermore, the DMA engine records each newly pulled DMA operation in the DMA operation table (DMAOP table) of the network interface (NI). The DMA operation table assigns a unique operation number (OP number) to each data packet. The operation number is sent to the network along with the data packet and returned when the data packet is confirmed. It is used to record the number of successfully transmitted data packets.

[0066] The DMA operation table is responsible for tracking each individual data packet and setting a timeout timer for each data packet. If no acknowledgment is received within the timeout period or a negative acknowledgment is received, a retransmission operation entry will be created in the DMA operation table.

[0067] Finally, the system uses a connectionless segmented transmission method, in which data packets are transmitted out of order across the network. Once all segmented packets have been successfully transmitted, the sender uses the DMA engine to update its local status, notifying the processor of the completion of the DMA operation. Simultaneously, the sender notifies the remote receiver of the arrival of new data at a specific location, allowing it to begin processing the received data. This process ensures efficient and reliable data transmission.

[0068] Example 2

[0069] An embodiment of the present disclosure provides a data transmission optimization method based on a receiving registration table mechanism, which is applied to a receiving end and includes:

[0070] Receive the RDMA transaction data packet from the sender, check the type field in the packet header, and if the field is the start of the operation, register the operation in the receive registration table to record the expected address range and number of packets of the operation;

[0071] When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape;

[0072] When all receive operations are completed, a local completion notification is sent to the sender.

[0073] As an example, when an RDMA transaction arrives at the receiving end, the system first checks the "Type" field in the packet header. If this field indicates that this is the start of an operation, the receiving end registers the operation. The expected address range and number of packets for the operation are recorded in the receiving registration table.

[0074] If the field indicates that this is the start of an operation, the receiving end performs a registration operation, including:

[0075] The registration operation actually parses the "Type" field in the packet header for a special entry that indicates whether the packet is the first transmitted packet of this operation. When the receiver detects this special entry, it records the address range and number of packets in the receive registration table.

[0076] Furthermore, as new packets arrive, the system calculates their destination addresses and matches them against entries in the receive register. If a match is found, processing continues; otherwise, the packet is sent to the escape channel and the associated timer is started. If the timer expires, the packet and its associated data are discarded.

[0077] The escape channel is a buffering mechanism for processing out-of-order data packets, implemented by the FPGA's internal resource RAM block. It allows the receiver to temporarily store these data packets when it is not yet ready to process a specific RDMA operation, thereby avoiding pipeline blocking and ensuring data sequence and integrity.

[0078] If a match is found, the hardware calculates the mask value for the new packet. If the new packet is a duplicate (i.e., the mask remains unchanged), it is immediately discarded. If the new packet is not a duplicate, the system updates the mask and checks to see if all expected packets have been received. If the mask shows all bits set, the operation is complete, and the system provides a local completion notification. This saves a full round-trip packet latency compared to waiting for the sender to provide a completion notification after receiving the last acknowledgment message.

[0079] Furthermore, the mask value of the new data packet is calculated, including:

[0080] The mask is created using a barrel shifter, based on a field in the first packet header that indicates the expected number of packets. To establish the proper initial state for the operation, zeros are shifted into this field. A 1 is added at the end of the creation process to indicate that the first packet has been received, which is necessary to begin the registration process. For example, if we assume a 4KB operation size, a 16KB FPGA-based network-enhanced RDMA receive-side notification mask size, and a 512B packet size, the initial mask after registration would be 'b1111 1111 1111 1111 1111 1111 0000 0001. This mask indicates that eight packets are expected and that the first packet has been successfully received.

[0081] Furthermore, if the new packet is not a duplicate, the system updates the mask to include:

[0082] If the table entry being checked matches the incoming data, a new mask is created. The base address of the entry and the number of bytes being operated on are used to calculate whether the operation being checked in the table is relevant to the incoming packet. An offset is then created for the barrel shifter, which generates a mask to cause bit flips. If the mask is found to be all ones, the operation must have completed.

[0083] If Newmask is equal to Originalmask, the packet must be a duplicate and can be discarded.

[0084] Example 3

[0085] In one embodiment of the present disclosure, a data transmission optimization system based on a receiving registration table mechanism is provided, comprising a sending end and a receiving end.

[0086] In the transmitting end, the CPU initiates a direct memory access (DMA) operation request to form an RDMA command queue; the CDMAIP acts as a DMA engine to pull DMA operations from the RDMA command queue;

[0087] Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and segment the large data packets in the large transmission queue into small data packets;

[0088] When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transferred at the head of the queue. It uses a connectionless transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local state is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end.

[0089] In the receiving end, a data packet of the RDMA transaction from the sending end is received, and a type field in the data packet header is checked. If the field is the start part of the operation, a registration operation is performed in a receiving registration table to record the expected address range and number of data packets of the operation;

[0090] When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape;

[0091] When all receive operations are completed, a local completion notification is sent to the sender.

[0092] Example 4

[0093] In one embodiment of the present disclosure, a transmission optimization method of a data transmission optimization system based on a receiving registration table mechanism is provided, comprising:

[0094] The sending end uses the CPU to initiate direct memory access (DMA) operation requests to form an RDMA command queue. The CDMA IP acts as a DMA engine to pull DMA operations from the RDMA command queue.

[0095] Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and segment the large data packets in the large transmission queue into small data packets;

[0096] When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transferred at the head of the queue. It uses a connectionless transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local state is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end.

[0097] After receiving the data packet of the RDMA transaction from the sending end, the receiving end checks the type field in the data packet header. If the field is the starting part of the operation, it registers the operation in the receiving registration table and records the expected address range and number of data packets of the operation;

[0098] When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape;

[0099] When all receive operations are completed, a local completion notification is sent to the sender.

[0100] Example 5

[0101] In one embodiment of the present disclosure, an electronic device is provided, comprising: a processor, a memory, and a computer program; wherein the processor is connected to the memory, and the computer program is stored in the memory. When the electronic device is running, the processor executes the computer program stored in the memory, so that the electronic device executes a transmission optimization method of a data transmission optimization system based on a receiving registry mechanism.

[0102] The present disclosure is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present disclosure. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0103] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0104] Although the above describes the specific implementation methods of the present disclosure in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present disclosure. Those skilled in the art should understand that on the basis of the technical solution of the present disclosure, various modifications or variations that can be made by those skilled in the art without creative work are still within the scope of protection of the present disclosure.

Claims

1. A data transmission optimization method based on a receiving registration table mechanism, characterized in that: Applied to the sending end, including: The CPU initiates direct memory access (DMA) operation requests to form an RDMA command queue. The CDMA IP acts as a DMA engine and pulls DMA operations from the RDMA command queue. Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and split the large data packets in the large transmission queue into small data packets; When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transferred at the head of the queue. It uses a connectionless segmentation transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local state is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end. Uses Scatter-Gather mode; special status flags remain inactive when the last command is issued; Applied to the receiving end, including: Perform registration operations in the receiving registry; when a new data packet arrives, calculate its destination address and match it with the entries in the receiving registry. If a matching entry is found, continue processing; otherwise, send the data packet to the escape channel and start the relevant timer. If the timer times out, discard the data packet and its related data; if the match is successful, calculate the mask value of the new data packet.

2. The data transmission optimization method based on the receiving registration table mechanism according to claim 1, characterized in that: DMA operation adopts the Scatter-Gather mode, which enables the DMA engine to pull data scattered in different memory areas; in the large transmission queue, large data packets will be divided into multiple small data packets for transmission, and commands that do not exceed the threshold will enter the regular queue for processing; when the DMA engine pulls a new segmented command, it only needs to update the base address offset and the number of bytes to be transferred at the head of the queue. When the last command is issued, the special status flag remains inactive, forming a local completion notification of the original complete transmission.

3. The data transmission optimization method based on the receiving registration table mechanism according to claim 1, characterized in that: The DMA engine records each newly pulled DMA operation in the DMA operation table of the network interface. The DMA operation table assigns a unique operation number to each data packet. The operation number is sent to the network with the data packet and returned when the data packet is confirmed. It is used to record the number of successfully transmitted data packets.

4. The data transmission optimization method based on the receiving registration table mechanism according to claim 3, characterized in that: The DMA operation table tracks each individual data packet and sets a timeout timer for each data packet. If no acknowledgment is received within the timeout period or a negative acknowledgment is received, a retransmission operation entry will be created in the DMA operation table.

5. The data transmission optimization method based on the receiving registration table mechanism according to claim 1, characterized in that: Applied to the receiving end, including: Receive the RDMA transaction data packet from the sender, check the type field in the packet header, and if the field is the start of the operation, register the operation in the receive registration table to record the expected address range and number of packets of the operation; When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape; When all receive operations are completed, a local completion notification is sent to the sender.

6. The data transmission optimization method based on the receiving registration table mechanism according to claim 1, characterized in that: If the mask value of the new data packet has not changed, it means it is a duplicate and the packet is discarded immediately. If the new data packet is not a duplicate, the mask value will be updated and a check will be made to see if all expected data packets have been received. If the mask shows that all bits are set, the operation is complete and a local completion notification is sent to the sender.

7. A data transmission optimization system based on a receiving registration table mechanism, adopting the data transmission optimization method based on a receiving registration table mechanism as claimed in claim 1, characterized in that: Including the sending end and the receiving end, In the transmitting end, the CPU initiates a direct memory access (DMA) operation request to form an RDMA command queue; the CDMA IP acts as a DMA engine to pull DMA operations from the RDMA command queue; Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and split the large data packets in the large transmission queue into small data packets; When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transferred at the head of the queue. It uses a connectionless segmentation transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local state is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end. In the receiving end, a data packet of the RDMA transaction from the sending end is received, and a type field in the data packet header is checked. If the field is the start part of the operation, a registration operation is performed in a receiving registration table to record the expected address range and number of data packets of the operation; When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape; When all receive operations are completed, a local completion notification is sent to the sender.

8. The data transmission optimization system based on the receiving registration table mechanism according to claim 7, characterized in that: include: The sending end uses the CPU to initiate direct memory access (DMA) operation requests to form an RDMA command queue. The CDMA IP acts as a DMA engine, pulling DMA operations from the RDMA command queue; Set a transmission threshold for RDMA commands, divide the large transmission queue and the regular queue according to the preset threshold, send RDMA commands that exceed the preset threshold to the large transmission queue, and split the large data packets in the large transmission queue into small data packets; When the DMA engine pulls a new segmentation command, it updates the base address offset and the number of bytes to be transferred at the head of the queue. It uses a connectionless segmentation transmission method to transmit the data packet to the receiving end in an unordered manner in the network. When all segmented data packets are successfully sent, the local state is updated through the DMA engine, and at the same time, a data arrival instruction is sent to the receiving end. After receiving the data packet of the RDMA transaction from the sending end, the receiving end checks the type field in the data packet header. If the field is the starting part of the operation, it registers the operation in the receiving registration table and records the expected address range and number of data packets of the operation; When a new data packet arrives, its destination address is calculated and matched with the entries in the receiving registry, and an escape channel is established. Based on the matching results of the receiving registry entries, the arriving data packet is judged and processed for escape; When all receive operations are completed, a local completion notification is sent to the sender.

9. An electronic device, characterized in that: include: A processor, a memory, and a computer program; wherein the processor is connected to the memory, the computer program is stored in the memory, and when the electronic device is running, the processor executes the computer program stored in the memory to enable the electronic device to implement the data transmission optimization method based on the receiving registry mechanism as described in any one of claims 1 to 6.

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