Display device

Abstract

A display device includes: a substrate; the pixel circuit layer is located on the substrate; and a touch sensing layer on the pixel circuit layer and including a first metal wiring, an insulating member layer on the first metal wiring, and a second metal wiring on the insulating member layer. The second metal wiring includes an opening exposing a top surface of the insulating member layer, and the opening of the second metal wiring is at a first region where the second metal wiring and the first metal wiring overlap each other in a plan view.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is based on and claims the benefit of priority of Korean Patent Application Nos. 10-2023-0120737 and 10-2024-0000488 filed on September 11, 2023 and January 2, 2024, respectively, in the Korean Intellectual Property Office, the disclosure of each of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments relate to a display device, and more particularly, to a display device capable of minimizing a dark pattern generated by a metal wiring of a touch sensing layer. Background Art

[0004] The display device receives information about an image and displays the image. The display device is used as a display of a small product such as a mobile phone or a display of a large product such as a television.

[0005] The display device includes a plurality of pixels that emit light by receiving an electrical signal to display an image to the outside. Each pixel includes a light-emitting device (or a display device). For example, an organic light-emitting display device includes an organic light-emitting diode as a light-emitting device. In an organic light-emitting display device, a thin film transistor and an organic light-emitting diode are formed on a substrate, and the organic light-emitting diode itself emits light.

[0006] The display device includes a window member, and the window member may include a transmissive region, a light shielding region covering an edge of the window member (or extending along the edge of the window member), and an adjacent region between the transmissive region and the light shielding region. Summary of the invention

[0007] One or more embodiments include a display device capable of minimizing a dark pattern generated by a metal wiring of a touch sensing layer. However, the embodiments are examples and do not limit the scope of the present disclosure.

[0008] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments.

[0009] According to an aspect of the present disclosure, a display device includes: a substrate; a pixel circuit layer located on the substrate; and a touch sensing layer located on the pixel circuit layer and including a first metal wiring, an insulating member layer located on the first metal wiring, and a second metal wiring located on the insulating member layer. The second metal wiring includes an opening that exposes a top surface of the insulating member layer, and the opening of the second metal wiring is located at a first region where the second metal wiring and the first metal wiring overlap each other in a plan view.

[0010] The second metal wiring may include: a first layer including a first metal; a second layer including the second metal and located on the first layer; and a third layer including the first metal and located on the second layer.

[0011] The inner surface of the opening may include: a first inner surface of the first layer; a second inner surface of the second layer; and a third inner surface of the third layer. The first inner surface, the second inner surface and the third inner surface are coplanar with each other to form the inner surface of the opening.

[0012] The opening may include a plurality of openings, wherein each of the plurality of openings has a circular shape or an elliptical shape in a plan view.

[0013] The touch sensing layer may further include a third metal wiring located at the same layer as the first metal wiring and having the same layer structure as the first metal wiring.

[0014] The insulating member layer may include a contact hole that passes through the insulating member layer and is located at a second region where the third metal wiring and the second metal wiring overlap each other in a plan view.

[0015] The third metal wiring is connected to the second metal wiring via a contact hole.

[0016] The second metal wiring and the third metal wiring may be configured to transmit the same signal, and the second metal wiring and the first metal wiring may be configured to transmit different signals.

[0017] The display device may further include a window member on the touch sensing layer. The window member may include a transmissive region, a light shielding pattern covering an edge of the window member, and an adjacent region between the transmissive region and the light shielding pattern.

[0018] The substrate may include a display area displaying an image and a peripheral area covered by the light shielding pattern and an adjacent area, the display area being covered by the transmission area, and the opening being located in the adjacent area in a plan view.

[0019] In a plan view, the contact holes may be located in adjacent regions.

[0020] In a plan view, a first diameter of the opening may be greater than a second diameter of the contact hole.

[0021] The openings are provided in plurality to include a plurality of openings, and the contact holes may be provided in plurality to include a plurality of contact holes, in a plan view, a first distance between two adjacent openings among the plurality of openings may be smaller than a second distance between two adjacent contact holes among the plurality of contact holes, and the first distance and the second distance may be measured in the same direction.

[0022] The first metal wiring may include: a first sub-metal wiring disposed in a peripheral region; and a second sub-metal wiring disposed in an adjacent region.

[0023] The first region may be a region where the second sub-metal wiring and the second metal wiring intersect each other in a plan view.

[0024] In a plan view, the first sub-metal wiring overlaps the light shielding pattern.

[0025] The third metal wiring may include: a 2-1 sub-layer including the first metal; a 2-2 sub-layer including the second metal and located on the 2-1 sub-layer; and a 2-3 sub-layer including the first metal and located on the 2-2 sub-layer.

[0026] The 2-3 sub-layer is connected to the second metal wiring through a contact hole.

[0027] The pixel circuit layer may include at least one light emitting device and a thin film encapsulation layer on the at least one light emitting device.

[0028] A touch sensing layer may be located on the thin film encapsulation layer.

[0029] The second metal wiring may be a ground wiring. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other aspects, features and advantages of certain embodiments will become more apparent from the following description of exemplary and non-limiting embodiments taken in conjunction with the accompanying drawings, in which:

[0031] Figure 1 is an exploded perspective view illustrating a display device according to an embodiment of the present disclosure;

[0032] Figure 2 is a diagram illustrating an embodiment according to the present disclosure Figure 1 A plan view of a display device;

[0033] Figure 3 is a diagram illustrating an embodiment according to the present disclosure Figure 1 An equivalent circuit diagram of a pixel of a display device;

[0034] Figure 4 is a diagram illustrating an embodiment according to the present disclosure Figure 1 A cross-sectional view of a pixel and its surroundings in a display device;

[0035] Figure 5 is a diagram illustrating an embodiment according to the present disclosure Figure 1 A perspective view of a touch sensing layer of a display panel;

[0036] Figure 6 is a diagram illustrating an embodiment according to the present disclosure Figure 2 a plan view of an example of a portion A;

[0037] Figure 7 According to an embodiment of the present disclosure, Figure 6 A cross-sectional view taken along line AA';

[0038] Figure 8 According to an embodiment of the present disclosure, Figure 6 A cross-sectional view taken along line AA';

[0039] Fig. 9 According to an embodiment of the present disclosure, Figure 6 A cross-sectional view taken along line BB';

[0040] Fig.10 According to an embodiment of the present disclosure, Figure 6 A cross-sectional view taken along line BB';

[0041] Figures 11 to 13 is a diagram illustrating an embodiment according to the present disclosure Figure 2 a plan view of an example of portion A of; and

[0042] Fig.14 is a diagram illustrating a display device according to a comparative example. Figure 2 Part A corresponds to a plan view of an example of a portion. DETAILED DESCRIPTION

[0043] Reference will now be made in detail to the embodiments of which examples are illustrated in the accompanying drawings, wherein the same reference numerals refer to the same elements throughout. In this regard, the current embodiment may have different forms and should not be construed as being limited to the description set forth herein. Accordingly, the embodiments are described below only by reference to the accompanying drawings to illustrate the aspects of the current description. As used herein, the term "and / or" includes any and all combinations of one or more of the related listed items. Throughout the disclosure, the expression "at least one of a, b, and c" indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0044] Since the present disclosure allows various changes and numerous embodiments, specific embodiments will be shown in the drawings and described in the detailed description. The effects and features of the present disclosure and methods for achieving them will be explained with reference to the embodiments described in detail below with reference to the drawings. However, the present disclosure is not limited to the following embodiments and can be implemented in various forms.

[0045] Hereinafter, the embodiments will be described in detail with reference to the accompanying drawings, wherein the same or corresponding elements are denoted by the same reference numerals throughout and repeated descriptions thereof are omitted.

[0046] It will be understood that when a component such as a layer, film, region or panel is referred to as being "on" another component, the component can be directly on the other component or intervening components may be present therebetween. It will be understood that when a component such as a layer, film, region or panel is referred to as being "under" another component, the component can be directly under the other component or intervening components may be present therebetween.

[0047] For ease of explanation, the size of the components in the drawings may be exaggerated or reduced. For example, because the size and thickness of the components in the drawings are arbitrarily illustrated for ease of explanation, the present disclosure is not limited thereto. That is, for ease of explanation, the size, thickness and ratio of the components in the drawings may be exaggerated and / or simplified for clarity. Accordingly, spatially relative terms such as "below", "below", "below", "below", "above", and "on" may be used to easily describe the relationship between an element or feature and another element or feature.

[0048] In the specification, it will be understood that the terms used to describe space, direction, etc. are intended to cover different directions or angles other than the space or direction shown in the drawings. For example, when the device or component in the drawings is turned over, the device described as "below" can be oriented differently (e.g., rotated 90 degrees or the opposite direction). For example, when the device or component in the drawings is turned over, the device described as "above" can be oriented differently (e.g., rotated 90 degrees or the opposite direction). Accordingly, the terms "below" and "above" can include both above and below orientations. Devices or components can be oriented differently, and the spatial relative descriptors used in this article should be interpreted accordingly.

[0049] In the specification, the process order or method order in the description of the process or manufacturing method may be different from the described order. For example, two processes described successively may be performed substantially simultaneously or in the reverse order of the described order.

[0050] In the following embodiments, the x-axis, y-axis, and z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0051] In the specification, the terms “first”, “second”, and “third” may be used to describe specific components, and the terms “first”, “second”, and “third” may be used to distinguish one component from another component.

[0052] When a component is referred to as being “connected to” or “coupled to” another component, it may be directly connected or coupled to the other component or one or more intervening components may be present therebetween.

[0053] Likewise, when one component is “electrically connected” to another component, the component and the other component may be directly electrically connected or may be indirectly electrically connected via a conductive component.

[0054] It will be understood that when a component is referred to as being “between” two components, it is the only component located between the two components, or intervening components other than the component are located between the two components.

[0055] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting of the present disclosure. Unless the context clearly indicates otherwise, the singular terms "a" and "an" used herein are intended to include the plural forms as well.

[0056] For example, the terms “includes” and “comprising” and variations thereof specify the presence of described features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0057] For example, the term "and / or" includes any and all combinations of one or more of the associated listed items. For example, the expression "A and / or B" indicates A, B, or A and B. The expression "at least one of" can be used to indicate one or more components among a plurality of components. For example, the expression "at least one of a, b, and c" or "at least one selected from the group consisting of a, b, and c" can indicate "a", "b", "c", "a, b", "b, c", "a, c", or "a, b, c".

[0058] For example, terms such as "substantially" and "approximately" and similar terms are used as terms of approximation rather than terms of degree, and may be intended to take into account the inherent deviations in measurements or calculations that would be recognized by one of ordinary skill in the art. For example, when describing embodiments, the use of the terms "may" or "can" may refer to one or more embodiments disclosed in the specification.

[0059] For example, in the specification, when a layer has the "same layer structure" as another layer, this may mean that a plurality of layers included in the layer may be included in the other layer in the same order. For example, a plurality of layers included in a layer and a plurality of layers included in another layer may include the same material and may be formed in the same order.

[0060] The electronic or electrical devices and / or other related devices or components (e.g., some of the various modules) according to the embodiments described herein can be implemented by using any suitable hardware, firmware (e.g., application specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, the various components of these devices can be formed on an integrated circuit (IC) chip or a separate IC chip. In addition, the various components of these devices can be formed on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or formed on a substrate. In addition, the various components of these devices can be processes or threads that run on one or more processors in one or more computing devices, execute computer program instructions, and interact with other system components to perform the various functions described herein.

[0061] The computer program instructions are stored in a memory that can be implemented in a computing device using a standard memory device such as a random access memory (RAM). The computer program instructions may also be stored in other non-transitory computer readable media such as CD-ROMs and flash drives. It should be appreciated by those of ordinary skill in the art that the functionality of various computing devices may be combined or integrated into a single computing device, or the functionality of a particular computing device may be distributed across one or more other computing devices, without departing from the spirit and scope of the embodiments.

[0062] Hereinafter, a display device according to an embodiment will be described in detail based on the above description.

[0063] Figure 1 is an exploded perspective view illustrating a display device according to an embodiment. Figure 2 It is a graphic Figure 1 A plan view of a display device.

[0064] like Figure 1 and Figure 2 As shown in , the display device according to the embodiment may include a display panel 10 and a window member 20 located on the display panel 10. The display device may be any device including the display panel 10. For example, the display device may be any of various devices such as a smart phone, a tablet computer, a laptop computer, a television, and a billboard. The display device according to the embodiment includes a thin film transistor and a capacitor, and the thin film transistor and the capacitor may be implemented by a conductive layer and an insulating layer.

[0065] The display panel 10 includes a display area DA and a peripheral area PA located outside the display area DA. Figure 1 In the embodiment, the display area DA may have any one of various shapes such as a circular shape, an elliptical shape, other polygonal shapes, and a specific shape.

[0066] The display area DA is a portion where an image is displayed, and a plurality of pixels PX may be located in the display area DA. Each pixel PX may include a display device such as an organic light emitting device. Each pixel PX may emit, for example, red light, green light, or blue light. The pixel PX may include a pixel circuit including a thin film transistor (TFT) and a storage capacitor. The pixel circuit may be connected to a scan line SL through which a scan signal is transmitted, a data line DL intersecting the scan line SL and through which a data signal is transmitted, and a drive voltage line PL through which a drive voltage is supplied. The data line DL and the drive voltage line PL may extend in a second direction D2, and the scan line SL may extend in a first direction D1. In an embodiment, the first direction D1 and the second direction D2 may be parallel to the direction D2 to be described later. Figure 4 The third direction D3 may intersect an upper surface of the substrate 100 , and the third direction D3 may intersect a plane defined by the first direction D1 and the second direction D2.

[0067] The pixel PX may emit light having a brightness corresponding to an electrical signal from a pixel circuit included in the pixel PX. The display area DA may display a specific image by light emitted from the pixel PX. In an embodiment, the pixel PX may be defined as an emission area that emits light of any one color of red, green, and blue.

[0068] The peripheral area PA may be a portion where no pixel PX is provided and no image is displayed. Power wiring and the like for driving the pixel PX may be located in the peripheral area PA. A pad may be located in the peripheral area PA, and an integrated circuit device such as a driver IC or a printed circuit board including a driving circuit unit and the pad may be electrically connected to each other in the peripheral area PA.

[0069] The display panel 10 may include a substrate 100 (see Figure 4 ), and the display panel 10 may include a display area DA and a peripheral area PA. The substrate 100 will be described in detail below.

[0070] A plurality of transistors may be provided in the display area DA. Among the plurality of transistors, the first terminal of the transistor may be a source electrode or a drain electrode, and the second terminal may be an electrode different from the first terminal, depending on the type (N-type or P-type) of the transistor and / or operating conditions. For example, when the first terminal is a source electrode, the second terminal may be a drain electrode.

[0071] The plurality of transistors may include a driving transistor, a data writing transistor, a compensation transistor, an initialization transistor, and an emission control transistor. The driving transistor may be connected between the driving voltage line PL and the organic light emitting device. The data writing transistor may be connected to the data line DL and the driving transistor. The data writing transistor may perform a switching operation of transmitting a data signal transmitted through the data line DL.

[0072] The compensation transistor may be turned on according to a scan signal received through the scan line SL to diode-connect the driving transistor and compensate for a threshold voltage of the driving transistor.

[0073] The initialization transistor may be turned on according to a scan signal received through the scan line SL to transmit an initialization voltage to the gate electrode of the driving transistor and initialize the gate electrode of the driving transistor. The scan line connected to the initialization transistor may be a separate scan line from the scan line connected to the compensation transistor.

[0074] The emission control transistor may be turned on according to an emission control signal received through the emission control line so that a driving current flows through the organic light emitting device.

[0075] The organic light emitting device includes a pixel electrode (e.g., an anode) and a counter electrode (e.g., a cathode), and can receive a required voltage from the pixel electrode (e.g., an anode) and the counter electrode (e.g., a cathode). The organic light emitting device can receive a driving current from a driving transistor to emit light and display an image.

[0076] The window member 20 may be divided into a transmissive area TPA and a light blocking area CGBM in a plan view defined by the first direction D1 and the second direction D2. In a plan view, the window member 20 may include the transmissive area TPA and the light blocking area CGBM.

[0077] The transmission area TPA may be an area through which light is transmitted. The light-shielding area CGBM may be an area having a transmittance lower than that of the transmission area TPA. The light-shielding area CGBM may be adjacent to the transmission area TPA. In the present embodiment, the light-shielding area CGBM may surround the transmission area TPA. However, the present disclosure is not limited thereto. In an embodiment, the light-shielding area CGBM may be adjacent to only a portion of an edge of the transmission area TPA. In an embodiment, the transmission area TPA may correspond to the display area DA. Accordingly, a user can easily view an image displayed in the display area DA through the transmission area TPA.

[0078] The shading area CGBM may be a shading pattern covering the edge of the window member 20. The shading area CGBM may be a shading pattern covering the edge of the transmission area TPA or the edge of the top surface of the transmission area TPA. In an embodiment, the shading pattern may include a black matrix or may be formed by a black matrix, and may include any of various materials that can absorb at least part of the light. For example, the shading pattern may include at least one of carbon black, graphite, chromium-based materials, dyes, metal reflective films, and light-absorbing films, or may be formed therefrom. The shading pattern may not only block or prevent the reflection of external light, but also prevent the internal reflection of light generated in the display device. In an embodiment, the shading area CGBM may extend along the edge of the window member 20 and surround the transmission area TPA. The shading area CGBM may surround the entire transmission area TPA, or may partially surround the transmission area TPA.

[0079] The light shielding pattern may further include a water-soluble salt. The water-soluble salt may be at least one of sodium, potassium, magnesium, manganese, aluminum, and calcium. The water-soluble salt included in the light shielding pattern may corrode the metal material inside the display device together with moisture permeated from the outside.

[0080] The window member 20 may further include an adjacent area ITA between the transmissive area TPA and the light blocking area CGBM in a plan view. The window member 20 may be divided into the transmissive area TPA, the adjacent area ITA, and the light blocking area CGBM in a plan view defined by the first direction D1 and the second direction D2.

[0081] The adjacent area ITA and the light shielding area CGBM may cover the peripheral area PA adjacent to the display area DA of the display panel 10. Accordingly, when a metal layer such as a wiring is located under the adjacent area ITA, there may be a problem in which external light is reflected by the metal layer such as a wiring located under the adjacent area ITA. In an embodiment, the adjacent area ITA may be transparent like the transmissive area TPA and overlap with a portion of the peripheral area PA adjacent to the display area DA.

[0082] In a plan view, the display area DA of the display panel 10 may be covered by the transmission area TPA, and the peripheral area PA of the display panel 10 may be covered by the adjacent area ITA and the light shielding area CGBM. For example, the transmission area TPA may overlap with the display area DA, and the adjacent area ITA and the light shielding area CGBM may overlap with the peripheral area PA.

[0083] In the following, an organic light-emitting display device is described as a display device according to an embodiment. The display device of the present disclosure is not limited thereto. In an embodiment, the display device of the present disclosure may be an inorganic light-emitting display device such as an inorganic electroluminescent (EL) display device or a quantum dot light-emitting display device. For example, the emission layer of the display device included in the display device may include an organic material or an inorganic material. In an embodiment, the display device may include an emission layer and quantum dots located in the path of light emitted from the emission layer.

[0084] Figure 3 It is a graphic Figure 1 An equivalent circuit diagram of a pixel of a display device.

[0085] exist Figure 3 In the description of , the same description as that made above will be omitted.

[0086] like Figure 3 As shown in FIG. 1 , each pixel PX includes a pixel circuit PC connected to a scan line SL and a data line DL and an organic light emitting device OLED connected to the pixel circuit PC.

[0087] For example, the pixel circuit PC includes a driving thin film transistor T1, a switching thin film transistor T2 and a storage capacitor Cst. The switching thin film transistor T2 is connected to the scan line SL and the data line DL, and transmits a data signal Dm input through the data line DL to the driving thin film transistor T1 according to a scan signal Sn input through the scan line SL.

[0088] For example, the storage capacitor Cst is connected to the switching thin film transistor T2 and the driving voltage line PL, and stores a voltage corresponding to a difference between a voltage received from the switching thin film transistor T2 and a first power source voltage ELVDD (or driving voltage) supplied to the driving voltage line PL.

[0089] For example, the driving thin film transistor T1 may be connected to the driving voltage line PL and the storage capacitor Cst, and may control the driving current I flowing from the driving voltage line PL through the organic light emitting device OLED in response to the value of the voltage stored in the storage capacitor Cst. OLED . Since the driving current I OLED , the organic light emitting device OLED can emit light with a specific brightness. For example, the driving current I OLED The organic light emitting device OLED can emit light with a driving current I OLED The corresponding brightness of the light.

[0090] The organic light emitting device OLED may receive a second power supply voltage ELVSS (or a common voltage). For example, the organic light emitting device OLED may receive the second power supply voltage ELVSS (or a common voltage) through a counter electrode (e.g., a cathode), and the organic light emitting device OLED may emit a driving current I having a current driven according to a voltage difference between the first power supply voltage ELVDD (or a driving voltage) and the second power supply voltage ELVSS (or a common voltage). OLED Corresponding to a specific brightness of light.

[0091] exist Figure 3 In the embodiment, the pixel circuit PC includes two thin film transistors and one storage capacitor. However, the present disclosure is not limited thereto. For example, the pixel circuit PC may include two or more storage capacitors and may include three or more thin film transistors.

[0092] Figure 4 It is a graphic Figure 1 A cross-sectional view of a pixel and its surroundings in a display device.

[0093] exist Figure 4 In the description of , the same description as that made above will be omitted.

[0094] like Figure 4 As shown in , the display device according to the embodiment may include a substrate 100, a pixel circuit layer PCL located on the substrate 100, and a touch sensing layer YTL located on the pixel circuit layer PCL. The substrate 100 may include an area corresponding to the display area DA and the peripheral area PA outside the display area DA as described above. The substrate 100 may include any one of various flexible or bendable materials, or may be formed thereof. For example, the substrate 100 may include glass, metal or a polymer resin, or may be formed thereof. In an embodiment, the substrate 100 may include a polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate and cellulose acetate propionate. However, various modifications may be made. For example, the substrate 100 may have a multilayer structure including two layers each containing a polymer resin and a barrier layer containing an inorganic material (e.g., silicon oxide, silicon nitride or silicon oxynitride) and located between the two layers.

[0095] The buffer layer 101 may be located on the substrate 100. The buffer layer 101 may function as a barrier layer and / or a stopper layer for preventing diffusion of impurity ions, preventing penetration of moisture or external air, and providing a planarized surface. The buffer layer 101 may include silicon oxide, silicon nitride, or silicon oxynitride, or may be formed thereof. The buffer layer 101 may adjust a heat supply speed during a crystallization process for forming the semiconductor layer 110 so that the semiconductor layer 110 is uniformly crystallized.

[0096] The semiconductor layer 110 may be located on the buffer layer 101. The semiconductor layer 110 may be formed of polycrystalline silicon and may include a channel region not doped with impurities and a source region and a drain region formed by doping impurities on opposite sides of the channel region. The impurities may vary depending on the type of the thin film transistor and may be N-type impurities or P-type impurities.

[0097] The gate insulating film 102 may be located on the semiconductor layer 110. The gate insulating film 102 may be an element for ensuring insulation between the semiconductor layer 110 and the gate layer. The gate insulating film 102 may include an inorganic material such as silicon oxide, silicon nitride and / or silicon oxynitride, and may be located between the semiconductor layer 110 and the gate layer. The gate insulating film 102 may be formed to correspond to the entire surface of the substrate 100, and may have a structure in which a contact hole is formed in a preset portion. Such an insulating film including an inorganic material may be formed by using chemical vapor deposition (CVD) or atomic layer deposition (ALD). This applies to the following embodiments and modifications thereof.

[0098] The first gate layer 120a may be located on the gate insulating film 102. The first gate layer 120a may vertically overlap the semiconductor layer 110, and may include or be formed of at least one metal among molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), titanium (Ti), tungsten (W), and copper (Cu).

[0099] The first interlayer insulating film 103a may be located on the first gate layer 120a. The first interlayer insulating film 103a may cover the first gate layer 120a. The first interlayer insulating film 103a may include an inorganic material, or may be formed thereof. For example, the first interlayer insulating film 103a may be formed of a metal oxide or a metal nitride. The inorganic material may include silicon oxide (SiO x ), Silicon Nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zirconium oxide (ZrO 2 In an embodiment, the first interlayer insulating film 103a may include SiO x / SiN y or SiN x / SiO y Double structure or double layer.

[0100] The second gate layer 120b may be located on the first interlayer insulating film 103a. The second gate layer 120b may vertically overlap the first gate layer 120a, and may include or be formed of at least one metal among molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), titanium (Ti), tungsten (W), and copper (Cu).

[0101] The second gate layer 120b and the first gate layer 120a may be formed as shown in FIG. Figure 3 The first gate layer 120a may be one electrode of the storage capacitor Cst, and the second gate layer 120b may be the other electrode of the storage capacitor Cst.

[0102] The area of ​​the second gate layer 120b may be greater than that of the first gate layer 120a when viewed in a direction perpendicular to the substrate 100. In an embodiment, the second gate layer 120b may cover the first gate layer 120a when viewed in a direction perpendicular to the substrate 100.

[0103] The second interlayer insulating film 103b may be located on the second gate layer 120b. The second interlayer insulating film 103b may cover the second gate layer 120b. The second interlayer insulating film 103b may include an inorganic material, or may be formed thereof. For example, the second interlayer insulating film 103b may be formed of a metal oxide or a metal nitride. The inorganic material may include silicon oxide (SiO x ), Silicon Nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zirconium oxide (ZrO 2 In an embodiment, the second interlayer insulating film 103b may include SiOx / SiN y or SiN x / SiO y Double structure or double layer.

[0104] The first conductive layer 130 may be located on the second interlayer insulating film 103b. The first conductive layer 130 may function as an electrode connected to the source / drain region of the semiconductor layer 110 through a through hole formed in the second interlayer insulating film 103b, the first interlayer insulating film 103a, and the gate insulating film 102. The first conductive layer 130 may include or be formed of at least one metal selected from aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu). For example, the first conductive layer 130 may include or may be a Ti layer, an Al layer, and / or a Cu layer.

[0105] The first organic insulating layer 104 may be located on the first conductive layer 130. The first organic insulating layer 104 may cover the upper portion of the first conductive layer 130 and may have a substantially flat top surface. The first organic insulating layer 104 as a planarization film may provide a planarized surface for forming a second organic insulating layer 105 to be described below. The first organic insulating layer 104 may include, for example, an organic material such as acrylic acid, benzocyclobutene (BCB) and hexamethyldisiloxane (HMDSO), or may be formed thereof, for example. Various modifications may be made. For example, the first organic insulating layer 104 may have a single-layer or multi-layer structure. In an embodiment, the first organic insulating layer 104 may contact the second interlayer insulating film 103b.

[0106] The second conductive layer 140 may be located on the first organic insulating layer 104. The second conductive layer 140 may function as an electrode connected to the first conductive layer 130 through a through hole formed in the first organic insulating layer 104. The second conductive layer 140 may include or be formed of at least one metal selected from aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu). In an embodiment, the second conductive layer 140 may include or may be a Ti layer, an Al layer, and / or a Cu layer.

[0107] The second organic insulating layer 105 may be located on the second conductive layer 140. The second organic insulating layer 105 may cover the upper portion of the second conductive layer 140 and may have a substantially flat top surface. The second organic insulating layer 105 as a planarization film may provide a planarized surface for forming a pixel defining film 106 to be described below. The second organic insulating layer 105 may include, for example, an organic material such as acrylic acid, benzocyclobutene (BCB) and hexamethyldisiloxane (HMDSO), or may be formed thereof, for example. Various modifications may be made. For example, the second organic insulating layer 105 may have a single-layer or multi-layer structure.

[0108] The organic layer OL may include a first organic insulating layer 104 and a second organic insulating layer 105. In an embodiment, the organic insulating layer OL may further include an additional insulating layer as described below.

[0109] Although not in Figure 4 , but the additional conductive layer and the additional insulating layer may be located between the conductive layer and the pixel electrode and may be applied in various embodiments. For example, the additional conductive layer and the conductive layer may include the same material and may have the same layer structure. The additional insulating layer and the organic insulating layer may include the same material and have the same layer structure.

[0110] The pixel electrode 150 may be located on the second organic insulating layer 105. The pixel electrode 150 may be connected to the second conductive layer 140 through a contact hole formed in the second organic insulating layer 105. The light emitting layer may be located on the pixel electrode 150. In order to form an organic light emitting device OLED, the light emitting layer may be located on the pixel electrode 150, for example. The pixel electrode 150 may include a material such as ITO, In 2 O 3 The pixel electrode 150 may include a light-transmitting conductive layer formed of a light-transmitting conductive oxide such as ITO and IZO, and a reflective layer formed of a metal such as Al and Ag. For example, the pixel electrode 150 may have a triple-layer structure including ITO / Ag / ITO.

[0111] The pixel defining film 106 may be located on the second organic insulating layer 105 to cover the edge of the pixel electrode 150. The pixel defining film 106 may cover the edge of the pixel electrode 150. The pixel defining film 106 may have a pixel opening POP corresponding to the pixel PX, and at least the central portion of the pixel electrode 150 may be exposed through the pixel opening POP. The pixel defining film 106 may include an organic material such as polyimide and hexamethyldisiloxane (HMDSO), or may be formed thereof. In an embodiment, a spacer (not shown) may be located on the pixel defining film 106.

[0112] The intermediate layer 160 and the counter electrode 170 may be located in the pixel opening POP of the pixel defining film 106. The intermediate layer 160 may include a low molecular weight material or a high molecular weight material. When the intermediate layer 160 includes a low molecular weight material, the intermediate layer 160 may include a hole injection layer, a hole transport layer, an emission layer, an electron transport layer and / or an electron injection layer. When the intermediate layer 160 includes a high molecular weight material, the intermediate layer 160 may have a structure including a hole transport layer and an emission layer. The intermediate layer 160 may correspond to the light emitting layer as described above.

[0113] The counter electrode 170 may include a material such as ITO, In 2 O 3 The pixel electrode 150 is used as an anode, and the counter electrode 170 is used as a cathode. The polarity of the electrodes may be reversed.

[0114] The structure of the intermediate layer 160 is not limited thereto and may be any of a variety of structures. For example, at least one of the layers constituting the intermediate layer 160 may be formed integrally with the counter electrode 170. In another embodiment, the intermediate layer 160 may include a layer patterned to correspond to each of the plurality of pixel electrodes 150.

[0115] The counter electrode 170 may be located in the display area DA and may be placed throughout the entire display area DA. The counter electrode 170 may be formed integrally to cover a plurality of pixels. The counter electrode 170 may be in electrical contact with a common power line (not shown) located in the peripheral area PA. In an embodiment, the counter electrode 170 may extend to the barrier wall. The thin film encapsulation layer TFE may cover the entire display area DA and may extend to the peripheral area PA to cover at least a portion of the peripheral area PA.

[0116] The thin film encapsulation layer TFE may extend to the outside of the common power line (not shown). The thin film encapsulation layer TFE may include a first inorganic encapsulation layer 310, a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 located between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330. Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic material among aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride, or may be formed thereof.

[0117] Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may have a single-layer or multi-layer structure including the above-mentioned materials. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include the same material or different materials, or may be formed of the same material or different materials. The thicknesses of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be different from each other. The thickness of the first inorganic encapsulation layer 310 may be greater than the thickness of the second inorganic encapsulation layer 330. Alternatively, the thickness of the second inorganic encapsulation layer 330 may be greater than the thickness of the first inorganic encapsulation layer 310, or the thicknesses of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be the same.

[0118] The organic encapsulation layer 320 may include a monomeric material or a polymeric material, or may be formed of a monomeric material or a polymeric material. Examples of polymeric materials may include acrylic resin, epoxy resin, polyimide, or polyethylene. In an embodiment, the organic encapsulation layer 320 may include acrylate, or may be formed of it.

[0119] The touch sensing layer YTL may be located on the thin film encapsulation layer TFE or the second inorganic encapsulation layer 330. The touch sensing layer YTL may have a multi-layer structure. The touch sensing layer YTL includes a sensing electrode, a sensing signal line (trace) connected to the sensing electrode, and at least one insulating layer. The touch sensing layer YTL may detect an external input by using, for example, a capacitive method. The operating method of the touch sensing layer YTL is not particularly limited to the capacitive method, and in some embodiments, the touch sensing layer YTL may detect an external input by using an electromagnetic induction method or a pressure sensing method.

[0120] The touch sensing layer YTL may include a first touch insulating layer 410 , a first touch conductive layer MTL1 , a second touch insulating layer 420 , a second touch conductive layer MTL2 , and a third touch insulating layer 430 .

[0121] The first touch insulating layer 410 may be located on the thin film encapsulation layer TFE. The first touch insulating layer 410 may include an inorganic material or an organic material, or may be formed thereof, and may have a single layer or multilayer structure. The organic material may include at least one material selected from the group consisting of acrylic resins such as methacrylic resins, polyisoprene, vinyl resins, epoxy resins, urethane resins, cellulose resins, and perylene resins. The inorganic material may include at least one material selected from the group consisting of silicon nitride (SiN x ), aluminum nitride (AlN), zirconium nitride (ZrN), titanium nitride (TiN), hafnium nitride (HfN), tantalum nitride (TaN), silicon oxide (SiO x ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2), tin oxide (SnO 2 ), cerium oxide (CeO 2 ) and silicon oxynitride (SiO x N y ) is selected from the group consisting of at least one material.

[0122] The first touch insulating layer 410 may prevent damage to the thin film encapsulation layer TFE, and may block interference signals that may be generated when the touch sensing layer YTL is driven.

[0123] Each of the first touch conductive layer MTL1 and the second touch conductive layer MTL2 may have a single-layer structure or a stacked multi-layer structure. The conductive layer having a single-layer structure may be a metal layer or a transparent conductive layer. The metal layer may include molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al) or an alloy thereof. The transparent conductive layer may include transparent conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO) and indium tin zinc oxide (ITZO). The transparent conductive layer may include conductive polymers such as PEDOT, metal nanowires, and graphene.

[0124] The conductive layer having a multi-layer structure may include a plurality of metal layers. The plurality of metal layers may have a three-layer structure of, for example, Ti / Al / Ti. The conductive layer having a multi-layer structure may include at least one metal layer and at least one transparent conductive layer.

[0125] Each of the first touch conductive layer MTL1 and the second touch conductive layer MTL2 includes a plurality of patterns. The first touch conductive layer MTL1 may include a first conductive pattern, and the second touch conductive layer MTL2 may include a second conductive pattern. The first conductive pattern and the second conductive pattern may form a sensing electrode.

[0126] The first touch conductive layer MTL1 and the second touch conductive layer MTL2 may be electrically connected through a contact hole. In an embodiment, each of the first touch conductive layer MTL1 and the second touch conductive layer MTL2 may have a mesh structure through which light emitted from a lower light emitting material such as the intermediate layer 160 may pass. In an embodiment, the first touch conductive layer MTL1 and the second touch conductive layer MTL2 may be placed so as not to overlap with a pattern printed with a light emitting material in a plan view.

[0127] The second touch insulating layer 420 may include an organic material or may be formed thereof. The organic material may include at least one material selected from the group consisting of acrylic resin such as methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, and perylene resin. The second touch insulating layer 420 may include an inorganic material. The inorganic material may include a material selected from the group consisting of silicon nitride (SiN x), aluminum nitride (AlN), zirconium nitride (ZrN), titanium nitride (TiN), hafnium nitride (HfN), tantalum nitride (TaN), silicon oxide (SiO x ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), tin oxide (SnO 2 ), cerium oxide (CeO 2 ) and silicon oxynitride (SiO x N y ) is selected from the group consisting of at least one material.

[0128] The third touch insulating layer 430 may be located on the second touch conductive layer MTL2. The third touch insulating layer 430 may have a single layer or a multi-layer structure. The third touch insulating layer 430 may include an organic material, an inorganic material, or a composite material, or may be formed thereof. The inorganic material may include a material selected from silicon nitride (SiN x ), aluminum nitride (AlN), zirconium nitride (ZrN), titanium nitride (TiN), hafnium nitride (HfN), tantalum nitride (TaN), silicon oxide (SiO x ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), tin oxide (SnO 2 ), cerium oxide (CeO 2 ) and silicon oxynitride (SiO x N y The organic material may include at least one material selected from the group consisting of acrylic resins such as methacrylic resins, polyisoprene, vinyl resins, epoxy resins, urethane resins, cellulose resins, and perylene resins.

[0129] A color filter layer or the like for improving light extraction efficiency of the organic light emitting device OLED may be further disposed on the touch sensing layer YTL.

[0130] Figure 5 It is a graphic Figure 1 A perspective view of the touch sensing layer of a display panel.

[0131] exist Figure 5 In the description of , the same description as that made above will be omitted.

[0132] The touch sensing layer YTL is located on the thin film encapsulation layer TFE. The touch sensing layer YTL can detect external input (e.g., a user's touch) and can obtain position or intensity information of the external input. The touch sensing layer YTL may include a plurality of sensing lines (e.g., SL1 and SL2) and a plurality of sensing pads PDT.

[0133] The touch sensing layer YTL may include a sensing area SA and a non-sensing area NSA. The sensing area SA may be an area where an external input may be detected. The sensing area SA may overlap with the display area DA. In an embodiment, the active area may be an area including the sensing area SA and the display area DA.

[0134] The non-sensing area NSA is adjacent to the sensing area SA. The non-sensing area NSA may surround an edge of the sensing area SA. However, the present disclosure is not limited thereto. In an embodiment, the non-sensing area NSA may be adjacent to only a portion of an edge of the sensing area SA, or may be omitted.

[0135] The sensing electrode SS is located in the sensing area SA. The sensing electrode SS may include a first sensing electrode SP1 and a second sensing electrode SP2 that receive different electrical signals. The sensing electrode SS may obtain information about an external input through a capacitance change between the first sensing electrode SP1 and the second sensing electrode SP2.

[0136] The first sensing electrode SP1 extends along the first direction D1. A plurality of first sensing electrodes SP1 may be provided and may be arranged along the second direction D2 to be spaced apart from each other. The second sensing electrode SP2 extends along the second direction D2. A plurality of second sensing electrodes SP2 may be provided and may be arranged along the first direction D1 to be spaced apart from each other.

[0137] The sensing lines (e.g., SL1 and SL2) and the sensing pads PDT are located in the non-sensing area NSA. The sensing pads PDT are connected to the sensing lines (e.g., SL1 and SL2), respectively. The sensing lines (e.g., SL1 and SL2) include a first sensing line SL1 and a second sensing line SL2. The first sensing line SL1 connects the first sensing electrode SP1 to the sensing pad PDT to transmit an electrical signal provided from the outside to the first sensing electrode SP1 through the sensing pad PDT. The second sensing line SL2 connects the second sensing electrode SP2 to the sensing pad PDT to transmit an electrical signal provided from the outside to the second sensing electrode SP2 through the sensing pad PDT. The sensing pads PDT in the non-sensing area NSA may be electrically connected to other pads (not shown) of the display panel 10.

[0138] Figure 6 It is a graphic Figure 2 An example plan view of portion A.

[0139] exist Figure 6 In the description of , the same description as that made above will be omitted.

[0140] like Figure 6As shown in FIG. 1 , a portion of the transmission area TPA, a portion of the adjacent area ITA, and a portion of the light blocking area CGBM of the window member 20 may be placed in portion A. A portion of the display area DA and a portion of the peripheral area PA may be placed in portion A.

[0141] The touch sensing layer YTL may include a first metal wiring CTL1, a second touch insulating layer 420 located on the first metal wiring CTL1, and a second metal wiring CTL2 located on the second touch insulating layer 420. In portion A, the first metal wiring CTL1 and the second metal wiring CTL2 may be placed. The first metal wiring CTL1 may extend in one direction. The second metal wiring CTL2 may be located on the first metal wiring CTL1 and may extend in another direction. In a plan view, the one direction and the other direction may intersect each other. For example, the one direction may be the second direction D2, and the other direction may be the first direction D1.

[0142] In an embodiment, the first metal wiring CTL1 may include a first sub-metal wiring S-CTL1 and a second sub-metal wiring S-CTL2 connected to the first sub-metal wiring S-CTL1. For example, a portion of the first metal wiring CTL1 may be the first sub-metal wiring S-CTL1. The first sub-metal wiring S-CTL1 may extend in the one direction (e.g., the second direction D2) in the light shielding region CGBM.

[0143] Another portion of the first metal wiring CTL1 may be a second sub-metal wiring S-CTL2. The second sub-metal wiring S-CTL2 may extend from the first sub-metal wiring S-CTL1 in the other direction (e.g., the first direction D1). The second sub-metal wiring S-CTL2 may extend from the light shielding area CGBM through the adjacent area ITA toward the transmission area TPA.

[0144] In an embodiment, the second metal wiring CTL2 may include a plurality of openings OPA.

[0145] For example, the first metal wiring CTL1 may be a touch wiring, and the second metal wiring CTL2 may be a ground wiring. Because the second metal wiring CTL2 is a ground wiring, in some cases, the width of the second metal wiring CTL2 may be greater than the width of the first metal wiring CTL1.

[0146] In an embodiment, the first metal wiring CTL1 and the first touch conductive layer MTL1 may be located at the same layer and may have the same layer structure. In an embodiment, the first metal wiring CTL1 and the first touch conductive layer MTL1 may be formed of the same metal layer. In an embodiment, referring to the upper surface of the substrate 100, the first metal wiring CTL1 and the first touch conductive layer MTL1 may be formed at the same height. In an embodiment, the second metal wiring CTL2 and the second touch conductive layer MTL2 may be located at the same layer and may have the same layer structure. In an embodiment, the second metal wiring CTL2 and the second touch conductive layer MTL2 may be formed of the same metal layer. In an embodiment, referring to the upper surface of the substrate 100, the second metal wiring CTL2 and the second touch conductive layer MTL2 may be formed at the same height.

[0147] The touch sensing layer YTL may further include a third metal wiring CTL3 located at the same layer as the first metal wiring CTL1 and having the same layer structure as the first metal wiring CTL1. In an embodiment, the third metal wiring CTL3 and the first metal wiring CTL1 may be formed of the same metal layer. In an embodiment, with reference to the upper surface of the substrate 100, the third metal wiring CTL3 and the first metal wiring CTL1 may be formed at the same height.

[0148] The second touch insulating layer 420 may also be referred to as an insulating member layer 420. The insulating member layer 420 may include a contact hole CTH passing through the insulating member layer 420. The contact hole CTH may be located in an overlapping region (i.e., a second region) where the third metal wiring CTL3 and the second metal wiring CTL2 overlap each other in a plan view. The contact hole CTH may be located in an adjacent region ITA. The third metal wiring CTL3 and the second metal wiring CTL2 may be in direct contact with each other through the contact hole CTH. In an embodiment, the third metal wiring CTL3 may be connected to the second metal wiring CTL2 through the contact hole CTH. For example, the conductive material filling the contact hole CTH may connect the third metal wiring CTL3 to the second metal wiring CTL2. The insulating member layer 420 may be one of the touch insulating layers. For example, the insulating member layer 420 may be a second touch insulating layer 420.

[0149] For example, the second metal wiring CTL2 and the third metal wiring CTL3 may transmit the same signal, and the second metal wiring CTL2 and the first metal wiring CTL1 may transmit different signals.

[0150] For example, the third metal wiring CTL3 and the first touch conductive layer MTL1 may be located at the same layer and may have the same layer structure. In an embodiment, the third metal wiring CTL3 and the first touch conductive layer MLT1 may be formed of the same metal layer. In an embodiment, with reference to the upper surface of the substrate 100, the third metal wiring CTL3 and the first touch conductive layer MLT1 may be formed at the same height.

[0151] Figure 7 It is along Figure 6 A cross-sectional view taken along line AA'.

[0152] exist Figure 7 In the description of , the same description as that made above will be omitted. Figure 6 The portion located in the adjacent area ITA is shown. Figure 7 The cross-sectional view of FIG. 1 shows an opening OPA located in an adjacent area ITA. Figure 7 The window member 20 is not shown in the cross-sectional view of FIG.

[0153] like Figure 7 As shown in , the display device according to the embodiment may include a substrate 100 , a pixel circuit layer PCL located on the substrate 100 , and a touch sensing layer YTL located on the pixel circuit layer PCL.

[0154] In the adjacent area ITA, the touch sensing layer YTL may include a first metal wiring CTL1 extending in one direction, an insulating member layer 420 located on the first metal wiring CTL1 , and a second metal wiring CTL2 located on the insulating member layer 420 and extending in another direction.

[0155] The second metal wiring CTL2 may include an opening OPA through which the top surface of the insulating member layer 420 is exposed upward. The opening OPA may be provided in plurality, and the second metal wiring CTL2 may include a plurality of openings OPA. The opening OPA may be located at an intersection region (i.e., a first region) where the second metal wiring CTL2 and the first metal wiring CTL1 intersect each other in a plan view. For example, the intersection region may be a region where the second sub-metal wiring S-CTL2 and the second metal wiring CTL2 intersect each other in a plan view.

[0156] In an embodiment, the opening OPA may be located at an intersection area where the first metal wiring CTL1 and the second metal wiring CTL2 intersect each other in the adjacent area ITA. When a user views the display device, the adjacent area ITA may be easily observed by the user as a relatively dark color due to the metal wiring located in the adjacent area ITA. In order to prevent this, a contact hole CTH as described below may be formed in the top surface of the second metal wiring CTL2 located in the adjacent area ITA. However, because the contact hole CTH forms an electrical contact between the vertically arranged metal wirings, the contact hole CTH can be applied only when the signals transmitted through the vertically arranged metal wirings are the same signal. Accordingly, when the signals transmitted through the vertically arranged metal wirings are different signals, it is preferred to use the opening OPA instead of the contact hole CTH.

[0157] There may be a plurality of opening OPAs, and, for example, each of the plurality of opening OPAs may have a circular shape and / or an elliptical shape in a plan view. Each of the plurality of opening OPAs may have any of various shapes in a plan view. However, considering the difficulty of the pattern forming process, the shape of each of the plurality of opening OPAs may be a circular shape and / or an elliptical shape in a plan view.

[0158] like Figure 7 As shown in , external light can be reflected from the inner surface of the opening OPA. Accordingly, due to the opening OPA, the adjacent area ITA can be brighter.

[0159] Figure 8 It is along Figure 6 A cross-sectional view taken along line AA'.

[0160] exist Figure 8 In the description of , the same description as that made above will be omitted. Figure 6 shows the portion located in the adjacent area ITA, and Figure 8 The cross-sectional view of FIG. 1 shows an opening OPA located in an adjacent area ITA. Figure 8 The window member 20 is not shown in the cross-sectional view of FIG.

[0161] like Figure 8 As shown in , the second metal wiring CTL2 may include a first layer CTS2a including a first metal, a second layer CTS2b including a second metal and located on the first layer CTS2a, and a third layer CTS2c including the first metal and located on the second layer CTS2b. For example, the second metal wiring CTL2 may have three layers, and the first metal may be Ti and the second metal may be Al.

[0162] The second metal wiring CTL2 may include an opening OPA, and each of the first layer CTS2a, the second layer CTS2b, and the third layer CTS2c may include a sub-opening. The inner surfaces of the sub-openings of the first layer CTS2a, the second layer CTS2b, and the third layer CTS2c may be a continuous surface, and the sub-openings of the first layer CTS2a, the second layer CTS2b, and the third layer CTS2c may form one opening OPA.

[0163] The inner surface of the opening OPA may include one side surface of the first layer CTS2a, one side surface of the second layer CTS2b located on the one side surface of the first layer CTS2a, and one side surface of the third layer CTS2c located on the one side surface of the second layer CTS2b. For example, one side surface of the first layer CTS2a, one side surface of the second layer CTS2b, and one side surface of the third layer CTS2c may form a continuous surface.

[0164] The first metal wiring CTL1 may include a 1-1 sublayer CTS1a including a first metal, a 1-2 sublayer CTS1b including a second metal and located on the 1-1 sublayer CTS1a, and a 1-3 sublayer CTS1c including the first metal and located on the 1-2 sublayer CTS1b. For example, the first metal wiring CTL1 may have three layers, and the first metal may be Ti and the second metal may be Al.

[0165] Fig. 9 It is along Figure 6 A cross-sectional view taken along line BB'.

[0166] exist Fig. 9 In the description of , the same description as that made above will be omitted. Figure 6 The portion located in the adjacent area ITA is shown. Fig. 9 The cross-sectional view of FIG. 1 shows the contact hole CTH located in the adjacent area ITA. Fig. 9 The window member 20 is omitted in the cross-sectional view of FIG.

[0167] like Fig. 9 As shown in , the insulating member layer 420 may include a contact hole CTH passing through the insulating member layer 420. The contact hole CTH may be located in a region where the third metal wiring CTL3 and the second metal wiring CTL2 overlap each other in a plan view. For example, the third metal wiring CTL3 and the second metal wiring CTL2 may directly contact each other through the contact hole CTH.

[0168] The second metal wiring CTL2 and the third metal wiring CTL3 can transmit the same signal, and the second metal wiring CTL2 and the first metal wiring CTL1 can transmit different signals. Because the metal wirings are in contact with each other through the contact hole CTH, the metal wirings in the area where the contact hole CTH is set need to be wirings that transmit the same signal. Wirings that transmit different signals cannot be connected to each other using the contact hole CTH. In a plan view, the contact hole CTH can be located in the adjacent area ITA.

[0169] Fig.10 It is along Figure 6 A cross-sectional view taken along line BB'.

[0170] exist Fig.10 In the description of , the same description as that made above will be omitted. Figure 6 The portion located in the adjacent area ITA is shown. Fig.10 The cross-sectional view of FIG. 1 shows the contact hole CTH located in the adjacent area ITA. Fig.10 The window member 20 is not shown in the cross-sectional view of FIG.

[0171] like Fig.10 As shown in , the third metal wiring CTL3 may include a 2-1 sublayer CTS3a including a first metal, a 2-2 sublayer CTS3b including a second metal and located on the 2-1 sublayer CTS3a, and a 2-3 sublayer CTS3c including the first metal and located on the 2-2 sublayer CTS3b. For example, the third metal wiring CTL3 may have three layers, and the first metal may be Ti and the second metal may be Al.

[0172] The 2-3 sub-layer CTS3c and the second metal wiring CTL2 may directly contact each other through the contact hole CTH. The 2-3 sub-layer CTS3c and the first layer CTS2a of the second metal wiring CTL2 may directly contact each other through the contact hole CTH.

[0173] Figures 11 to 13 It is a graphic Figure 2 An example plan view of portion A.

[0174] exist Figures 11 to 13 In the description of , the same description as that made above will be omitted.

[0175] like Fig.11 As shown in , in a plan view, the diameter S2 of the contact hole CTH may be smaller than the diameter S1 of the opening OPA. In a plan view, the diameter S1 of the opening OPA may be larger than the diameter S2 of the contact hole CTH.

[0176] The area of ​​the inner surface of the contact hole CTH may be greater than the area of ​​the inner surface of the opening OPA. Accordingly, in order to match the amount of reflection of external light, in a plan view, the diameter S1 of the opening OPA may be greater than the diameter S2 of the contact hole CTH. This is because, as the diameter increases, the area of ​​the inner surface also increases.

[0177] like Fig.12 As shown in , in a plan view, the distance DS2 between the contact holes CTH may be greater than the distance DS1 between the openings OPA. In a plan view, the distance DS1 between the openings OPA may be less than the distance DS2 between the contact holes CTH.

[0178] The distance DS2 between the contact holes CTH and the distance DS1 between the openings OPA may be measured in the same direction. For example, the distance DS2 between the contact holes CTH may be the distance in the second direction D2. The distance DS1 between the openings OPA may also be the distance in the second direction D2.

[0179] The area of ​​the inner surface of the contact hole CTH may be greater than the area of ​​the inner surface of the opening OPA. Accordingly, in order to match the amount of reflection of external light, in a plan view, the distance DS2 between the contact holes CTH may be greater than the distance DS1 between the openings OPA. As the distance decreases in a plan view, the density of the contact holes CTH or the openings OPA may increase. This is because, as the density of the contact holes CTH or the openings OPA increases, more external light is reflected.

[0180] like Fig.13 As shown in , in a plan view, the contact hole CTH and / or the opening OPA may have an elliptical shape. Fig.11 and Fig.12 In the plan view, the contact hole CTH and / or the opening OPA may have a circular shape. Therefore, in the plan view, the contact hole CTH and / or the opening OPA may have any one of various shapes.

[0181] Fig.14 is a diagram illustrating a display device according to a comparative example. Figure 2 Part A corresponds to a plan view of an example of a portion.

[0182] exist Fig.14 In the description of , the same description as that made above will be omitted.

[0183] like Fig.14As shown in , the display device according to the comparative example may include only the contact hole CTH. As described above, the contact hole CTH may be located only in the region where the second metal wiring CTL2 and the third metal wiring CTL3 overlap each other in the adjacent area ITA. The contact hole CTH may not be located in the region where the second metal wiring CTL2 and the first metal wiring CTL1 intersect each other in the adjacent area ITA.

[0184] Accordingly, when a user views the display device, a portion of the adjacent area ITA where the contact hole CTH is not provided may be darker than other portions, which may adversely affect the display quality perceived by the user.

[0185] Although some embodiments have been described, it will be understood by those of ordinary skill in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the present disclosure. Unless otherwise described, the description of features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Accordingly, as will be apparent to those of ordinary skill in the art, features or components described with respect to a particular embodiment may be combined with features or components described with respect to other embodiments. Therefore, the foregoing should not be construed as being limited to the specific embodiments disclosed herein, but should be understood as being intended to be combined with or applied to other embodiments. Accordingly, the true technical scope of the present disclosure should be limited by the technical spirit of the appended claims.

[0186] According to the embodiments described above, a display device that minimizes dark patterns generated by metal wirings of a touch sensing layer may be provided. However, the scope of the present disclosure is not limited to this effect.

[0187] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for the purpose of limitation. The description of features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims.

Claims

1. A display device, comprising: substrate; A pixel circuit layer, located on the substrate; as well as a touch sensing layer, located on the pixel circuit layer, and comprising a first metal wiring, an insulating member layer located on the first metal wiring, and a second metal wiring located on the insulating member layer, wherein the second metal wiring includes an opening exposing a top surface of the insulating member layer, and The opening of the second metal wiring is located at a first region where the second metal wiring and the first metal wiring overlap each other in a plan view.

2. The display device according to claim 1, in, The second metal wiring includes: a first layer including a first metal; a second layer including a second metal and disposed on the first layer; and The third layer includes the first metal and is located on the second layer.

3. The display device according to claim 2, in, The inner surface of the opening comprises: a first inner surface of the first layer; a second inner surface of the second layer; and a third inner surface of the third layer, and The first inner surface, the second inner surface and the third inner surface are coplanar with each other to form the inner surface of the opening.

4. The display device according to claim 1, in, The opening is provided in plurality to include a plurality of openings, and Wherein, each of the plurality of openings has a circular shape or an elliptical shape in the plan view.

5. The display device according to claim 1, in, The touch sensing layer further comprises: The third metal wiring is located at the same layer as the first metal wiring and has the same layer structure as the first metal wiring.

6. The display device according to claim 5, in, The insulating member layer includes a contact hole that passes through the insulating member layer and is located at a second region where the third metal wiring and the second metal wiring overlap each other in the plan view.

7. The display device according to claim 6, in, The third metal wiring is connected to the second metal wiring via the contact hole.

8. The display device according to claim 6, in, The second metal wiring and the third metal wiring are configured to transmit the same signal, and The second metal wiring and the first metal wiring are configured to transmit different signals.

9. The display device according to claim 6, further comprising: a window member, located on the touch sensing layer, The window member includes a transmission area, a light shielding pattern covering an edge of the window member, and an adjacent area between the transmission area and the light shielding pattern.

10. The display device according to claim 9, in, The substrate includes a display area for displaying an image and a peripheral area covered by the light shielding pattern and the adjacent area. wherein the display area is covered by the transmission area, and Wherein, in the plan view, the opening is located in the adjacent area.

11. The display device according to claim 10, in, In the plan view, the contact hole is located in the adjacent region.

12. The display device according to claim 6, in, In the plan view, a first diameter of the opening is greater than a second diameter of the contact hole.

13. The display device according to claim 6, in, The opening is provided in plurality to include a plurality of openings, and the contact hole is provided in plurality to include a plurality of contact holes, wherein, in the plan view, a first distance between two adjacent openings among the plurality of openings is smaller than a second distance between two adjacent contact holes among the plurality of contact holes, and The first distance and the second distance are measured in the same direction.

14. The display device according to claim 10, in, The first metal wiring includes: a first sub-metal wiring disposed in the peripheral region; and The second sub-metal wiring is arranged in the adjacent region.

15. The display device according to claim 14, in, The first region is a region where the second sub-metal wiring and the second metal wiring intersect each other in the plan view.

16. The display device according to claim 14, in, In the plan view, the light shielding pattern overlaps the first sub-metal wiring.

17. The display device according to claim 6, in, The third metal wiring includes: 2-1 sublayer, including a first metal; a 2-2 sub-layer including a second metal and located on the 2-1 sub-layer; and The 2-3 sub-layer includes the first metal and is located on the 2-2 sub-layer.

18. The display device according to claim 17, in, The 2-3 sub-layer is connected to the second metal wiring through the contact hole.

19. The display device according to any one of claims 1 to 18, in, The pixel circuit layer includes at least one light emitting device and a thin film encapsulation layer on the at least one light emitting device, and Wherein, the touch sensing layer is located on the thin film encapsulation layer.

20. The display device according to any one of claims 1 to 18, in, The second metal wiring is a ground wiring.

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