Power device and preparation method thereof

Abstract

The invention discloses a power device and a preparation method of the power device. The power device comprises an epitaxial layer, wherein the epitaxial layer is provided with a first surface deviating from a substrate; the injection region comprises at least one first injection region and a plurality of second injection regions, the plurality of second injection regions are distributed on the periphery of the first injection region, the first injection region has a first projection on the first surface, the second injection region has a second projection on the first surface, the first projection has a first area, and the second projection has a second area; the first area is larger than the second area; the voltage-withstanding ion regions are located on the two sides of the injection region in the first direction, the injection region has a first depth in the second direction, the voltage-withstanding ion regions have a second depth in the second direction, the second depth is larger than the first depth, the first direction is parallel to the first surface, and the second direction is the direction from the substrate to the epitaxial layer. The problem that in the reverse blocking process of a power device in the prior art, due to surface electric field gathering, the device is prone to breakdown at high voltage, and failure is caused is solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a power device and a method for preparing the power device. Background Art

[0002] In conventional power devices, due to various non-ideal factors, the device surface is more prone to breakdown and leakage, so the surface electric field distribution has a very critical impact on the device's withstand voltage level. Taking the Schottky diode as an example, in the reverse blocking state, the device will increase the leakage current due to the barrier lowering effect, which is equivalent to a decrease in the withstand voltage level. The improved JBS or MPS devices improve this problem by doping the active area, but the cylindrical junction or spherical junction formed by ion implantation will make the breakdown voltage of the PN junction lower than the breakdown voltage of the parallel plane junction. Summary of the invention

[0003] The present application provides a power device and a method for preparing the power device, so as to solve the problem in the related art that during the reverse blocking process of the power device, the surface electric field is concentrated, causing the device to be easily broken down at high voltage, resulting in failure.

[0004] According to one aspect of the present application, a power device is provided, the power device comprising a plurality of cellular structures, wherein the cellular structures comprise: a substrate; an epitaxial layer located on one side of the substrate, the epitaxial layer having a first surface facing away from the substrate; an implantation region located in the epitaxial layer, the surface of the implantation region facing away from the substrate being located in the first surface, the implantation region comprising at least one first implantation region and a plurality of second implantation regions, a plurality of the second implantation regions being distributed around the first implantation region, the first implantation region having a first projection on the first surface, the second implantation region having a second projection on the first surface, the first projection having a first area, the second projection having a second area, the first area being greater than the second area; a plurality of pressure-resistant ion regions, the pressure-resistant ion regions being located on both sides of the implantation region in a first direction, the implantation region having the same doping type as the pressure-resistant ion regions, the implantation region having a first depth in a second direction, the pressure-resistant ion region having a second depth in the second direction, the second depth being greater than the first depth, the first direction being parallel to the first surface, and the second direction being a direction from the substrate to the epitaxial layer.

[0005] Optionally, the doping concentration of the pressure-resistant ion region is less than the doping concentration of the implantation region.

[0006] Optionally, the pressure-resistant ion region has a second surface close to the implantation region, and a projection of the implantation region in the first direction is located on the second surface.

[0007] Optionally, in the second direction, the first implantation region and the second implantation region have the same first depth, and the first implantation region and the second implantation region have the same doping concentration.

[0008] Optionally, the plurality of second injection regions respectively include a plurality of first columns along the first direction, the plurality of second injection regions include a plurality of second columns along a third direction, the first injection region is located between two of the first columns, the first injection region is located between two of the second columns, and the third direction is parallel to the first surface and the first direction is perpendicular to the third direction.

[0009] Optionally, the first injection region has a first side and a second side in the first direction, and the second injection region located on the first side is symmetrically distributed with the second injection region located on the second side; the first injection region has a third side and a fourth side in the third direction, and the second injection region located on the third side is symmetrically distributed with the second injection region located on the fourth side.

[0010] Optionally, the power device further includes: an ohmic metal layer, wherein the ohmic metal layer is located on a side of the first injection region away from the substrate.

[0011] According to another aspect of the present application, a method for preparing a power device is provided, comprising: providing a substrate; forming an epitaxial layer on one side of the substrate, the epitaxial layer having a first surface facing away from the substrate; forming an injection region in the epitaxial layer, the surface of the injection region facing away from the substrate is located in the first surface, the injection region comprises at least one first injection region and a plurality of second injection regions, a plurality of the second injection regions are distributed around the first injection region, the first injection region has a first projection on the first surface, the second injection region has a second projection on the first surface, the first projection has a first area, the second projection has a second area, and the first area is greater than the second area; forming a plurality of pressure-resistant ion regions, the pressure-resistant ion regions are located on both sides of the injection region in a first direction, the injection region has the same doping type as the pressure-resistant ion region, the injection region has a first depth in a second direction, the pressure-resistant ion region has a second depth in the second direction, the second depth is greater than the first depth, the first direction is parallel to the first surface, and the second direction is a direction from the substrate to the epitaxial layer.

[0012] Optionally, the step of forming the injection region includes: forming a first barrier layer on the epitaxial layer by a deposition process; patterning the first barrier layer to expose the epitaxial layer; forming the injection region in the exposed epitaxial layer by an ion implantation process; and removing the remaining first barrier layer.

[0013] Optionally, the preparation method also includes: depositing a first conductive material on the epitaxial layer using a deposition process to form a conductive material layer; annealing the first conductive layer using an annealing process to form an ohmic conductive layer; the portion of the ohmic conductive layer that is in contact with the first injection region is an ohmic metal layer, and removing the rest of the ohmic conductive layer outside the ohmic metal layer using an etching process.

[0014] The technical solution of the present application is applied to provide a power device, wherein the epitaxial layer of the device has a first injection region and a second injection region, wherein the area of ​​the first projection of the first injection region on the first surface is greater than the area of ​​the second projection of the second injection region on the first surface, when the device is subjected to a reverse voltage, the second injection region will deplete with the epitaxial layer to form a high-resistance depletion region, and the depletion region will continue to extend at the bottom of the P+ region to form protection for the active region, when the device is in forward conduction, the first injection region and the epitaxial layer form a PiN structure, at this time, if a surge current flows, it will first pass through the first injection region to form a hybrid PiN / Schottky diode (Merged PiN Schottkey, referred to as MPS) structure, the MPS structure enables the device to have a lower forward voltage drop when forward conduction, and at the same time have a higher withstand voltage capability when reverse cutoff. The depth of the withstand voltage ion layer in the epitaxial layer should be higher than the injection region to ensure that the electric field modulation achieves an ideal effect, reduce the surface electric field of the device, enhance the breakdown voltage performance of the device, and thereby improve the reverse withstand voltage performance of the power device. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0016] Figure 1 is a schematic cross-sectional structure diagram of a power device according to an embodiment of the present application;

[0017] Figure 2 is a schematic diagram of a top view of a power device according to an embodiment of the present application;

[0018] Figure 3 It is a schematic diagram of an electric field intensive area formed by an injection region and a voltage-resistant ion region of a power device according to an embodiment of the present application;

[0019] Figure 4 is based on Figure 2 Schematic diagram of the cross-sectional structure at the position BB′ in the top view structure shown in FIG.

[0020] Figure 5 is a schematic diagram of a top view of another power device according to an embodiment of the present application;

[0021] Figure 6 is a flow chart of a method for preparing a power device provided in an embodiment of the present application;

[0022] Figure 7 It is a schematic diagram of the cross-sectional structure of a substrate provided in a method for preparing a power device provided in an embodiment of the present application;

[0023] Figure 8 is Figure 7 A schematic diagram of the cross-sectional structure of the substrate after the epitaxial layer is shown;

[0024] Fig. 9 is Figure 8 A schematic diagram of the cross-sectional structure of the substrate after the first barrier layer is formed on the epitaxial layer shown;

[0025] Fig.10 is Figure 8 A schematic diagram of forming a design pattern in the first barrier layer shown;

[0026] Fig.11 is Fig. 9 A schematic diagram of the cross-sectional structure of the substrate after an implantation region is formed in the epitaxial layer shown;

[0027] Fig.12 is Fig.11 A schematic diagram of the cross-sectional structure of the substrate after the first barrier layer is removed from the substrate shown;

[0028] Fig.13 is Fig.12 A schematic diagram of the cross-sectional structure of the substrate after the first conductive layer is formed on the substrate shown;

[0029] Fig.14 is Fig.13 A schematic diagram of forming a design pattern in the first conductive layer shown;

[0030] Fig.15 is Fig.13 A schematic diagram of the cross-sectional structure of the substrate after a pressure-resistant ion region is formed in the epitaxial layer shown;

[0031] Fig.16 is Fig.15 The cross-sectional structure schematic diagram of the substrate after an ohmic metal layer is formed on the substrate is shown.

[0032] The above drawings include the following reference numerals:

[0033] 10. Substrate; 20. Epitaxial layer; 201. First surface; 30. Injection region; 31. First injection region; 32. Second injection region; 301. First barrier layer; 40. Pressure-resistant ion region; 50. Ohmic metal layer; 501. Conductive material layer; 61. First conductive layer; 62. Second conductive layer. DETAILED DESCRIPTION

[0034] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0035] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0036] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0037] As described in the background art, in the prior art, due to various non-ideal factors, the surface of the power device is more susceptible to breakdown and leakage. In order to solve the above problems, the present application provides a power device and a method for preparing the power device.

[0038] According to one aspect of the present application, a power device is provided, such as Figure 1 As shown, the power device includes a plurality of cellular structures, wherein the cellular structure includes: a substrate 10; an epitaxial layer 20, located on one side of the substrate 10, the epitaxial layer 20 having a first surface 201 away from the substrate 10; an implantation region 30, located in the epitaxial layer 20, the surface of the implantation region 30 away from the substrate 10 is located in the first surface 201, the implantation region 30 includes at least one first implantation region 31 and a plurality of second implantation regions 32, wherein, as shown in FIG. Figure 2 As shown, Figure 2 is a top view of the cell structure. Figure 1 for Figure 2In the cross-sectional view of the structure shown at AA′, a plurality of second injection regions 32 are distributed around the first injection region 31, the first injection region 31 has a first projection on the first surface 201, the second injection region 32 has a second projection on the first surface 201, the first projection has a first area, the second projection has a second area, and the first area is larger than the second area; Figure 1 and Figure 2 As shown, a plurality of pressure-resistant ion regions 40 are provided, and the pressure-resistant ion regions 40 are located on both sides of the implantation region 30 in the first direction A. The implantation region 30 and the pressure-resistant ion regions 40 have the same doping type, such as Figure 1 As shown, the implantation region 30 has a first depth in the second direction B, the pressure-resistant ion region 40 has a second depth in the second direction, the second depth is greater than the first depth, the first direction A is parallel to the first surface, and the second direction B is the direction from the substrate 10 to the epitaxial layer 20 .

[0039] In the above power device, the epitaxial layer has a first injection region and a second injection region, wherein the area of ​​the first projection of the first injection region on the first surface is larger than the area of ​​the second projection of the second injection region on the first surface, when the device is subjected to reverse voltage, the second injection region will deplete with the epitaxial layer to form a high-resistance depletion region, and the depletion region will continue to extend at the bottom of the P+ region to form protection for the active region, when the device is in forward conduction, the first injection region and the epitaxial layer form a PiN structure, at this time, if a surge current flows, it will first pass through the first injection region to form a hybrid PiN / Schottky diode (Merged PiNSchottkey, referred to as MPS) structure, the MPS structure enables the device to have a lower forward voltage drop when forward conducting, and at the same time have a higher withstand voltage capability when reverse cutoff. The depth of the withstand voltage ion layer in the epitaxial layer should be higher than the injection region to ensure that the surface electric field modulation of the withstand voltage ion layer achieves an ideal effect, reduces the surface electric field of the device, enhances the breakdown voltage performance of the device, and thereby improves the reverse withstand voltage performance of the power device.

[0040] Specifically, the materials of the substrate, epitaxial layer and doped region include silicon carbide, silicon, gallium nitride, gallium oxide, gallium arsenide and aluminum nitride, etc. Personnel in the art can make reasonable selections according to actual needs, and no specific limitation is made without application. Exemplarily, the material of the substrate and epitaxial layer is silicon carbide, which is widely used in the preparation of power devices due to its wide bandgap and high critical breakdown electric field.

[0041] The projection of the first injection region on the first surface may be a circle, an ellipse, a triangle, a quadrilateral or a polygon, which is not specifically limited in the present application.

[0042] Specifically, the doping concentration of the substrate should be higher than the doping concentration of the epitaxial layer to ensure that the device has an appropriate on-resistance. Among them, the epitaxial layer is used to carry the main structure of the device, that is, the surface structure of the above-mentioned device is made on the surface of the epitaxial layer. At the same time, the epitaxial layer also determines the device's ability to withstand reverse high voltage. For typical low-voltage devices (generally 600V), the epitaxial thickness is about 6μm, for medium-voltage devices (generally 1500V), the epitaxial thickness is about 15μm, and for high-voltage devices (generally 10000V), the epitaxial thickness is about 100μm. The specific epitaxial thickness is not specifically limited in this application. Exemplarily, the thickness of the epitaxial layer is less than 15μm, and the device can be used in medium-voltage or low-voltage scenarios.

[0043] In some optional embodiments, the doping concentration of the voltage-resistant ion region is less than the doping concentration of the implantation region.

[0044] Specifically, the pressure-resistant ion region is located in the epitaxial layer, and the doping type is the same as that of the injection region. It is composed of multiple groups of strip-shaped pressure-resistant doping regions, and is distributed on both sides of the injection region, so that each group of cells is separated to form a regular arrangement. The doping concentration of the pressure-resistant ion region should be higher than the doping concentration of the epitaxial layer, but lower than the doping concentration of the injection region by about 1-2 orders of magnitude. At the same time, the injection depth of the pressure-resistant ion region is higher than the injection depth of the injection region, which can ensure that the electric field modulation achieves the ideal effect.

[0045] Among them, Figure 3 As shown, the existence of the pressure-resistant ion region 40 can improve the phenomenon of electric field concentration on the surface of the device. The main principle is that when the device is in a reverse cut-off state, most of the reverse voltage will be borne by the depletion region generated by the epitaxial layer and the injection region 30. At this time, the surface electric field gathers to form an electric field intensive area, and the cylindrical junction and the spherical junction at the edge of the depletion region are easy breakdown points. The existence of the low-concentration pressure-resistant ion region 40 can change the distribution of the electric field. A part of the electric field lines originally arranged vertically can terminate at the pressure-resistant ion region 40, so that the lateral electric field generated by the injection region 30 has a modulation effect, so that the electric field intensive area is transferred, and then the depletion occurs completely inside. In this way, the peak electric field intensity remains unchanged but the electric field flow area becomes larger, so the surface electric field can be greatly weakened, which can enhance the breakdown voltage of the device.

[0046] In some optional embodiments, the pressure-resistant ion region has a second surface close to the implantation region, and a projection of the implantation region in the first direction is located on the second surface.

[0047] Specifically, Figure 2As shown, the projection of the injection region 30 in the first direction A is located on the second surface of the pressure-resistant ion region 40 close to the injection region 30, that is, the length of the pressure-resistant ion region 40 in the third direction C is greater than the length of the injection region 30 in the third direction C, wherein the injection region 30 includes the length of the first injection region 31 and / or the second injection region 32 in the third direction C, and the pressure-resistant ion layer has a modulation effect on the lateral electric field generated by the injection region 30, so that the electric field intensive area is transferred, and the length of the pressure-resistant ion region 40 in the third direction C is greater than the length of the injection region 30 in the third direction C, so that the pressure-resistant ion region 40 can achieve a sufficient modulation effect on the injection region 30, ensuring that the electric field modulation achieves an ideal effect, and the breakdown voltage of the device is further enhanced. In addition, the pressure-resistant ion region 40 can also play a role in separating each group of cells, so that the cells are arranged regularly.

[0048] In some optional embodiments, such as Figure 1 As shown, in the second direction B, the first implant region 31 and the second implant region 32 have the same first depth, and the first implant region 31 and the second implant region 32 have the same doping concentration.

[0049] Specifically, during the preparation process, the first implantation region and the second implantation region are formed by the same implantation process. During the ion implantation process, high-energy ions will damage the lattice structure of the semiconductor material. Using one implantation process to form the first implantation region and the second implantation region can reduce the damage to the lattice caused by high-energy ions, and maintain the crystal integrity and electrical properties of the semiconductor material in the device. In addition, ion implantation requires high cost and high precision. Using one implantation process to form the first implantation region and the second implantation region can reduce the cost of the device during the preparation process, simplify the process flow, and reduce uncertainty and error rate in the production process.

[0050] In some optional embodiments, such as Figure 2 As shown, the multiple second injection regions 32 include multiple first columns along the first direction A, the multiple second injection regions 32 include multiple second columns along the third direction C, the first injection region 31 is located between the two first columns, the first injection region 31 is located between the two second columns, the third direction C is parallel to the first surface and the first direction A is perpendicular to the third direction C.

[0051] Specifically, the injection region is a key layer of the device, and its doping concentration should be more than two orders of magnitude higher than the epitaxy. As shown in the figure, the injection region is divided into a first injection region with a large area doping area and a second injection region with a small area doping area. When the power device is subjected to a reverse voltage, the second injection region with a small area and the epitaxial layer are depleted to form a high-resistance depletion region, and due to the large concentration difference, the depletion region will continue to extend at the bottom of the injection region to form protection for the active region, where the active region is formed by alternating and arranging multiple groups of cells. Among them, the first injection region is located between the two first columns, the first injection region is located between the two second columns, and the second injection region located on the first column and the injection region located on the second column form a depletion region, which can protect the first injection region and maintain the stability of the cell.

[0052] Among them, Figure 4 As shown, Figure 4 for Figure 2 The cross-sectional view at position BB′ in the top view of the device shown in the figure shows that in this structure, the first injection region 31 is located between the two first columns, and there is no second injection region on both sides of the first injection region 31. In addition, Figure 4 The other structural positions shown in Figure 1 The structural position relationship is the same as in , and will not be repeated here.

[0053] In some optional embodiments, such as Figure 2 As shown, the first injection region 31 has a first side and a second side in the first direction A, and the second injection region 32 located on the first side is symmetrically distributed with the second injection region 32 located on the second side; the first injection region 31 has a third side and a fourth side in the third direction C, and the second injection region 32 located on the third side is symmetrically distributed with the second injection region 32 located on the fourth side.

[0054] Specifically, the second injection region located on the first side and the second injection region located on the second side are symmetrically distributed, and the second injection region located on the third side and the second injection region located on the fourth side are also symmetrically distributed, thereby avoiding failure of cells in this area due to the electric field being more concentrated on the side with fewer cells, thereby increasing the stability of the cells; and also avoiding poor electric field modulation effect of the pressure-resistant ion layer due to uneven arrangement of the second injection regions, thereby increasing the electric field modulation effect of the pressure-resistant ion layer and increasing the reliability of the device.

[0055] For example, Figure 2As shown, the width of the first injection region 31 in the first direction A and the third direction C is greater than twice the width of the second injection region 32 and less than three times the width of the second injection region 32. In the first direction A, there are two second injection regions 32 on both sides of the first injection region 31, and in the third direction C, there are two second injection regions 32 on both sides of the first injection region 31. In the above structure, there are 12 second injection regions 32 on the periphery of the first injection region 31, which increases the uniformity of the electric field around the first injection region 31 and avoids cell failure in local areas.

[0056] For example, Figure 5 As shown, the width of the first injection region 31 in the first direction A and the third direction C is greater than 1 times the width of the second injection region 32, and less than 2 times the width of the second injection region 32. There is a second injection region 32 on each side of the first injection region 31 in the first direction A, and there is a second injection region 32 on each side of the first injection region 31 in the third direction C. There are 8 second injection regions 32 on the periphery of the first injection region 31, which increases the uniformity of the electric field around the first injection region 31 and avoids cell failure in local areas. Figure 5 The other structural positions shown in Figure 2 The structural position relationship is the same as in , and will not be repeated here.

[0057] In addition, based on the above two examples, the width of the first injection region in the first direction and the second direction is greater than n times the width of the second injection region, and less than n+1 times the width of the second injection region. The periphery of the first injection region has 4×(n+1) second injection regions to ensure the uniformity of the electric field around the first injection region 31 and avoid cell failure in local areas.

[0058] In some optional embodiments, such as Figure 1 and Figure 4 As shown, the power device further includes: an ohmic metal layer 50 , and the ohmic metal layer 50 is located on a side of the first injection region 31 facing away from the substrate 10 .

[0059] Specifically, an ohmic contact is formed between the first injection region and the ohmic metal layer. The first injection region has a large contact area, so that the current density is dispersed when the current passes through the contact interface, reducing the contact resistance. Therefore, when the device is in forward conduction, the surge current will first pass through the large-area first injection region. The large-area first injection region and the epitaxy form a PiN structure, and the first injection region and the second injection region may have the characteristics of an MPS device. The MPS structure combines the characteristics of the PiN and Schottky structures, so that it has lower losses when forward conduction, and does not reduce the heat generation of the chip. At the same time, the MPS device has a fast recovery characteristic during the switching process, reducing the switching loss.

[0060] Furthermore, the low surface electric field MPS device in the present application can take into account both good forward surge current resistance and reverse withstand voltage effect. The additional second injection area can suppress the high electric field on the device surface, and the designated area of ​​the cell can conduct forward current during the conduction process, enhancing the surge current level of the device, that is, while ensuring that the same withstand voltage level has a stronger surge current passing ability, or in other words, the chip area is smaller at the same surge level. At the same time, the injection area with a deeper withstand voltage ion area can be exhausted faster when the voltage is reversed, thereby improving the reverse recovery time of the device.

[0061] Among them, the ohmic metal material includes any one or alloy material of titanium, indium, copper, silver, platinum and nickel, and may include a multi-layer metal structure. Technical personnel in this field can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0062] In some optional embodiments, such as Figure 1 and Figure 4 As shown, the power device further includes a first conductive layer 61 and a second conductive layer 62. The first conductive layer 61 is respectively located on the side of the epitaxial layer, the withstand voltage ion region, the second injection region and the ohmic metal layer away from the substrate. The second conductive layer 62 is located on the side of the substrate 10 away from the epitaxial layer 20. The first conductive layer 61 and the second conductive layer 62 have the function of transmitting current to the device.

[0063] Among them, the conductive layer contacts the second injection region and the voltage-resistant ion region to form a Schottky contact, so that the device produces a smaller voltage drop when the device is in forward conduction, which greatly improves the efficiency of the device. At the same time, the device has a fast recovery time and switching speed, which can achieve rapid response and processing of signals and improve device performance.

[0064] Specifically, the conductive layer includes conductive materials, including but not limited to any one of silver, copper, aluminum, gold, titanium, nickel, platinum and palladium metals or alloy materials, and the conductive part includes a layer of conductive material or multiple layers of conductive materials. Those skilled in the art can make reasonable selections according to actual needs, and no specific limitation is made in the application. In addition, the conductive layer and the conductive part of the present application may also include a multi-layer conductive structure, which is not specifically limited in the present application.

[0065] According to another aspect of the present application, a method for preparing a power device is provided, which is used to prepare any power device, such as Figure 6 As shown, the preparation method comprises:

[0066] Step S101: providing a substrate;

[0067] Step S102: forming an epitaxial layer on one side of the substrate, wherein the epitaxial layer has a first surface facing away from the substrate;

[0068] Step S103: forming an implantation region in the epitaxial layer, wherein a surface of the implantation region facing away from the substrate is located in the first surface, the implantation region comprises at least one first implantation region and a plurality of second implantation regions, a plurality of second implantation regions are distributed around the first implantation region, the first implantation region has a first projection on the first surface, the second implantation region has a second projection on the first surface, the first projection has a first area, the second projection has a second area, and the first area is greater than the second area;

[0069] Step S104: forming a plurality of pressure-resistant ion regions, the pressure-resistant ion regions being located on both sides of the injection region in a first direction, the injection region and the pressure-resistant ion region having the same doping type, the injection region having a first depth in a second direction, the pressure-resistant ion region having a second depth in the second direction, the second depth being greater than the first depth, the first direction being parallel to the first surface, and the second direction being the direction from the substrate to the epitaxial layer.

[0070] The above-mentioned preparation method of the embodiment of the present application is adopted, in which the first injection region and the second injection region are formed by an ion implantation process, wherein the area of ​​the first projection of the first injection region on the first surface is larger than the area of ​​the second projection of the second injection region on the first surface, when the device is subjected to reverse voltage, the second injection region will be depleted with the epitaxial layer to form a high-resistance depletion region, and the depletion region will continue to extend at the bottom of the P+ region to form protection for the active region, when the device is in forward conduction, the first injection region and the epitaxial layer form a PiN structure, at this time, if a surge current flows, it will first pass through the first injection region to form a hybrid PiN / Schottky diode (Merged PiN Schottkey, referred to as MPS) structure, the MPS structure enables the device to have a lower forward voltage drop when forward conducting, and at the same time have a higher withstand voltage capability when reverse cutoff. And ion implantation is used to form a pressure-resistant ion layer with a depth greater than the injection region in the epitaxial layer to ensure that the electric field modulation achieves an ideal effect, reduce the surface electric field of the device, enhance the breakdown voltage performance of the device, and thus improve the reverse withstand voltage performance of the power device.

[0071] The following will describe in more detail the exemplary embodiments of the method for preparing a power device provided by the present application in conjunction with the accompanying drawings. However, these exemplary embodiments can be implemented in a variety of different forms and should be interpreted as being limited to the embodiments described herein. It should be understood that these embodiments are provided to make the disclosure of the present application thorough and complete, and to fully convey the concepts of these exemplary embodiments to those of ordinary skill in the art.

[0072] First, if Figure 7 As shown, step S101 is performed: providing a substrate 10 .

[0073] Specifically, the materials of the substrate 10 include silicon carbide, silicon, gallium nitride, gallium oxide, gallium arsenide, aluminum nitride and other materials, and those skilled in the art can reasonably select them according to actual needs, and no specific limitation is made in the application. Among them, the substrate has a first doping type.

[0074] Exemplarily, the substrate includes a doped SiC substrate to form an ohmic contact at the source, which can reduce the forward voltage drop of the diode structure and increase the breakdown voltage.

[0075] After providing the substrate, as Figure 8 As shown, step S102 is performed: an epitaxial layer 20 is formed on one side of the substrate 10 .

[0076] Specifically, the materials of the epitaxial layer include silicon carbide, silicon, gallium nitride, gallium oxide, gallium arsenide, aluminum nitride and other materials. Personnel in the art can make reasonable selections according to actual needs, and no specific limitation is made without application. The epitaxial layer and the substrate can have the same material and the same doping type, and the doping concentration of the epitaxial layer is less than the doping concentration of the substrate, which can maintain the voltage withstand effect of the epitaxial layer on the device.

[0077] In some optional embodiments, the process of forming the epitaxial layer includes but is not limited to a deposition process and an epitaxial growth process. In the epitaxial growth process, the doping concentration of impurities is relatively easy to control and the activation rate is relatively fixed, so it is easy to achieve the target doping distribution. It is not only suitable for silicon-based power devices, but also can avoid the difficulty of injection doping of silicon carbide power devices and improve the efficiency of its terminal structure. The deposition process is relatively mature, simple to operate and has low cost. The deposition process includes but is not limited to physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD). Physical vapor deposition (PVD) includes but is not limited to magnetron sputtering process, reactive sputtering process, DC sputtering process, AC sputtering process, vacuum coating process, arc evaporation process, and chemical vapor deposition (CVD) includes but is not limited to plasma enhanced chemical vapor deposition (PECVD), metal-organic chemical vapor deposition (MOCVD), and laser-induced chemical vapor deposition (LCVD). Those skilled in the art can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0078] After the epitaxial layer is formed, step S103 is performed: forming an implantation region in the epitaxial layer.

[0079] Specifically, the steps of forming the implantation region may include: first, Fig. 9 As shown, a first barrier layer 301 is formed on the epitaxial layer 20 by a deposition process; then, the first barrier layer 301 is patterned to expose the epitaxial layer; then, as shown in FIG. Fig.11 As shown, an ion implantation process is used to form a top view of the exposed epitaxial layer 20. Fig.10 The implantation region 30 shown in FIG. 1 is a first implantation region 31, wherein a plurality of second implantation regions 32 are distributed around the first implantation region 31; then, as shown in FIG. Fig.12 As shown, the remaining first barrier layer 301 is removed.

[0080] The patterning process includes: first, placing a mask plate containing a design pattern on the first barrier layer; then, etching the first barrier layer portion under the design pattern by photolithography or etching process to form a pattern of a designed implantation region in the first barrier layer, and the pattern will expose the epitaxial layer; then, ion implantation is performed in the exposed epitaxial layer to form an implantation region of the design pattern. The design pattern may include patterns as shown in Figures 1 to 2.

[0081] In the preparation process, the first and second implantation regions are formed by the same ion implantation process, which can reduce the damage to the crystal lattice caused by high-energy ions during the ion implantation process, and maintain the crystal integrity and electrical properties of the semiconductor material in the device. In addition, ion implantation requires high cost and high precision, and the first and second implantation regions are formed by the same implantation process, which can reduce the cost of the device during the preparation process, simplify the process flow, and reduce the uncertainty and error rate in the production process.

[0082] After the implantation region is formed, step S104 is performed: forming a plurality of pressure-resistant ion regions.

[0083] Specifically, Fig.13 As shown, the pressure-resistant ion region 40 is formed by using the same process steps as those used in the forming step and the forming of the implantation region in step S102, wherein the pattern of the top view of the pressure-resistant ion region 40 is as shown in FIG. Fig.14 shown.

[0084] Among them, the doping concentration of the pressure-resistant ion zone is greater than the doping concentration of the epitaxial layer, and is about 1 to 2 orders of magnitude less than the doping concentration of the implanted zone. The implantation depth of the pressure-resistant ion zone should be higher than the implantation depth of the implanted zone to ensure that the electric field modulation achieves an ideal effect.

[0085] After step S104, the preparation method further includes step S105: forming an ohmic metal layer.

[0086] Specifically, the steps of forming the ohmic metal layer include: first, Fig.15 As shown, a first conductive material is deposited on the epitaxial layer 20 by a deposition process to form a conductive material layer 501; then, an annealing process is used to anneal the conductive material layer 501 to form an ohmic conductive layer; then, as shown in FIG. Fig.16 As shown, an etching process is used to remove part of the ohmic conductive layer located on the first injection region 31 and the ohmic conductive layer located on the epitaxial layer 20, the injection region 30, and the pressure-resistant ion region 40, so as to retain part of the ohmic conductive layer in contact with the first injection region 31 to obtain an ohmic metal layer 50.

[0087] Among them, the above-mentioned etching process includes but is not limited to dry etching and wet etching, among which dry etching includes physical etching, chemical etching and chemical-physical etching, and physical etching includes ion beam etching, plasma etching, reactive ion etching, etc. Technical personnel in this field can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0088] In some other optional embodiments, a "one-step" metal deposition process can be used to form an ohmic metal layer. The steps of the "one-step" metal deposition process include: first, a second barrier layer is formed on the epitaxial layer by a deposition process; then, the second barrier layer is patterned to form a to-be-filled area that exposes the first injection area; then, a deposition process is used to fill the to-be-filled area to form an ohmic conductive layer; then, the remaining second barrier layer is removed; and the ohmic conductive layer is annealed by an annealing process to form an ohmic metal layer. Wherein, high-temperature annealing is performed so that the ohmic conductive layer forms an ohmic contact alloy with the first injection area so as to form an ohmic contact subsequently. The above method can avoid the process of using an etching process to remove the remaining ohmic conductive layers other than the ohmic metal layer, which may affect the deposition effect of the ohmic metal layer.

[0089] Specifically, the material forming the ohmic metal layer includes any one of titanium, indium, copper, silver, platinum and nickel or an alloy material, and may include a multi-layer metal structure. Technical personnel in this field can make a reasonable selection according to actual needs, and no specific limitation is made without application.

[0090] After step S105, Figure 1 As shown, the above preparation method further includes step S106: forming a first conductive layer 61 and a second conductive layer 62.

[0091] Specifically, a conductive material is deposited on the semiconductor structure formed in step S105 by a deposition process, and then a photolithography or etching process is used to remove metal in areas such as chip splitting paths and terminals to form device surface electrodes.

[0092] Among them, the conductive layer includes conductive materials, and the conductive materials include but are not limited to any one of silver, copper, aluminum, gold, titanium, nickel, platinum and palladium metals or alloy materials. The conductive part includes a layer of conductive material or multiple layers of conductive materials. Those skilled in the art can make reasonable selections according to actual needs, and no specific limitation is made in the application. In addition, the conductive layer and the conductive part of the present application may also include a multi-layer conductive structure, which is not specifically limited in the present application.

[0093] The power device formed by the method for preparing the power device of the present application will be described below in conjunction with an embodiment.

[0094] The method for preparing a power device provided in this embodiment comprises the following steps:

[0095] Step S1: Provide an N-type SiC substrate 10, such as Figure 7 As shown;

[0096] Step S2: Form an N-type epitaxial layer 20 on the N-type SiC substrate 10 using an epitaxial growth process, such as Figure 8 As shown;

[0097] Step S3: depositing a silicon dioxide layer on the epitaxial layer 20 by a deposition process to form a first barrier layer 301, such as Fig. 9 As shown;

[0098] Step S4: etching the first barrier layer 301 by photolithography to perform patterning to expose the epitaxial layer 20;

[0099] Step S5: Using an ion implantation process, ion implantation is performed in the exposed epitaxial layer to form Fig.10 The P-type implantation region 30 is distributed as shown, and the implantation region 30 includes a first implantation region 31 and a second implantation region 32 distributed around the first implantation region 31. Fig.11 As shown;

[0100] Step S6: removing the remaining first barrier layer 301, such as Fig.12 As shown;

[0101] Step S7: depositing a silicon dioxide layer on the epitaxial layer 20 by a deposition process to form a third barrier layer;

[0102] Step S8: etching the third barrier layer by photolithography to perform patterning to expose the epitaxial layer;

[0103] Step S9: Using an ion implantation process, ion implantation is performed in the exposed epitaxial layer 20 to form Fig.14 The P-type pressure-resistant ion region 40 is distributed as shown. Fig.13 As shown;

[0104] Step S10: depositing a metal Ni layer on the epitaxial layer using a deposition process to form a conductive material layer 501, such as Fig.15 As shown;

[0105] Step S11: annealing the first conductive layer using an annealing process to form an ohmic conductive layer;

[0106] Step S12: using an etching process to remove part of the ohmic conductive layer located on the first implantation region 31 and the ohmic conductive layer located on the epitaxial layer 20, the second implantation region 32, and the voltage-resistant ion region 40, and the remaining ohmic conductive layer forms an ohmic metal layer 50, such as Fig.16 As shown;

[0107] Step S13: using a deposition process to deposit metal Ag on the semiconductor structure of step S9 to form a first conductive layer 61 and a second conductive layer 62. Figure 1 shown.

[0108] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0109] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A power device, characterized in that: The power device includes a plurality of cellular structures, wherein the cellular structure includes: substrate; An epitaxial layer, located on one side of the substrate, the epitaxial layer having a first surface facing away from the substrate; an implantation region, located in the epitaxial layer, wherein a surface of the implantation region facing away from the substrate is located in the first surface, the implantation region comprises at least one first implantation region and a plurality of second implantation regions, a plurality of second implantation regions are distributed around the first implantation region, the first implantation region has a first projection on the first surface, the second implantation region has a second projection on the first surface, the first projection has a first area, the second projection has a second area, and the first area is larger than the second area; A plurality of pressure-resistant ion regions, wherein the pressure-resistant ion regions are located on both sides of the injection region in a first direction, the injection region and the pressure-resistant ion region have the same doping type, the injection region has a first depth in a second direction, the pressure-resistant ion region has a second depth in the second direction, the second depth is greater than the first depth, the first direction is parallel to the first surface, and the second direction is a direction from the substrate to the epitaxial layer.

2. The power device according to claim 1, characterized in that: The doping concentration of the pressure-resistant ion region is lower than the doping concentration of the implantation region.

3. The power device according to claim 1, characterized in that: The pressure-resistant ion region has a second surface close to the implantation region, and a projection of the implantation region in the first direction is located on the second surface.

4. The power device according to claim 1, characterized in that: The first implant region and the second implant region have the same first depth in the second direction, and the first implant region and the second implant region have the same doping concentration.

5. The power device according to claim 1, characterized in that: The plurality of second injection regions respectively include a plurality of first columns along the first direction, the plurality of second injection regions include a plurality of second columns along a third direction, the first injection region is located between two of the first columns, the first injection region is located between two of the second columns, the third direction is parallel to the first surface and the first direction is perpendicular to the third direction.

6. The power device according to claim 5, characterized in that: The first injection region has a first side and a second side in the first direction, and the second injection region located on the first side is symmetrically distributed with the second injection region located on the second side; the first injection region has a third side and a fourth side in the third direction, and the second injection region located on the third side is symmetrically distributed with the second injection region located on the fourth side.

7. The power device according to any one of claims 1 to 6, characterized in that: The power device further includes: an ohmic metal layer, wherein the ohmic metal layer is located on a side of the first injection region away from the substrate.

8. A method for preparing a power device, characterized in that: include: providing a substrate; forming an epitaxial layer on one side of the substrate, the epitaxial layer having a first surface facing away from the substrate; An implantation region is formed in the epitaxial layer, wherein a surface of the implantation region facing away from the substrate is located in the first surface, the implantation region comprises at least one first implantation region and a plurality of second implantation regions, a plurality of the second implantation regions are distributed around the first implantation region, the first implantation region has a first projection on the first surface, the second implantation region has a second projection on the first surface, the first projection has a first area, the second projection has a second area, and the first area is larger than the second area; A plurality of pressure-resistant ion regions are formed, wherein the pressure-resistant ion regions are located on both sides of the injection region in a first direction, the injection region and the pressure-resistant ion region have the same doping type, the injection region has a first depth in a second direction, the pressure-resistant ion region has a second depth in the second direction, the second depth is greater than the first depth, the first direction is parallel to the first surface, and the second direction is a direction from the substrate to the epitaxial layer.

9. The preparation method according to claim 8, characterized in that: The step of forming the implantation region comprises: forming a first barrier layer on the epitaxial layer by a deposition process; performing patterning on the first barrier layer to expose the epitaxial layer; forming the implantation region in the exposed epitaxial layer by an ion implantation process; The remaining first barrier layer is removed.

10. The preparation method according to claim 8, characterized in that: The preparation method further comprises: Depositing a first conductive material on the epitaxial layer using a deposition process to form a conductive material layer; Performing annealing treatment on the first conductive layer by using an annealing process to form an ohmic conductive layer; The portion of the ohmic conductive layer contacting the first injection region is an ohmic metal layer, and the rest of the ohmic conductive layer except the ohmic metal layer is removed by an etching process.

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