Memory configuration information reporting method and device, computer device, and storage medium
By obtaining the memory base address and configuration information of the external PCIe device, the problem of not being able to report Type 17 information in the existing technology is solved, realizing the real-time uploading of the memory configuration information of the external PCIe device, and improving the reliability and maintenance efficiency of the system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- INSPUR SUZHOU INTELLIGENT TECH CO LTD
- Filing Date
- 2024-11-29
- Publication Date
- 2026-07-07
AI Technical Summary
Existing technologies cannot report configuration information such as Type 17 information of memory under external PCIe devices to the operating system, which makes system management and fault diagnosis difficult.
By obtaining the configuration dataset of the target device, the memory base address is determined, and the memory configuration information is used to obtain instructions to access the target device. After obtaining the memory configuration information, it is uploaded to the operating system without reserving a Type 17 interface.
It enables real-time uploading of memory configuration information for external PCIe devices, improving the overall reliability and maintenance efficiency of the system and facilitating fault diagnosis and maintenance.
Smart Images

Figure CN119690655B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of computer technology, and specifically to a method, apparatus, computer device, and storage medium for reporting memory configuration information. Background Technology
[0002] The PCIe (Peripheral Component Interconnect Express) configuration space refers to the area of configuration information stored in a PCIe device. The configuration information within this area is crucial for the initialization and management of the PCIe device. Within the configuration information, SMBIOS (System Management Basic Input / Output System) Type 17 is a memory array mapped address, a data structure used to describe the system's memory layout and configuration. Type 17 provides information about the memory array and its physical location within the system, which is essential for system management and monitoring.
[0003] Currently, the process of reporting Type 17 information to the operating system includes: during BIOS (Basic Input / Output System) initialization, reading SPD (Serial Presence Detect) information from the memory modules; converting the read SPD information into a data structure conforming to the SMBIOS Type 17 format; and constructing an SMBIOS table containing Type 17 information, which can then be read by the operating system. However, the current process for reporting Type 17 information can only report Type 17 information for memory modules with Type 17 interfaces that are in place. Since external PCIe devices such as CXL (Compute Express Link) devices are not within the system's Type 17 architecture, and Type 17 interfaces cannot be reserved for external PCIe devices, it is currently impossible to report Type 17 information for memory modules connected to external PCIe devices.
[0004] Therefore, the relevant technologies have the problem of failing to report configuration information such as Type 17 information of memory under external PCIe devices to the operating system. Summary of the Invention
[0005] In view of this, the present invention provides a method, apparatus, computer device and storage medium for reporting memory configuration information, so as to solve the problem of difficulty in reporting configuration information such as Type 17 information of memory under external PCIe device to the operating system.
[0006] In a first aspect, the present invention provides a method for reporting memory configuration information, including:
[0007] If the configuration dataset of the target device is obtained, the device information of the target device is retrieved from the configuration dataset;
[0008] Obtain the device identifier of the target device from the device information. Based on the device identifier, determine the starting address of the target device. Based on the starting address and address offset information, obtain the memory base address of the target device.
[0009] The command is obtained based on the memory base address and memory configuration information to access the target device and obtain the memory configuration information of the memory under the target device.
[0010] Upload memory configuration information to the operating system.
[0011] The memory configuration information reporting method provided in this embodiment accesses the target device and obtains the memory configuration information of the memory under the target device based on the memory base address and memory configuration information acquisition instructions. It then uploads the memory configuration information to the operating system in real time without needing to reserve a Type 17 interface for the target device beforehand. This allows system administrators to promptly understand the device's status, facilitating fault diagnosis and maintenance of the target device, and improving the overall reliability and maintenance efficiency of the system. This method solves the problem of reporting configuration information such as Type 17 information of memory under external PCIe devices to the operating system.
[0012] In some optional implementations, the memory base address of the target device is obtained based on the device start address and address offset information, including:
[0013] Based on a preset addressing method, the device starting address is offset by a first offset to obtain a first address, wherein the first offset is included in the address offset information;
[0014] Based on the preset addressing method, the device starting address is offset by a second offset to obtain the second address, wherein the second offset is included in the address offset information;
[0015] By combining the first address and the second address, we obtain the memory base address.
[0016] In this embodiment, the device starting address is first offset by a first offset and a second offset, and then combined with the offset address to obtain the memory base address used to access the target device. The target device can be accessed through this memory base address, and the memory configuration information of the memory under the target device can be read.
[0017] In some optional implementations, the target device is accessed and memory configuration information of the target device is obtained based on the memory base address and memory configuration information, including:
[0018] Obtain the memory IDs of the target device's memory, where the number of memory IDs is a first preset quantity;
[0019] The target memory number is determined from the first preset number of memory numbers, and a memory configuration information retrieval instruction containing the target memory number is generated according to the preset specifications.
[0020] Offset the memory base address by the third offset to obtain the first target address, and offset the memory base address by the fourth offset to obtain the second target address;
[0021] The data of the memory configuration information retrieval instruction is sequentially written into the memory space of the first target address, and a first preset value for generating an interrupt is written into the second target address, so as to write the response information corresponding to the memory configuration information retrieval instruction into the memory space of the preset address. The interrupt is used to wait for a preset duration.
[0022] Access the memory space at the preset address, obtain the response information, and determine whether the preset byte of the response information is the second preset value;
[0023] If the preset byte is the second preset value, the response information will be used as the intermediate configuration information of the memory corresponding to the target memory number;
[0024] Based on the target memory number and the preset step size, a new target memory number is determined from the first preset number of memory numbers. The new target memory number is used as the target memory number. The subsequent steps are executed starting from the memory configuration information acquisition instruction containing the target memory number generated according to the preset specification, until the response information corresponding to each memory number is obtained.
[0025] By summarizing the intermediate configuration information, the memory configuration information of the target device is obtained.
[0026] In this embodiment, the first target address and the second target address are determined by using the memory base address. The memory configuration information acquisition instruction is written to the memory space of the first target address, and an interrupt is generated by writing a first preset value to the second target address. The response information is written to the memory space of the preset address, and finally the memory configuration information is obtained from the response information. The memory configuration information can be obtained without the need for the Type17 interface, thus overcoming the limitations of traditional SMBIOS memory configuration information reporting.
[0027] In some alternative implementations, memory configuration information is uploaded to the operating system, including:
[0028] A configuration information structure is created according to the preset specifications, and the memory configuration information is written into the configuration information structure;
[0029] Using the preset upload service, the memory configuration information in the configuration information structure is uploaded to the preset location of the configuration data table in the operating system.
[0030] In this embodiment, memory configuration information is written into a configuration information structure, and then the memory configuration information in the configuration information structure is uploaded to a preset location in the configuration data table in the operating system. The structure and data table are used to ensure the content and upload order of the memory configuration information, so that the memory configuration information can be accurately uploaded to the operating system.
[0031] In some optional implementations, device information of the target device is obtained from the configuration dataset, including:
[0032] Obtain the controller number of the device controller corresponding to the target device, wherein the number of controller numbers is a second preset quantity;
[0033] Based on the second preset number of controllers, obtain the device information of the target device on the device controller from the configuration dataset.
[0034] In some optional implementations, the method further includes, before retrieving the device information of the target device from the configuration dataset:
[0035] Use the first interface function to obtain the configuration dataset of the target device under the operating system;
[0036] Check the status information of the configuration dataset obtained by the first interface function. If the status information is the third preset value, then execute the process of obtaining the device information of the target device from the configuration dataset.
[0037] In this embodiment, the status information of the configuration dataset obtained by the first interface function is checked. By judging whether the status information is a third preset value, it is determined whether the obtained configuration dataset contains accurate device information. After determination, the device information of the target device is obtained from the configuration dataset to ensure that the information is accurate.
[0038] In some alternative implementations, the method further includes:
[0039] Register a memory configuration information reporting event. This event is used to call the memory configuration information collection function when the second interface function is installed. The second interface function is used to check the connection status of the driver in the operating system.
[0040] The memory configuration information collection function is used to retrieve the device information of the target device from the configuration dataset, given that the configuration dataset of the target device has been obtained, and then proceed with subsequent steps.
[0041] In this embodiment, the ability to access the target device is determined by whether the second interface function is installed. If the second interface function is installed, it is determined that the target device can be accessed. Then, the memory configuration information collection function is called to report the memory configuration information, ensuring that the memory configuration information can be successfully obtained.
[0042] Secondly, the present invention provides a memory configuration information reporting device, comprising:
[0043] The first acquisition module is used to obtain the device information of the target device from the configuration dataset when the configuration dataset of the target device is obtained.
[0044] The second acquisition module is used to obtain the device identifier of the target device from the device information, determine the device start address of the target device based on the device identifier, and obtain the memory base address of the target device based on the device start address and address offset information.
[0045] The third acquisition module is used to obtain instructions based on the memory base address and memory configuration information, access the target device, and obtain the memory configuration information of the memory under the target device;
[0046] The upload module is used to upload memory configuration information to the operating system.
[0047] Thirdly, the present invention provides a computer device, comprising: a memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the memory configuration information reporting method of the first aspect or any corresponding embodiment described above.
[0048] Fourthly, the present invention provides a computer non-volatile readable storage medium storing computer instructions, which are used to cause a computer to execute the memory configuration information reporting method of the first aspect or any corresponding embodiment described above.
[0049] Fifthly, the present invention provides a computer program product, including computer instructions, which are used to cause a computer to execute the memory configuration information reporting method of the first aspect or any corresponding embodiment described above. Attached Figure Description
[0050] To more clearly illustrate the technical solutions in the specific embodiments or related technologies of the present invention, the drawings used in the description of the specific embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0051] Figure 1 This is a flowchart illustrating a memory configuration information reporting method according to an embodiment of the present invention;
[0052] Figure 2 This is a flowchart of a method for reporting CXL device Type 17 information according to an embodiment of the present invention;
[0053] Figure 3 This is a structural block diagram of a memory configuration information reporting device according to an embodiment of the present invention;
[0054] Figure 4 This is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. Detailed Implementation
[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0056] CXL (Compute Express Link) is a high-performance interconnect protocol used to provide low-latency, high-bandwidth connectivity between processors, accelerators, memory buffers, intelligent network interface cards (NICs), persistent memory, and other high-speed storage devices in data centers and high-performance computing environments. The low-latency and high-bandwidth connectivity provided by CXL significantly improves the performance of data-intensive applications. CXL supports the separation of compute and storage resources, allowing devices such as GPUs (Graphics Processing Units) and FPGAs (Field-Programmable Gate Arrays) to directly access host memory, improving resource utilization. CXL device information can be reported to SMBIOS in a standardized manner, simplifying system management and monitoring processes and improving operational efficiency. CXL allows servers to support different types of memory, reducing the cost of over-provisioning memory while improving system performance. In summary, CXL provides new possibilities for building high-performance computing systems, greatly enhancing the performance of data-intensive applications by providing low-latency and high-bandwidth connectivity.
[0057] The PCIe protocol was designed to replace older parallel bus architectures, such as AGP (Accelerated Graphics Port), to provide higher bandwidth and lower latency. PCIe is used to connect various hardware components inside a computer, such as graphics cards, network adapters, and storage devices.
[0058] PCIe configuration space typically includes device identifiers, capability registers, and status registers, used to describe the device's capabilities and current status. Among these, SMBIOS Type 17 is an SMBIOS data structure used to describe the system's memory layout and configuration. Type 17 provides information about the memory array and its physical location within the system. Currently, the specific process for ordinary memory training and Type 17 information reporting includes: During system startup, the BIOS begins the initialization process, including reading the SPD information from the memory modules. The SPD chip stores the memory module's SPD information, including manufacturer, product number, capacity, speed, and timing parameters. The BIOS reads this SPD information from the SPD chip. The read SPD information is converted into a data structure conforming to the SMBIOS Type 17 format. These data structures contain detailed memory information, such as memory type, speed, capacity, and manufacturer. The BIOS constructs an SMBIOS table containing Type 17 information, organized according to the SMBIOS standard format. The constructed SMBIOS table is reported to the operating system, which can then read the SMBIOS table to obtain detailed memory information. However, the above process is a solution for fixed memory slots and does not reserve an interface for CXL. Furthermore, the information collection phase occurs before the PCIe device is initialized, at which time the CXL device cannot be accessed. CXL devices include, for example, PCIe signal to memory signal expansion adapters.
[0059] Based on the above, this invention provides a method for reporting memory configuration information. According to the memory base address and a memory configuration information retrieval instruction, the method accesses the target device and obtains the memory configuration information of the memory on the target device; then, it uploads the memory configuration information to the operating system. By introducing a memory configuration information reporting mechanism, the limitations of traditional SMBIOS memory configuration information reporting, namely the lack of a reserved interface to support dynamic reporting, are overcome. This significantly enhances the comprehensiveness and accuracy of system fault diagnosis, thereby improving the overall reliability and maintenance efficiency of the system. The goal is to enable system administrators to promptly understand the device status, facilitate fault diagnosis and maintenance, reduce operational costs, and quickly locate the cause of faults and take corresponding measures through memory configuration information.
[0060] According to an embodiment of the present invention, a memory configuration information reporting embodiment is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer device with data processing capabilities, such as a computer, server, etc. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.
[0061] This embodiment provides a method for reporting memory configuration information. Figure 1 This is a flowchart of a memory configuration information reporting method according to an embodiment of the present invention, such as... Figure 1 As shown, the process includes the following steps:
[0062] Step S101: If the configuration dataset of the target device is obtained, the device information of the target device is obtained from the configuration dataset.
[0063] Specifically, the target device is, for example, a CXL device already registered on the system. The configuration dataset is, for example, the CXL device dataset mCxlNbioProtocol. The device information of the target device is obtained from the configuration dataset, which records the target device's access address, BDF (Bus / Device / Function) number, etc.
[0064] Step S102: Obtain the device identifier of the target device from the device information, determine the starting address of the target device based on the device identifier, and obtain the memory base address of the target device based on the starting address and address offset information.
[0065] Specifically, the device identifier of the target device is obtained from the device information. The device identifier is, for example, the BDF number of the target device. According to the PCIe and CXL specifications, the memory base address (BarAddress) for CXL device access can be obtained from the BDF number. For example, the address containing the device identifier is used as the starting address of the target device. Address offset information can include one or more offsets. If there is only one offset in the address offset information, the device start address is offset by this offset, and the offset device start address is used as the memory base address of the target device. Subsequent instructions can be written to this address to access or control the target device. If there are multiple offsets in the address offset information, the device start address can be divided into multiple parts, each offset by a corresponding offset, and then the offset parts are combined to obtain the memory base address. For example, if the address offset information is 64 bits and contains multiple offsets, the address offset information is divided into two parts: the first 32 bits are used as part 1, and the last 32 bits are used as part 2. Each part is offset by a corresponding offset, and then the offset parts are combined to obtain the memory base address.
[0066] Step S103: Obtain instructions based on memory base address and memory configuration information, access the target device and obtain memory configuration information of the memory under the target device.
[0067] Specifically, the memory configuration information retrieval instruction is written to the memory base address or the memory base address plus a pre-set offset to access the target device. The specific location of the memory configuration information retrieval instruction and the relationship between the memory base address are determined according to actual needs.
[0068] During the access to the target device, the memory configuration information of the target device's memory is obtained. For example, the SPD data of the memory under the CXL device.
[0069] Step S104: Upload the memory configuration information to the operating system.
[0070] Specifically, memory configuration information is written to a location in the operating system used to store memory configuration information, such as the operating system's System Type 17 data table. The operating system can read memory configuration information from the System Type 17 data table and manage and monitor the CXL device and the memory under the CXL device based on the memory configuration information.
[0071] The memory configuration information reporting method provided in this embodiment accesses the target device and obtains the memory configuration information of the memory under the target device based on the memory base address and memory configuration information acquisition instructions. It then uploads the memory configuration information to the operating system in real time without needing to reserve a Type 17 interface for the target device beforehand. This allows system administrators to promptly understand the device's status, facilitating fault diagnosis and maintenance of the target device, and improving the overall reliability and maintenance efficiency of the system. This method solves the problem of reporting configuration information such as Type 17 information of memory under external PCIe devices to the operating system.
[0072] In some optional implementations, the memory base address of the target device is obtained based on the device start address and address offset information, including:
[0073] Based on a preset addressing method, the device starting address is offset by a first offset to obtain a first address, wherein the first offset is included in the address offset information;
[0074] Based on the preset addressing method, the device starting address is offset by a second offset to obtain the second address, wherein the second offset is included in the address offset information;
[0075] By combining the first address and the second address, we obtain the memory base address.
[0076] Specifically, the default addressing method is, for example, MMIO (Memory-Mapped Input / Output) addressing. MMIO is a common hardware device addressing method that maps the registers of I / O (Input / Output) devices to the system's memory address space to access the devices. This method allows the CPU (Central Processing Unit) to directly use memory access instructions to read and write to the registers of I / O devices, thus simplifying the interaction between hardware and software. The BDF number of the CXL device can be obtained from the configuration dataset mCxlNbioProtocol, including: bus number, device number, and function number.
[0077] Based on the PCIe specification, CXL specification, and the bus number, device number, and function number of the CXL device, the device start address can be obtained. For example, the address of the register storing the BDF number of the CXL device can be used as the device start address, or an address near the address of the register storing the BDF number can be used as the device start address. When using the address of the register storing the BDF number as the device start address, the first offset is, for example, 0x14, where 0x represents hexadecimal; the second offset is, for example, 0x10, where 0x represents hexadecimal.
[0078] By using a preset addressing method, the address of the register at the device start address offset by the first offset (e.g., 0x14) of the CXL device is calculated, and the address of this register is used as the first address, which is the high 32-bit address AddressHigh.
[0079] By using a preset addressing method, the address of the register at the second offset (e.g., 0x10) of the device's starting address is calculated, and this register address is used as the second address, which is the lower 32-bit address AddressLow.
[0080] By combining the first address and the second address, the memory base address (BarAddress) accessed by the CXL device is obtained, that is, BarAddress = (AddressHigh << 32) | AddressLow.
[0081] In this embodiment, the device starting address is first offset by a first offset and a second offset, and then combined with the offset address to obtain the memory base address used to access the target device. The target device can be accessed through this memory base address, and the memory configuration information of the memory under the target device can be read.
[0082] In some optional implementations, the target device is accessed and memory configuration information of the target device is obtained based on the memory base address and memory configuration information, including:
[0083] Obtain the memory IDs of the target device's memory, where the number of memory IDs is a first preset quantity;
[0084] The target memory number is determined from the first preset number of memory numbers, and a memory configuration information retrieval instruction containing the target memory number is generated according to the preset specifications.
[0085] Offset the memory base address by the third offset to obtain the first target address, and offset the memory base address by the fourth offset to obtain the second target address;
[0086] The data of the memory configuration information retrieval instruction is sequentially written into the memory space of the first target address, and a first preset value for generating an interrupt is written into the second target address, so as to write the response information corresponding to the memory configuration information retrieval instruction into the memory space of the preset address. The interrupt is used to wait for a preset duration.
[0087] Access the memory space at the preset address, obtain the response information, and determine whether the preset byte of the response information is the second preset value;
[0088] If the preset byte is the second preset value, the response information will be used as the intermediate configuration information of the memory corresponding to the target memory number;
[0089] Based on the target memory number and the preset step size, a new target memory number is determined from the first preset number of memory numbers. The new target memory number is used as the target memory number. The subsequent steps are executed starting from the memory configuration information acquisition instruction containing the target memory number generated according to the preset specification, until the response information corresponding to each memory number is obtained.
[0090] By summarizing the intermediate configuration information, the memory configuration information of the target device is obtained.
[0091] Specifically, the target device is, for example, a CXL device. Each CXL device has a maximum of two memory modules, each with a unique identifier, denoted as Dimmindex. The process retrieves the memory identifiers for the target device, for example: Dimmindex=0, Dimmindex=1, etc. The specific identifier value is set according to actual needs. The number of memory identifiers is the first preset quantity, i.e., the number of memory modules.
[0092] The target memory number is determined from the first preset number of memory numbers. For example, each memory number is used as the target memory number in turn, and Dimmindex=0 is used as the target memory number first. The preset specification is, for example, the CXL specification. Based on the CXL specification, a 16-byte access instruction needs to be written to access the CXL device space to confirm the type of information being accessed. The 16-byte access instruction is the access instruction for SPD information. The memory configuration information acquisition instruction containing the target memory number is generated according to the preset specification. The memory configuration information acquisition instruction is, for example, the access instruction for SPD information. The access instruction for SPD information is, for example, RequestData
[16] ={0x00,0x1b,0x00,0x00,0x04,0x01,0x00,0x00,0x20,0x01,0x00,0x00,0x05,0x00,0x00,0x00}, where RequestData
[10] is the value of the target memory number.
[0093] The third offset is, for example, 0x14, and the fourth offset is, for example, 0x3ffc. Offset the memory base address (BarAddress) by the third offset to obtain the first target address, for example, BarAddress+0x14. Offset the memory base address by the fourth offset to obtain the second target address, for example, BarAddress+0x3ffc.
[0094] The data of the memory configuration information retrieval instruction is sequentially written into the memory space of the first target address to access the target device. For example, the data of RequestData
[16] is sequentially written into the memory space at address BarAddress+0x14 to access the CXL device. Because each access to the CXL device requires waiting for a preset time to obtain the return value, an interrupt needs to be generated to wait for the preset time. The preset time is, for example, 10 milliseconds, and the first preset value is, for example, 1. The first preset value for generating the interrupt is written to the second target address. For example, 1 is written to address BarAddress+0x3ffc to generate an interrupt, wait for 10 milliseconds, and then the response information corresponding to the memory configuration information retrieval instruction is written into the memory space at the preset address. The response information corresponding to the memory configuration information retrieval instruction is at the preset address, for example, BarAddress+0x2000. The response information (ResponseData) is, for example, the memory SPD information dataset.
[0095] Access the memory space at the aforementioned preset address to obtain the response information (ResponseData). The preset byte is, for example, the 11th byte of ResponseData, and the second preset value is, for example, 0. Determine whether the preset byte of the response information is the second preset value. If the preset byte is the second preset value, it means that the slot of the target memory number has memory information. Use the response information (ResponseData) as intermediate configuration information for the memory corresponding to the target memory number, so that the collected response information can be uploaded to the SMBIOS protocol for the operating system to use.
[0096] If the preset byte is not the second preset value, it means that the slot of the target memory number has no memory information. A new target memory number is determined from the first preset number of memory numbers. For example, Dimmindex is incremented by 1, and Dimmindex=1 is used as the new target memory number. Using the new target memory number, the subsequent steps begin from the memory configuration information retrieval instruction generated according to the preset specification, which includes the target memory number. This continues to collect memory data from the next memory slot until the response information corresponding to each memory number is obtained.
[0097] Summarize all intermediate configuration information to obtain the memory configuration information of all memory under the target device. For example, the SPD data of memory under the CXL device.
[0098] In this embodiment, the first target address and the second target address are determined by using the memory base address. The memory configuration information acquisition instruction is written to the memory space of the first target address, and an interrupt is generated by writing a first preset value to the second target address. The response information is written to the memory space of the preset address, and finally the memory configuration information is obtained from the response information. The memory configuration information can be obtained without the need for the Type17 interface, thus overcoming the limitations of traditional SMBIOS memory configuration information reporting.
[0099] In some alternative implementations, memory configuration information is uploaded to the operating system, including:
[0100] A configuration information structure is created according to the preset specifications, and the memory configuration information is written into the configuration information structure;
[0101] Using the preset upload service, the memory configuration information in the configuration information structure is uploaded to the preset location of the configuration data table in the operating system.
[0102] Specifically, the preset specifications include, for example, the SMBIOS specification; the configuration information structure includes, for example, the Type 17 structure (SMBIOSTableType17); and the memory configuration information includes, for example, the SPD data of the memory under the CXL device. A configuration information structure is created according to the preset specifications, and the memory SPD information is written into the configuration information structure one by one.
[0103] Preset upload services include, for example, SMBIOS -> Add service; configuration data tables include, for example, the system Type 17 data table; and preset locations include, for example, the location within the system Type 17 data table after system memory. Using these preset upload services, the memory configuration information in the configuration information structure is uploaded to the preset location of the configuration data table in the operating system.
[0104] In this embodiment, memory configuration information is written into a configuration information structure, and then the memory configuration information in the configuration information structure is uploaded to a preset location in the configuration data table in the operating system. The structure and data table are used to ensure the content and upload order of the memory configuration information, so that the memory configuration information can be accurately uploaded to the operating system.
[0105] In some optional implementations, device information of the target device is obtained from the configuration dataset, including:
[0106] Obtain the controller number of the device controller corresponding to the target device, wherein the number of controller numbers is a second preset quantity;
[0107] Based on the second preset number of controllers, obtain the device information of the target device on the device controller from the configuration dataset.
[0108] Specifically, the target device is, for example, a CXL device, and the device controller is, for example, a CXL controller. A dual-CPU system can have a maximum of 32 CXL controllers. The Index is the controller number of the CXL controller, and the number of controller numbers is a second preset number, i.e., the number of CXL controllers. The second preset number is, for example, 32, and the specific number is set according to actual needs.
[0109] Obtain the controller number of the device controller corresponding to the target device. For example, the controller number of the device controller corresponding to the target device is 1.
[0110] The configuration dataset is, for example, the dataset mCxlNbioProtocol for CXL devices. Based on a second preset number of controller numbers, the device information of the target device on the device controller is retrieved from the configuration dataset. For example, in the dataset mCxlNbioProtocol for CXL devices, the configuration information of the CXL device on the CXL controller with the controller number at index is retrieved, and it is determined whether the information retrieval was successful. If successful, it proves that a CXL device exists on the current CXL controller, and information collection continues; if unsuccessful, it proves that a CXL device does not exist on the current CXL controller, the controller number is incremented, and the process continues to access the next CXL controller until all CXL controllers have been traversed.
[0111] In some optional implementations, the method further includes, before retrieving the device information of the target device from the configuration dataset:
[0112] Use the first interface function to obtain the configuration dataset of the target device under the operating system;
[0113] Check the status information of the configuration dataset obtained by the first interface function. If the status information is the third preset value, then execute the process of obtaining the device information of the target device from the configuration dataset.
[0114] Specifically, a Protocol, functionally similar to the interface functions provided by UEFI, is an agreement between the service provider and the service caller, allowing them to exchange information. Therefore, a first interface function could be, for example, the LocateCxlNbio Protocol.
[0115] The first interface function is used to obtain the configuration dataset of all registered target devices under the operating system. For example, the configuration dataset is mCxlNbioProtocol for CXL devices.
[0116] The third preset value is, for example, "success". The function checks the status information of the configuration dataset obtained from the first interface function. If the status information is the third preset value, it means a CXL device exists, and the function retrieves the target device's information from the configuration dataset. If the status information is not the third preset value, it means no CXL device exists, and the function exits directly, without running the subsequent code.
[0117] In this embodiment, the status information of the configuration dataset obtained by the first interface function is checked. By judging whether the status information is a third preset value, it is determined whether the obtained configuration dataset contains accurate device information. After determination, the device information of the target device is obtained from the configuration dataset to ensure that the information is accurate.
[0118] In some alternative implementations, the method further includes:
[0119] Register a memory configuration information reporting event. This event is used to call the memory configuration information collection function when the second interface function is installed. The second interface function is used to check the connection status of the driver in the operating system.
[0120] The memory configuration information collection function is used to retrieve the device information of the target device from the configuration dataset, given that the configuration dataset of the target device has been obtained, and then proceed with subsequent steps.
[0121] Specifically, the second interface function, for example, `gBdsAllDriversConnectedProtocolGuid protocol`, performs the following functions: checking the connection status of drivers in the operating system and verifying that all necessary drivers have been correctly loaded and connected to the system. The installation of this second interface function indicates that PCIe training has completed and the CXL device's configuration space can be accessed.
[0122] The memory configuration information reporting event is registered. When the second interface function is installed, it is determined that PCIe training has ended and the configuration space of the CXL device can be accessed. The memory configuration information collection function is called, for example, the CXL Type 17 information collection function. The memory configuration information collection function is used to execute the above steps S101 to S104.
[0123] In this embodiment, the ability to access the target device is determined by whether the second interface function is installed. If the second interface function is installed, it is determined that the target device can be accessed. Then, the memory configuration information collection function is called to report the memory configuration information, ensuring that the memory configuration information can be successfully obtained.
[0124] In some optional implementations, the specific process of reporting the SPD information of memory to the operating system may further include steps A1 to A5.
[0125] In step A1, MXC reads the SPD information from the memory via I2C and stores it in its own DVSEC space.
[0126] Specifically, the configuration space register used to store the SPD information of the memory is defined in the MXC (Memory Expander Controller) as the DVSEC space of the MXC. The MXC and the CPU are connected via CXL / PCIe. After the MXC accesses the memory's SPD information through the I2C link, it stores the SPD information in the DVSEC space.
[0127] Additionally, if different partitions in memory have different sizes, the memory size in the SPD information read by MXC is a total value. However, when MXC reports SPD information, it can modify the memory size in the SPD information according to the specific situation of each partition. This can make the reported SPD information more accurate without adding any other analysis operations.
[0128] Step A2: The BIOS reads the information from the register corresponding to the DVSEC space with space ID (Vendor ID) 1e98h.
[0129] Step A3: Based on the information read, determine whether the CXL device has memory expansion capability.
[0130] Step A4: If the CXL device supports memory expansion, read the corresponding register (DVSEC Vendor ID: 30) to obtain SPD information. If the CXL device does not support memory expansion, there is no need to read the register; determine whether the next CXL device has memory expansion capability.
[0131] Specifically, the process of BIOS obtaining SPD information can also be as follows: MXC first sends SPD information to BMC (Baseboard Management Controller) connected to MXC via I2C line, BIOS (Basic Input Output System) then obtains SPD information from BMC via IPMI command, and then reports the SPD information to the operating system.
[0132] Step A5: Add the read SPD information to the operating system's Type 17 data table to complete the SPD information reporting.
[0133] In this embodiment, a configuration space register for storing SPD information is defined in the MXC. After the MXC is powered on, it fills its configuration space register with the SPD information. After the CPU is powered on, the BIOS can directly obtain the corresponding SPD information from the configuration space register of the MXC, realizing the reporting of in-band asset information of the CXL memory expansion device, which helps to solve the fault location problem in future large memory pool application scenarios.
[0134] In some alternative implementations, Figure 2 This is a flowchart of a method for reporting CXL device Type 17 information according to an embodiment of the present invention, as follows: Figure 2 As shown, the process includes the following steps:
[0135] Register an event to call the CXL Type 17 information collection function when the gBdsAllDriversConnectedProtocolGuid protocol is installed; Locate CxlNbio Protocol to retrieve the dataset mCxlNbioProtocol of all registered CXL devices on the current system and return the information retrieval status; Check if the status is success. If it is, there may be 32 CXL devices in the dual-CPU system. controller, traverse all controllers; check if Index = 0, Index < 32, Index++; obtain the CXL device information of controller with Index through mCxlNbioProtocol; check if the acquisition of CXL device information is successful, if so, obtain the memory base address BarAddress of CXL device access according to PCIE specification and CXL specification by using the CXL device bus number, device number and function number obtained from mCxlNbioProtocol; each controller has a maximum of two memory lines, traverse all memory lines, obtain the memory number in silkscreen: Dimmindex; check if Dimmindex = 0, Dimmindex < 2, if so, define array RequestData
[16] = {0x00,0x1b,0x00,0x00,0x04,0x01,0x00,0x00,0x20,0x0 1,0x00,0x00,0x05,0x00,0x00,0x00}, where RequestData
[10] = Dimmindex; Write the data of RequestData
[16] sequentially to the memory space at address BarAddress+0x14, and wait 10 milliseconds for each access to CXL to obtain the return value; Write 1 to address BarAddress+0x3ffc to generate an interrupt, and wait 10 milliseconds for the SPD information of the CXL device to be written to the memory space; Read the memory space data starting from address BarAddress+0x2000 to obtain the memory SPD information dataset ResponseData; Determine ResponseData
[11] = 0, and if so, create a Type17 structure SmbiosTableType17 based on the SMBIOS specification, and write the SPD data one by one; Add the memory data to the system Type17 data table through the Smbios->Add service. See the specific process. Figure 2 .
[0136] In this implementation, the SMBIOS standardized format ensures that critical information about CXL devices (such as type, status, and configuration) can be consistently identified and processed by the operating system and management software, simplifying system management and monitoring processes. This standardized management approach helps ensure that information from all CXL devices is presented in the same way, facilitating unified management. The reported information helps system administrators understand the status of CXL devices in a timely manner, facilitating fault diagnosis and maintenance, and reducing operational costs. SMBIOS information makes it easier to identify problems, quickly locate the cause of faults, and take appropriate measures. SMBIOS information provides a better understanding of the distribution of CXL resources in the system, providing a basis for resource allocation and future planning. Administrators can make more informed decisions based on this information, such as when to upgrade hardware and how to optimize configurations. Reporting CXL device information helps ensure compatibility and consistency between system components, thereby improving the stability and reliability of the entire system. SMBIOS information ensures more efficient collaboration between CXL devices and other system components.
[0137] This embodiment also provides a memory configuration information reporting device, which is used to implement the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.
[0138] This embodiment provides a memory configuration information reporting device, such as... Figure 3 As shown, it includes:
[0139] The first acquisition module 301 is used to acquire device information of the target device from the configuration dataset when the configuration dataset of the target device is acquired.
[0140] The second acquisition module 302 is used to acquire the device identifier of the target device from the device information, determine the device start address of the target device based on the device identifier, and obtain the memory base address of the target device based on the device start address and address offset information.
[0141] The third acquisition module 303 is used to acquire instructions based on the memory base address and memory configuration information, access the target device, and acquire the memory configuration information of the memory under the target device;
[0142] Upload module 304 is used to upload memory configuration information to the operating system.
[0143] In some optional implementations, the second acquisition module 302 obtains the memory base address of the target device based on the device start address and address offset information, including:
[0144] Based on a preset addressing method, the device starting address is offset by a first offset to obtain a first address, wherein the first offset is included in the address offset information;
[0145] Based on the preset addressing method, the device starting address is offset by a second offset to obtain the second address, wherein the second offset is included in the address offset information;
[0146] By combining the first address and the second address, we obtain the memory base address.
[0147] In some optional implementations, the third acquisition module 303 accesses the target device and acquires the memory configuration information of the memory under the target device according to the memory base address and memory configuration information acquisition instructions, including:
[0148] Obtain the memory IDs of the target device's memory, where the number of memory IDs is a first preset quantity;
[0149] The target memory number is determined from the first preset number of memory numbers, and a memory configuration information retrieval instruction containing the target memory number is generated according to the preset specifications.
[0150] Offset the memory base address by the third offset to obtain the first target address, and offset the memory base address by the fourth offset to obtain the second target address;
[0151] The data of the memory configuration information retrieval instruction is sequentially written into the memory space of the first target address, and a first preset value for generating an interrupt is written into the second target address, so as to write the response information corresponding to the memory configuration information retrieval instruction into the memory space of the preset address. The interrupt is used to wait for a preset duration.
[0152] Access the memory space at the preset address, obtain the response information, and determine whether the preset byte of the response information is the second preset value;
[0153] If the preset byte is the second preset value, the response information will be used as the intermediate configuration information of the memory corresponding to the target memory number;
[0154] Based on the target memory number and the preset step size, a new target memory number is determined from the first preset number of memory numbers. The new target memory number is used as the target memory number. The subsequent steps are executed starting from the memory configuration information acquisition instruction containing the target memory number generated according to the preset specification, until the response information corresponding to each memory number is obtained.
[0155] By summarizing the intermediate configuration information, the memory configuration information of the target device is obtained.
[0156] In some optional implementations, the upload module 304 uploads memory configuration information to the operating system, including:
[0157] A configuration information structure is created according to the preset specifications, and the memory configuration information is written into the configuration information structure;
[0158] Using the preset upload service, the memory configuration information in the configuration information structure is uploaded to the preset location of the configuration data table in the operating system.
[0159] In some optional implementations, the first acquisition module 301 acquires device information of the target device from the configuration dataset, including:
[0160] Obtain the controller number of the device controller corresponding to the target device, wherein the number of controller numbers is a second preset quantity;
[0161] Based on the second preset number of controllers, obtain the device information of the target device on the device controller from the configuration dataset.
[0162] In some alternative embodiments, the device further includes:
[0163] The fourth acquisition module is used to acquire the configuration dataset of the target device under the operating system using the first interface function;
[0164] The inspection module is used to check the status information of the configuration dataset obtained by the first interface function. If the status information is a third preset value, then the device information of the target device is obtained from the configuration dataset.
[0165] In some alternative embodiments, the device further includes:
[0166] The registration module is used to register memory configuration information reporting events. These events are used to call the memory configuration information collection function when the second interface function is installed. The second interface function is used to check the connection status of the driver in the operating system.
[0167] The execution module, which is used for memory configuration information collection functions, is used to retrieve the device information of the target device from the configuration dataset and begin executing subsequent steps.
[0168] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.
[0169] In this embodiment, the memory configuration information reporting device is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.
[0170] This invention also provides a computer device having the above-described features. Figure 3 The memory configuration information reporting device shown.
[0171] Please see Figure 4 , Figure 4 This is a schematic diagram of the structure of a computer device provided in an optional embodiment of the present invention, such as... Figure 4 As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 4 Take a processor 10 as an example.
[0172] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include an integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field-programmable gate array (FPGA), a general-purpose array logic (GPA), or any combination thereof.
[0173] The memory 20 stores instructions executable by at least one processor 10 to cause at least one processor 10 to perform the method shown in the above embodiments.
[0174] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.
[0175] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.
[0176] The computer device also includes a communication interface 30 for communicating with other devices or communication networks.
[0177] This invention also provides a computer non-volatile readable storage medium. The methods described above according to embodiments of the invention can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded over a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that a computer, processor, microprocessor controller, or programmable hardware includes storage components capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.
[0178] A portion of this invention can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to the invention through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-nonvolatile readable storage medium or communication medium accessible to a computer.
[0179] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined in this application.
Claims
1. A method for reporting memory configuration information, characterized in that, The method includes: If the configuration dataset of the target device is obtained, the device information of the target device is obtained from the configuration dataset; Obtain the device identifier of the target device from the device information; determine the device start address of the target device based on the device identifier; and obtain the memory base address of the target device based on the device start address and address offset information. According to the memory base address and memory configuration information, the instruction is used to access the target device and obtain the memory configuration information of the memory under the target device; The step of accessing the target device and obtaining the memory configuration information of the memory under the target device according to the memory base address and memory configuration information acquisition instruction includes: obtaining the memory number of the memory under the target device, wherein the number of memory numbers is a first preset number; determining the target memory number from the first preset number of memory numbers, and generating the memory configuration information acquisition instruction containing the target memory number according to a preset specification; offsetting the memory base address by a third offset to obtain a first target address, and offsetting the memory base address by a fourth offset to obtain a second target address; sequentially writing the data of the memory configuration information acquisition instruction into the memory space of the first target address, and writing a first preset value for generating an interrupt to the second target address to obtain the response information corresponding to the memory configuration information acquisition instruction. Write to a memory space at a preset address, wherein the interrupt is used to wait for a preset duration; access the memory space at the preset address to obtain the response information, and determine whether the preset byte of the response information is a second preset value; if the preset byte is the second preset value, use the response information as intermediate configuration information for the memory corresponding to the target memory number; determine a new target memory number from a first preset number of memory numbers according to the target memory number and a preset step size, use the new target memory number as the target memory number, and start executing subsequent steps from the instruction to obtain the memory configuration information containing the target memory number according to the preset specification until the response information corresponding to each memory number is obtained; summarize the intermediate configuration information to obtain the memory configuration information of the memory under the target device; The memory configuration information is uploaded to the operating system.
2. The method according to claim 1, characterized in that, The step of obtaining the memory base address of the target device based on the device start address and address offset information includes: Based on a preset addressing method, the starting address of the device is offset by a first offset to obtain a first address, wherein the first offset is included in the address offset information; Based on a preset addressing method, the starting address of the device is offset by a second offset to obtain a second address, wherein the second offset is included in the address offset information; The memory base address is obtained by combining the first address and the second address.
3. The method according to claim 1, characterized in that, Uploading the memory configuration information to the operating system includes: A configuration information structure is created according to a preset specification, and the memory configuration information is written into the configuration information structure; Using a preset upload service, the memory configuration information in the configuration information structure is uploaded to a preset location in the configuration data table of the operating system.
4. The method according to claim 1, characterized in that, The step of obtaining the device information of the target device from the configuration dataset includes: Obtain the controller number of the device controller corresponding to the target device, wherein the number of controller numbers is a second preset number; According to the second preset quantity, the controller number is used to obtain the device information of the target device on the device controller from the configuration dataset.
5. The method according to claim 1, characterized in that, Before obtaining the device information of the target device from the configuration dataset, the method further includes: The configuration dataset of the target device under the operating system is obtained using the first interface function; Check the status information of the configuration dataset obtained by the first interface function. If the status information is a third preset value, then execute the step of obtaining the device information of the target device from the configuration dataset.
6. The method according to claim 1, characterized in that, The method further includes: Register a memory configuration information reporting event, wherein the memory configuration information reporting event is used to call the memory configuration information collection function when the second interface function is installed, and the second interface function is used to check the connection status of the driver in the operating system; The memory configuration information collection function is used to start executing subsequent steps from obtaining the device information of the target device from the configuration dataset, provided that the configuration dataset of the target device has been obtained.
7. A memory configuration information reporting device, characterized in that, The device includes: The first acquisition module is used to acquire device information of the target device from the configuration dataset when the configuration dataset of the target device is acquired; The second acquisition module is used to acquire the device identifier of the target device from the device information, determine the device start address of the target device based on the device identifier, and obtain the memory base address of the target device based on the device start address and address offset information. The third acquisition module is used to acquire instructions based on the memory base address and memory configuration information, access the target device and acquire the memory configuration information of the memory under the target device; The third acquisition module accesses the target device and acquires the memory configuration information of the memory under the target device according to the memory base address and memory configuration information acquisition instruction, including: acquiring the memory number of the memory under the target device, wherein the number of memory numbers is a first preset number; determining the target memory number from the first preset number of memory numbers, and generating the memory configuration information acquisition instruction containing the target memory number according to a preset specification; offsetting the memory base address by a third offset to obtain a first target address, and offsetting the memory base address by a fourth offset to obtain a second target address; sequentially writing the data of the memory configuration information acquisition instruction into the memory space of the first target address, and writing a first preset value for generating an interrupt into the second target address to trigger the response corresponding to the memory configuration information acquisition instruction. The response information is written to a memory space at a preset address, wherein the interrupt is used to wait for a preset duration; the memory space at the preset address is accessed to obtain the response information, and it is determined whether the preset byte of the response information is a second preset value; if the preset byte is the second preset value, the response information is used as intermediate configuration information for the memory corresponding to the target memory number; according to the target memory number and a preset step size, a new target memory number is determined from a first preset number of memory numbers, and the new target memory number is used as the target memory number, and subsequent steps are executed starting from the instruction to obtain the memory configuration information containing the target memory number according to the preset specification, until the response information corresponding to each memory number is obtained; the intermediate configuration information is summarized to obtain the memory configuration information of the memory under the target device; The upload module is used to upload the memory configuration information to the operating system.
8. A computer device, characterized in that, include: A memory and a processor are interconnected, the memory stores computer instructions, and the processor executes the memory configuration information reporting method according to any one of claims 1 to 6 by executing the computer instructions.
9. A computer-defined non-volatile readable storage medium, characterized in that, The computer non-volatile readable storage medium stores computer instructions, which are used to cause the computer to execute the memory configuration information reporting method according to any one of claims 1 to 6.