Time delay determination method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a time delay determination method and device, electronic equipment and a storage medium. According to the scheme, a to-be-processed line channel group in the quantum computing measurement and control system is determined, wherein the to-be-processed line channel group comprises a first line channel, a second line channel and a third line channel; obtaining a first relative time delay and a second relative time delay; searching a first time delay, a second time delay and a third time delay corresponding to the first line channel, the second line channel and the third line channel at the current moment respectively; and updating at least one of the first time delay, the second time delay and the third time delay based on the first relative time delay and the second relative time delay. According to the technical scheme provided by the embodiment of the invention, the time delay of signal transmission among the magnetic flux modulation line channels in the quantum computing measurement and control system is determined, so that the quantum bit frequency regulation and control signal can be transmitted to the quantum bit and the adjustable coupler at the same time when multiple quantum bit gate operation is carried out; and the accuracy of quantum calculation is improved.

Description

Technical Field

[0001] The present application relates to the field of quantum computing technology, and in particular to a method, device, electronic device and storage medium for determining a time delay. Background Art

[0002] Quantum computing is a computational model that uses the basic properties of quantum mechanics to solve problems. It is achieved by building a quantum physics hardware system that can be precisely operated and running quantum computing software to implement quantum algorithms, solve computational problems, and apply quantum computing to specific problems or fields.

[0003] In the process of quantum computing, especially when using multiple quantum bits to perform multi-qubit gate operations, such as two-qubit gate operations, two quantum bits and an adjustable coupler that couples the two quantum bits are required to perform quantum computing each time. In this process, the quantum computing measurement and control system (such as an integrated measurement and control machine) transmits the quantum bit frequency control signal to the interfaces of the two quantum bits and the corresponding magnetic flux modulation line (i.e., Z line) of the adjustable coupler through the magnetic flux modulation line channel to realize the two-qubit gate operation. Summary of the invention

[0004] The purpose of the embodiments of the present invention is to provide a method, device, electronic device and storage medium for determining the delay of signal transmission between each flux modulation line channel in a quantum computing measurement and control system, thereby ensuring that the quantum bit frequency control signal can be transmitted to the quantum bit and the adjustable coupler at the same time when performing multi-qubit gate operations, thereby improving the accuracy of quantum computing. The specific technical solution is as follows:

[0005] The present invention provides a method for determining a delay, the method comprising:

[0006] Determine a line channel group to be processed in a quantum computing measurement and control system, wherein the line channel group to be processed includes a first line channel, a second line channel, and a third line channel for transmitting a quantum bit frequency control signal;

[0007] In a case where the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, a first relative delay and a second relative delay are obtained, where the first relative delay and the second relative delay are signal transmission delays between any two line channels among the first line channel, the second line channel and the third line channel;

[0008] respectively searching for a first delay, a second delay and a third delay corresponding to the first line channel, the second line channel and the third line channel at the current moment; the first delay, the second delay and the third delay are preset delays, or are delays updated before the current moment;

[0009] At least one of the first delay, the second delay, and the third delay is updated based on the first relative delay and the second relative delay.

[0010] The embodiment of the present application further provides a delay determination device, the device comprising:

[0011] A first determination module is used to determine a line channel group to be processed in a quantum computing measurement and control system, wherein the line channel group to be processed includes a first line channel, a second line channel and a third line channel for transmitting a quantum bit frequency control signal;

[0012] an acquisition module, configured to acquire a first relative delay and a second relative delay when the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, wherein the first relative delay and the second relative delay are signal transmission delays between any two line channels among the first line channel, the second line channel and the third line channel;

[0013] a search module, configured to search for a first delay, a second delay, and a third delay corresponding to the first line channel, the second line channel, and the third line channel at a current moment, respectively; the first delay, the second delay, and the third delay are preset delays, or are delays updated before the current moment;

[0014] The first updating module is configured to update at least one of the first delay, the second delay and the third delay based on the first relative delay and the second relative delay.

[0015] The embodiment of the present application also provides an electronic device, including a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus;

[0016] Memory, used to store computer programs;

[0017] The processor is used to implement any of the above-mentioned delay determination method steps when executing the program stored in the memory.

[0018] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, any of the above-mentioned delay determination method steps is implemented.

[0019] An embodiment of the present invention further provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute any of the delay determination methods described above.

[0020] An embodiment of the present application also provides a quantum computing measurement and control system to implement any of the above-mentioned delay determination methods.

[0021] Beneficial effects of the embodiments of the present invention:

[0022] The technical solution provided by the embodiment of the present invention, when the first line channel, the second line channel, and the third line channel in the determined quantum computing measurement and control system are linked through the first quantum bit, the second quantum bit, and the first adjustable coupler, by obtaining two sets of signal transmission delays between any two line channels, namely the first relative delay and the second relative delay, thereby updating at least one of the first delay corresponding to the first line channel at the current moment, the second delay corresponding to the second line channel, and the third delay corresponding to the third line channel based on the first relative delay and the second relative delay, which can realize the determination of the delay of signal transmission between each flux modulation line channel in the quantum computing measurement and control system.

[0023] Since at least one of the first delay, the second delay and the third delay is updated based on the first relative delay and the second relative delay, the updated delay matches the first relative delay and the second relative delay, which effectively ensures the accuracy of the updated delay, so that when performing multi-qubit gate operations, the qubit frequency control signal transmitted based on the updated delay can reach the qubit and the adjustable coupler at the same time, effectively improving the accuracy of quantum computing.

[0024] In addition, when the first delay, the second delay or the third delay is the delay updated before the current moment, when the delay is updated according to the first relative delay and the second relative delay between any two line channels among the first line channel, the second line channel and the third line channel, the correlation of the delays of the various line channels can be effectively established, so that the delays corresponding to each line channel finally determined are correlated with each other, which effectively improves the accuracy and correlation of the determined delays. Moreover, once the line channel is replaced, since the determined delay is bound to each line channel, the signal can be directly transmitted according to the determined delay without re-determining the delay, which improves the applicability of the determined delay.

[0025] Of course, it is not necessary to achieve all of the advantages described above at the same time to implement any product or method of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 A schematic diagram of a structure of a 9-qubit quantum chip in the related art;

[0028] Figure 2 A schematic diagram of a first flow chart of a delay determination method provided in an embodiment of the present application;

[0029] Figure 3 A second flow chart of the delay determination method provided in an embodiment of the present application;

[0030] Figure 4 A third flow chart of the delay determination method provided in an embodiment of the present application;

[0031] Figure 5 A fourth flow chart of the delay determination method provided in an embodiment of the present application;

[0032] Figure 6 A fifth flow chart of the delay determination method provided in the embodiment of the present application;

[0033] Figure 7 A sixth flow chart of the delay determination method provided in an embodiment of the present application;

[0034] Figure 8 A schematic diagram of a flow chart of a method for determining an associated line channel provided in an embodiment of the present application;

[0035] Fig. 9 A seventh flow chart of the delay determination method provided in the embodiment of the present application;

[0036] Fig.10 An eighth flow chart of the delay determination method provided in an embodiment of the present application;

[0037] Fig.11 A ninth flow chart of the delay determination method provided in an embodiment of the present application;

[0038] Fig.12 A schematic diagram of the structure of a delay determination device provided in an embodiment of the present application;

[0039] Fig.13 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] At present, a quantum chip can include multiple quantum bits, and adjacent quantum bits are coupled and connected through adjustable couplers. Figure 1 To explain, Figure 1 The figure is a schematic diagram of a structure of a 9-qubit quantum chip in the related art, wherein Q1-Q9 are 9 qubits on the quantum chip, and C1-C12 are adjustable couplers for coupling adjacent qubits.

[0042] The above-mentioned adjustable coupler has a similar structure to a quantum bit, except that the adjustable coupler does not have an interface for receiving quantum state control signals and a resonant cavity for directly reading information. The structures of the quantum bit and the adjustable coupler can be referred to the quantum bit and the adjustable coupler in the related art, and will not be described in detail here.

[0043] When performing multi-qubit gate operations, since multiple qubits need to be called at the same time, it is necessary to determine the delay of each qubit and the adjustable coupler in their corresponding flux modulation line channels, so as to ensure that the qubit frequency control signal can be transmitted to the qubit and the adjustable coupler at the same time.

[0044] In the related art, when the flux modulation line channel on the quantum computing measurement and control system is connected to the Z line interface corresponding to the quantum bit and the adjustable coupler, the user can determine the delay between the pulse modulation line (i.e., XY line) corresponding to each quantum bit and the Z line through experiments. In addition, considering the adjustable coupler and at least two quantum bits used in the multi-quantum logic gate operation, it is necessary to manually determine the delay between the adjustable coupler and the Z line corresponding to each two quantum bits.

[0045] As the number of qubits on quantum chips continues to increase, the manual method of determining the delay requires a lot of labor costs, and the error rate caused by manual errors will also increase significantly. In addition, since the delay is set for each qubit and adjustable coupler, but the line delay is caused by the devices and line lengths on each line channel in the quantum computing measurement and control system, once the line channel is replaced, the delay between each qubit and the adjustable coupler needs to be re-determined.

[0046] In order to solve the problems in the related art, the present application embodiment provides a method for determining a delay. Figure 2 As shown, Figure 2 The first flow chart of the delay determination method provided in the embodiment of the present application is shown in FIG. The method can be applied to any electronic device, which can be a quantum computing measurement and control system or other device, and the electronic device is not specifically limited here. Figure 2 The method shown includes the following steps.

[0047] Step S201, determining a line channel group to be processed in a quantum computing measurement and control system, where the line channel group to be processed includes a first line channel, a second line channel and a third line channel for transmitting a quantum bit frequency control signal.

[0048] Step S202, when the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, a first relative delay and a second relative delay are obtained, where the first relative delay and the second relative delay are signal transmission delays between any two line channels among the first line channel, the second line channel and the third line channel.

[0049] Step S203, respectively searching for the first delay, the second delay and the third delay corresponding to the first line channel, the second line channel and the third line channel at the current moment; the first delay, the second delay and the third delay are preset delays, or are delays updated before the current moment.

[0050] Step S204: based on the first relative delay and the second relative delay, update at least one of the first delay, the second delay and the third delay.

[0051] pass Figure 1 The method shown, in the case where the first line channel, the second line channel, and the third line channel in the determined quantum computing measurement and control system are linked through the first quantum bit, the second quantum bit, and the first adjustable coupler, obtains two sets of signal transmission delays between any two line channels, namely the first relative delay and the second relative delay, and then based on the first relative delay and the second relative delay, updates at least one of the first delay corresponding to the first line channel at the current moment, the second delay corresponding to the second line channel, and the third delay corresponding to the third line channel, which can realize the determination of the delay of signal transmission between each flux modulation line channel in the quantum computing measurement and control system.

[0052] Since at least one of the first delay, the second delay and the third delay is updated based on the first relative delay and the second relative delay, the updated delay matches the first relative delay and the second relative delay, which effectively ensures the accuracy of the updated delay, so that when performing multi-qubit gate operations, the qubit frequency control signal transmitted based on the updated delay can reach the qubit and the adjustable coupler at the same time, effectively improving the accuracy of quantum computing.

[0053] In addition, when the first delay, the second delay or the third delay is the delay updated before the current moment, when the delay is updated according to the first relative delay and the second relative delay between any two line channels among the first line channel, the second line channel and the third line channel, the correlation of the delays of the various line channels can be effectively established, so that the delays corresponding to each line channel finally determined are correlated with each other, which effectively improves the accuracy and correlation of the determined delays. Moreover, once the line channel is replaced, since the determined delay is bound to each line channel, the signal can be directly transmitted according to the determined delay without re-determining the delay, which improves the applicability of the determined delay.

[0054] The embodiments of the present application are described below through specific examples.

[0055] With respect to the above step S201, that is, determining a line channel group to be processed in the quantum computing measurement and control system, the line channel group to be processed includes a first line channel, a second line channel and a third line channel for transmitting a quantum bit frequency control signal.

[0056] In an embodiment of the present application, the quantum computing measurement and control system may include multiple pulse modulation circuit channels (i.e., the fourth circuit channel hereinafter) and multiple flux modulation circuit channels (i.e., the fifth circuit channel hereinafter).

[0057] The fourth line channel is used to transmit quantum state control signals to quantum bits, and the fifth line channel is used to transmit quantum bit frequency control signals to quantum bits or adjustable couplers. The number of the fourth line channel and the fifth line channel in the quantum computing measurement and control system can be set according to the number of quantum bits and adjustable couplers included on the quantum chip. Among them, the number of the fifth line channel is greater than the number of the fourth line channel. Here, the number of the fourth line channel and the fifth line channel in the quantum computing measurement and control system is not specifically limited.

[0058] The electronic device may store the link relationship (or association relationship) between each fifth line channel. The electronic device may select three fifth line channels as the line channel group to be processed according to the link relationship between each fifth line channel. The three fifth line channels are respectively recorded as the first line channel, the second line channel and the third line channel. The method for determining the line channel group to be processed can be referred to the following description, which is not described in detail here.

[0059] In an optional embodiment, the link relationship between the fifth line channels may be represented in the form of a table, a character string, etc.

[0060] For ease of understanding, the link relationship between the fifth line channels is described below using a first list, and the first list may be shown in Table 1.

[0061] Table 1

[0062] XY / Z Z1 Z2 Z3 … XY1 0 / 1 0 / 1 0 / 1 … XY2 0 / 1 0 / 1 0 / 1 … XY3 0 / 1 0 / 1 0 / 1 … … … … … …

[0063] In the above Table 1, each row corresponds to a fourth line channel in the quantum computing measurement and control system, that is, XY1, XY2, XY3, etc. in Table 1, and each column corresponds to a fifth line channel in the quantum computing measurement and control system, that is, Z1, Z2, Z3, etc. in Table 1. Each cell in Table 1 has a corresponding fourth line channel, fifth line channel and value.

[0064] The value of each cell in the above Table 1 may be a first value or a second value. The first value indicates that the fourth line channel and the fifth line channel corresponding to the cell are not linked, such as 0 in the above Table 1; the second value indicates that the fourth line channel and the fifth line channel corresponding to the cell are linked, such as 1 in the above Table 1. For ease of understanding, the following description is only based on the example that the first value is 0 and the second value is 1, which does not serve any limiting role.

[0065] For each row in the first list, if the values ​​corresponding to any two cells in the row are both the second values, the electronic device can determine that there is an association relationship between the fifth line channels corresponding to the two cells.

[0066] For ease of understanding, cell 1 corresponding to XY1 and Z1, and cell 2 corresponding to XY1 and Z2 in the above Table 1 are taken as examples for description.

[0067] When the values ​​corresponding to the above-mentioned cell 1 and cell 2 are both 1, that is, the values ​​corresponding to cell 1 and cell 2 are 11, the electronic device can determine that there is an association between Z1 and Z2; when at least one of the values ​​corresponding to the above-mentioned cell 1 and cell 2 is 0, that is, the values ​​corresponding to cell 1 and cell 2 are 00, 01 or 10, the electronic device can determine that there is no association between Z1 and Z2.

[0068] For the above step S202, that is, when the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, the first relative delay and the second relative delay are obtained, and the first relative delay and the second relative delay are the signal transmission delay between any two line channels of the first line channel, the second line channel and the third line channel.

[0069] In this step, when the first line channel, the second line channel and the third line channel establish a link through two quantum bits (recorded as the first quantum bit and the second quantum bit), and an adjustable coupler (recorded as the first adjustable coupler) coupling the two quantum bits, the electronic device can respectively obtain the signal transmission duration of the first line channel transmitting the quantum bit frequency signal (recorded as the first transmission duration), the signal transmission duration of the second line channel transmitting the quantum bit frequency signal (recorded as the second transmission duration), and the signal transmission duration of the third line channel transmitting the quantum bit frequency (recorded as the third transmission duration). The electronic device can obtain the delay between the signal transmission durations of two groups of arbitrary two line channels according to the first transmission duration, the second transmission duration and the third transmission duration, and obtain the first relative delay and the second relative delay.

[0070] When the above-mentioned first line channel, second line channel and third line channel establish a link through the first quantum bit, the second quantum bit and the first adjustable coupler, the first line channel, the second line channel and the third line channel will be connected to the Z line interface corresponding to the first quantum bit, the second quantum bit and the first adjustable coupler respectively.

[0071] In the embodiment of the present application, the connection relationship between the first line channel, the second line channel, the third line channel and the first quantum bit, the second quantum bit and the first adjustable coupler is not specifically limited. For ease of understanding, the following is only described by taking the first line channel connected to the Z-line interface of the first quantum bit, the second line channel connected to the Z-line interface of the second quantum bit, and the third line channel connected to the Z-line interface of the first adjustable coupler as an example, which does not serve any limiting role.

[0072] For the above-mentioned first relative delay and second relative delay, the first relative delay is different from the above-mentioned second relative delay. For example, the first relative delay may be the difference between the first transmission duration and the second transmission duration, and the second relative delay may be the difference between the first transmission duration and the third transmission duration. Here, the above-mentioned first relative delay and second relative delay are not specifically limited. For ease of understanding, the following is only described by taking the first relative delay as the difference between the first transmission duration and the second transmission duration, and the second relative delay as the difference between the third transmission duration and the second transmission duration as an example, which does not serve any limiting role.

[0073] In the embodiment of the present application, since the first relative delay and the second relative delay are the difference between the transmission durations of the two signals, the first relative delay and the second relative delay may be positive or negative. For ease of understanding, the following description is made by taking the case where both the first relative delay and the second relative delay are positive as an example, which does not serve any limiting purpose.

[0074] For the above step S203, the first delay, second delay and third delay corresponding to the first line channel, the second line channel and the third line channel at the current moment are respectively found; the first delay, the second delay and the third delay are preset delays, or are delays updated before the current moment.

[0075] In the embodiment of the present application, the electronic device stores the correspondence between all fifth line channels and delays (recorded as the first correspondence). The first correspondence can be represented in the form of a table, a string, etc. For ease of understanding, the first correspondence is described below only by taking the second list as an example. The second list can be shown in Table 2.

[0076] Table 2

[0077] Line channel Z1 Z2 Z3 … Latency 0 0 0 …

[0078] In the above Table 2, the fifth line channel may include Z1, Z2, Z3, etc. in the above Table 2. Each fifth line channel has a corresponding delay, that is, 0 in the above Table 2.

[0079] For each fifth line channel in the second list, the delay corresponding to the fifth line channel may be a preset delay, such as 0 in Table 2, or may be a delay updated before the current moment.

[0080] In an optional embodiment, for each fifth line channel in the above-mentioned second list, if the delay corresponding to the fifth line channel is the delay updated before the current moment, then the delay corresponding to the fifth line channel can be the delay updated before the current moment according to the relative delay between any two line channels, wherein any two line channels can be any fourth line channel and any fifth line channel, or any two fifth line channels.

[0081] In another optional embodiment, for each fifth line channel in the second list, if the delay corresponding to the fifth line channel is the delay updated before the current moment, the delay corresponding to the fifth line channel may be the delay updated before the current moment according to the delay update amount corresponding to the associated line channel associated with the fifth line channel. The method for determining the associated line channel can be described below and will not be described in detail here.

[0082] For the above-mentioned first line channel, second line channel and third line channel, the electronic device can respectively search the delay corresponding to the first line channel (recorded as the first delay), the delay corresponding to the second line channel (recorded as the second delay), and the delay corresponding to the third line channel (recorded as the third delay) in the above-mentioned second list.

[0083] The first delay, the second delay, and the third delay may be the preset delays, or may be delays updated before the current moment. Here, the first delay, the second delay, and the third delay are not specifically limited.

[0084] In the above Figure 1 In the method shown, the above step S203 is performed after step S202. In addition, the above step S203 can also be performed before step S202, or performed simultaneously with step S202. Here, the execution order of the above step S202 and step S203 is not specifically limited.

[0085] In the embodiment of the present application, in addition to storing the first corresponding relationship, the electronic device may also store the corresponding relationship between all fourth line channels and delays (recorded as the second corresponding relationship). For ease of understanding, the second corresponding relationship is described by taking the third list as an example, and the third list may be shown in Table 3.

[0086] Table 3

[0087] Line channel XY1 XY2 XY3 … Latency 0 0 0 …

[0088] In the above Table 3, the fourth line channels may include XY1, XY2, XY3, etc. in the above Table 3. Each fourth line channel has a corresponding delay, that is, 0 in the above Table 3.

[0089] The description of the second corresponding relationship may refer to the description of the first corresponding relationship, and no detailed description is given here.

[0090] In the embodiment of the present application, the delay corresponding to each line channel in the second list and the third list can be expressed as: the waiting time corresponding to the line channel when transmitting the corresponding quantum state control signal or the quantum bit frequency control signal. The difference between the delays corresponding to any two line channels is the time difference between the two line channels when transmitting the corresponding quantum state control signal or the quantum bit frequency control signal.

[0091] With respect to the above step S204, at least one of the first delay, the second delay and the third delay is updated based on the first relative delay and the second relative delay.

[0092] In this step, the two fifth line channels corresponding to the first relative delay or the second relative delay are two line channels among the first line channel, the second line channel and the third line channel. The electronic device can update the delay of one line channel or two line channels among the two line channels corresponding to the first relative delay according to the first relative delay, and update the delay of one line channel or two line channels among the two line channels corresponding to the second relative delay according to the second relative delay. That is, according to the first relative delay and the second relative delay, one or more delays among the first delay, the second delay and the third delay are updated. The updating method of at least one delay among the first delay, the second delay and the third delay can be referred to the description below, which is not described in detail here.

[0093] In an embodiment of the present application, when one or more of the first delay, the second delay, and the third delay are updated, the delays of the line channels other than the updated line channels of the delay update remain unchanged. For example, when only the first delay is updated, the second delay and the third delay remain unchanged. At this time, the second delay, the third delay, and the updated first delay match the first relative delay and the second relative delay.

[0094] Through the above Figure 1 According to the method shown, the electronic device can accurately determine the time delay between the first line channel, the second line channel and the third line channel, so that the updated time delay matches the above-mentioned first relative time delay and the second relative time delay, so that according to the updated time delay, the quantum bit frequency control signal transmitted by the first line channel, the second line channel and the third line channel can reach the quantum bit and the adjustable coupler at the same time, abandoning the method of manually determining the time delay in the related art, improving the accuracy of the determined time delay, and reducing the labor cost.

[0095] In addition, compared with the method of binding the delay to the quantum bit or the adjustable coupler in the related art, in the embodiment of the present application, the delay is directly bound to each fifth line channel. Therefore, in the actual application process, after the delay between any three fifth line channels is determined, the updated delay can be matched with the relative delay between any two line channels regardless of how the line channels are replaced, thereby avoiding the waste of resources caused by the need to redetermine the delay when the line channels are changed, and improving the applicability of the determined delay to the line channel change scenario.

[0096] In an optional embodiment, according to the above Figure 2 The method shown in the figure, the embodiment of the present application also provides a method for determining the delay. Figure 3 As shown, Figure 3 A second flow chart of the delay determination method provided in the embodiment of the present application. Figure 3 In the method shown, the above step S202 is refined into the following steps, namely step S2021-step S2022.

[0097] Step S2021, when the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the adjustable coupler, obtain the first transmission duration corresponding to the first line channel, the second transmission duration corresponding to the second line channel and the third transmission duration corresponding to the third line channel.

[0098] In an optional embodiment, when obtaining the above-mentioned first transmission duration, second transmission duration and third transmission duration, the electronic device can respectively measure the transmission duration of the quantum bit frequency control signal on the first line channel, the second line channel and the third line channel.

[0099] In another optional embodiment, when obtaining the above-mentioned first transmission duration, second transmission duration and third transmission duration, the electronic device can use the ZZTiming experiment to obtain the first transmission duration, second transmission duration and third transmission duration corresponding to the first line channel, the second line channel and the third line channel.

[0100] In the related art, by transmitting a π pulse on a pulse modulation line channel, if the frequency of the qubit is the working frequency of the qubit, this π pulse can excite the qubit to the |1> state. Therefore, by transmitting a square wave with a certain amplitude on the flux modulation line channel, the frequency of the qubit can be changed, thereby affecting the effect of the π pulse on exciting the qubit to the |1> state. On this basis, when performing the ZZTiming experiment, by performing a SWAP (swap) gate operation on two qubits and respectively changing the transmission time of the square wave relative to the π pulse on the two qubits and the tunable coupler, the transmission duration corresponding to the flux modulation line channels on the two qubits and the tunable coupler can be determined. Here, the process of the ZZTiming experiment will not be specifically described.

[0101] In the embodiments of the present application, the method for obtaining the signal transmission durations corresponding to the above first line channel, second line channel, and third line channel is not specifically limited.

[0102] Step S2022, if the second transmission duration is less than the first transmission duration and the third transmission duration, then calculate the difference between the first transmission duration and the second transmission duration as the first relative time delay between the first line channel and the second line channel, and calculate the difference between the third transmission duration and the first transmission duration as the second relative time delay between the third line channel and the second line channel.

[0103] In an alternative embodiment, if the magnitude relationship among the above first transmission duration, second transmission duration, and third transmission duration is: t1 < t2 < t3, then the first relative time delay can be t 21 = t2 - t1, and the second relative time delay can be: t 31 = t3 - t1.

[0104] In an alternative embodiment, for the convenience of later updating the time delays corresponding to each fifth line channel, for the above first transmission duration, second transmission duration, and third transmission duration, when the minimum transmission duration among the first transmission duration, second transmission duration, and third transmission duration is not 0, the electronic device can perform a normalization process on the first transmission duration, second transmission duration, and third transmission duration, that is, each transmission duration is subtracted by the minimum transmission duration.

[0105] For ease of understanding, still taking the above t1 < t2 < t3 as an example for illustration. The minimum transmission duration is t1. At this time, the normalized t′1 = t1 - t1 = 0, the normalized t′2 = t2 - t1, and the normalized t′3 = t3 - t1.

[0106] Through the above-mentioned zeroing processing, the sizes of the first transmission duration, the second transmission duration and the third transmission duration can be effectively reduced, thereby facilitating the calculation of the first relative delay and the second relative delay, effectively reducing the computing resources required for delay update, and reducing the delay update cost.

[0107] Through the above steps S2021-S2022, the electronic device can accurately determine the first relative delay and the second relative delay based on the above first transmission duration, the second transmission duration and the third transmission duration, and ensure that the determined first relative delay and the second delay are both positive numbers, which effectively reduces the calculation complexity of the subsequent delay update and reduces the calculation cost of the delay update.

[0108] In the above Figure 3 In the illustrated embodiment, only the second transmission duration is smaller than the first transmission duration and the third transmission duration as an example for description. According to the difference between the first transmission duration, the second transmission duration and the third transmission duration, the calculation method of the first relative delay and the second relative delay will also be different, and the specific method can refer to the method in the above step S2022, which will not be described in detail here.

[0109] In an optional embodiment, according to the above Figure 3 The method shown in the figure, the embodiment of the present application also provides a method for determining the delay. Figure 4 As shown, Figure 4 A third flow chart of the delay determination method provided in the embodiment of the present application. Figure 4 In the method shown, the above step S204 is subdivided into the following steps, namely step S2041 - step S2042.

[0110] Step S2041: Update the first delay and / or the second delay based on the first relative delay.

[0111] For ease of understanding, the following takes the first relative delay as the time difference between the first transmission duration corresponding to the first line channel and the second transmission duration corresponding to the second line channel as an example to illustrate the update of the first delay and / or the second delay by the electronic device based on the first relative delay.

[0112] In an optional embodiment, if the first delay is greater than the second delay, the above step S2041 can be refined into the following steps, namely step 1 to step 2.

[0113] Step 1: When the first difference is less than the first relative delay, the first delay is updated to a first sum value.

[0114] The first difference value is the difference between the first delay and the second delay, and the first sum value is the sum value between the second delay and the first relative delay.

[0115] Step 2: When the first difference is greater than the first relative delay, the second delay is updated to the second difference.

[0116] The second difference is the difference between the first delay and the first relative delay.

[0117] For ease of understanding, the first delay is t z1 , the second delay is t z2 , the first relative delay t Δ1 This is explained as an example.

[0118] Due to t z1 Greater than t z2 , therefore, the first difference must be greater than 0, that is, t z1 -t z2 >0.

[0119] When the electronic device compares the first difference with the first relative delay, if t z1 -t z2 <t Δ1 , then according to the first time delay t′ updated in step 1 above z1 =t z2 +t Δ1 . Due to t z1 -t z2 <t Δ1 , therefore, t z1 <t Δ1 +t z2 , that is, t z1 <t′ z1 , which is the first updated delay t′ z1 The first delay before relative update t z1 Correspondingly, the delay update amount corresponding to the first delay Δ=t′ z1 -t z1 =t z2 +t Δ1 -t z1 .

[0120] If t z1 -t z2 >t Δ1 , then according to the second delay t′ updated in step 2 above z2 =t z1 -t Δ1 . Due to t z1 -t z2 >t Δ1 , therefore, t z1 -t Δ1 >t z2 , that is, t′ z2 >t z2 , which is the updated second delay t′z2 The second delay before relative update t z2 Correspondingly, the delay update amount corresponding to the second delay Δ=t′ z2 -t z2 =t z1 -t Δ1 -t z2 .

[0121] The above step 1 and step 2 are steps respectively executed when the comparison results of the first difference and the first relative delay are different. Here, the execution of step 1 and step 2 is not specifically limited.

[0122] Through the above steps 1 and 2, when the electronic device updates the first delay or the second delay based on the first relative delay, only one of the first delay and the second delay is updated each time, that is, only the delay corresponding to one of the first line channel and the second line channel is updated, which effectively reduces the number of delay updates, thereby reducing the number of global updates caused by the line channel delay adjustment.

[0123] In addition, when the electronic device updates the first delay or the second delay based on the first relative delay, the updated delay increases relative to the delay before the update, which makes the delay update process a delay accumulation process, avoiding the occurrence of delay reduction in the delay update process, thereby avoiding the updated delay being a negative value and the abnormal situation caused by the updated delay being a negative number.

[0124] In an optional embodiment, when the first difference is the same as the first relative delay, the electronic device may determine that the time difference between the first delay and the second delay corresponding to the first line channel and the second line channel at the current moment matches the first relative delay. At this time, the electronic device may not perform any processing, that is, no delay update operation is performed.

[0125] In an optional embodiment, if the first delay is smaller than the second delay, the above step S2041 can be further refined into the following steps, namely, step three to step four.

[0126] Step three: when the third difference is smaller than the first relative delay, update the second delay to a second sum value.

[0127] The third difference value is the difference between the second delay and the first delay, and the second sum value is the sum value between the first delay and the first relative delay.

[0128] Step 4: When the third difference is greater than the first relative delay, update the first delay to a fourth difference.

[0129] The fourth difference is a difference between the second time delay and the first relative time delay.

[0130] For ease of understanding, the first delay is still taken as t z1 , the second delay is t z2 , the first relative delay t Δ1 This is explained as an example.

[0131] Since the first delay is less than the second delay, the third difference must be greater than 0, that is, t z2 -t z1 >0 When the electronic device compares the third difference with the first relative delay, if t z2 -t z1 <t Δ1 , then according to the first delay t′ updated in step 3 above z2 =t z1 +t Δ1 . Due to t z2 -t z1 <t Δ1 , therefore, t z2 <t Δ1 +t z1 , that is, t z2 <t′ z2 , which is the first updated delay t′ z2 The second delay before relative update t z2 Correspondingly, the delay update amount corresponding to the second delay Δ=t′ z2 -t z2 =t z1 +t Δ1 -t z2 .

[0132] If t z2 -t z1 >t Δ1 , then according to the first time delay t′ updated in step 4 above z1 =t z2 -t Δ1 . Due to t z2 -t z1 >t Δ1 , therefore, t z2 -t Δ1 >t z1 , that is, t′ z1 >t z1 , which is the first updated delay t′ z1 The first delay before relative update t z1 Correspondingly, the delay update amount corresponding to the first delay Δ=t′ z1 -t z1 =t z2 -t Δ1 -t z1 .

[0133] The above step 3 and step 4 are steps respectively executed when the comparison result of the third difference and the first relative delay is different. Here, the execution of step 3 and step 4 is not specifically limited.

[0134] Through the above steps three and four, when the electronic device updates the first delay or the second delay based on the first relative delay, only one of the first delay and the second delay is updated each time, that is, only the delay corresponding to one of the first line channel and the second line channel is updated, which effectively reduces the number of delay updates, thereby reducing the number of global updates caused by the line channel delay adjustment.

[0135] In addition, when the electronic device updates the first delay or the second delay based on the first relative delay, the updated delay increases relative to the delay before the update, which makes the delay update process a delay accumulation process, avoiding the occurrence of delay reduction in the delay update process, thereby avoiding the updated delay being a negative value and the abnormal situation caused by the updated delay being a negative number.

[0136] In an optional embodiment, when the third difference is the same as the first relative delay, the electronic device may determine that the time difference between the first delay and the second delay corresponding to the first line channel and the second line channel at the current moment matches the first relative delay. At this time, the electronic device may not perform any processing, that is, no delay update operation is performed.

[0137] In an optional embodiment, when the above-mentioned first delay is equal to the second delay, the electronic device can choose to update the first delay or the second delay according to the first relative delay. For example, when the first relative duration is the difference between the above-mentioned first transmission duration and the second transmission duration, the electronic device can update the first delay, such as updating the first delay to the sum of the first delay and the first relative delay. Or the electronic device can also update the second delay, such as updating the second delay to the difference between the second delay and the first relative delay. Here, the delay update method when the first delay is equal to the second delay is not specifically limited.

[0138] Step S2042: Update the second delay and / or the third delay based on the second relative delay.

[0139] For ease of understanding, the following takes the second relative delay as the time difference between the third transmission duration corresponding to the third line channel and the second transmission duration corresponding to the second line channel as an example to illustrate the update of the second delay and / or the third delay by the electronic device based on the second relative delay.

[0140] In an optional embodiment, if the second delay is greater than the third delay, the above step S2042 can be refined into the following steps, namely step five to step six.

[0141] Step five: when the fifth difference is smaller than the second relative delay, update the second delay to the third sum value.

[0142] The fifth difference is the difference between the second delay and the third delay, and the third sum is the sum of the third delay and the second relative delay.

[0143] Step six: when the fifth difference is greater than the second relative delay, update the third delay to the sixth difference.

[0144] The sixth difference is the difference between the second time delay and the second relative time delay.

[0145] For ease of understanding, the second delay is t z2 , the third delay is t z3 , the second relative delay t Δ2 This is explained as an example.

[0146] Due to t z2 Greater than t z3 , therefore, the fifth difference must be greater than 0, that is, t z2 -t z3 >0.

[0147] When the electronic device compares the fifth difference with the second relative delay, if t z2 -t z3 <t Δ2 , then according to the second delay t′ updated in step 5 above z2 =t z3 +t Δ2 . Due to t z2 -t z3 <t Δ2 , therefore, t z2 <t z3 +t Δ2 , that is, t z2 <t′ z2 , which is the updated second delay t′ z2 The second delay before relative update t z2 Correspondingly, the delay update amount corresponding to the second delay Δ=t′ z2 -t z2 =t z3 +t Δ2 -t z2 .

[0148] If t z2 -t z3 >t Δ2 , then according to the third time delay t′ updated in step 6 above z3 =t z2 -t Δ2 . Due to tz2 -t z3 >t Δ2 , therefore, t z2 -t Δ2 >t z3 , that is, t′ z3 >t z3 , which is the updated third delay t′ z3 The third delay before relative update t z3 Correspondingly, the delay update amount corresponding to the third delay Δ=t′ z3 -t z3 =t z2 -t Δ2 -t z3 .

[0149] The above steps 5 and 6 are respectively executed when the comparison results of the fifth difference and the second relative delay are different. Here, the execution of steps 5 and 6 is not specifically limited.

[0150] Through the above steps five and six, when the electronic device updates the second delay or the third delay based on the second relative delay, only one of the second delay and the third delay is updated each time, that is, only the delay corresponding to one of the second line channel and the third line channel is updated, which effectively reduces the number of delay updates, thereby reducing the number of global updates caused by the line channel delay adjustment.

[0151] In addition, when the electronic device updates the second delay or the third delay based on the second relative delay, the updated delay increases relative to the delay before the update, which makes the delay update process a delay accumulation process, avoiding the occurrence of delay reduction in the delay update process, thereby avoiding the updated delay being a negative value and the abnormal situation caused by the updated delay being a negative number.

[0152] In an optional embodiment, when the fifth difference is the same as the second relative delay, the electronic device may determine that the time difference between the second delay and the third delay corresponding to the second line channel and the third line channel at the current moment matches the second relative delay. At this time, the electronic device may not perform any processing, that is, no delay update operation is performed.

[0153] In an optional embodiment, if the second delay is smaller than the third delay, the above step S2042 can be refined into the following steps, namely, step seven to step eight.

[0154] Step seven: when the seventh difference is smaller than the second relative delay, the third delay is updated to the fourth sum value.

[0155] The seventh difference value is the difference between the third delay and the second delay, and the fourth sum value is the sum value between the second delay and the second relative delay.

[0156] Step eight: when the seventh difference is greater than the second relative delay, update the second delay to the eighth difference.

[0157] The eighth difference is the difference between the third time delay and the second relative time delay.

[0158] For ease of understanding, the second delay is t z2 , the third delay is t z3 , the second relative delay t Δ2 This is explained as an example.

[0159] Due to t z2 Less than t z3 , therefore, the seventh difference must be greater than 0, that is, t z3 -t z2 >0.

[0160] When the electronic device compares the seventh difference with the second relative delay, if t z3 -t z2 <t Δ2 , then according to the third time delay t′ updated in step 7 above z3 =t z2 +t Δ2 . Due to t z3 -t z2 <t Δ2 , therefore, t z3 <t z2 +t Δ2 , that is, t z3 <t′ z3 , which is the updated third delay t′ z3 The third delay before relative update t z3 Correspondingly, the delay update amount corresponding to the third delay Δ=t′ z3 -t z3 =t z2 +t Δ2 -t z3 .

[0161] If t z3 -t z2 >t Δ2 , then according to the second delay t′ updated in step eight above z2 =t z3 -t Δ2 . Due to t z3 -t z2 >t Δ2 , therefore, t z3 -t Δ2>t z2 , that is, t′ z2 >t z2 , which is the updated second delay t′ z2 The second delay before relative update t z2 Correspondingly, the delay update amount corresponding to the second delay Δ=t′ z2 -t z2 =t z3 -t Δ2 -t z2 .

[0162] The above steps 7 and 8 are respectively executed when the comparison result of the seventh difference and the second relative delay is different. Here, the execution of steps 7 and 8 is not specifically limited.

[0163] Through the above steps seven and eight, when the electronic device updates the second delay or the third delay based on the second relative delay, only one of the second delay and the third delay is updated each time, that is, only the delay corresponding to one of the second line channel and the third line channel is updated, which effectively reduces the number of delay updates, thereby reducing the number of global updates caused by the line channel delay adjustment.

[0164] In addition, when the electronic device updates the second delay or the third delay based on the second relative delay, the updated delay increases relative to the delay before the update, which makes the delay update process a delay accumulation process, avoiding the occurrence of delay reduction in the delay update process, thereby avoiding the updated delay being a negative value and the abnormal situation caused by the updated delay being a negative number.

[0165] In an optional embodiment, when the fifth difference is the same as the second relative delay, the electronic device may determine that the time difference between the second delay and the third delay corresponding to the second line channel and the third line channel at the current moment matches the second relative delay. At this time, the electronic device may not perform any processing, that is, no delay update operation is performed.

[0166] In an optional embodiment, when the second delay is equal to the third delay, the electronic device can choose to update the second delay or the third delay according to the second relative delay. For details, please refer to the description when the first delay is equal to the second delay, which will not be described in detail here.

[0167] In the above Figure 4 In the illustrated embodiment, step S2041 is performed before step S2042. In addition, step S2042 may also be performed before step S2041 or simultaneously with step S2041. Here, the execution of step S2041 and step S2042 is not specifically limited.

[0168] In an optional embodiment, when updating at least one of the first delay, the second delay or the third delay based on the first relative delay and the second relative delay, in addition to the methods shown in steps 1 to 8 above, other methods may also be used.

[0169] For ease of understanding, the electronic device updating the first delay and / or the second delay based on the first relative delay is taken as an example for description.

[0170] For example, when the first transmission duration is greater than the second transmission duration, that is, the speed at which the first line channel transmits the quantum bit frequency signal is slower than the speed at which the second line channel transmits the quantum bit frequency signal. At this time, the electronic device can update the delay of the line channel with a faster transmission speed. That is, the electronic device can update the second delay corresponding to the second line channel, wherein the difference between the first delay and the updated second delay is the first relative delay.

[0171] When the first transmission duration is less than the second transmission duration, that is, the speed at which the first line channel transmits the quantum bit frequency signal is faster than the speed at which the second line channel transmits the quantum bit frequency signal. At this time, the electronic device can update the delay of the line channel with a faster transmission speed. The electronic device can update the first delay corresponding to the first line channel, wherein the difference between the second delay and the updated first delay is the first relative delay.

[0172] In addition, the electronic device may also update the delay of the line channel with a slower transmission speed. Alternatively, the electronic device may also update the first delay and the second delay at the same time, so that the time difference between the updated first delay and the second delay matches the first relative delay.

[0173] The manner of updating the second delay and / or the third delay based on the second relative delay may refer to the manner of updating the first delay and / or the second delay based on the first relative delay, and will not be described in detail herein.

[0174] In the embodiment of the present application, when the electronic device updates at least one of the first delay, the second delay and the third delay based on the first relative delay and the second relative delay, different updating methods may be used. Here, the method of updating the delay is not specifically limited.

[0175] In an optional embodiment, according to the above Figure 2 The method shown in the figure, the embodiment of the present application also provides a method for determining the delay. Figure 5 As shown, Figure 5A fourth flow chart of the delay determination method provided in the embodiment of the present application. The method comprises the following steps.

[0176] Step S501, according to the numerical value and line channel corresponding to each cell in the first list, select a group of cells to be processed, the group of cells to be processed includes a first cell, a second cell, and a third cell, the fourth line channels corresponding to the first cell, the second cell, and the third cell are the same, and the numerical values ​​of at least two cells are the first numerical values, the first numerical value indicates that the fourth line channel and the fifth line channel corresponding to the cell are not linked, the fourth line channel is used to transmit quantum state control signals, and the fifth line channel is used to transmit quantum bit frequency control signals.

[0177] For ease of understanding, the determination of the above-mentioned group of cells to be processed is explained in conjunction with Table 4.

[0178] Table 4

[0179] XY / Z Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 XY1 1 0 0 0 0 0 0 0 XY2 0 1 0 0 0 0 0 0 XY3 0 0 1 0 0 0 0 0 XY4 0 0 0 1 0 0 0 0

[0180] In the first list shown in Table 4 above, each row corresponds to a fourth line channel, namely XY1-XY4, and each column corresponds to a fifth line channel, namely Z1-Z8. Among them, the fourth line channel is used to transmit quantum state control signals, and the fifth line channel is used to transmit quantum bit frequency control signals.

[0181] When selecting the above-mentioned cell group to be processed, the electronic device can traverse each row in the first list to determine the value corresponding to each cell in the row, thereby selecting cells where three line channels with no associated relationship are located as the cell group to be processed.

[0182] For example, when the electronic device traverses the first row of the first list, that is, when traversing the row corresponding to XY1, only the values ​​of the cells corresponding to XY1 and Z1 are 1, and the values ​​of the remaining cells are all 0. At this time, since the values ​​of the cells corresponding to any two fifth line channels and XY1 are not 1 at the same time, the electronic device can determine that no link is established between any two fifth line channels. At this time, the electronic device can obtain any three cells corresponding to the fifth line channels and XY1 as the group of cells to be processed. For example, the electronic device can select the cells Z1, Z2 and Z3 corresponding to XY1 as the first cell, the second cell and the third cell respectively, to obtain the group of cells to be processed.

[0183] In the embodiment of the present application, the values ​​corresponding to the first cell, the second cell, and the third cell include at least two first values. For example, the values ​​corresponding to the first cell, the second cell, and the third cell can be any one of 000, 100, 010, and 001. Here, the values ​​corresponding to the first cell, the second cell, and the third cell are not specifically limited.

[0184] In the embodiment of the present application, only the example that each row in the first list corresponds to a fourth line channel and each column corresponds to a fifth line channel is used to illustrate the determination of the above-mentioned to-be-processed cell group. When each column in the first list corresponds to a fourth line channel and each row corresponds to a fifth line channel, a similar method can be referred to to determine the to-be-processed cell group, which is not specifically described here. The following is only an example that each row in the first list corresponds to a fourth line channel and each column corresponds to a fifth line channel, which does not serve any limiting role.

[0185] Step S502: determine the fifth line channels corresponding to the first cell, the second cell and the third cell as the first line channel, the second line channel and the third line channel to obtain a line channel group to be processed.

[0186] In this step, after determining the first cell, the second cell, and the third cell, the electronic device can determine the fifth line channel corresponding to each cell. That is, the fifth line channel corresponding to the first cell is determined as the first line channel in the group of line channels to be processed; the fifth line channel corresponding to the second cell is determined as the second line channel in the group of line channels to be processed; and the fifth line channel corresponding to the third cell is determined as the third line channel in the group of line channels to be processed.

[0187] Through the above steps S501 and S502, the electronic device can determine the three fifth line channels that have no association relationship in the first list as line channels in the above-mentioned line channel group to be processed, so as to update the delays of these three fifth line channels in the later stage, establish an association relationship between the three fifth line channels, ensure the accuracy of the determined delays, avoid repeated updates of the delays of line channels that already have an association relationship, and improve the correlation between the corresponding delays of all fifth line channels.

[0188] The above steps S501 to S502 are refinements of the above step S201.

[0189] Step S503, when the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, a first relative delay and a second relative delay are obtained, where the first relative delay and the second relative delay are signal transmission delays between any two line channels among the first line channel, the second line channel and the third line channel.

[0190] Step S504, respectively searching for the first delay, the second delay and the third delay corresponding to the first line channel, the second line channel and the third line channel at the current moment; the first delay, the second delay and the third delay are preset delays, or are delays updated before the current moment.

[0191] Step S505: based on the first relative delay and the second relative delay, update at least one of the first delay, the second delay and the third delay.

[0192] The above steps S503 to S505 are the same as the above steps S202 to S204.

[0193] In an optional embodiment, according to the above Figure 5 The method shown in the figure, the embodiment of the present application also provides a method for determining the delay. Figure 6 As shown, Figure 6 The fifth flow chart of the delay determination method provided in the embodiment of the present application is as follows: the method adds the following steps, namely, step S506 to step S507.

[0194] Step S506, updating the value of the cell corresponding to the updated line channel in the to-be-processed line channel group to a second value, wherein the second value indicates that the fourth line channel and the fifth line channel corresponding to the cell are linked, and the updated line channel is the line channel with delayed update.

[0195] In this step, through the above step S505, after updating the delay of at least one fifth line channel among the first line channel, the second line channel and the third line channel, the electronic device can determine the line channel with updated delay as the updated line channel. When the value of the cell corresponding to the updated line channel in the line channel group to be processed is the above first value, the electronic device updates the first data to the second value.

[0196] The update line channel may be one or more of the first line channel, the second line channel and the third line channel. Here, the update line channel is not specifically limited.

[0197] For ease of understanding, the updated delay in the above step S505 is taken as an example to be described as the first delay. Since the updated delay is the first delay, the electronic device can determine that the updated line channel is the first line channel. At this time, the cell corresponding to the updated line channel in the to-be-processed line channel group is the above-mentioned first cell, and the electronic device can update the value of the first cell to the second value, such as updating to the value 1.

[0198] In an embodiment of the present application, for the above-mentioned updated line channels, through the above-mentioned step S506, the electronic device can promptly update the values ​​of the first cell, the second cell or the third cell in the first list after the delay update, thereby promptly completing the establishment of the association relationship between the above-mentioned first line channel, the second line channel and the third line channel, avoiding the later reselection of these three fifth line channels as line channels in the line channel group to be processed, and avoiding the waste of computing resources.

[0199] Step S507, when the first list includes the cell group to be processed, return to execute the step of selecting the cell group to be processed according to the value and line channel corresponding to each cell in the first list, until the first list does not include the cell group to be processed.

[0200] In this step, after the electronic device updates the value of the cell corresponding to the updated line channel in the line channel group to be processed to the second value, it completes a round of updating of the delay corresponding to the line channel. At this time, if the first list also includes three fifth line channels that have no association relationship, that is, there is a cell group to be processed, the electronic device can return to execute the above step S501, that is, execute the step of selecting the cell group to be processed according to the value and line channel corresponding to each cell in the first list, until the first list does not include the cell group to be processed, thereby starting a new round of line channel delay update process, until the first list does not include the cell group to be processed.

[0201] Through the above-mentioned step S507, the electronic device can cyclically execute the above-mentioned steps S501-S506, so that there is a correlation between the delays of each fifth line channel in the determined quantum computing measurement and control system, thereby improving the correlation between the determined delays, and improving the accuracy of the quantum bit frequency control signal transmitted based on the updated delay, thereby improving the accuracy of quantum computing.

[0202] In an optional embodiment, according to the above Figure 6 The method shown in the figure, the embodiment of the present application also provides a method for determining the delay. Figure 7 As shown, Figure 7 The sixth flow chart of the delay determination method provided in the embodiment of the present application is as follows. Figure 7The following steps are added to the method shown, namely step S508 to step S509.

[0203] Step S508: Determine a sixth line channel associated with the updated line channel based on the value and line channel corresponding to each cell in the first list.

[0204] In this step, through the above step S506, the electronic device can timely update the value of the cell corresponding to the updated line channel in the to-be-processed line channel group to the second value, thereby establishing an association relationship between the updated line channel and the other fifth line channel. At this time, the electronic device can determine the line channel that has an association relationship with the updated line channel according to the value and line channel corresponding to each cell in the first list, and record it as the sixth line channel.

[0205] The number of the sixth line channels corresponding to the above-mentioned update line channel can be one or more. When the number of the sixth line channels is multiple, the sixth line channels can include the above-mentioned fourth line channel and the fifth line channel. Here, the number and type of the above-mentioned sixth line channels are not specifically limited.

[0206] In an optional embodiment, when each row of the first list corresponds to a fourth line channel, and each column corresponds to a fifth line channel, the embodiment of the present application provides a method for determining an associated line channel. Figure 8 As shown, Figure 8 A flowchart of a method for determining an associated line channel provided in an embodiment of the present application is provided. The method includes the following steps.

[0207] Step S801: determine a column in the first list corresponding to the update line channel as a first target column.

[0208] In this step, after updating the delay corresponding to the update line channel, the electronic device may traverse each column in the first list to determine the column corresponding to the update line channel, and determine the column as the first target column.

[0209] For ease of understanding, the following description is provided in conjunction with Table 5. Now, assuming that the time delay updated in the above step S505 is the time delay corresponding to Z5, the electronic device updates the cell value corresponding to Z5 and XY1 to 1 through the above step S506.

[0210] Table 5

[0211] XY / Z Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 XY1 1 0 1 0 1 0 0 0 XY2 0 1 0 0 0 0 0 0 XY3 0 0 1 0 1 0 0 0 XY4 0 0 0 1 0 0 0 0

[0212] For all fifth line channels in Table 5, namely Z1-Z8, since the line channel for delay update is Z5, the electronic device traverses each column in Table 5, and when traversing the column where Z5 is located, this column can be determined as the first target column.

[0213] Step S802 , selecting a fourth line channel on the first target column that has not been selected as the first associated line channel and whose corresponding value is the second value as the first associated line channel associated with the updated line channel.

[0214] In this step, for the first target column, the electronic device can select all cells on the first target column whose values ​​are the second values, and according to the fourth line channel corresponding to each cell, select the fourth line channel that has not been selected as the first associated line channel as the associated line channel associated with the update line channel (recorded as the first associated line channel).

[0215] For ease of understanding, the above Table 5 is still used as an example for explanation. After the column where Z5 is located is determined as the first target column, the electronic device can determine that the values ​​corresponding to the cell 3 corresponding to XY1 and Z5 and the cell 4 corresponding to XY3 and Z5 are the second values, that is, value 1, according to the values ​​corresponding to each cell. Since the fourth line channel associated with Z5 determined at this time is empty, the electronic device can determine that XY1 and XY3 are both the fourth line channels associated with the update line channel. That is, the first associated line channels determined are: XY1 and XY3.

[0216] In the embodiment of the present application, the number of the first associated line channels determined above may be empty, one or more, and is not specifically limited here.

[0217] Step S803, if the first associated line channel is not empty, then for each first target row, select the fifth line channel on the first target row that has not been selected as the second associated line channel and whose corresponding value is the second value as the second associated line channel associated with the updated line channel, and the first target row is the row corresponding to the first associated line channel in the first list.

[0218] In this step, when the determined first associated line channel is not empty, for each determined first associated line channel, the electronic device can determine the row corresponding to the first associated line channel in the first list as the first target row. For each first target row, the electronic device can determine all cells in the first target row whose values ​​are the second values, and select the fifth line channel that is not selected as the second associated line channel according to the fifth line channel corresponding to each cell as the associated line channel associated with the update line channel (recorded as the second associated line channel).

[0219] For ease of understanding, the above Table 5 is still used as an example for description. Through the above step S802, the electronic device determines that the above first associated line channels are XY1 and XY3. The electronic device can determine the row where XY1 and XY3 are located as the first target row.

[0220] For the row where XY1 is located, the electronic device can determine through traversal that the values ​​corresponding to cell 5 corresponding to XY1 and Z1, cell 6 corresponding to XY1 and Z3, and cell 7 corresponding to XY1 and Z5 are all 1. Since the number of second associated line channels determined at this time is empty, and Z5 itself is the update line channel, the electronic device can determine that Z1 and Z3 are both the fifth line channels associated with the update line channel. That is, the second associated line channels determined are: Z1 and Z3.

[0221] For the row where XY3 is located, since Z3 has been determined as the second associated line channel and Z5 itself is the updated line channel, the second associated line channel determined according to XY3 is empty.

[0222] In an optional embodiment, when the number of the first associated line channels determined above is empty, the electronic device may determine that there is no line channel associated with the update line channel at the current moment.

[0223] Step S804, for each second associated line channel, determine the column corresponding to the second associated line channel in the first list as the first target column, and return to execute the step of selecting the fourth line channel on the first target column that has not been selected as the first associated line channel and whose corresponding value is the second value as the first associated line channel associated with the updated line channel, until the first associated line channel determined based on all the second associated channels is empty, or until the second associated line channel determined based on all the first associated line channels is empty.

[0224] In this step, for each second associated line channel, the electronic device can determine the column corresponding to the second associated line channel as the above-mentioned first target column, and return to execute the above-mentioned step S802, that is, return to execute the step of selecting the fourth line channel on the first target column that has not been selected as the first associated line channel and whose corresponding value is the second value as the first associated line channel associated with the updated line channel.

[0225] In the embodiment of the present application, in each round of the first associated line channel determination process and each round of the second associated line channel determination process, if the second associated line channels determined based on each first associated line channel are all empty, or the first associated line channels determined based on each second associated line channel are all empty, the electronic device may have determined all associated line channels associated with the update line channel. At this time, the electronic device may stop the determination process of the associated line channels.

[0226] For ease of understanding, the above Table 5 is still used as an example for explanation. The second associated line channels determined by the above step S803 are: Z1 and Z3. The electronic device can determine the columns where Z1 and Z3 are located in the first list as the first target columns, respectively, because XY1 corresponding to the cell with a value of 1 in the column where Z1 is located has been determined as the first associated line channel, and XY1 and XY3 corresponding to the cell with a value of 1 in the column where Z3 is located are both determined as the first associated line channel. Therefore, the electronic device can determine to find all associated line channels associated with Z5, namely XY1, XY3, Z1 and Z3.

[0227] Step S805: determine the union of the first associated line channel and the second associated line channel as the sixth line channel associated with the updated line channel.

[0228] In this step, for each round of determined first associated line channels and second associated line channels, the electronic device may obtain the union of all first associated line channels and all second associated line channels to obtain a sixth line channel associated with the updated line channel.

[0229] In the embodiment of the present application, after the electronic device completes the search process for the first associated line channel and the second associated line channel, all the first associated line channels and all the second associated line channels found are the sixth line channel. Figure 8 In the embodiment shown, step S805 is added. In actual application, the electronic device may not perform the above step S805.

[0230] Through the above steps S801 to S805, the electronic device can determine all sixth line channels associated with the updated line channels by looping through the first list, effectively improving the accuracy and completeness of the determined sixth line channels, laying the foundation for the subsequent synchronous update of the corresponding delays of the associated line channels, improving the correlation between the corresponding delays of each fifth line channel, and improving the accuracy of the determined delay.

[0231] The above steps S801 to S805 are refinements of the above step S508.

[0232] Step S509: Update the fourth delay of the sixth line channel at the current moment according to the delay update amount corresponding to the updated line channel.

[0233] In this step, after determining all the sixth line channels corresponding to the update line channels, the electronic device may update the delay corresponding to each sixth line channel according to the delay update amount corresponding to the update line channel.

[0234] The delay update method of the sixth line channel is the same as the delay update method of the updated line channel. For example, the delay update method of the updated line channel is to increase a certain time, and the delay corresponding to each sixth line channel is also increased by the same time. For another example, the delay update method of the updated line channel is to reduce a certain time, and the delay corresponding to each sixth line channel is also reduced by the same time.

[0235] For ease of understanding, the description is still made by taking the above Table 5 as an example. Through the above steps S801 to S805, the electronic device can determine that the associated line channels associated with Z5 are XY1, XY3, Z1 and Z3.

[0236] If the electronic device increases the delay of Z5 by Δ when updating the delay of Z5, the electronic device may increase the delays corresponding to XY1, XY3, Z1 and Z3 in the second list and the third list by Δ respectively.

[0237] The delay update amount of the above-mentioned updated delay line channel may be the difference between the delay after the update and the delay before the update.

[0238] Through the above steps S508-S509, the electronic device can synchronously update the delay of all sixth line channels associated with the updated line channel according to the delay update amount of the updated line channel, effectively ensuring the association relationship between the updated line channel and its associated line channels, and improving the association between each line channel.

[0239] In an optional embodiment, according to the above Figure 6 The method shown in the figure, the embodiment of the present application also provides a method for determining the delay. Fig. 9 As shown, Fig. 9 The seventh flow chart of the delay determination method provided in the embodiment of the present application is as follows. Fig. 9 The following steps are added to the method shown, namely step S510-step S511.

[0240] Step S510, in the second target column of the first list, the fourth line channel corresponding to the cell with the second value is selected as the seventh line channel, and the second target column corresponds to a line channel corresponding to the first relative delay or the second relative delay.

[0241] In an optional embodiment, after the electronic device updates the value of the cell corresponding to the updated line channel in the to-be-processed line channel group to the second value, if the delay update of the updated line channel is updated according to the first relative delay, the electronic device may determine the column corresponding to one of the two line channels corresponding to the first relative delay in the first list as the second target column. The electronic device may traverse each cell in the second target column and select the fourth line channel corresponding to the cell having the second value as the seventh line channel.

[0242] In another optional embodiment, after the electronic device updates the value of the cell corresponding to the updated line channel in the to-be-processed line channel group to the second value, if the delay update of the updated line channel is updated according to the second relative delay, the electronic device can determine the column corresponding to one of the two line channels corresponding to the second relative delay in the first list as the second target column. The electronic device can traverse each cell in the second target column and select the fourth line channel corresponding to the cell having the second value as the seventh line channel.

[0243] The number of the seventh line channels may be empty, one or more. Here, the number of the seventh line channels determined above is not specifically limited.

[0244] In an optional embodiment, when the number of the seventh line channel determined in the above step S510 is empty, the electronic device may not perform any processing, that is, the electronic device may not execute step S511.

[0245] Step S511: for each seventh line channel, update the value of the cell corresponding to the seventh line channel and the eighth line channel in the first list to the second value; the eighth line channel is another line channel corresponding to the first relative delay or the second relative delay.

[0246] In an optional embodiment, if the delay update of the update line channel is updated according to the first relative delay, then after determining the seventh line channel, the electronic device can determine, for each seventh line channel, whether the value of the cell corresponding to the seventh line channel and another line channel (recorded as the eighth line channel) corresponding to the first relative delay is the second value. If the value of the cell corresponding to the seventh line channel and the eighth line channel is not the second value, the value of the cell is updated to the second value.

[0247] In another optional embodiment, if the delay update of the update line channel is updated according to the second relative delay, then after determining the seventh line channel, the electronic device can determine, for each seventh line channel, whether the value of the cell corresponding to the seventh line channel and another line channel (recorded as the eighth line channel) corresponding to the second relative delay is the second value. If the value of the cell corresponding to the seventh line channel and the eighth line channel is not the second value, the value of the cell is updated to the second value.

[0248] In an optional embodiment, when the cell values ​​corresponding to the seventh line channel and the eighth line channel are the second values, the electronic device may not perform any processing, that is, the electronic device will not update the values ​​corresponding to the cells.

[0249] For ease of understanding, the above Table 5 is still used as an example for explanation. Now assume that the electronic device updates the delay of Z5 according to the relative delay between Z1 and Z5, and the cell value corresponding to Z5 and XY1 is updated to 1.

[0250] When executing the above step S510, the electronic device can determine any one of the columns of Z1 and Z5 as the second target column, for example, determine the column where Z5 is located as the second target column. At this time, the electronic device can traverse each row in the first list to determine the fourth line channel corresponding to the cell with a value of 1 in the second target class. For example, the cell with a value of 1 in the above Table 5 is the cell corresponding to Z5 and XY1 and XY3. The electronic device can determine the above seventh line channel to be XY1 and XY3.

[0251] When executing the above step S510, for the seventh line channel XY1, since the value of the cell corresponding to Z1 and XY1 in Table 5 is 1, the electronic device may not perform an update operation. For the seventh line channel XY3, since the value of the cell corresponding to Z1 and XY3 in Table 5 is 0, the electronic device may update the value of the cell to 1 at this time.

[0252] Through the above steps S510 and S511, after the electronic device updates the value of the cell corresponding to the updated line channel in the line channel group to be processed to the second value, by updating the values ​​of the seventh line channel and the eighth line channel to the second value, a link can be established between the two line channels corresponding to the first relative delay and / or the second relative delay in the first list, thereby avoiding that in a subsequent new round of delay update process, the two line channels corresponding to the first relative delay and / or the second relative delay will no longer be determined as line channels in the above line channel group to be processed, and in the subsequent delay update process, the delays corresponding to the two line channels can be synchronously updated with the delay update amounts corresponding to the respective associated line channels, thereby improving the accuracy of the delay update.

[0253] In an optional embodiment, according to the above Figure 6 The method shown in the figure, the embodiment of the present application also provides a method for determining the delay. Fig.10 As shown, Fig.10 The eighth flow chart of the delay determination method provided in the embodiment of the present application is as follows. Fig.10 The following steps are added to the method shown, namely step S512-step S513.

[0254] Step S512, selecting the minimum fifth delay according to the fifth delay corresponding to each ninth line channel at the current moment; the ninth line channels are all fifth line channels with delays updated before the current moment.

[0255] In this step, after updating the delay corresponding to the updated line channel, the electronic device can determine all fifth line channels in the second list whose delays are updated before the current moment as the ninth line channel. The electronic device can select the minimum fifth delay according to the delay corresponding to each ninth line channel in the second list (recorded as the fifth delay).

[0256] Step S513: If the minimum fifth delay is not equal to the third value, then for each ninth line channel, the fifth delay of the ninth line channel is updated to the difference between the fifth delay of the ninth line channel and the minimum fifth delay.

[0257] In this step, the electronic device may compare the minimum fifth delay with the third value. If the minimum fifth delay is not equal to the third value, the electronic device may update the delay of each ninth line channel. That is, for each ninth line channel, the electronic device may subtract the minimum fifth delay from the delay of the ninth line channel. The third value may be 0.

[0258] In an optional embodiment, when the minimum fifth delay is equal to the third value, the electronic device may not perform any processing, that is, the electronic device will not update the delay of each ninth line channel.

[0259] Through the above steps S512-S513, when the minimum fifth delay is not equal to the third value, the electronic device can make the minimum value of the updated delay corresponding to all ninth line channels be 0 by updating the delay of each ninth line channel. Under the condition of ensuring that the time difference between the delays corresponding to each ninth line channel remains unchanged, it is effectively avoided that the delay corresponding to each ninth line channel continues to increase with the subsequent delay update, and the size of the delay corresponding to each ninth line channel is effectively reduced, thereby reducing the calculation amount of subsequent delay updates and improving the efficiency of later delay updates.

[0260] In an optional embodiment, in addition to updating the delay of each of the ninth line channels mentioned above, the electronic device can also use a similar method to synchronously update the delay corresponding to the line channels whose delays are updated before the current moment in the third list mentioned above, which is not specifically described here.

[0261] In an optional embodiment, according to the above Figure 2 The method shown in the figure, the embodiment of the present application also provides a method for determining the delay. Fig.11 As shown, Fig.11 The ninth flow chart of the delay determination method provided in the embodiment of the present application. Fig.11 The following steps are added to the method shown, namely step S205 to step S206.

[0262] Step S205, when the first line channel, the second line channel, and the third line channel are linked through the third quantum bit, the fourth quantum bit, and the second adjustable coupler, if an enable signal for the third quantum bit, the fourth quantum bit, and the second adjustable coupler is received, the sixth delay of the first line channel, the seventh delay of the second line channel, and the eighth delay of the third line channel at the current moment are searched.

[0263] In this step, the first line channel, the second line channel, and the third line channel can establish a link through the third quantum bit, the fourth quantum bit, and the second adjustable coupler. For example, the first line channel is connected to the Z-line interface of the third quantum bit, the second line channel is connected to the Z-line interface of the fourth quantum bit, and the third line channel is connected to the Z-line interface of the second adjustable coupler. At this time, if the electronic device receives an enable signal for the third quantum bit, the fourth quantum bit, and the second adjustable coupler, the electronic device can determine the sixth delay corresponding to the first line channel, the seventh delay corresponding to the second line channel, and the eighth delay corresponding to the third line channel according to the second list at the current moment.

[0264] The third qubit, the fourth qubit and the second adjustable coupler may be the same as or different from the first qubit, the second qubit and the first adjustable coupler, and are not specifically limited here.

[0265] Step S206, according to the time difference between the sixth delay, the seventh delay and the eighth delay, use the first line channel, the second line channel and the third line channel to transmit the quantum bit frequency control signal to the third quantum bit, the fourth quantum bit and the second adjustable coupler respectively.

[0266] In this step, the electronic device can determine the time difference between the sixth delay, the seventh delay and the eighth delay according to the above-mentioned time difference. The electronic device can transmit the quantum bit frequency control signal to the third quantum bit, the fourth quantum bit and the second adjustable coupler through the first line channel, the second line channel and the third line channel respectively according to the time difference.

[0267] For ease of understanding, the sixth delay is greater than the seventh delay and greater than the eighth delay. Now assume that the time difference between the sixth delay and the seventh delay is t1, and the time difference between the seventh delay and the eighth delay is t2.

[0268] At time t, the electronic device uses the third line channel to transmit the quantum bit frequency control signal to the second adjustable coupler. At t+t2, the electronic device can use the second line channel to transmit the quantum bit frequency control signal to the fourth quantum bit. At t+t2+t1, the electronic device can use the first line channel to transmit the quantum bit frequency control signal to the third quantum bit.

[0269] In the above embodiment, only the transmission of the quantum bit frequency control signal by the first line channel, the second line channel and the third line channel is used as an example for description. In addition, the electronic device can transmit the quantum bit frequency control signal according to the time delay corresponding to any three fifth line channels in the second list at the current moment. The specific process can be referred to the above description and will not be described in detail here.

[0270] Through the above steps S205-S206, the electronic device can transmit the quantum bit frequency control signal according to the time delay corresponding to any three fifth line channels in the second list at the current moment, so that the three quantum bit frequency control signals can reach two quantum bits and an adjustable coupler at the same time, ensuring the accuracy of quantum computing.

[0271] In the above embodiment, only the delay update corresponding to three fifth line channels is used as an example for description. In addition, there is a signal transmission delay between the fourth line channel and the fifth line channel due to differences in line length, devices on the line, etc. Therefore, for each group of fourth line channels and fifth line channels, the electronic device can update the delay of this group of fourth line channels and fifth line channels at the current moment based on the relative delay between this group of fourth line channels and fifth line channels. The specific updating method can refer to the updating method in the above step S2041 or step S2042, which is not described in detail here. Correspondingly, after the delay of this group of fourth line channels and fifth line channels at the current moment is updated, the delay of the associated line channel corresponding to the fourth line channel or the fifth line channel whose delay is updated is synchronously updated, specifically referring to the description of the above steps S508-S509, which is not described in detail here.

[0272] Based on the same inventive concept, according to the delay determination method provided in the above embodiment of the present application, the embodiment of the present application also provides a delay determination device. Fig.12 As shown, Fig.12 A schematic diagram of a structure of a delay determination device provided in an embodiment of the present application. The device includes the following modules.

[0273] A first determination module 1201 is used to determine a line channel group to be processed in a quantum computing measurement and control system, where the line channel group to be processed includes a first line channel, a second line channel, and a third line channel for transmitting a quantum bit frequency control signal;

[0274] An acquisition module 1202 is used to acquire a first relative delay and a second relative delay when the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, where the first relative delay and the second relative delay are signal transmission delays between any two line channels among the first line channel, the second line channel and the third line channel;

[0275] A search module 1203 is used to search for a first delay, a second delay and a third delay corresponding to the first line channel, the second line channel and the third line channel at the current moment, respectively; the first delay, the second delay and the third delay are preset delays, or are delays updated before the current moment;

[0276] The first updating module 1204 is configured to update at least one of the first delay, the second delay and the third delay based on the first relative delay and the second relative delay.

[0277] Optionally, the first determination module 1201 can be specifically used to select a to-be-processed cell group according to the numerical value and line channel corresponding to each cell in the first list, the to-be-processed cell group including a first cell, a second cell, and a third cell, the fourth line channels corresponding to the first cell, the second cell, and the third cell are the same, and the numerical values ​​of at least two cells are the first numerical values, the first numerical value indicates that the fourth line channel and the fifth line channel corresponding to the cell are not linked, the fourth line channel is used to transmit a quantum state control signal, and the fifth line channel is used to transmit a quantum bit frequency control signal;

[0278] The fifth line channels corresponding to the first cell, the second cell and the third cell are determined as the first line channel, the second line channel and the third line channel to obtain a line channel group to be processed.

[0279] Optionally, the delay determination device may further include:

[0280] A second updating module, configured to update the value of a cell corresponding to the updated line channel in the to-be-processed line channel group to a second value after updating at least one of the first delay, the second delay and the third delay based on the first relative delay and the second relative delay, wherein the fourth line channel and the fifth line channel corresponding to the cell are linked, and the updated line channel is the line channel with the updated delay;

[0281] The delay determination device may further include:

[0282] The calling module is used to call the first determining module 1201 to return to execute the step of selecting the cell group to be processed according to the numerical value and line channel corresponding to each cell in the first list when the cell group to be processed is included in the first list, until the cell group to be processed is no longer included in the first list.

[0283] Optionally, the delay determination device may further include:

[0284] a second determining module, configured to determine a sixth line channel associated with the updated line channel based on the value and line channel corresponding to each cell in the first list, after updating the value of the cell corresponding to the updated line channel to a second value according to the value and line channel corresponding to each cell in the first list;

[0285] The third updating module is used to update the fourth delay of the sixth line channel at the current moment according to the delay update amount corresponding to the updated line channel.

[0286] Optionally, the second determining module may be specifically configured to determine the column in the first list corresponding to the update line channel as the first target column if each row in the first list corresponds to a fourth line channel and each column corresponds to a fifth line channel;

[0287] Selecting a fourth line channel on the first target column that is not selected as the first associated line channel and whose corresponding value is the second value as the first associated line channel associated with the update line channel;

[0288] If the first associated line channel is not empty, for each first target row, select the fifth line channel on the first target row that has not been selected as the second associated line channel and whose corresponding value is the second value as the second associated line channel associated with the update line channel, and the first target row is the row corresponding to the first associated line channel in the first list;

[0289] For each second associated line channel, determine the column corresponding to the second associated line channel in the first list as the first target column, and return to the step of selecting a fourth line channel on the first target column that is not selected as the first associated line channel and whose corresponding value is the second value as the first associated line channel associated with the update line channel, until the first associated line channel determined based on all the second associated lines is empty, or until the second associated line channel determined based on all the first associated lines is empty;

[0290] A union of the first associated line channel and the second associated line channel is determined as a sixth line channel associated with the update line channel.

[0291] Optionally, the delay determination device may further include:

[0292] a selection module, configured to select, in the second target column of the first list, a fourth line channel corresponding to a cell having a value of the second value as the seventh line channel, the second target column corresponding to a line channel corresponding to the first relative delay or the second relative delay;

[0293] The fourth updating module is used to update the value of the cell corresponding to the seventh line channel and the eighth line channel in the first list to the second value for each seventh line channel; the eighth line channel is another line channel corresponding to the first relative delay or the second relative delay.

[0294] Optionally, the acquisition module 1202 may be specifically used to acquire a first transmission duration corresponding to the first line channel, a second transmission duration corresponding to the second line channel, and a third transmission duration corresponding to the third line channel when the first line channel, the second line channel, and the third line channel are linked through the first quantum bit, the second quantum bit, and the adjustable coupler;

[0295] If the second transmission duration is less than the first transmission duration and the third transmission duration, the difference between the first transmission duration and the second transmission duration is calculated as the first relative delay between the first line channel and the second line channel, and the difference between the third transmission duration and the first transmission duration is calculated as the second relative delay between the third line channel and the second line channel.

[0296] Optionally, the first updating module 1204 may be specifically configured to update the first delay and / or the second delay based on the first relative delay;

[0297] Based on the second relative delay, the second delay and / or the third delay is updated.

[0298] Optionally, the first updating module 1204 may be specifically configured to update the first delay to a first sum value when the first difference is less than the first relative delay if the first delay is greater than the second delay;

[0299] When the first difference is greater than the first relative delay, updating the second delay to the second difference;

[0300] or,

[0301] If the first delay is less than the second delay, then when the third difference is less than the first relative delay, the second delay is updated to the second sum value;

[0302] When the third difference is greater than the first relative delay, updating the first delay to a fourth difference;

[0303] Among them, the first difference is the difference between the first delay and the second delay, the first sum is the sum between the second delay and the first relative delay, and the second difference is the difference between the first delay and the first relative delay; the third difference is the difference between the second delay and the first delay, the second sum is the sum between the first delay and the first relative delay, and the fourth difference is the difference between the second delay and the first relative delay.

[0304] Optionally, the first updating module 1204 may be specifically configured to update the second delay to a third sum value when the fifth difference value is less than the second relative delay if the second delay is greater than the third delay;

[0305] When the fifth difference is greater than the second relative delay, updating the third delay to a sixth difference;

[0306] or;

[0307] If the second delay is less than the third delay, when the seventh difference is less than the second relative delay, the third delay is updated to the fourth sum value;

[0308] When the seventh difference is greater than the second relative delay, updating the second delay to the eighth difference;

[0309] Among them, the fifth difference is the difference between the second delay and the third delay, the third sum is the sum of the third delay and the second relative delay, the sixth difference is the difference between the second delay and the second relative delay, the seventh difference is the difference between the third delay and the second delay, the fourth sum is the sum between the second delay and the second relative delay, and the eighth difference is the difference between the third delay and the second relative delay.

[0310] Optionally, the delay determination device may further include:

[0311] After updating the value of the cell corresponding to the updated line channel to the second value according to the value and line channel corresponding to each cell in the first list, selecting the minimum fifth delay according to the fifth delay corresponding to each ninth line channel at the current moment; the ninth line channel is all the fifth line channels updated with delay before the current moment;

[0312] If the minimum fifth delay is not equal to the third value, then for each ninth line channel, the fifth delay of the ninth line channel is updated to the difference between the fifth delay of the ninth line channel and the minimum fifth delay.

[0313] Optionally, the delay determination device may further include:

[0314] In the case where the first line channel, the second line channel, and the third line channel are linked through the third quantum bit, the fourth quantum bit, and the second adjustable coupler, if an enable signal for the third quantum bit, the fourth quantum bit, and the second adjustable coupler is received, then the sixth delay of the first line channel, the seventh delay of the second line channel, and the eighth delay of the third line channel at the current moment are found;

[0315] According to the time difference between the sixth delay, the seventh delay and the eighth delay, the quantum bit frequency control signal is transmitted to the third quantum bit, the fourth quantum bit and the second adjustable coupler respectively by using the first line channel, the second line channel and the third line channel.

[0316] Through the device provided in the embodiment of the present application, when the first line channel, the second line channel, and the third line channel in the determined quantum computing measurement and control system are linked through the first quantum bit, the second quantum bit, and the first adjustable coupler, by obtaining two groups of signal transmission delays between any two line channels, that is, the first relative delay and the second relative delay, at least one of the first delay corresponding to the first line channel at the current moment, the second delay corresponding to the second line channel, and the third delay corresponding to the third line channel is updated based on the first relative delay and the second relative delay, which can realize the determination of the delay of signal transmission between each flux modulation line channel in the quantum computing measurement and control system.

[0317] Since at least one of the first delay, the second delay and the third delay is updated based on the first relative delay and the second relative delay, the updated delay matches the first relative delay and the second relative delay, which effectively ensures the accuracy of the updated delay, so that when performing multi-qubit gate operations, the qubit frequency control signal transmitted based on the updated delay can reach the qubit and the adjustable coupler at the same time, effectively improving the accuracy of quantum computing.

[0318] In addition, when the first delay, the second delay or the third delay is the delay updated before the current moment, when the delay is updated according to the first relative delay and the second relative delay between any two line channels among the first line channel, the second line channel and the third line channel, the correlation of the delays of the various line channels can be effectively established, so that the delays corresponding to each line channel finally determined are correlated with each other, which effectively improves the accuracy and correlation of the determined delays. Moreover, once the line channel is replaced, since the determined delay is bound to each line channel, the signal can be directly transmitted according to the determined delay without re-determining the delay, which improves the applicability of the determined delay.

[0319] Based on the same inventive concept, according to the delay determination method provided in the above embodiment of the present application, the embodiment of the present application also provides an electronic device, such as Fig.13 As shown, it includes a processor 1301, a communication interface 1302, a memory 1303 and a communication bus 1304, wherein the processor 1301, the communication interface 1302, and the memory 1303 communicate with each other through the communication bus 1304.

[0320] Memory 1303, used for storing computer programs;

[0321] The processor 1301 is used to implement the following steps when executing the program stored in the memory 1303:

[0322] Determine a line channel group to be processed in a quantum computing measurement and control system, where the line channel group to be processed includes a first line channel, a second line channel, and a third line channel for transmitting a quantum bit frequency control signal;

[0323] When the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, a first relative delay and a second relative delay are obtained, where the first relative delay and the second relative delay are signal transmission delays between any two line channels among the first line channel, the second line channel and the third line channel;

[0324] respectively searching for the first delay, the second delay and the third delay corresponding to the first line channel, the second line channel and the third line channel at the current moment; the first delay, the second delay and the third delay are preset delays, or are delays updated before the current moment;

[0325] At least one of the first delay, the second delay, and the third delay is updated based on the first relative delay and the second relative delay.

[0326] Through the electronic device provided in the embodiment of the present application, when the first line channel, the second line channel, and the third line channel in the determined quantum computing measurement and control system are linked through the first quantum bit, the second quantum bit, and the first adjustable coupler, by obtaining two sets of signal transmission delays between any two line channels, namely, the first relative delay and the second relative delay, at least one of the first delay corresponding to the first line channel at the current moment, the second delay corresponding to the second line channel, and the third delay corresponding to the third line channel is updated based on the first relative delay and the second relative delay, which can realize the determination of the delay of signal transmission between each flux modulation line channel in the quantum computing measurement and control system.

[0327] Since at least one of the first delay, the second delay and the third delay is updated based on the first relative delay and the second relative delay, the updated delay matches the first relative delay and the second relative delay, which effectively ensures the accuracy of the updated delay, so that when performing multi-qubit gate operations, the qubit frequency control signal transmitted based on the updated delay can reach the qubit and the adjustable coupler at the same time, effectively improving the accuracy of quantum computing.

[0328] In addition, when the first delay, the second delay or the third delay is the delay updated before the current moment, when the delay is updated according to the first relative delay and the second relative delay between any two line channels among the first line channel, the second line channel and the third line channel, the correlation of the delays of the various line channels can be effectively established, so that the delays corresponding to each line channel finally determined are correlated with each other, which effectively improves the accuracy and correlation of the determined delays. Moreover, once the line channel is replaced, since the determined delay is bound to each line channel, the signal can be directly transmitted according to the determined delay without re-determining the delay, which improves the applicability of the determined delay.

[0329] The communication bus mentioned in the above electronic device can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

[0330] The communication interface is used for communication between the above electronic device and other devices.

[0331] The memory may include a random access memory (RAM) or a non-volatile memory (NVM), such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.

[0332] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0333] Based on the same inventive concept, according to the delay determination method provided in the above-mentioned embodiments of the present application, the embodiments of the present application also provide a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps of any of the above-mentioned delay determination methods are implemented.

[0334] Based on the same inventive concept, according to the delay determination method provided in the above-mentioned embodiments of the present application, the embodiments of the present application also provide a computer program product containing instructions, which, when executed on a computer, enables the computer to execute any delay determination method in the above-mentioned embodiments.

[0335] Based on the same inventive concept, according to the delay determination method provided in the above-mentioned embodiments of the present application, the embodiments of the present application also provide a quantum computing measurement and control system to implement any of the above-mentioned delay determination methods.

[0336] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented by software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk Solid State Disk (SSD)), etc.

[0337] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0338] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for embodiments such as devices, electronic devices, computer-readable storage media, computer program products, and quantum computing and control systems, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.

[0339] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims

1. A method for determining a delay, characterized in that: The method comprises: Determine a line channel group to be processed in a quantum computing measurement and control system, wherein the line channel group to be processed includes a first line channel, a second line channel, and a third line channel for transmitting a quantum bit frequency control signal; In a case where the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, a first relative delay and a second relative delay are obtained, where the first relative delay and the second relative delay are signal transmission delays between any two line channels among the first line channel, the second line channel and the third line channel; respectively searching for a first delay, a second delay and a third delay corresponding to the first line channel, the second line channel and the third line channel at the current moment; the first delay, the second delay and the third delay are preset delays, or are delays updated before the current moment; At least one of the first delay, the second delay, and the third delay is updated based on the first relative delay and the second relative delay.

2. The method according to claim 1, characterized in that The step of determining the line channel group to be processed in the quantum computing measurement and control system includes: According to the value and line channel corresponding to each cell in the first list, a cell group to be processed is selected, wherein the cell group to be processed includes a first cell, a second cell, and a third cell, the fourth line channels corresponding to the first cell, the second cell, and the third cell are the same, and the values ​​of at least two cells are the first value, the first value indicates that the fourth line channel and the fifth line channel corresponding to the cell are not linked, the fourth line channel is used to transmit a quantum state control signal, and the fifth line channel is used to transmit a quantum bit frequency control signal; The fifth line channels corresponding to the first cell, the second cell and the third cell are determined as the first line channel, the second line channel and the third line channel to obtain a line channel group to be processed.

3. The method according to claim 2, characterized in that After updating at least one of the first delay, the second delay, and the third delay based on the first relative delay and the second relative delay, the method further includes: updating the value of the cell corresponding to the updated line channel in the to-be-processed line channel group to a second value, wherein the second value indicates that the fourth line channel and the fifth line channel corresponding to the cell are linked, and the updated line channel is a line channel with a time delay update; The method further comprises: When the first list includes the cell group to be processed, the step of selecting the cell group to be processed according to the value and line channel corresponding to each cell in the first list is returned to be executed until the first list does not include the cell group to be processed.

4. The method according to claim 3, characterized in that After updating the value of the cell corresponding to the updated line channel to a second value according to the value and line channel corresponding to each cell in the first list, the method further includes: Determine a sixth line channel associated with the updated line channel based on the value and line channel corresponding to each cell in the first list; According to the delay update amount corresponding to the updated line channel, the fourth delay of the sixth line channel at the current moment is updated.

5. The method according to claim 4, characterized in that If each row of the first list corresponds to a fourth line channel, and each column corresponds to a fifth line channel, then the step of determining the sixth line channel associated with the updated line channel based on the value and line channel corresponding to each cell in the first list includes: Determine the column in the first list corresponding to the update line channel as a first target column; Selecting a fourth line channel on the first target column that is not selected as the first associated line channel and whose corresponding value is the second value as the first associated line channel associated with the updated line channel; If the first associated line channel is not empty, for each first target row, selecting a fifth line channel on the first target row that has not been selected as the second associated line channel and whose corresponding value is the second value as the second associated line channel associated with the updated line channel, the first target row being a row corresponding to the first associated line channel in the first list; For each second associated line channel, determining the column corresponding to the second associated line channel in the first list as the first target column, and returning to the step of selecting a fourth line channel on the first target column that is not selected as the first associated line channel and whose corresponding value is the second value as the first associated line channel associated with the updated line channel, until the first associated line channel determined based on all the second associated lines is empty, or until the second associated line channel determined based on all the first associated lines is empty; A union of the first associated line channel and the second associated line channel is determined as a sixth line channel associated with the update line channel.

6. The method according to claim 2, characterized in that The method further comprises: In the second target column of the first list, the fourth line channel corresponding to the cell having the second value is selected as the seventh line channel, and the second target column corresponds to a line channel corresponding to the first relative delay or the second relative delay; For each seventh line channel, the values ​​of the cells corresponding to the seventh line channel and the eighth line channel in the first list are updated to the second values; the eighth line channel is another line channel corresponding to the first relative delay or the second relative delay.

7. The method according to claim 1, characterized in that The step of obtaining the first relative time delay and the second relative time delay when the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler comprises: When the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the adjustable coupler, a first transmission duration corresponding to the first line channel, a second transmission duration corresponding to the second line channel and a third transmission duration corresponding to the third line channel are obtained; If the second transmission duration is less than the first transmission duration and the third transmission duration, the difference between the first transmission duration and the second transmission duration is calculated as the first relative delay between the first line channel and the second line channel, and the difference between the third transmission duration and the first transmission duration is calculated as the second relative delay between the third line channel and the second line channel.

8. The method according to claim 7, characterized in that The step of updating at least one of the first delay, the second delay and the third delay based on the first relative delay and the second relative delay comprises: Based on the first relative delay, updating the first delay and / or the second delay; Based on the second relative delay, the second delay and / or the third delay is updated.

9. The method according to claim 8, characterized in that The step of updating the first delay and / or the second delay based on the first relative delay comprises: If the first delay is greater than the second delay, when the first difference is less than the first relative delay, updating the first delay to a first sum value; When the first difference is greater than the first relative delay, updating the second delay to a second difference; or, If the first delay is less than the second delay, when the third difference is less than the first relative delay, the second delay is updated to a second sum value; When the third difference is greater than the first relative delay, updating the first delay to a fourth difference; Among them, the first difference is the difference between the first delay and the second delay, the first sum is the sum of the second delay and the first relative delay, and the second difference is the difference between the first delay and the first relative delay; the third difference is the difference between the second delay and the first delay, the second sum is the sum of the first delay and the first relative delay, and the fourth difference is the difference between the second delay and the first relative delay.

10. The method according to claim 8, characterized in that The step of updating the second delay and / or the third delay based on the second relative delay comprises: If the second delay is greater than the third delay, when the fifth difference is less than the second relative delay, updating the second delay to a third sum value; When the fifth difference is greater than the second relative delay, updating the third delay to a sixth difference; or; If the second delay is less than the third delay, when the seventh difference is less than the second relative delay, updating the third delay to a fourth sum value; When the seventh difference is greater than the second relative delay, updating the second delay to an eighth difference; Among them, the fifth difference value is the difference between the second delay and the third delay, the third sum value is the sum value between the third delay and the second relative delay, the sixth difference value is the difference between the second delay and the second relative delay, the seventh difference value is the difference between the third delay and the second delay, the fourth sum value is the sum value between the second delay and the second relative delay, and the eighth difference value is the difference between the third delay and the second relative delay.

11. The method according to claim 3, characterized in that After updating the value of the cell corresponding to the updated line channel to a second value according to the value and line channel corresponding to each cell in the first list, the method further includes: According to the fifth delay corresponding to each ninth line channel at the current moment, the minimum fifth delay is selected; the ninth line channel is all the fifth line channels with updated delays before the current moment; If the minimum fifth delay is not equal to the third value, then for each ninth line channel, the fifth delay of the ninth line channel is updated to the difference between the fifth delay of the ninth line channel and the minimum fifth delay.

12. The method according to claim 1, characterized in that The method further comprises: In the case where the first line channel, the second line channel, and the third line channel are linked through the third quantum bit, the fourth quantum bit, and the second adjustable coupler, if an enable signal for the third quantum bit, the fourth quantum bit, and the second adjustable coupler is received, then the sixth delay of the first line channel, the seventh delay of the second line channel, and the eighth delay of the third line channel at the current moment are found; According to the time difference between the sixth delay, the seventh delay and the eighth delay, the first line channel, the second line channel and the third line channel are used to transmit quantum bit frequency control signals to the third quantum bit, the fourth quantum bit and the second adjustable coupler respectively.

13. A delay determination device, characterized in that: The device comprises: A first determination module is used to determine a line channel group to be processed in a quantum computing measurement and control system, wherein the line channel group to be processed includes a first line channel, a second line channel and a third line channel for transmitting a quantum bit frequency control signal; an acquisition module, configured to acquire a first relative delay and a second relative delay when the first line channel, the second line channel and the third line channel are linked through the first quantum bit, the second quantum bit and the first adjustable coupler, wherein the first relative delay and the second relative delay are signal transmission delays between any two line channels among the first line channel, the second line channel and the third line channel; a search module, configured to search for a first delay, a second delay, and a third delay corresponding to the first line channel, the second line channel, and the third line channel at a current moment, respectively; the first delay, the second delay, and the third delay are preset delays, or are delays updated before the current moment; The first updating module is configured to update at least one of the first delay, the second delay and the third delay based on the first relative delay and the second relative delay.

14. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor, for implementing the method steps described in any one of claims 1-12 when executing a program stored in a memory.

15. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method steps described in any one of claims 1 to 12 are implemented.

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