Time domain comparison circuit and analog-to-digital converter

By designing a time domain comparison circuit including a ring voltage-controlled oscillator and a phase detector, the existing time domain comparator has solved the problems of small voltage to time gain, incomplete reset and high metastable probability, and achieved high energy efficiency and low noise comparison effects.

CN119727711AActive Publication Date: 2025-03-28SHANGHAI WEIJIA TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411791093.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-06
Publication Date
2025-03-28
Estimated Expiration
2044-12-06

AI Technical Summary

Technical Problem

Existing time-domain comparators have problems such as small voltage to time gain, inability to reset effectively, and high metastable probability.

Method used

A time domain comparison circuit is designed, including a first annular voltage controlled oscillator, a second annular voltage controlled oscillator and a phase detector. By adjusting the rising and falling edge delays of the oscillation signal, the current multiplexing of the NMOS and PMOS tubes is used to set the reset tube, and the phase detector dead time can be adjusted to improve the voltage-to-time gain and system energy efficiency.

Benefits of technology

The overall energy efficiency is improved, the relationship between noise and energy consumption is optimized, the probability of metastable state is reduced, and rapid and effective comparison results are achieved.

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Abstract

The invention provides a time domain comparison circuit and an analog-to-digital converter, and the circuit comprises a first ring voltage-controlled oscillator which adjusts the time delay of a rising edge and a falling edge of an oscillation signal based on the size relation of a first input voltage and a second input voltage, so as to obtain a first oscillation signal with a first oscillation frequency; the second ring voltage-controlled oscillator is used for adjusting the delay of the rising edge and the falling edge of the oscillation signal based on the magnitude relationship between the first input voltage and the second input voltage so as to obtain a second oscillation signal with a second oscillation frequency; and the phase discriminator receives and calculates the phase difference between the first oscillation signal and the second oscillation signal so as to obtain the magnitude relationship between the first input voltage and the second input voltage based on the phase difference. According to the invention, a current multiplexing VCO structure and a mode of carrying out feedback regulation on the dead time of the phase discriminator based on the number of oscillation periods are adopted, so that the performance of the time domain comparison circuit is improved, the overall energy efficiency is improved, the relationship between noise and energy consumption is optimized, and the probability of metastable state is reduced.
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