Semiconductor device
By designing field-effect transistors and hybrid separation structures with enhanced electrical characteristics in semiconductor devices, the challenges of semiconductor devices in the prior art in terms of high integration and complex design are solved, and higher reliability and versatility are achieved.
CN119730387APending Publication Date: 2025-03-28SAMSUNG ELECTRONICS CO LTD
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Patent Information
- Application Number
- CN202411693677.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2018-02-28
- Filing Date
- 2019-02-21
- Publication Date
- 2025-03-28
AI Technical Summary
Technical Problem
Existing semiconductor devices have challenges in achieving high integration, reliability, speed and versatility, especially when designing and manufacturing complex field effect transistors.
Method used
Using a semiconductor device design including a field effect transistor with enhanced electrical characteristics, separation and electrical characteristics improvement between logic cells are achieved by arranging a plurality of logic cells and a hybrid separation structure on the substrate.
Benefits of technology
It improves the electrical characteristics of semiconductor devices, enhances their reliability and versatility, and meets the needs of high integration and complex designs.
✦ Generated by Eureka AI based on patent content.
Abstract
A semiconductor device is provided. The semiconductor device includes a first logic cell and a second logic cell adjacent to each other on a substrate, and a hybrid separation structure extending in a first direction between the first logic cell and the second logic cell. Each logic cell includes: a first active pattern and a second active pattern extending in a second direction intersecting the first direction, and spaced apart from each other in the first direction; and gate electrodes extending in the first direction and spanning the first active pattern and the second active pattern, and the plurality of gate electrodes being spaced apart by a gate pitch. The hybrid separation structure includes a first separation structure that separates the first active pattern of the first logic cell from the first active pattern of the second logic cell; and a second separation structure on the first separation structure. The width of the first separation structure is greater than the gate pitch.
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