Capacitor structure, packaging substrate, forming method of packaging substrate and packaging structure
By designing an interdigit capacitor structure in the semiconductor chip package structure, the problem of increasing power supply noise is solved, and the effect of reducing capacitive reactance and impedance is achieved, and the chip stability is improved.
CN119730717APending Publication Date: 2025-03-28BEIJING ZITIAO NETWORK TECH CO LTD
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Patent Information
- Application Number
- CN202311278695.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-28
- Publication Date
- 2025-03-28
AI Technical Summary
Technical Problem
In the semiconductor chip package structure, the flip current of thousands of transistors causes an increase in noise on the power supply path, affecting the stable operation of the chip.
Method used
A capacitive structure is designed, including a conductive plane, each of which consists of a plurality of electrode plates. The electrode plate forms an extended electrode through the pad portion and the connecting portion to form an interdigit capacitance structure to increase the capacitance and reduce the capacitance resistance.
Benefits of technology
By increasing the capacitance, reducing capacitance reactance and impedance, reducing power supply noise, and improving chip stability and performance.
✦ Generated by Eureka AI based on patent content.
Abstract
A capacitor structure, a package substrate and a forming method thereof, and a package structure, the capacitor structure comprising at least one conductive plane, each conductive plane comprising a plurality of electrode plates, each electrode plate comprising: a pad portion comprising a pad main body portion and a plurality of pad extension portions arranged on a side edge of the pad main body portion in a first direction; the connecting part comprises a connecting main body part and a plurality of connecting extension parts arranged on the side edge of the connecting main body part in the first direction, and the plurality of bonding pad extension parts and the plurality of connecting extension parts form a plurality of extension electrodes; the bonding pad main body part and the connecting main body part are arranged along the second direction and are connected with each other, and the width of the bonding pad main body part in the first direction is greater than that of the connecting main body part in the first direction; in each conductive plane, the plurality of electrode plates comprise a first electrode plate and a second electrode plate which are adjacent in a first direction, and a plurality of extension electrodes of the first electrode plate and the second electrode plate are overlapped in a second direction and are alternately arranged to form an interdigital capacitor structure.
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