Display panel and display device

By setting a shielding unit in the OLED display panel and controlling the voltage difference using the reset signal, the afterimage problem caused by electronic interference of the driving transistor is solved, and the image quality and product yield are improved.

CN119741892AActive Publication Date: 2025-04-01BOE TECHNOLOGY GROUP CO LTD +2
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Patent Information

Application Number
CN202510005902.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-02
Publication Date
2025-04-01
Estimated Expiration
2045-01-02

AI Technical Summary

Technical Problem

In the existing OLED display panel, the driver transistors of the pixel circuit may be subject to electronic interference, resulting in afterimage problems and affecting image quality and product yield.

Method used

A shielding unit is provided between the substrate substrate and the pixel circuit, and a voltage difference between the shielding unit and the driving transistor is controlled to increase the recovery speed and reduce the afterimage hysteresis.

Benefits of technology

Through electronic shielding and reset signal control, the afterimage recovery effect is improved and the product image quality and yield are improved.

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Abstract

The invention provides a display panel and a display device, and the display panel comprises a substrate; the at least one pixel circuit is positioned on one side of the substrate and is configured to generate a light-emitting signal by utilizing a driving transistor of the pixel circuit so as to perform light-emitting control; and the at least one shielding unit is positioned between the substrate and the pixel circuit, is arranged opposite to the at least one pixel circuit, and is configured to be controlled through a reset signal of the at least one pixel circuit, so that a voltage difference is formed between the at least one shielding unit and the driving transistor.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of OLED (Organic Light-Emitting Diode) display technology, the market has higher and higher requirements for display quality.

[0003] However, according to the design of pixel circuits in current display panels, the driving transistors therein may be subject to electronic interference, thereby causing afterimage problems, affecting product image quality and product yield. Summary of the invention

[0004] In view of this, the present application proposes a display panel and a display device to solve or partially solve the above problems.

[0005] Based on the above objectives, in a first aspect, the present application provides a display panel, including:

[0006] substrate substrate;

[0007] At least one pixel circuit, located on one side of the substrate, configured to generate a light-emitting signal using a driving transistor of the pixel circuit to perform light-emitting control;

[0008] At least one shielding unit is located between the substrate and the pixel circuit, is arranged opposite to the at least one pixel circuit, and is configured to be controlled by a reset signal of the at least one pixel circuit so that a voltage difference is formed between the at least one shielding unit and the driving transistor.

[0009] In some exemplary embodiments, the reset signal includes: a source reset signal;

[0010] The at least one shielding unit is configured to receive the source reset signal.

[0011] In some exemplary embodiments, the at least one pixel circuit is arranged in an array, and the at least one shielding unit is arranged in an array corresponding to the at least one pixel circuit; at least one row or at least one column of shielding units is configured to receive the reset signal in series.

[0012] In some exemplary embodiments, the at least one shielding unit at least partially overlaps with an orthographic projection of the driving transistor in the at least one pixel circuit on the substrate.

[0013] In some exemplary embodiments, the reset signal is generated by a reset signal control circuit;

[0014] Any pixel circuit and the shielding unit arranged opposite thereto are commonly connected to the reset signal control circuit connected to the any pixel circuit.

[0015] In some exemplary embodiments, the reset signal is generated by a reset signal control circuit; the reset signal control circuit includes: a first reset signal control circuit and a second reset signal control circuit;

[0016] The at least one pixel circuit is connected to the first reset signal control circuit;

[0017] The at least one shielding unit is connected to the second reset signal control circuit.

[0018] In some exemplary embodiments, the reset signal is generated by a reset signal control circuit; the reset signal control circuit includes a first output terminal and a second output terminal;

[0019] The at least one pixel circuit is connected to the first output terminal;

[0020] The at least one shielding unit is connected to the second output end.

[0021] In some exemplary embodiments, the first output terminal and the second output terminal are configured to be formed by at least one pair of output transistors with common gates.

[0022] In some exemplary embodiments, the device comprises: a display area and a non-display area surrounding the display area;

[0023] The reset signal control circuit is arranged in a non-display area on at least one side of the display area.

[0024] In some exemplary embodiments, the reset signal control circuit is disposed in non-display areas at opposite sides of the display area.

[0025] Based on the same concept, in a second aspect, the present application also provides a display device, comprising the display panel as described in the first aspect above.

[0026] As can be seen from the above, the present application provides a display panel and a display device, the display panel comprising: a substrate; at least one pixel circuit, located on one side of the substrate, configured to generate a light-emitting signal using a driving transistor of the pixel circuit to control light emission; at least one shielding unit, located between the substrate and the pixel circuit, arranged relative to the at least one pixel circuit, and configured to control through a reset signal of the at least one pixel circuit, so that the at least one shielding unit and the driving transistor form a voltage difference. The present application performs electronic shielding by arranging a shielding unit between the substrate and the pixel circuit, the shielding unit is arranged corresponding to the pixel circuit, and it can be a conductive structure itself, and then the pixel circuit can be stabilized by the shielding unit to improve the residual image problem. Afterwards, the reset signal is used as the control signal of the shielding unit, so that the shielding unit can form a certain voltage difference with the driving transistor during the reset process of the pixel circuit, and the voltage difference is further used to improve the speed at which different brightness grayscales reach the set brightness grayscale during the recovery process, further reduce the hysteresis of the residual image, improve the residual image recovery effect, and finally improve the product image quality effect and product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 A schematic diagram of a partial hierarchical structure of an exemplary display panel provided in an embodiment of the present application.

[0029] Figure 2 A schematic diagram of the arrangement structure of a shielding unit provided in an embodiment of the present application.

[0030] Figure 3 A schematic diagram of the hysteresis principle analysis of the driving transistor provided in an embodiment of the present application.

[0031] Figure 4 A schematic diagram of an equivalent circuit structure of a pixel circuit provided in an embodiment of the present application.

[0032] Figure 5 A timing diagram of some signals of an exemplary display panel provided in an embodiment of the present application.

[0033] Figure 6 A schematic diagram of the arrangement structure of another shielding unit provided in an embodiment of the present application.

[0034] Figure 7A schematic diagram of an equivalent circuit structure of a reset signal control circuit GOA provided in an embodiment of the present application.

[0035] Figure 8 A schematic diagram of an equivalent circuit structure of another reset signal control circuit GOA provided in an embodiment of the present application.

[0036] Fig. 9 A schematic diagram of the connection effect of the reset signal control circuit GOA provided in an embodiment of the present application. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solutions and advantages of this specification more clear, this specification is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0038] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements, objects or method steps appearing before the word cover the elements, objects or method steps listed after the word and their equivalents, without excluding other elements, objects or method steps. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0039] As mentioned in the background technology section, in the current scenario, thin film transistors (TFT) are the mainstream products in displays. OLEDs can be controlled through pixel circuits formed by thin film transistors (TFT) to achieve image output. However, during the use of the product, afterimage problems may occur. After analysis, it is found that the reasons for the afterimage of OLED display may include the reliability differences of organic light-emitting materials, the stability of TFT, and the influence of the substrate on TFT.

[0040] It should be noted that the specific process of the afterimage problem is mainly: after a frame of the picture is output, the pixel circuit or OLED needs to be restored to the initial state before the next frame of the picture is output. This recovery process may be called a reset or resetting stage in different scenarios. In this recovery process, if it is not fully restored, the OLED will still have signal input, and eventually, on a macro level, the residue of the previous frame of the picture will be formed, which will lead to the afterimage problem. It can be seen that the main stage of the afterimage problem is the recovery or resetting stage of the pixel circuit or OLED.

[0041] From this, it can be seen that the residual image is mainly caused by the fact that the corresponding transistor in the pixel circuit as the control end does not recover quickly, resulting in residual electrons or charges, which makes it impossible for the OLED to recover quickly to the initial state. Furthermore, in some embodiments, the influence of the residual image can be improved by setting an isolation structure. A shielding unit can be set between the substrate and the pixel circuit, and then a constant voltage can be given to the shielding unit, or a constant voltage can be given to the shielding unit during the reset or reset stage, so that the pixel circuit, especially the driving transistor DTFT therein, can be electronically shielded by the shielding unit, so that in the reset stage, the purpose of stabilizing the DTFT characteristics can be achieved, so that the residual image can be controlled, and the residual image problem can be improved to a certain extent.

[0042] In some embodiments, Figure 1 As shown, the pixel circuit 120 of the display panel 100 is disposed on one side of the substrate 110, and the shielding unit 130 can be disposed between the two. Of course, in some specific scenarios, an insulating layer and a buffer layer can be disposed between the shielding unit 130 and the pixel circuit 120 to achieve a certain insulation and buffering effect. In a more specific scenario, Figure 1 The main figure shows the driving transistor (DTFT or T1) in the pixel circuit 120. Afterwards, a fixed voltage is applied to the shielding unit 130 to perform electronic shielding during the pixel circuit 120, especially the driving transistor T1 of the pixel circuit 120 during the reset process, so as to achieve the purpose of stabilizing the characteristics of the driving transistor T1. Finally, in order to realize the power supply of the shielding unit 130, as shown in FIG. Figure 2 As shown, it can generally be designed as a mesh structure, in which the horizontal direction can be the positive electrode, the vertical direction can be the negative electrode, and so on.

[0043] Later, the applicant found that, while the above method can solve the afterimage problem to a certain extent, the improvement effect on the afterimage problem is not ideal in some scenes. Figure 3 As shown, combined with the attached Figure 3(a) Due to the hysteresis characteristics of TFT, the initial brightness of the switch from white screen L255 to reference grayscale L48 is inconsistent with the initial brightness of the switch from black screen L0 to reference grayscale L48. Figure 3 (b) The further the white image L255 and the black image L0 are offset from the threshold voltage (Vth) of the driving transistor T1, the longer it takes to restore the brightness to the reference grayscale L48. Such a difference ultimately leads to an unsatisfactory improvement effect on the afterimage.

[0044] In this way, combined with the above-mentioned actual situation, the embodiment of the present application provides another display panel, which performs electronic shielding by setting a shielding unit between the substrate and the pixel circuit. The shielding unit is set corresponding to the pixel circuit and can be a conductive structure itself, so that the pixel circuit can be stabilized by the shielding unit to improve the residual image problem. Afterwards, the reset signal is used as the control signal of the shielding unit, so that the shielding unit can form a certain voltage difference with the driving transistor during the reset process of the pixel circuit, and the speed at which different brightness grayscales reach the set brightness grayscale during the recovery process is further improved through the voltage difference, further reducing the hysteresis of the residual image, improving the residual image recovery effect, and ultimately improving the product image quality effect and product yield.

[0045] Figure 4 FIG. 1 is a schematic diagram showing an equivalent circuit structure of a pixel circuit of an exemplary display panel provided by an embodiment of the present application, wherein the vertical line on one side of the driving transistor T1 is used to represent the shielding unit 130 .

[0046] Combination Figure 1 and Figure 4 As shown, a display panel 100 of an embodiment of the present application includes: a base substrate 110; at least one pixel circuit 120, located on one side of the base substrate 110, configured to generate a light-emitting signal using a driving transistor T1 of the pixel circuit 110 to control light emission; at least one shielding unit 130, located between the base substrate 110 and the pixel circuit 120, arranged opposite to the at least one pixel circuit 120, configured to be controlled by a reset signal reset of the at least one pixel circuit 120 so that a voltage difference is formed between the at least one shielding unit 130 and the driving transistor T1.

[0047] In this embodiment, the base substrate 110 can be used to carry other components in the display panel 100; the pixel circuit 120 can be used to control the light emission of the light emitting transistor by generating a corresponding light emitting signal; the shielding unit 130 can be used to provide corresponding electronic shielding during the resetting process of the pixel circuit 120, so as to achieve the purpose of stabilizing the characteristics of the pixel circuit 120, especially the driving transistor T1 therein.

[0048] Afterwards, if Figure 4As shown, it is a schematic diagram of an exemplary 8T1C pixel circuit. Of course, in different application scenarios, the pixel circuit can also be other types of control circuits, such as 2T1C, 3T1C, 4T1C, 7T1C, 10T1C, etc. For the exemplary 8T1C pixel circuit, the driving transistor T1 is mainly used to form a driving light-emitting signal; the T2 transistor is mainly used to receive the control Data signal for data writing, and is controlled by the first scanning signal P_gate; the T3 transistor is a compensation transistor, which is controlled by the second scanning signal N_gate; the T4 and T5 transistors are two light-emitting control transistors, which are controlled by the light-emitting control signal EM, the source of the T4 transistor can be connected to the first power supply signal VDD (generally can be a high-level signal), and the drain of the T5 transistor can be connected to the light-emitting pixel and the first power supply signal V SS (generally it can be a low level signal); T6, T7, and T8 transistors are three reset transistors, which are controlled by two reset signals Reset1 and Reset2 respectively, wherein the T6 transistor can be used to reset the gate of the driving transistor T1, and the T7 reset transistor can be used to reset the anode of the light-emitting pixel, and then the inputs Vinit1 and Vinit2 of the T6 and T7 transistors are generally low voltage or negative voltage, and the T8 transistor can be used to reset the source of the driving transistor T1, and then the input Vinit3 of the T8 transistor is generally high voltage or positive voltage.

[0049] It should be noted here that the control electrode of the transistor structure appearing in this embodiment and subsequent embodiments generally corresponds to the gate (G) of the transistor, and the first electrode and the second electrode correspond to the source (S) and drain (D) of the transistor. At the same time, the transistors used in the embodiments of the present application can be thin film transistors or field effect transistors or other devices with the same characteristics, and the thin film transistor can be an oxide semiconductor transistor. According to the role in the circuit, the transistors used in the embodiments of the present application are mainly switching transistors. Since the source and drain of the switching transistor are symmetrical, its source and drain are interchangeable, and then in this solution, one of the source and drain is called the first electrode, the other of the source and drain is called the second electrode, and the gate is called the control electrode.

[0050] Afterwards, the shielding unit 130 represented by the vertical line on one side of the driving transistor T1 can be connected to the two reset signals Reset1 or Reset2. In this way, during the resetting process of the pixel circuit 120, the shielding unit 130 can form a certain voltage difference with the pixel circuit 120. Specifically, Figure 3Taking the connection between the shielding unit 130 and Reset2 as an example, after the driving transistor T1 is charged, Reset2 outputs VGL (a level signal, generally a low level or a negative level) to write Vinit3 (positive voltage) into the source (S pole) of the driving transistor T1, and VGL (negative voltage) is written into the shielding unit 130 corresponding to the driving transistor T1, thereby forming a gate-source voltage difference (Vgs). Figure 3 As shown, when the shielding unit 130 is connected to the reset signal Reset, a bias voltage is added to shift L255 and L0 to the same negative bias position, thereby improving the afterimage effect.

[0051] Furthermore, the applicant has found that if the electric field is stronger, the current is larger, and the hysteresis is smaller during the bias stage, the effect of improving the residual image is better. According to the above, if the shielding unit 130 is connected to the reset signal Reset1, combined with Figure 5 As shown in the partial signal timing diagram, when the Reset1 signal is working, the driving transistor T1 is the gate input Vinit1 signal, both of which are negative voltage signals, and the electric field between them may be small, and thus the effect may not be obvious. In this way, for the shielding unit 130, it can be connected to the reset signal Reset2, that is, it can be connected to the source reset signal Reset2. That is, in some embodiments, the reset signal includes: the source reset signal Reset2; the at least one shielding unit 130 is configured to receive the source reset signal Reset2.

[0052] In some embodiments, the pixel circuits 120 may be arranged in an array, and the corresponding shielding units 130 may also be arranged in an array. Figure 6 As shown, it can be connected in series in the direction of each row or each column, so as to receive signals in units of one row or one column, and can realize signal scanning row by row or column by column. That is, in some embodiments, the at least one pixel circuit 120 is arranged in an array, and the at least one shielding unit 130 is arranged in an array corresponding to the at least one pixel circuit 120; at least one row or at least one column of shielding units 130 is configured to receive the reset signal in a series manner.

[0053] In some embodiments, the shielding unit 130 may correspond to the entire pixel circuit 120, that is, one shielding unit 130 may cover one pixel circuit 120. At the same time, according to the foregoing, the shielding unit 130 is mainly aimed at the driving transistor T1 in the pixel circuit 120. In other embodiments, each shielding unit 130 may correspond only to the driving transistor T1 in the pixel circuit 120. That is, the projection area of ​​the shielding unit 130 on the pixel circuit 120 may only cover the driving transistor T1 in the pixel circuit 120. This arrangement saves the corresponding material cost while not affecting the effect. Of course, in different specific scenarios, the degree of coverage may be different. In some embodiments, the shielding unit 130 may cover the entire driving transistor T1; in other embodiments, the shielding unit 130 may only cover part of the driving transistor T1, etc. That is, in some embodiments, the at least one shielding unit 130 and the driving transistor T1 in the at least one pixel circuit 120 overlap at least partially in their orthographic projection on the substrate.

[0054] In some embodiments, the reset signal Reset may be generated by a reset signal control circuit GOA. Figure 7 As shown, a 10T3C reset signal control circuit GOA includes 10 transistors T9 to T18 and 3 storage capacitors C2 to C4, which finally form a corresponding reset signal Reset by receiving a clock signal line CK, an inverted clock signal line CB, a level signal line VGL and VGH (where VGL is generally a low level and VGH is generally a high level), and a frame start signal line STV, and outputs it from the OUT terminal. Furthermore, for any pixel circuit 120 and the corresponding shielding unit 130, it can be connected to the reset signal control circuit GOA in a parallel manner. Taking Reset2 as an example, the OUT terminal of the reset signal control circuit GOA is connected to the gate of the T8 transistor and is also connected to the corresponding shielding unit 130. That is, in some embodiments, the reset signal is generated by the reset signal control circuit GOA; any pixel circuit 120 and the shielding unit 130 arranged opposite thereto are commonly connected to the reset signal control circuit GOA connected to any pixel circuit 120.

[0055] In other embodiments, the reset signal control circuit GOA can be set to multiple groups, so that one group can be used to control the pixel circuit 120, and the other group can be used to control the shielding unit 130. In this way, the level signal lines VGL and VGH in the reset signal control circuit GOA that controls the shielding unit 130 can be fine-tuned, so as to adjust the voltage of the shielding unit 130 in the bias stage and the display stage by adjusting the voltage of VGH and VGL. That is, in some embodiments, the reset signal is generated by the reset signal control circuit GOA; the reset signal control circuit GOA includes: a first reset signal control circuit and a second reset signal control circuit; the at least one pixel circuit 120 is connected to the first reset signal control circuit; and the at least one shielding unit 130 is connected to the second reset signal control circuit. Among them, the first reset signal control circuit and the second reset signal control circuit can be two groups of reset signal control circuits, and the signals of the two groups of reset signal control circuits can be exactly the same, only the structure of the output terminal connection is different, one is connected to the pixel circuit 120, and the other is connected to the shielding unit 130.

[0056] In some other embodiments, in addition to setting multiple groups, the reset signal control circuit GOA may also be set with multiple output terminals OUT, such as Figure 8As shown, taking the original reset signal control circuit GOA as a 10T3C circuit as an example, since there are two output transistors acting on the output terminal OUT in the 10T3C circuit, namely, the T17 transistor and the T18 transistor, a common-gate transistor can be set respectively, namely, the T19 transistor and the T20 transistor, wherein the T17 transistor and the T19 transistor are a pair of common-gate transistors, and the T18 transistor and the T20 transistor are a pair of common-gate transistors, so that the T17 transistor and the T18 transistor jointly control the output terminal OUT1, and the T19 transistor and the T20 transistor jointly control the output terminal OUT2, in this way, the output terminal OUT2 connected to the shielding unit 130 can also be controlled, specifically, the voltage of the shielding unit 130 in the bias stage and the display stage can be adjusted by adjusting the voltage of VGH* and VGL*, and the space of the reset signal control circuit GOA can also be minimized. Of course, since the output terminal of the 10T3C circuit shown in the figure is controlled by two output transistors, and then the common-gate transistors formed are also two, and finally become two pairs of common-gate transistors. If the reset signal control circuit GOA is another type of circuit, the output transistors at its output end may be one or more, and thus the number of transistors with a common gate is also different, and the number of transistor pairs with a common gate formed is also different. That is, in some embodiments, the reset signal is generated by the reset signal control circuit; the reset signal control circuit GOA includes a first output terminal OUT1 and a second output terminal OUT2; the at least one pixel circuit 120 is connected to the first output terminal OUT1; and the at least one shielding unit 130 is connected to the second output terminal OUT2. In some embodiments, the first output terminal and the second output terminal are configured to be formed by at least one pair of output transistors with a common gate.

[0057] In some embodiments, in combination Figure 6 and Fig. 9 As shown, in the display panel, a display area 140 and a non-display area 150 are generally included, and the non-display area 150 may be surrounded by the display area. Furthermore, the reset signal control circuit GOA may be arranged in the non-display area 150 on one side of the display area 140, for example, the reset signal control circuit GOA may be arranged in the non-display area 150 on the left or right side of the display area 140. In this way, the frame space of the reset signal control circuit GOA and the display panel 100 may be saved. That is, in some embodiments, the display panel 100 includes: a display area 140 and a non-display area 150 surrounding the display area 140; the reset signal control circuit GOA is arranged in the non-display area 150 on at least one side of the display area 140.

[0058] Furthermore, if Figure 6 and Fig. 9As shown, in order to provide a better signal effect, the reset signal control circuit GOA can provide signals from both sides. For example, the reset signal control circuit GOA can be set in the non-display area 150 on the left and right sides of the display area 140. That is, in some embodiments, the reset signal control circuit GOA is set in the non-display area 150 on both sides of the display area 140.

[0059] Finally, it should be noted that transistors can be divided into N-type and P-type according to their characteristics. P-type transistors are turned on when the gate is at a low level and turned off when the gate is at a high level; N-type transistors are turned on when the gate is at a high level and turned off when the gate is at a low level. Figure 4 and Figure 7 As shown, in this embodiment, most of the P-type transistors are taken as examples, among which only the T3 transistor is an N-type transistor. Of course, this is only a preferred solution for easy implementation in this embodiment, and it does not limit the technical solution of the present invention. It should be known to those skilled in the art that simply changing the type of each transistor (N-type or P-type) and changing the positive and negative polarity of the output voltage of each power supply terminal and the control signal line to achieve the same technical solution of turning on or off the transistors as in this embodiment, all belong to the protection scope of this application. The specific situation will not be illustrated one by one here.

[0060] As can be seen from the above, the present application provides a display panel, which includes: a substrate; at least one pixel circuit, located on one side of the substrate, configured to generate a light-emitting signal using the driving transistor of the pixel circuit to control light emission; at least one shielding unit, located between the substrate and the pixel circuit, corresponding to the at least one pixel circuit, configured to control through the reset signal of the at least one pixel circuit, so that the at least one shielding unit and the driving transistor form a voltage difference. The present application performs electronic shielding by setting a shielding unit between the substrate and the pixel circuit. The shielding unit is set corresponding to the pixel circuit and can be a conductive structure itself, so that the pixel circuit can be stabilized by the shielding unit to improve the residual image problem. Afterwards, the reset signal is used as the control signal of the shielding unit, so that the shielding unit can form a certain voltage difference with the driving transistor during the reset process of the pixel circuit, and the speed at which different brightness grayscales reach the set brightness grayscale during the recovery process is further improved through the voltage difference, further reducing the hysteresis of the residual image, improving the residual image recovery effect, and finally improving the product image quality effect and product yield.

[0061] Based on the same concept, the present application also provides a display device, comprising a display panel as described in any of the aforementioned embodiments.

[0062] The display device of the above embodiment is used to apply the corresponding display panel in the above embodiment, and has the beneficial effects of the embodiment of the corresponding display panel, which will not be described in detail here.

[0063] It can be understood that the display device is a product with an image display function, and it is generally driven by multiple driving circuits. For example, it can be: a display, a television, a billboard, a digital photo frame, a laser printer with a display function, a telephone, a mobile phone, a personal digital assistant (PDA), a digital camera, a portable camcorder, a viewfinder, a navigator, a vehicle, a large-area wall, a home appliance, an information query device (such as business query equipment and monitors of e-government, banks, hospitals, power and other departments).

[0064] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0065] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present application difficult to understand, the known power supply / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the provided drawings. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform to be implemented in the embodiments of the present application (that is, these details should be fully within the scope of understanding of those skilled in the art). In the case of elaborating specific details (e.g., circuits) to describe exemplary embodiments of the present application, it is obvious to those skilled in the art that the embodiments of the present application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered to be illustrative rather than restrictive.

[0066] Although the present application has been described in conjunction with specific embodiments of the present application, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0067] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. A display panel, characterized in that: include: substrate substrate; At least one pixel circuit, located on one side of the substrate, configured to generate a light-emitting signal using a driving transistor of the pixel circuit to perform light-emitting control; At least one shielding unit is located between the substrate and the pixel circuit, is arranged opposite to the at least one pixel circuit, and is configured to be controlled by a reset signal of the at least one pixel circuit so that a voltage difference is formed between the at least one shielding unit and the driving transistor.

2. The display panel according to claim 1, characterized in that: The reset signal includes: a source reset signal; The at least one shielding unit is configured to receive the source reset signal.

3. The display panel according to claim 1, characterized in that: The at least one pixel circuit is arranged in an array, and the at least one shielding unit is arranged in an array corresponding to the at least one pixel circuit; at least one row or at least one column of shielding units is configured to receive the reset signal in a series manner.

4. The display panel according to claim 1, characterized in that: The at least one shielding unit at least partially overlaps with the orthographic projection of the driving transistor in the at least one pixel circuit on the substrate.

5. The display panel according to claim 1, characterized in that: The reset signal is generated by a reset signal control circuit; Any pixel circuit and the shielding unit arranged opposite thereto are commonly connected to the reset signal control circuit connected to the any pixel circuit.

6. The display panel according to claim 1, characterized in that: The reset signal is generated by a reset signal control circuit; the reset signal control circuit includes: a first reset signal control circuit and a second reset signal control circuit; The at least one pixel circuit is connected to the first reset signal control circuit; The at least one shielding unit is connected to the second reset signal control circuit.

7. The display panel according to claim 1, characterized in that: The reset signal is generated by a reset signal control circuit; the reset signal control circuit includes a first output terminal and a second output terminal; The at least one pixel circuit is connected to the first output terminal; The at least one shielding unit is connected to the second output end.

8. The display panel according to claim 7, characterized in that: The first output terminal and the second output terminal are configured to be formed by at least a pair of output transistors with common gates.

9. The display panel according to any one of claims 5 to 7, characterized in that: include: A display area and a non-display area surrounding the display area; The reset signal control circuit is arranged in a non-display area on at least one side of the display area.

10. The display panel according to claim 9, characterized in that: The reset signal control circuit is arranged in non-display areas at two opposite sides of the display area.

11. A display device, characterized in that: include: A display panel as claimed in any one of claims 1 to 10.

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