Key control method and chip starting method

Abstract

The invention relates to the field of terminals, in particular to a key control method and a chip starting method. The key management and control method comprises the following steps: acquiring a product stage to which the electronic equipment belongs; determining a target key according to the product stage; and configuring a chip of the electronic equipment according to the target key, so that the chip is started according to the target key. According to the embodiment of the invention, the secret keys used for starting the chip of the electronic equipment are managed and controlled in a grading manner, and personnel involved in each product stage use different secret keys to start the chip of the electronic equipment according to different permissions, so that the use safety of the electronic equipment is improved.

Description

Technical Field

[0001] The present application relates to the field of terminals, and in particular to a key management method and a chip startup method. Background Art

[0002] The chip's secure boot is also known as secureboot, which is a technology that implements trusted firmware loading by verifying the boot image step by step. If secure boot is not performed, once the boot image is maliciously replaced, the tampered firmware will eventually run on the system, rendering all security mechanisms built on the operating system useless.

[0003] Currently, there is only one set of keys for secure startup of chips in electronic devices, and all personnel involved in each product stage (production personnel, R&D personnel, maintenance personnel, etc.) have access to the keys. In this case, once the keys are leaked, a series of information security issues will arise. For example, tampering with the original system of commercial equipment, maliciously installing applications on commercial equipment, tampering with demonstration prototypes to commercial equipment, illegally unlocking electronic equipment, etc. Summary of the invention

[0004] The present application provides a key management method and a chip startup method, which solves the problem of low security of chip startup of electronic equipment in the prior art.

[0005] In order to achieve the above objectives, this application adopts the following technical solutions:

[0006] In a first aspect, a key management method is provided, comprising:

[0007] Get the product stage to which the electronic device belongs;

[0008] determining a target key according to the product stage;

[0009] A chip of the electronic device is configured according to the target key so that the chip starts according to the target key.

[0010] In some embodiments, the product stages of the electronic device are divided into three types: a trial production stage, a mass production stage, and a maintenance stage.

[0011] Through the embodiments of the present application, the keys used to start the chip of the electronic device are hierarchically managed and controlled, and the personnel involved in each product stage use different keys to start the chip of the electronic device according to different permissions, thereby improving the security of the use of the electronic device.

[0012] In an implementation of the first aspect, determining the target key according to the product stage includes:

[0013] If the product stage is the trial production stage, the target key is the first key and the second key;

[0014] If the product stage is the mass production stage, the target key is the first key;

[0015] If the product stage is the maintenance stage, the target key is the first key and the third key;

[0016] The mass production stage is after the trial production stage, and the maintenance stage is after the mass production stage.

[0017] Exemplarily, the first key is a commercial key, the second key is a research and development trial key, and the third key is a research and development mass production key. Among them, the production personnel have the authority of the commercial key, the research and development personnel have the authority of the research and development trial key, and the maintenance personnel have the authority of the research and development mass production key.

[0018] During the trial production phase, the commercial key and the R&D trial production key are activated (valid), and the R&D mass production key is inactive. During this phase, production personnel can use the commercial key to start the chip of the electronic device, and R&D personnel can use the R&D trial production key to start the chip of the electronic device.

[0019] In the mass production stage, the commercial key is in an activated state, the R&D trial key is in a revoked state (invalid), and the R&D mass production key is in an inactivated state. In this stage, the production staff can use the commercial key to start the chip of the electronic device, but the R&D staff cannot start the chip of the electronic device.

[0020] During the maintenance phase, the commercial key is in an activated state, the R&D trial key is in a revoked state, and the R&D mass production key is in an inactivated state. When the electronic equipment needs to be repaired, the relevant maintenance personnel can apply to activate the R&D mass production key. After the R&D mass production key is activated, the maintenance personnel can use the R&D mass production key to start the chip of the electronic equipment, and the production personnel can use the commercial key to start the chip of the electronic equipment. After the maintenance is completed, the R&D mass production key can be revoked. After the R&D mass production key is revoked, the maintenance personnel cannot start the chip of the electronic equipment.

[0021] Through the above method, the keys used to start the chips of electronic devices are hierarchically controlled, and the personnel involved in each product stage use different keys to start the chips of electronic devices according to different permissions, thereby improving the security of the use of electronic devices.

[0022] In an implementation of the first aspect, configuring a chip of the electronic device according to the target key includes:

[0023] In the trial production stage, the system version corresponding to the first key or the system version corresponding to the second key is loaded into the chip;

[0024] Among them, the system version corresponding to the first key is generated according to the digital certificate and the first signature value, the system version corresponding to the second key is generated according to the digital certificate and the second signature value, the first signature value is the signature value obtained by signing the root certificate in the digital certificate according to the first key, and the second signature value is the signature value obtained by signing the root certificate in the digital certificate according to the second key.

[0025] For example, the first signature value, the second signature value, or the third signature value may be attached to the end of the digital certificate and loaded into the startup image of the chip together.

[0026] In an implementation of the first aspect, configuring a chip of the electronic device according to the target key includes:

[0027] In the trial production stage, a first hash value is generated according to the first key, the second key and the third key;

[0028] Sending a first enable signal to a first register of the chip according to the first hash value, so as to blow a first fuse bit of the first register;

[0029] When the first fuse bit is in a blown state, the signal value of the first register matches the first hash value.

[0030] In some implementations, the public keys corresponding to the first key, the second key and the third key may be stored in different memories. Compared with this method, the above storage method can not only save registers, but also ensure the integrity of the public keys of all root certificates.

[0031] It should be noted that when manufacturing the chip of the electronic device, the initial state of each pin of the first register in the chip is made into an un-fused state by means of hardware fuses.

[0032] In an implementation of the first aspect, configuring a chip of the electronic device according to the target key includes:

[0033] In the trial production stage, a second enable signal is sent to the second register of the chip to blow the second fuse bit of the second register;

[0034] When the second fuse bit is in a blown state, the signal value of the second register indicates that the first key and the second key are activated, and the third key is not activated.

[0035] The activation status of the key is divided into activated and inactivated, which can be represented by signal values ​​1 and 0 respectively. The activation status of the first key, the second key and the third key can be represented by signal values ​​(bits) of different pins of the second register respectively.

[0036] In the trial production stage, the commercial key and the R&D trial production key are activated, and the R&D mass production key is not activated. The bits of the second register corresponding to the commercial key and the R&D trial production key are both 1, and the bit of the second register corresponding to the R&D mass production key is 0. For example, the signal value of the second register is 110, where "1" on the first bit indicates that the commercial key is activated, "1" on the second bit indicates that the R&D trial production key is activated, and "0" on the third bit indicates that the R&D mass production key is not activated.

[0037] It should be noted that when manufacturing the chip of the electronic device, the initial state of each pin of the second register in the chip is made into an un-fused state by means of hardware fuses.

[0038] In an implementation manner of the first aspect, in the trial production stage, a signal value of the third register of the chip indicates that the first key, the second key, and the third key are not revoked.

[0039] The revocation status of the key is divided into two types: revoked and unrevoked, which can be represented by signal values ​​1 and 0 respectively. The revocation status of the three sets of keys can be represented by signal values ​​(bits) of different pins of the third register respectively.

[0040] During the trial production stage, the commercial key and the R&D trial production key are activated (not revoked), and the R&D mass production key is not activated (not revoked). Then the bits of the third register corresponding to the commercial key, the R&D trial production key, and the R&D mass production key are all 1. For example, the signal value of the third register is 000, where "0" on the first bit indicates that the commercial key is not revoked, "0" on the second bit indicates that the R&D trial production key is not revoked, and "0" on the third bit indicates that the R&D mass production key is not revoked.

[0041] In an embodiment of the present application, the first register, the second register and the third register may be fuse registers. A fuse register is a register that uses fuse technology to store data, such as a programmable read-only memory (PROM) is a fuse register. The data stored in this type of register is determined by the fuse state. For example, if the pin of the register is in an unblown state, the signal value corresponding to the pin is 0; if the fuse of the pin is blown, that is, the pin is in a blown state, the signal value corresponding to the pin is 1. The fuse register can blow the fuse of a pin according to the received enable signal, but once the fuse is blown, it cannot be restored to the unblown state. Therefore, the rewriting of the data in the fuse register is usually irreversible.

[0042] In an implementation of the first aspect, configuring a chip of the electronic device according to the target key includes:

[0043] In the mass production stage, a third enable signal is sent to a third register of the chip to blow a third fuse bit of the third register;

[0044] When the third fuse bit is in a blown state, the signal value of the third register indicates that the first key is not revoked, the second key is revoked, and the third key is not revoked.

[0045] In an implementation of the first aspect, configuring a chip of the electronic device according to the target key includes:

[0046] In the mass production stage, loading the system version corresponding to the first key into the chip;

[0047] The system version corresponding to the first key is generated according to the digital certificate and a first signature value, and the first signature value is a signature value obtained by signing the root certificate in the digital certificate according to the first key.

[0048] In the embodiment of the present application, during the mass production stage, the R&D mass production key is revoked, and the electronic equipment shipped can only use the commercial key to start the chip. Since the R&D personnel do not have the authority of the commercial key, it can effectively prevent the R&D personnel from tampering with the commercial equipment, thereby improving the security of the commercial equipment chip startup.

[0049] In an implementation of the first aspect, configuring a chip of the electronic device according to the target key includes:

[0050] During the maintenance phase, applying for activation of the third key;

[0051] If the application is approved, a fourth enable signal is sent to the second register of the chip to blow the fourth fuse bit of the second register;

[0052] When the fourth fuse bit is in a blown state, the signal value of the second register indicates that the first key, the second key and the third key are all activated.

[0053] In an implementation manner of the first aspect, the applying for activation of the third key includes:

[0054] Obtaining a fourth signature value and a configuration image, wherein the fourth signature value is a signature value obtained by signing a hash value of the configuration image by a preset server according to the first key, the configuration image includes hardware information of the electronic device, and the preset server is used to generate a digital certificate;

[0055] Verifying the fourth signature value according to the first key;

[0056] If the verification is successful, the configuration image is compared with the hardware information of the electronic device;

[0057] If the comparison is consistent, the application is approved.

[0058] For example, the execution terminal sends the hardware information of the electronic device to the certificate server (pre-set server); accordingly, after receiving the hardware information, the certificate server uses the private key of the commercial key to sign the configuration image (including hardware information and configuration information for activating the R&D mass production key), obtains the fourth signature value, and returns the fourth signature value and the configuration image.

[0059] Among them, the step of verifying the fourth signature value includes: using the public key of the first key to verify the fourth signature value to obtain the hash value of the configuration image; comparing the hash value of the configuration image with the hash value of the received configuration image, if they are consistent, the verification is successful.

[0060] In an implementation of the first aspect, configuring a chip of the electronic device according to the target key includes:

[0061] During the maintenance phase, the system version corresponding to the first key or the system version corresponding to the third key is loaded into the chip;

[0062] Among them, the system version corresponding to the first key is generated according to the digital certificate and the first signature value, the system version corresponding to the third key is generated according to the digital certificate and the third signature value, the first signature value is the signature value obtained by signing the root certificate in the digital certificate according to the first key, and the third signature value is the signature value obtained by signing the root certificate in the digital certificate according to the third key.

[0063] In an implementation manner of the first aspect, after sending the fourth enable signal to the second register of the chip, the method further includes:

[0064] After the maintenance task is completed, sending a fifth enable signal to the third register of the chip to blow the fifth fuse bit of the third register;

[0065] When the fifth fuse is in a blown state, the signal value of the third register indicates that the first key is not revoked, and the second key and the third key are revoked.

[0066] In one implementation, the step of revoking the third key may be executed by an execution terminal at any station after the maintenance station.

[0067] In the embodiment of the present application, after the maintenance is completed, the R&D and mass production keys are revoked in a timely manner, which can effectively prevent the leakage of the R&D and mass production keys and prevent maintenance personnel from tampering with the electronic device through the R&D and mass production keys. While ensuring the maintenance authority, the security of the chip startup of the electronic device is guaranteed.

[0068] In an implementation of the first aspect, the method further includes:

[0069] Acquire a first signal value and a second signal value, wherein the first signal value is a current signal value of a second register of the chip, and the second signal value is a current signal value of a third register of the chip;

[0070] determining a current key state according to the first signal value and the second signal value;

[0071] Determine whether the current key status is consistent with the current product stage;

[0072] If the electronic device meets the requirements, it is determined that the electronic device has passed the verification;

[0073] If not, the key status is adjusted to make the key status consistent with the current product stage.

[0074] In the embodiment of the present application, by setting up fool-proof interception, it is further ensured that the key status of the electronic device leaving the factory is consistent with the product stage, thereby improving the security of chip startup of the electronic device.

[0075] In an implementation manner of the first aspect, determining a current key state according to the first signal value and the second signal value includes:

[0076] Performing an AND operation on the first signal value and the second signal value to obtain a first calculated value;

[0077] The current key state is determined according to the first calculated value.

[0078] Among them, the step of determining whether the current key status is in compliance with the current product stage may include: if the current product stage is the trial production stage, the key status is that the commercial key and the R&D trial production key are valid, and the R&D mass production key is invalid, then the current key status is in compliance with the current product stage; otherwise, it is not in compliance.

[0079] If the current product stage is the mass production stage, and the key status is that the commercial key is valid, and the R&D trial key and the R&D mass production key are invalid, then the current key status is consistent with the current product stage; otherwise, it is not consistent.

[0080] Since the R&D mass production key can be used during the repair process, and the R&D mass production key needs to be revoked after the repair is completed, if the current product stage is the repair stage, the key status is that the commercial key is valid, and the R&D trial key and R&D mass production key are invalid, then the current key status meets the current product stage; otherwise, it does not meet the requirements.

[0081] In an implementation of the first aspect, the root certificate in the digital certificate includes a first certificate, a second certificate, a third certificate and a fourth certificate, wherein the first certificate is a root certificate generated according to the first key, the second certificate is a root certificate generated according to the second key, the third certificate is a root certificate generated according to the third key, and the fourth certificate is a root certificate generated according to a random key.

[0082] It should be noted that if N sets of keys are used to generate a digital certificate, the number of root certificates in the digital certificate can be N+1, that is, a root certificate generated based on a random key is added to ensure the integrity of the N root certificates. Since a root public key (the public key of the random key) is added, the hash value of the public key string can further ensure the integrity of the N root certificates, thereby improving the security of chip startup.

[0083] In a second aspect, a chip startup method is provided, which is applied to a chip, wherein the chip is a chip configured according to the key management and control method according to any one of the first aspects, and the method includes:

[0084] Acquire a third signal value and a fourth signal value, wherein the third signal value is a current signal value of the second register of the chip, and the fourth signal value is a current signal value of the third register of the chip;

[0085] Acquire the target key according to the third signal value and the fourth signal value;

[0086] The chip is started according to the target key.

[0087] In the embodiment of the present application, before the chip is started, the target key is first determined according to the signal values ​​of the second register and the third register, and then the chip is started using the target key. In this way, it is possible to effectively prevent the chip from being started using an unauthorized key, thereby improving the security of chip startup.

[0088] In an implementation manner of the second aspect, acquiring the target key according to the third signal value and the fourth signal value includes:

[0089] Performing an AND operation on the third signal value and the fourth signal value to obtain a second calculated value;

[0090] A target key is determined according to the second calculated value.

[0091] It should be noted that, in the above implementation, the order in which the bits in the third signal value correspond to the key is the same as the order in which the bits in the fourth signal value correspond to the key. In some application scenarios, if the order in which the bits in the third signal value correspond to the key is different from the order in which the bits in the fourth signal value correspond to the key, such as the first bit in the third signal value corresponds to a commercial key, and the first bit in the fourth signal value does not correspond to a commercial key, in this case, an AND operation can be performed bit by bit, that is, the bits representing the same key in the third signal value and the fourth signal value are ANDed. Of course, other methods for determining the key status can also be used, and the embodiments of the present application do not specifically limit this.

[0092] In an implementation of the second aspect, starting the chip according to the target key includes:

[0093] verifying the digital certificate according to the target key;

[0094] If the verification is successful, the chip is started.

[0095] In an implementation of the second aspect, the root certificate in the digital certificate includes a first certificate, a second certificate, a third certificate and a fourth certificate, wherein the first certificate is a root certificate generated according to the first key, the second certificate is a root certificate generated according to the second key, the third certificate is a root certificate generated according to the third key, and the fourth certificate is a root certificate generated according to a random key.

[0096] It should be noted that if N sets of keys are used to generate a digital certificate, the number of root certificates in the digital certificate can be N+1, that is, a root certificate generated based on a random key is added to ensure the integrity of the N root certificates. Since a root public key (the public key of the random key) is added, the hash value of the public key string can further ensure the integrity of the N root certificates, thereby improving the security of chip startup.

[0097] In an implementation of the second aspect, verifying the digital certificate according to the target key includes:

[0098] Generate a second hash value according to the first key, the second key and the third key;

[0099] Obtaining a third hash value from a first register of the chip;

[0100] Comparing the second Hash value with the third Hash value;

[0101] If the comparison is consistent, decrypting the target signature value corresponding to the target key according to the target key to obtain the fourth hash value of the root certificate;

[0102] Calculate a fifth hash value of the root certificate by using a hash algorithm;

[0103] Comparing the fourth Hash value with the fifth Hash value;

[0104] If the comparison is consistent, verification is performed based on the root certificate corresponding to the target key.

[0105] In an implementation of the second aspect, when the target key is a first key, the target signature value corresponding to the target key is a first signature value; the verifying according to the root certificate corresponding to the target key includes: verifying according to the first certificate;

[0106] When the target key is a second key, the target signature value corresponding to the target key is a second signature value; the verifying according to the root certificate corresponding to the target key includes: verifying according to the second certificate;

[0107] When the target key is a third key, the target signature value corresponding to the target key is a third signature value; and the verification according to the root certificate corresponding to the target key includes: verification according to the third certificate.

[0108] According to a third aspect, a chip system is provided, comprising a processor coupled to a memory, wherein the processor executes a computer program stored in the memory to implement a method as described in any one of the second aspects.

[0109] According to a fourth aspect, an electronic device is provided, comprising a processor, wherein the processor is configured to run a computer program stored in a memory, so that the electronic device implements the method described in any one of the first aspect, or implements the method described in any one of the second aspect.

[0110] In a fifth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by one or more processors, the method as described in any one of the first aspect or the method as described in any one of the second aspect is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0111] Figure 1 is a schematic diagram of a digital certificate provided in an embodiment of the present application;

[0112] Figure 2 is a schematic diagram of a digital certificate provided in an embodiment of the present application;

[0113] Figure 3 is a schematic diagram of a digital certificate provided by another embodiment of the present application;

[0114] Figure 4 It is a schematic diagram of the process flow of the workstation operation in the trial production stage provided in the embodiment of the present application;

[0115] Figure 5 It is a schematic diagram of the process flow of the workstation operation in the mass production stage provided by the embodiment of the present application;

[0116] Figure 6 It is a flowchart of a key control method in the maintenance phase provided by an embodiment of the present application;

[0117] Figure 7 It is a flowchart of the key management method provided in the embodiment of the present application;

[0118] Figure 8 It is a flowchart of the chip startup method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0119] In the following description, specific details such as specific system structures and technologies are provided for illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application can also be implemented in other embodiments without these specific details.

[0120] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0121] It should also be understood that in the embodiments of the present application, "one or more" refers to one, two or more than two; "and / or" describes the association relationship of associated objects, indicating that three relationships may exist; for example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B may be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0122] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0123] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0124] In an embodiment of the present application, the electronic device includes a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer. The hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and a memory (also called main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as Linux operating system, Unix operating system, Android operating system, iOS operating system, or Windows operating system. The application layer includes applications such as browsers, address books, word processing software, and instant messaging software.

[0125] The electronic device in the embodiments of the present application may also be referred to as a terminal device, a terminal, a user equipment (UE) or a user terminal, etc. For example, the electronic device may be a mobile phone, a tablet computer, a handheld computer, a wearable device (such as a smart watch, a smart bracelet, etc.), a laptop computer, a PDA, a personal computer, a smart home device (such as a TV, etc.), a smart screen, a game console, a mobile Internet device (MID), a smart point of sale (POS), an augmented reality (AR) device, and a virtual reality (VR) device, etc. The embodiments of the present application do not specifically limit the specific form of the electronic device.

[0126] The embodiments of the present application do not particularly limit the specific structure of the execution subject of the method provided by the embodiments of the present application, as long as the method provided by the embodiments of the present application can be executed by running a program that records the code of the method provided by the embodiments of the present application.

[0127] The secure boot of a chip is also called secureboot. It is a technology that implements trusted loading of firmware by verifying the boot image step by step. For example, in the basic process of an embedded system, starting from the bootrom, the second program loader (spl) is passed step by step to the universal boot loader (uboot) to start the Linux operating system. Assuming that the spl, uboot and linux images are all stored on the flash, at startup, each level of the boot program needs to load the next level of the boot image from the flash and verify the boot image. For example, the bootrom loads the spl boot image from the flash, the spl loads the uboot boot image from the flash, and the uboot loads the linux boot image from the flash. If secure boot is not performed in the above boot process, once the image in the flash is maliciously replaced, the tampered firmware will eventually run on the system, making all the security mechanisms built on the operating system useless.

[0128] The verification of the boot image can be achieved through a specific cryptographic algorithm, such as an asymmetric algorithm. Specifically, the hash value of the boot image is signed with a private key, and the signature value and the certificate chain are attached to the image file to sign the boot image; during the system startup process, the hash value of the boot image signature is verified by the public key matching the private key to verify the legitimacy of the boot image.

[0129] In some application scenarios, in order to improve security, you can set up multi-level verification. For example, use multi-level digital certificates to verify the boot image. Figure 1 , is a schematic diagram of a digital certificate provided in an embodiment of the present application. Figure 1 The following is a three-level digital certificate. The digital certificate includes a root certificate, a second-level certificate, and a third-level certificate. The root certificate includes a root public key, a root certificate signature, and a hash value of a second-level public key; the second-level certificate includes a second-level public key, a second-level certificate signature value, and a hash value of a third-level public key; the third-level certificate includes a third-level public key, a third-level certificate signature value, and a hash value of the boot image.

[0130] The certificate server signs the hash value of the boot image with the third-level private key to obtain the third-level certificate signature; the third-level public key, the third-level certificate signature value and the hash value of the boot image are used to generate the third-level certificate. The hash value of the third-level public key is signed with the second-level private key to obtain the second-level certificate signature; the second-level public key, the second-level certificate signature and the hash value of the third-level public key are used to generate the second-level certificate. The hash value of the second-level public key is signed with the root key to obtain the root certificate signature; the root public key, the root certificate signature and the hash value of the second-level public key are used to generate the root certificate. Among them, the third-level private key, the second-level private key and the root key are all stored in the certificate server.

[0131] In the embodiment of the present application, the certificate server may be a public key infrastructure (PKI) server.

[0132] The digital certificate can be integrated into the image file of the boot image. The hash value of the root public key can be recorded in the fuse register inside the chip through a physical fuse.

[0133] The digital certificate verification process includes root certificate verification, secondary certificate verification, and tertiary certificate verification.

[0134] The root certificate verification process may include: obtaining the root public key in the root certificate, calculating the hash value of the root public key through a hash algorithm, and matching it with the hash value of the root public key recorded in the fuse register in the chip. If the match is successful, the root public key verification is successful.

[0135] The process of verifying the secondary certificate may include: verifying the root certificate signature using the root public key, obtaining the hash value of the secondary public key, and matching it with the hash value of the secondary public key recorded in the root certificate; if the match is successful, the secondary certificate verification is successful.

[0136] The process of level 3 certificate verification may include: using the level 2 public key to verify the signature of the level 2 certificate, obtaining the hash value of the level 3 public key, and matching it with the hash value of the level 3 public key recorded in the level 2 certificate; if the match is successful, the level 3 certificate verification is successful.

[0137] If the third-level certificate verification succeeds, the third-level public key in the third-level certificate can be used to verify the third-level certificate signature, obtain the hash value of the boot image, and match it with the hash value of the boot image recorded in the third-level certificate; if the match succeeds, the boot image verification succeeds. After the boot image verification succeeds, the boot image can be executed to start the chip.

[0138] In some application scenarios, the product stages of electronic equipment are divided into three types: trial production stage, mass production stage and maintenance stage. Among them, the trial production stage refers to the production staff producing a small number of electronic equipment (or prototypes) for research and development and debugging by R&D personnel. The mass production stage refers to the production staff mass-producing electronic equipment (or commercial equipment) to be put on the market and purchased or used by users. The maintenance stage refers to the return of commercial equipment to the factory after a failure and repair by technicians. At present, there is only one set of keys for the secure startup of chips in electronic devices, and the personnel involved in each product stage (production staff, R&D staff, and maintenance staff, etc.) have the right to the keys. In this case, once the key is leaked, it will cause a series of information security issues. For example, tampering with the original system of commercial equipment, maliciously installing applications on commercial equipment, tampering with demonstration prototypes into commercial equipment, illegally unlocking electronic equipment, etc.

[0139] Based on this, the embodiment of the present application provides a key management method. Through the method in the embodiment of the present application, hierarchical management of key permissions can be achieved, and personnel involved in each product stage use different keys to start the chip of the electronic device according to different permissions, thereby improving the safety of the use of the electronic device.

[0140] For ease of explanation, in the embodiments of the present application, the key management method of the embodiments of the present application is introduced by taking the above-mentioned three product stages as an example.

[0141] In the embodiment of the present application, different keys are set for different product stages, that is, three sets of keys are set. Exemplarily, the three sets of keys are commercial keys, R&D trial keys, and R&D mass production keys. Among them, the production personnel have the authority of commercial keys, the R&D personnel have the authority of R&D trial keys, and the maintenance personnel have the authority of R&D mass production keys. The keys corresponding to each product stage are shown in the following table:

[0142]

[0143] It should be noted that the above are only examples of three sets of keys, and the embodiments of the present application do not specifically limit the number and name of the control keys. For example, in the trial production stage, if different production personnel are involved, a set of keys can be assigned to different production personnel. For another example, a commercial key can also be called a general key or a first-level key, etc., a research and development trial production key can also be called a mass production key or a second-level key, etc., and a research and development mass production key can also be called a maintenance key or a third-level key, etc.

[0144] During the trial production phase, the commercial key and the R&D trial production key are activated (valid), and the R&D mass production key is inactive. During this phase, production personnel can use the commercial key to start the chip of the electronic device, and R&D personnel can use the R&D trial production key to start the chip of the electronic device.

[0145] In the mass production stage, the commercial key is in an activated state, the R&D trial key is in a revoked state (invalid), and the R&D mass production key is in an inactivated state. In this stage, the production staff can use the commercial key to start the chip of the electronic device, but the R&D staff cannot start the chip of the electronic device.

[0146] During the maintenance phase, the commercial key is in an activated state, the R&D trial key is in a revoked state, and the R&D mass production key is in an inactivated state. When the electronic equipment needs to be repaired, the relevant maintenance personnel can apply to activate the R&D mass production key. After the R&D mass production key is activated, the maintenance personnel can use the R&D mass production key to start the chip of the electronic equipment, and the production personnel can use the commercial key to start the chip of the electronic equipment. After the maintenance is completed, the R&D mass production key can be revoked. After the R&D mass production key is revoked, the maintenance personnel cannot start the chip of the electronic equipment.

[0147] Through the above method, the keys used to start the chips of electronic devices are hierarchically controlled, and the personnel involved in each product stage use different keys to start the chips of electronic devices according to different permissions, thereby improving the security of the use of electronic devices.

[0148] Each set of keys includes a public key and a private key. That is, the commercial key includes a public key and a private key, the R&D trial key includes a public key and a private key, and the R&D mass production key includes a private key and a public key.

[0149] In some embodiments, the certificate server can generate a digital certificate based on three sets of keys. Accordingly, the three sets of keys correspond to three root certificates. For example, see Figure 2 , is a schematic diagram of a digital certificate provided in an embodiment of the present application. Figure 2 As shown in the figure, the digital certificate includes three root certificates (root0, root1 and root2), a secondary certificate and a tertiary certificate. The process of the certificate server generating a tertiary certificate and a secondary certificate can be found in Figure 1Description in the embodiment. After generating the secondary certificate, the certificate server signs the hash value of the secondary certificate using the private key in the commercial key to obtain the signature value of the root certificate root0, and generates the root certificate root0 with the public key of the root certificate root0, the signature value of the root certificate root0 and the hash value of the secondary public key; the public key of the root certificate root0 is the public key in the commercial key. The certificate server signs the hash value of the secondary certificate using the private key in the R&D trial key to obtain the signature value of the root certificate root1, and generates the root certificate root1 with the public key of the root certificate root1, the signature value of the root certificate root1 and the hash value of the secondary public key; the public key of the root certificate root1 is the public key in the R&D trial key. The certificate server signs the hash value of the secondary certificate using the private key in the R&D mass production key to obtain the signature value of the root certificate root2, and generates the root certificate root2 with the public key of the root certificate root2, the signature value of the root certificate root2 and the hash value of the secondary public key; the public key of the root certificate root2 is the public key in the R&D mass production key.

[0150] Among them, the private key of the commercial key, the private key of the R&D trial key, and the private key of the R&D mass production key are stored in the certificate server. The public key of the commercial key, the public key of the R&D trial key, and the public key of the R&D mass production key are connected into a public key string, and the hash value of the public key string is calculated by the hash algorithm, and the hash value of the public key string is recorded in the fuse register inside the chip through a physical fuse. Since any change in a public key will cause a change in the hash value of the public key string, the above method can effectively verify whether the public key has been tampered with, thereby improving the security of chip startup.

[0151] In order to improve the security of the digital certificate, in some other embodiments, a root certificate can be added to the digital certificate. Figure 3 , is a schematic diagram of a digital certificate provided by another embodiment of the present application. Figure 3 As shown, the digital certificate includes four root certificates (root0, root1, root2 and root3), a secondary certificate and a tertiary certificate. Among them, root3 is an added root certificate. The certificate server can use a set of random keys to generate the root certificate root3. Specifically, after generating the secondary certificate, the certificate server uses the private key in the random key to sign the hash value of the secondary certificate, obtains the signature value of the root certificate root3, and generates the root certificate root3 with the public key of the root certificate root3, the signature value of the root certificate root3 and the hash value of the secondary public key; the public key of the root certificate root3 is the public key in the random key.

[0152] Among them, the private key of the commercial key, the private key of the R&D trial key, the private key of the R&D mass production key, and the private key of the random key are stored in the certificate server. The public key of the commercial key, the public key of the R&D trial key, the public key of the R&D mass production key, and the public key of the random key are connected into a public key string, and the hash value of the public key string is calculated by the hash algorithm, and the hash value of the public key string is recorded in the fuse register inside the chip through a physical fuse. Due to the addition of a root public key (the public key of the random key), the hash value of the public key string can further ensure the integrity of the three root certificates root0, root1, and root2, thereby improving the security of chip startup.

[0153] It should be noted that the above is an example of using three sets of keys to generate a digital certificate. If N sets of keys are used to generate a digital certificate, the number of root certificates in the digital certificate can be N+1, that is, adding a root certificate generated based on a random key to ensure the integrity of the N root certificates.

[0154] It should be noted that for different types of electronic devices, the corresponding three sets of keys are different. For example, the commercial key of Model I mobile phone is different from the commercial key of Model II mobile phone, the commercial key of Model I mobile phone is different from the R&D trial key of Model II mobile phone, and the commercial key of Model I mobile phone is different from the R&D mass production key of Model II mobile phone. For another example, the commercial keys, R&D trial keys, and R&D mass production keys of mobile phones and tablets produced by the same manufacturer are different. For another example, the commercial keys, R&D trial keys, and R&D mass production keys of electronic devices produced in different production batches are different.

[0155] In an embodiment of the present application, a fuse register is a register that uses fuse technology to store data, such as a programmable read-only memory (PROM). The data stored in this type of register is determined by the fuse state. For example, if the pin of the register is in an unblown state, the signal value corresponding to the pin is 0; if the fuse of the pin is blown, that is, the pin is in a blown state, the signal value corresponding to the pin is 1. The fuse register can blow the fuse of a pin according to the received enable signal, but once the fuse is blown, it cannot be restored to the unblown state. Therefore, the rewriting of the data in the fuse register is usually irreversible.

[0156] Based on the three product stages shown in the above table and the above-mentioned digital certificates, the key management method of the embodiment of the present application is introduced in different situations.

[0157] Situation 1: Trial production stage

[0158] During the pilot phase, the following steps may be included:

[0159] 1-1. Generate three system versions according to the digital certificate, the first signature value, the second signature value and the third signature value.

[0160] The certificate server calculates the root certificate in the digital certificate (such as Figure 3 As shown, the root certificate includes the hash value of root0, root1, root2 and root3), the hash value of the root certificate is signed with the private key of the commercial key to obtain a first signature value; the hash value of the root certificate is signed with the private key of the R&D trial key to obtain a second signature value; the hash value of the root certificate is signed with the private key of the R&D mass production key to obtain a third signature value; the first signature value, the second signature value, the third signature value and the digital certificate are sent to the execution terminal (such as Figure 4 The execution terminal generates three system versions according to the digital certificate, the first signature value, the second signature value and the third signature value. Specifically, a system version corresponding to a commercial key is generated according to the digital certificate and the first signature value, and the system version can be started by the commercial key; a system version corresponding to a research and development trial key is generated according to the digital certificate and the second signature value, and the system version can be started by the research and development trial key; a system version corresponding to a research and development mass production key is generated according to the digital certificate and the third signature value, and the system version can be started by the research and development mass production key.

[0161] 1-2. Load the system version corresponding to the trial production stage into the chip of the electronic device.

[0162] The execution terminal loads the system version into the chip of the electronic device to realize system refresh. In the trial production stage, the chip can be started by a commercial key or a research and development trial production key, and the execution terminal can load the system version corresponding to the commercial key into the chip of the electronic device, or load the system version corresponding to the research and development trial production key into the chip of the electronic device.

[0163] In some implementations, a flag may be set, such as a mirrored frame header, to indicate which set of keys is currently being used.

[0164] For example, the first signature value, the second signature value, or the third signature value may be attached to the end of the digital certificate and loaded into the startup image of the chip together.

[0165] 1-3. The hash value (first hash value) of the public key string of the root certificate of the digital certificate is recorded in the first register (fuse register) inside the chip through a physical fuse.

[0166] Of course, the public keys of the four root certificates can also be stored in different registers. Compared with this method, the storage method described in 1-3 can not only save registers, but also ensure the integrity of the public keys of the four root certificates.

[0167] It should be noted that when manufacturing the chip of the electronic device, the initial state of each pin of the first register in the chip is made into an un-fused state by means of hardware fuses. The specific process of executing 1-3 includes: executing the terminal (such as Figure 4 The execution terminal of workstation 1 in the chip sends a first enable signal to the first register of the chip according to the hash value of the public key string of the root certificate to blow the first fuse bit of the first register; when the first fuse bit of the first register blows, the signal value of the first register matches the hash value of the public key string of the root certificate.

[0168] For example, the hash value of the public key string of the root certificate is 111000, and the initial signal value of the first register is 000000; the first enable signal can cause the first fuse bit (including the first three bits) of the first register to blow, then after the first fuse bit blows, the signal value of the first register is 111000.

[0169] 1-4. The activation status of each of the three sets of keys is recorded in the second register (fuse register) inside the chip through physical fuses.

[0170] The activation status of the key is divided into activated and inactivated, which can be represented by signal values ​​1 and 0 respectively. The activation status of the three sets of keys can be represented by signal values ​​(bits) of different pins of the second register respectively.

[0171] As shown in the above table, during the trial production stage, the commercial key and the R&D trial production key are activated, and the R&D mass production key is not activated. The bits of the second register corresponding to the commercial key and the R&D trial production key are all 1, and the bits of the second register corresponding to the R&D mass production key are 0. For example, the signal value of the second register is 110, where "1" on the first bit indicates that the commercial key is activated, "1" on the second bit indicates that the R&D trial production key is activated, and "0" on the third bit indicates that the R&D mass production key is not activated. In the embodiment of the present application, the order of the pins of the second register corresponding to the three sets of keys is not specifically limited.

[0172] It should be noted that when manufacturing the chip of the electronic device, the initial state of each pin of the second register in the chip is made into an un-fused state by means of hardware fuses. The specific process of executing 1-4 includes: executing the terminal (such as Figure 4 After the execution terminal of workstation 1 in the process sends a second enable signal to the second register, the second fuse bit of the second register (the bit corresponding to the R&D mass production key) is blown; when the second fuse bit is blown, the signal value of the second register indicates that the commercial key and the R&D trial key are activated, but the R&D mass production key is not activated.

[0173] For example, the initial signal value of the second register is 000. The second enable signal can cause the second fuse bit of the second register to be blown (such as the first and second bits). After the second fuse bit is blown, the signal value of the second register is 110, indicating that the commercial key and the R&D trial key are activated, and the R&D mass production key is not activated.

[0174] 1-5. The revocation status of each of the three sets of keys is recorded in the third register (fuse register) inside the chip through physical fuses.

[0175] The revocation status of the key is divided into two types: revoked and unrevoked, which can be represented by signal values ​​1 and 0 respectively. The revocation status of the three sets of keys can be represented by signal values ​​(bits) of different pins of the third register respectively.

[0176] As shown in the above table, during the trial production stage, the commercial key and the R&D trial production key are activated (not revoked), and the R&D mass production key is not activated (not revoked). Then the bits of the third register corresponding to the commercial key, the R&D trial production key, and the R&D mass production key are all 0. For example, the signal value of the third register is 000, where the "0" on the first bit indicates that the commercial key has not been revoked, the "0" on the second bit indicates that the R&D trial production key has not been revoked, and the "0" on the third bit indicates that the R&D mass production key has not been revoked. In the embodiment of the present application, the order of the pins of the third register corresponding to the three sets of keys is not specifically limited.

[0177] It should be noted that when manufacturing the chip of the electronic device, the initial state of each pin of the third register in the chip is made to be unfused by means of hardware fuses. Figure 4 The execution terminal of workstation 1 in the process does not need to send an enable signal to the third register, and the signal value of the third register is still the initial value, such as 000, indicating that the commercial key, the R&D trial key activation and the R&D mass production key have not been revoked.

[0178] It should be noted that the above steps 1-3 to 1-5 are not in any particular order and can be executed in parallel or in series.

[0179] In some application scenarios, the trial production stage includes multiple production stations, and the above steps can be executed by the execution terminal of the same station or by the execution terminals of different stations.

[0180] For example, see Figure 4 , is a schematic diagram of the process flow of the station operation in the trial production stage provided in the embodiment of the present application. As an example and not a limitation, Figure 4As shown, the certificate server generates a digital certificate based on the certificate application, and sends the digital certificate, the first signature value, the second signature value and the third signature value to the execution terminal of the production version; the execution terminal of the production version executes the above step 1-1 to generate three system versions. In the trial production stage 51, the two steps of certificate loading and key activation can be performed by the execution terminal of station 1 (such as a high-dimensional single board information check (board check, BC) process). Among them, the certificate loading step may include the above steps 1-2, and the key activation step may include 1-3 to 1-5. After station 1, the preparation personnel of station 2 (such as a single board station) can use a commercial key or a research and development trial key to start the chip of the electronic device.

[0181] Situation 2: Mass production stage

[0182] In the mass production stage, the following steps may be included:

[0183] 2-1. Send a third enable signal to the third register to blow the third fuse bit of the third register (the bit corresponding to the R&D trial production key); wherein, after the third fuse bit is blown, the signal value of the third register indicates that the commercial key has not been revoked, the R&D trial production key has been revoked, and the R&D mass production key has not been revoked.

[0184] Continuing with the example in 1-5, the initial signal value of the third register is 000, indicating that the commercial key, the R&D trial key, and the R&D mass production key are not revoked. The execution terminal sends a third enable signal to the third register to blow the bit corresponding to the R&D mass production key (the third fuse bit). After the third fuse bit is blown, the signal value of the third register becomes 010, indicating that the commercial key is not revoked, the R&D trial key is revoked, and the R&D mass production key is not revoked.

[0185] For example, see Figure 5 , is a flow chart of the station operation in the mass production stage provided by the embodiment of the present application. As an example and not a limitation, Figure 5 As shown, after the trial production stage 51, the mass production stage 52 is entered. In the mass production stage 52, the execution terminal of the station 3 (such as the equipment downgrade station) executes the above step 2-1 to revoke the R&D trial production key.

[0186] 2-2. Load the system version corresponding to the mass production stage into the chip of the electronic device.

[0187] In the mass production stage, the commercial key can start the chip, and the system version corresponding to the commercial key is loaded into the chip of the electronic device. In some application scenarios, if the chip is started with a commercial key in the trial production stage, there is no need to reload the version in the mass production stage. If the chip is started with the R&D trial production key in the trial production stage, the version is refreshed in the mass production stage, that is, the system version corresponding to the commercial key is loaded into the chip of the electronic device.

[0188] In the embodiment of the present application, during the mass production stage, the R&D trial key is revoked, and the electronic equipment shipped out of the factory can only use the commercial key to start the chip. Since the R&D personnel do not have the authority of the commercial key, it can effectively prevent the R&D personnel from tampering with the commercial equipment, thereby improving the security of the chip startup of the commercial equipment.

[0189] Situation 3: Maintenance phase

[0190] During the repair phase, the following steps may be included:

[0191] 3-1. Send the hardware information of the electronic device to the certificate server to apply for the fourth signature value.

[0192] Correspondingly, after receiving the hardware information, the certificate server uses the private key of the commercial key to sign the hash value of the configuration image (including hardware information and configuration information for activating the R&D mass production key), obtains the fourth signature value, and returns the fourth signature value and the configuration image.

[0193] 3-2. After receiving the fourth signature value and the configuration image, the fourth signature value and the configuration image are loaded into a chip of the electronic device.

[0194] 3-3. Use the public key of the commercial key to verify the fourth signature value.

[0195] Specifically, the fourth signature value is verified using the public key of the commercial key to obtain a hash value of the configuration image; the hash value of the configuration image is compared with the hash value of the received configuration image, and if they are consistent, the verification is successful.

[0196] 3-4. If the verification is successful, the hardware information in the configuration image is compared with the hardware information of the electronic device.

[0197] 3-5. If the comparison is consistent, a fourth enable signal is sent to the second register to blow the fourth fuse bit (the bit corresponding to the R&D mass production key) of the second register.

[0198] Among them, after the fourth fuse bit is blown, the signal value of the second register indicates commercial key activation, R&D trial key activation, and R&D mass production key activation.

[0199] Continuing with the example in steps 1-4, in the trial production stage and the mass production stage, the signal value of the second register is 110, indicating that the commercial key and the R&D trial production key are activated, and the R&D mass production key is not activated. After sending the fourth enable signal to the second register, the fourth fuse (the third bit) is blown, and the signal value of the second register becomes 111, indicating that the commercial key, the R&D trial production key, and the R&D mass production key are activated.

[0200] 3-6. Load the system version corresponding to the maintenance phase into the chip of the electronic device.

[0201] During the maintenance phase, commercial keys and R&D mass production keys can start the chip. In some application scenarios, if the chip is started with a commercial key during the maintenance phase, there is no need to reload the version during the maintenance phase. If the chip is started with an R&D mass production key during the maintenance phase, the version is refreshed during the maintenance phase, that is, the system version corresponding to the R&D mass production key is loaded into the chip of the electronic device.

[0202] In some application scenarios, the above steps 3-1 to 3-2 can be performed by an independent server, and steps 3-3 to 3-5 can be performed by an electronic device.

[0203] For example, see Figure 6 , is a flowchart of a key control method in the maintenance phase provided in an embodiment of the present application. As an example and not a limitation, Figure 6 As shown, the IT server obtains the hardware information of the electronic device (which can be input by the user or obtained by interacting with the electronic device) and sends the hardware information to the certificate server. The certificate server generates a fourth signature value based on the hardware information, and returns the fourth signature value and the configuration image to the IT server. The IT server executes 3-2, that is, loads the fourth signature value and the configuration image into the chip of the electronic device. The electronic device performs signature verification (steps 3-3 and 3-4) and a key activation step (step 3-5). The electronic device is then returned to the factory for repair, and the system version is refreshed to the system version corresponding to the repair stage. During the factory repair process, maintenance personnel can start the chip of the electronic device according to the R&D mass production key.

[0204] Due to the different types of electronic equipment failures, electronic equipment may be sent to different workstations when it is returned to the factory for repair. Figure 6 As shown, in case ①, it may be sent to station 1; in case ②, it may be sent to station 2; in case ③, it may be sent to station 3. As described in the above embodiment, station 1 can be regarded as the first process, station 2 can be regarded as the middle process, and station 3 can be regarded as the last process. After the electronic equipment is repaired and shipped out of the factory, if the R&D mass production key is still in the activated state, the maintenance personnel can use the R&D mass production key to tamper with the electronic equipment.

[0205] In order to prevent the above situation from happening, in some embodiments, the R&D mass production key can be revoked before the electronic device is repaired and shipped out of the factory. Specifically, the step of revoking the R&D mass production key may include: sending a fifth enable signal to the third register to blow the fifth fuse bit of the third register; wherein, when the fifth fuse bit blows, the signal value of the third register indicates that the commercial key is not revoked, the R&D trial key is revoked, and the R&D mass production key is revoked.

[0206] Continuing with the example in 2-1, in the mass production stage, the signal value of the third register becomes 010, indicating that the commercial key is not revoked, the R&D trial key is revoked, and the R&D mass production key is not revoked. Before leaving the factory for repair, the fifth enable signal is sent to the third register, and the fifth fuse (the third bit) is blown, then the signal value of the third register becomes 011, indicating that the commercial key is not revoked, the R&D trial key is revoked, and the R&D mass production key is revoked.

[0207] In one implementation, the step of revoking the R&D mass production key can be performed by an execution terminal at any station after the maintenance station. For example, if the electronic device is returned to station 1 (maintenance station), after the electronic device is repaired at station 1, the R&D mass production key is revoked by the execution terminal at station 1, station 2, or station 3. If the electronic device is returned to station 3, the R&D mass production key can be revoked by the execution terminal at station 3.

[0208] In the embodiment of the present application, after the maintenance is completed, the R&D and mass production keys are revoked in a timely manner, which can effectively prevent the leakage of the R&D and mass production keys and prevent maintenance personnel from tampering with the electronic device through the R&D and mass production keys. While ensuring the maintenance authority, the security of the chip startup of the electronic device is guaranteed.

[0209] In some embodiments, a foolproof interception station can be set up before leaving the factory. The execution terminal of the station executes the foolproof interception step. Specifically, the foolproof interception step may include: obtaining the current signal value of the second register (first signal value) and the current signal value of the third register (second signal value); determining the current key state according to the first signal value and the second signal value; judging whether the current key state conforms to the current product stage; if so, judging that the electronic device verification has passed; if not, adjusting the key state so that the key state conforms to the current product stage.

[0210] In one implementation, the step of determining the current key state according to the first signal value and the second signal value may include: performing an AND operation on the first signal value and the second signal value to obtain a first calculated value; and determining the current key state according to the first calculated value.

[0211] For example, the first bit of the first signal value and the second signal value corresponds to the commercial key, the second bit corresponds to the R&D trial key, and the third bit corresponds to the R&D mass production key. When the first signal value is 110 and the second signal value is 000, the first calculated value is 001, and the key status is that the commercial key and the R&D trial key are valid, and the R&D mass production key is invalid. When the first signal value is 110, the second signal value is 010, and the first calculated value is 011, the key status is that the commercial key is valid, and the R&D trial key and the R&D mass production key are invalid. When the first signal value is 111, the second signal value is 010, and the first calculated value is 010, the key status is that the commercial key is valid, the R&D trial key is invalid, and the R&D mass production key is valid; when the first signal value is 111, the second signal value is 011, and the first calculated value is 011, the key status is that the commercial key is valid, and the R&D trial key and the R&D mass production key are invalid.

[0212] If the current product stage is the trial production stage, the key status is that the commercial key and R&D trial production key are valid, and the R&D mass production key is invalid, then the current key status is consistent with the current product stage; otherwise, it is not consistent.

[0213] If the current product stage is the mass production stage, and the key status is that the commercial key is valid, and the R&D trial key and the R&D mass production key are invalid, then the current key status is consistent with the current product stage; otherwise, it is not consistent.

[0214] Since the R&D mass production key can be used during the repair process, and the R&D mass production key needs to be revoked after the repair is completed, if the current product stage is the repair stage, the key status is that the commercial key is valid, and the R&D trial key and R&D mass production key are invalid, then the current key status meets the current product stage; otherwise, it does not meet the requirements.

[0215] It should be noted that in the above implementation, the order in which the bits in the first signal value correspond to the key is the same as the order in which the bits in the second signal value correspond to the key. In some application scenarios, if the order in which the bits in the first signal value correspond to the key is different from the order in which the bits in the second signal value correspond to the key, such as the first bit in the first signal value corresponds to a commercial key, and the first bit in the second signal value does not correspond to a commercial key, in this case, an AND operation can be performed bit by bit, that is, the bits in the first signal value and the second signal value that represent the same key are ANDed. Of course, other methods for determining the key status can also be used, and the embodiments of the present application do not specifically limit this.

[0216] In some implementations, if the current key status does not conform to the current product stage, the key status may be adjusted by the execution terminal at the anti-foolproof interception station, or by the execution terminal at the station before the anti-foolproof interception station.

[0217] Specifically, the key state may be adjusted by sending an enable signal to the third register.

[0218] For example, see Figure 7 , is a flow chart of the key control method provided in the embodiment of the present application. Figure 7 As shown, a station 4 (such as a custom information writing (customer writer, CW) process) is added before leaving the factory. The execution terminal of station 4 executes the above-mentioned foolproof interception step. If the current key state conforms to the current product stage, it is determined that the electronic device has passed the verification and the electronic device can leave the factory; if the current key state does not conform to the current product stage, it returns to station 3, and the execution terminal of station 3 adjusts the key state so that the key state conforms to the current product stage.

[0219] In the embodiment of the present application, by setting up fool-proof interception, it is further ensured that the key status of the electronic device leaving the factory is consistent with the product stage, thereby improving the security of chip startup of the electronic device.

[0220] Based on the above key control method, the present application embodiment provides a chip startup method, which is applied to the chip of the electronic device. Figure 8 , is a flow chart of the chip startup method provided in the embodiment of the present application. As an example and not a limitation, Figure 8 As shown, the chip startup method may include the following steps:

[0221] S801: Obtain a third signal value and a fourth signal value.

[0222] The third signal value is the signal value of the second register of the current chip, and the fourth signal value is the signal value of the third register of the current chip.

[0223] S802: Acquire a target key according to the third signal value and the fourth signal value.

[0224] In some implementations, step S802 may include:

[0225] An AND operation is performed on the third signal value and the fourth signal value to obtain a second calculated value; and a target key is determined according to the second calculated value.

[0226] For example, the first bit in the third signal value and the fourth signal value corresponds to the commercial key, the second bit corresponds to the R&D trial key, and the third bit corresponds to the R&D mass production key. When the third signal value is 110 and the fourth signal value is 000, the second calculated value is 001, indicating that the commercial key and the R&D trial key are valid, and the R&D mass production key is invalid, then the target key is the commercial key and the R&D trial key. When the third signal value is 110, the fourth signal value is 010, and the second calculated value is 011, indicating that the commercial key is valid, the R&D trial key and the R&D mass production key are invalid, then the target key is the commercial key. When the third signal value is 111, the fourth signal value is 010, and the second calculated value is 010, indicating that the commercial key is valid, the R&D trial key is invalid, and the R&D mass production key is valid, then the target key is the commercial key and the R&D mass production key.

[0227] It should be noted that, in the above implementation, the order in which the bits in the third signal value correspond to the key is the same as the order in which the bits in the fourth signal value correspond to the key. In some application scenarios, if the order in which the bits in the third signal value correspond to the key is different from the order in which the bits in the fourth signal value correspond to the key, such as the first bit in the third signal value corresponds to a commercial key, and the first bit in the fourth signal value does not correspond to a commercial key, in this case, an AND operation can be performed bit by bit, that is, the bits representing the same key in the third signal value and the fourth signal value are ANDed. Of course, other methods for determining the key status can also be used, and the embodiments of the present application do not specifically limit this.

[0228] S803: Start the chip according to the target key.

[0229] In one implementation, step S803 may include:

[0230] The digital certificate is verified according to the target key; if the verification passes, the chip is started.

[0231] Specifically, the process of verifying the digital certificate according to the target key includes:

[0232] Generate a public key string according to the public key of the root certificate in the digital certificate; calculate the second hash value of the public key string by the hash algorithm; obtain the third hash value (such as Figure 3 The fourth hash value of the root certificate in the digital certificate is calculated by a hash algorithm; the fourth hash value is compared with the fifth hash value; if they are consistent, the digital certificate is verified according to the root certificate.

[0233] The verification of the digital certificate based on the root certificate includes verifying the secondary certificate based on the root certificate, and verifying the tertiary certificate based on the secondary certificate. Figure 1 The principles in the embodiments are the same, for details, please refer to Figure 1 The verification process of the second-level certificate and the third-level certificate in the embodiment will not be repeated here.

[0234] Exemplarily, as described in step 1-1, the commercial key corresponds to the first signature value, the R&D trial key corresponds to the second signature value, and the R&D mass production key corresponds to the third signature value.

[0235] When the target key is a commercial key, a public key string is generated according to the public key of the root certificate in the digital certificate; the second hash value of the public key string is calculated by a hash algorithm; the third hash value is obtained from the first register; the second hash value is compared with the third hash value; if they are consistent, the first signature value is verified according to the public key of the commercial key to obtain the fourth hash value of the root certificate; the fifth hash value of the root certificate in the digital certificate is calculated by a hash algorithm; the fourth hash value is compared with the fifth hash value; if they are consistent, the digital certificate is verified according to the root certificate root0. Among them, root0 includes the signature value sign0 obtained by signing the secondary public key with the private key of the commercial key and the hash value of the secondary public key. During the verification process, the signature value sigh0 is decrypted with the public key of the commercial key to obtain the hash value of the secondary public key, and compared with the hash value of the secondary public key recorded in root0; if they are consistent, the secondary certificate verification is successful, and then the tertiary public key is verified according to the secondary public key.

[0236] When the target key is a research and development trial key, a public key string is generated according to the public key of the root certificate in the digital certificate; the second hash value of the public key string is calculated by a hash algorithm; the third hash value is obtained from the first register; the second hash value is compared with the third hash value; if they are consistent, the second signature value is verified according to the public key of the research and development trial key to obtain the fourth hash value of the root certificate; the fifth hash value of the root certificate in the digital certificate is calculated by a hash algorithm; the fourth hash value is compared with the fifth hash value; if they are consistent, the digital certificate is verified according to the root certificate root1. Among them, root1 includes the signature value sign1 obtained by signing the secondary public key with the private key of the research and development trial key and the hash value of the secondary public key. During the verification process, the signature value sigh1 is decrypted with the public key of the research and development trial key to obtain the hash value of the secondary public key, and compared with the hash value of the secondary public key recorded in root1; if they are consistent, the secondary certificate verification is successful, and then the tertiary public key is verified according to the secondary public key.

[0237] When the target key is a research and development mass production key, a public key string is generated according to the public key of the root certificate in the digital certificate; the second hash value of the public key string is calculated by a hash algorithm; the third hash value is obtained from the first register; the second hash value is compared with the third hash value; if they are consistent, the third signature value is verified according to the public key of the research and development mass production key to obtain the fourth hash value of the root certificate; the fifth hash value of the root certificate in the digital certificate is calculated by a hash algorithm; the fourth hash value is compared with the fifth hash value; if they are consistent, the digital certificate is verified according to the root certificate root2. Among them, root2 includes the signature value sign2 obtained by signing the secondary public key with the private key of the research and development mass production key and the hash value of the secondary public key. During the verification process, the signature value sigh2 is decrypted with the public key of the research and development mass production key to obtain the hash value of the secondary public key, and compared with the hash value of the secondary public key recorded in root2; if they are consistent, the secondary certificate verification is successful, and then the third-level public key is verified according to the secondary public key.

[0238] In the embodiment of the present application, before the chip is started, the target key is first determined according to the signal values ​​of the second register and the third register, and then the chip is started using the target key. In this way, it is possible to effectively prevent the chip from being started using an unauthorized key, thereby improving the security of chip startup.

[0239] It should be noted that three sets of keys are used as an example in the embodiment of the present application. In some application scenarios, more or fewer product stages can be divided according to actual needs, and more or fewer keys are set accordingly. The embodiment of the present application does not specifically limit the number of product stages and the number of keys.

[0240] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0241] The embodiment of the present application further provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.

[0242] An embodiment of the present application also provides a computer program product. When the computer program product runs on a first device, the first device can implement the steps in the above-mentioned method embodiments.

[0243] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may at least include: any entity or device capable of carrying the computer program code to the first device, a recording medium, a computer memory, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), an electric carrier signal, a telecommunication signal, and a software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

[0244] The embodiment of the present application also provides a chip system, the chip system includes a processor, the processor is coupled to a memory, and the processor executes a computer program stored in the memory to implement the steps of the chip startup method embodiment of the present application. The chip system can be a single chip or a chip module composed of multiple chips.

[0245] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0246] Those of ordinary skill in the art will appreciate that the units and method steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application. Finally, it should be noted that the above is only a specific implementation method of the present application, but the scope of protection of the present application is not limited thereto, and any changes or substitutions within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of the present application shall be based on the scope of protection of the claims.

Claims

1. A key management method, characterized in that: include: Get the product stage to which the electronic device belongs; determining a target key according to the product stage; A chip of the electronic device is configured according to the target key so that the chip starts according to the target key.

2. The method according to claim 1, characterized in that The determining the target key according to the product stage includes: If the product stage is the trial production stage, the target key is the first key and the second key; If the product stage is the mass production stage, the target key is the first key; If the product stage is the maintenance stage, the target key is the first key and the third key; The mass production stage is after the trial production stage, and the maintenance stage is after the mass production stage.

3. The method according to claim 2, characterized in that The step of configuring the chip of the electronic device according to the target key comprises: In the trial production stage, the system version corresponding to the first key or the system version corresponding to the second key is loaded into the chip; Among them, the system version corresponding to the first key is generated according to the digital certificate and the first signature value, the system version corresponding to the second key is generated according to the digital certificate and the second signature value, the first signature value is the signature value obtained by signing the root certificate in the digital certificate according to the first key, and the second signature value is the signature value obtained by signing the root certificate in the digital certificate according to the second key.

4. The method according to claim 3, characterized in that The step of configuring the chip of the electronic device according to the target key comprises: In the trial production stage, a first hash value is generated according to the first key, the second key and the third key; Sending a first enable signal to a first register of the chip according to the first hash value, so as to blow a first fuse bit of the first register; When the first fuse bit is in a blown state, the signal value of the first register matches the first hash value.

5. The method according to claim 3, characterized in that: The step of configuring the chip of the electronic device according to the target key comprises: In the trial production stage, a second enable signal is sent to the second register of the chip to blow the second fuse bit of the second register; When the second fuse bit is in a blown state, the signal value of the second register indicates that the first key and the second key are activated, and the third key is not activated.

6. The method according to claim 3, characterized in that In the trial production stage, the signal value of the third register of the chip indicates that the first key, the second key and the third key are not revoked.

7. The method according to any one of claims 2 to 6, characterized in that: The step of configuring the chip of the electronic device according to the target key comprises: In the mass production stage, a third enable signal is sent to a third register of the chip to blow a third fuse bit of the third register; When the third fuse bit is in a blown state, the signal value of the third register indicates that the first key is not revoked, the second key is revoked, and the third key is not revoked.

8. The method according to claim 7, characterized in that The step of configuring the chip of the electronic device according to the target key comprises: In the mass production stage, loading the system version corresponding to the first key into the chip; The system version corresponding to the first key is generated according to the digital certificate and a first signature value, and the first signature value is a signature value obtained by signing the root certificate in the digital certificate according to the first key.

9. The method according to any one of claims 2 to 8, characterized in that: The step of configuring the chip of the electronic device according to the target key comprises: During the maintenance phase, applying for activation of the third key; If the application is approved, a fourth enable signal is sent to the second register of the chip to blow the fourth fuse bit of the second register; When the fourth fuse bit is in a blown state, the signal value of the second register indicates that the first key, the second key and the third key are all activated.

10. The method according to claim 9, characterized in that The applying for activating the third key comprises: Obtaining a fourth signature value and a configuration image, wherein the fourth signature value is a signature value obtained by signing a hash value of the configuration image by a preset server according to the first key, the configuration image includes hardware information of the electronic device, and the preset server is used to generate a digital certificate; Verifying the fourth signature value according to the first key; If the verification is successful, the configuration image is compared with the hardware information of the electronic device; If the comparison is consistent, the application is approved.

11. The method according to claim 9, characterized in that The step of configuring the chip of the electronic device according to the target key comprises: During the maintenance phase, the system version corresponding to the first key or the system version corresponding to the third key is loaded into the chip; Among them, the system version corresponding to the first key is generated according to the digital certificate and the first signature value, the system version corresponding to the third key is generated according to the digital certificate and the third signature value, the first signature value is the signature value obtained by signing the root certificate in the digital certificate according to the first key, and the third signature value is the signature value obtained by signing the root certificate in the digital certificate according to the third key.

12. The method according to claim 9, characterized in that After sending a fourth enable signal to the second register of the chip, the method further includes: After the maintenance task is completed, sending a fifth enable signal to the third register of the chip to blow the fifth fuse bit of the third register; When the fifth fuse is in a blown state, the signal value of the third register indicates that the first key is not revoked, and the second key and the third key are revoked.

13. The method according to any one of claims 2 to 12, characterized in that: The method further comprises: Acquire a first signal value and a second signal value, wherein the first signal value is a current signal value of a second register of the chip, and the second signal value is a current signal value of a third register of the chip; determining a current key state according to the first signal value and the second signal value; Determine whether the current key status is consistent with the current product stage; If the electronic device meets the requirements, it is determined that the electronic device has passed the verification; If not, the key status is adjusted to make the key status consistent with the current product stage.

14. The method according to claim 13, characterized in that The determining the current key state according to the first signal value and the second signal value includes: Performing an AND operation on the first signal value and the second signal value to obtain a first calculated value; The current key state is determined according to the first calculated value.

15. The method according to any one of claims 2 to 14, characterized in that The root certificate in the digital certificate includes a first certificate, a second certificate, a third certificate and a fourth certificate, wherein the first certificate is a root certificate generated according to the first key, the second certificate is a root certificate generated according to the second key, the third certificate is a root certificate generated according to the third key, and the fourth certificate is a root certificate generated according to a random key.

16. A chip startup method, characterized in that: Applied to a chip, the chip being a chip configured by the key control method according to any one of claims 1 to 15, the method comprising: Acquire a third signal value and a fourth signal value, wherein the third signal value is a current signal value of the second register of the chip, and the fourth signal value is a current signal value of the third register of the chip; Acquire a target key according to the third signal value and the fourth signal value; The chip is started according to the target key.

17. The method according to claim 16, characterized in that The acquiring the target key according to the third signal value and the fourth signal value comprises: Performing an AND operation on the third signal value and the fourth signal value to obtain a second calculated value; A target key is determined according to the second calculated value.

18. The method according to claim 16, characterized in that The step of starting the chip according to the target key includes: verifying the digital certificate according to the target key; If the verification is successful, the chip is started.

19. The method according to claim 18, characterized in that The root certificate in the digital certificate includes a first certificate, a second certificate, a third certificate and a fourth certificate, wherein the first certificate is a root certificate generated according to the first key, the second certificate is a root certificate generated according to the second key, the third certificate is a root certificate generated according to the third key, and the fourth certificate is a root certificate generated according to a random key.

20. The method according to claim 19, characterized in that The verifying the digital certificate according to the target key comprises: Generate a second hash value according to the first key, the second key and the third key; Obtaining a third hash value from a first register of the chip; Comparing the second Hash value with the third Hash value; If the comparison is consistent, decrypting the target signature value corresponding to the target key according to the target key to obtain the fourth hash value of the root certificate; Calculate a fifth hash value of the root certificate by using a hash algorithm; Comparing the fourth Hash value with the fifth Hash value; If the comparison is consistent, verification is performed based on the root certificate corresponding to the target key.

21. The method according to claim 20, characterized in that When the target key is a first key, the target signature value corresponding to the target key is a first signature value; The verifying according to the root certificate corresponding to the target key includes: verifying according to the first certificate; When the target key is a second key, the target signature value corresponding to the target key is a second signature value; the verifying according to the root certificate corresponding to the target key includes: verifying according to the second certificate; When the target key is a third key, the target signature value corresponding to the target key is a third signature value; and the verification according to the root certificate corresponding to the target key includes: verification according to the third certificate.

22. A chip system, characterized in that: The chip system includes a processor coupled to a memory, and the processor executes a computer program stored in the memory to implement the method according to any one of claims 16 to 21.

23. An electronic device, characterized in that: The electronic device comprises a processor, and the processor is used to run a computer program stored in a memory, so that the electronic device implements the method according to any one of claims 1 to 15, or implements the method according to any one of claims 16 to 21.

24. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by one or more processors, the method according to any one of claims 1 to 15 is implemented, or the method according to any one of claims 16 to 21 is implemented.

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