Display driving circuit and method for driving display panel to display image data

Abstract

The invention provides a display driving circuit and a method for driving a display panel to display image data. The display driving circuit is suitable for driving the display panel to display an image. The display driving circuit includes a source driver circuit and a timing controller circuit. The source driver circuit is configured to sense whether noise is present and output a lock signal. The lock signal indicates whether noise occurs. The timing controller circuit is coupled to the source driver circuit and is configured to output image data to the source driver circuit and receive a lock signal from the source driver circuit. The timing controller circuit adjusts a data depth of the image data or a frame rate of the image data when the lock signal indicates the occurrence of noise.

Description

Technical Field

[0001] The present invention relates to a driving circuit and a method for driving a panel, and more particularly, to a display driving circuit and a method for driving a display panel to display image data. Background Art

[0002] When a mobile phone or radio frequency (RF) device is placed near a display, external noise may interfere with the display driver circuit and cause reception errors in the source driver circuit, resulting in display abnormalities. Generally speaking, when the source driver circuit is affected by external noise, the timing controller circuit will increase the signal transmission energy (e.g., signal swing) to improve the signal-to-noise ratio. However, in some cases, increasing the signal swing cannot solve the problem of external noise interference. Summary of the invention

[0003] The present invention relates to a display driving circuit and a method for driving a display panel to display image data, which can solve the problem of external noise interference to improve signal quality and increase signal-to-noise ratio.

[0004] An embodiment of the present invention provides a display driving circuit suitable for driving a display panel to display an image. The display driving circuit includes a source driver circuit and a timing controller circuit. The source driver circuit is configured to sense whether noise occurs and output a locking signal. The locking signal indicates whether noise occurs. The timing controller circuit is coupled to the source driver circuit and is configured to output image data to the source driver circuit and receive a locking signal from the source driver circuit. When the locking signal indicates that noise occurs, the timing controller circuit adjusts the data depth of the image data or the frame rate of the image data.

[0005] An embodiment of the present invention provides a method for driving a display panel to display image data. The method for driving a display panel includes: sensing whether noise occurs and outputting a lock signal, wherein the lock signal indicates whether noise occurs; when the lock signal indicates that noise occurs, adjusting the data depth of the image data; and driving the display panel to display an image according to the image data.

[0006] An embodiment of the present invention provides a method for driving a display panel to display image data. The method for driving a display panel includes: sensing whether noise occurs and outputting a lock signal, wherein the lock signal indicates whether noise occurs; when the lock signal indicates that noise occurs, adjusting the frame rate of the image data; and driving the display panel to display the image data according to the frame rate.

[0007] In order to make the above contents easier to understand, several embodiments attached with the drawings will be described in detail below. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The present disclosure includes accompanying drawings to provide a further understanding of the present disclosure, and the accompanying drawings are incorporated in and constitute a part of this specification. The accompanying drawings illustrate exemplary embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure.

[0009] Figure 1 is a block diagram showing a display device according to an embodiment of the present invention.

[0010] Figure 2 According to an embodiment of the present invention Figure 1 The schematic diagram of the display driving circuit is shown.

[0011] Figure 3 is a schematic diagram showing signals and data of a display driving circuit according to an embodiment of the present invention.

[0012] Figure 4 is a flow chart showing a method for driving a display panel to display image data according to an embodiment of the present invention.

[0013] Figure 5 is a flow chart showing a method for driving a display panel to display image data according to another embodiment of the present invention.

[0014] Figure 6 is a schematic diagram showing signals and data of a display driving circuit according to another embodiment of the present invention.

[0015] Figure 7 is a flow chart showing a method for driving a display panel to display image data according to an embodiment of the present invention.

[0016] Figure 8 is a flow chart showing a method for driving a display panel to display image data according to another embodiment of the present invention.

[0017] [Explanation of Symbols]

[0018] 100: Display device

[0019] 110: Display driver circuit

[0020] 112: Timing controller circuit

[0021] 114: Source driver circuit

[0022] 116: Transmission Line

[0023] 120: Display panel

[0024] D: Image data

[0025] D1: First data depth

[0026] D2: Second data depth

[0027] F1: First frame rate

[0028] F2: Second frame rate

[0029] L1: First signal level

[0030] L2: Second signal level

[0031] S1: Noise

[0032] S2: Lock signal

[0033] S3: Scanning signal

[0034] S100, S110, S120, S200, S210, S220, S230, S300, S310, S320, S400, S410, S420, S430: Steps

[0035] T1: frame period

[0036] t1, t2, t3, t4: time

[0037] T2: scheduled time length

[0038] T3: Cycle

[0039] T11: First frame period

[0040] T12: Second frame period DETAILED DESCRIPTION

[0041] The following embodiments are provided to elaborate on the present disclosure, but the present disclosure is not limited to the provided embodiments, and the provided embodiments may be appropriately combined. The terms "coupling / coupled" or "connecting / connected" used in this specification (including claims) of the present application may refer to any direct or indirect connection method. For example, "a first device is coupled to a second device" should be interpreted as "a first device is directly connected to a second device" or "a first device is indirectly connected to a second device via other devices or connection means". In addition, the term "signal" may refer to current, voltage, charge, temperature, data, electromagnetic waves, or any one or more signals.

[0042] Figure 1 is a block diagram showing a display device according to an embodiment of the present invention. Figure 2 is a diagram showing an embodiment of the present invention Figure 1The schematic diagram of the display driver circuit is shown in Figure 2. Figure 1 and Figure 2 The display device 100 includes a display driving circuit 110 and a display panel 120. The display driving circuit 110 is suitable for driving the display panel 120 to display an image. In an embodiment, the display driving circuit 110 may be a display driver integrated circuit (IC).

[0043] The display driving circuit 110 includes a timing controller circuit 112 and a source driver circuit 114. The timing controller circuit 112 is coupled to the source driver circuit 114. The timing controller circuit 112 outputs image data D to the source driver circuit 114. The source driver circuit 114 receives the image data D from the timing controller circuit 112 through the transmission line 116, and drives the display panel 120 to display an image according to the image data D. The hardware structures of the timing controller circuit 112 and the source driver circuit 114 can be obtained by referring to the common knowledge in the technical field.

[0044] In the present embodiment, the source driver circuit 114 senses whether the noise S1 occurs and feeds back the locking signal S2 to the timing controller circuit 112. The timing controller circuit 112 receives the locking signal S2 from the source driver circuit 114. The locking signal S2 indicates whether the noise S1 occurs. Once the noise S1 occurs, the signal quality of the image data D is affected. In order to improve the signal quality and increase the signal-to-noise ratio, when the locking signal S2 indicates that the noise S1 occurs, the timing controller circuit 112 may adjust the data depth of the image data D or the frame rate of the image data D.

[0045] In an embodiment, the timing controller circuit 112 outputs a clock signal to the source driver circuit 114 for clock training. The source driver circuit 114 senses whether noise S1 occurs based on the head data of the clock signal from the timing controller circuit 112. For example, the signal or data transmission between the timing controller circuit 112 and the source driver circuit 114 may comply with a specific protocol. When noise S1 occurs, the head data of the clock signal may change and no longer comply with the specific protocol, which indicates that noise S1 occurs. The source driver circuit 114 can sense the change in the head data to determine whether noise S1 occurs. Specifically, due to the interference of noise S1, the head data "01" of the clock signal may change to "00", "10" or "11", which indicates that noise S1 occurs.

[0046] Figure 3 Schematic diagram showing signals and data of a display driving circuit according to an embodiment of the present invention. Figure 3The source driver circuit 114 drives the display panel 120 to display an image frame during a frame period T1. The frame period T1 includes an active period and a V-blanking period. The V-blanking period is divided into two parts, one before and one after the active period.

[0047] The lock signal S2 includes a first signal level L1 and a second signal level L2, and the second signal level L2 is lower than the first signal level L1. The first signal level L1 of the lock signal S2 indicates that no noise occurs, and the second signal level L2 of the lock signal S2 indicates that noise occurs. Noise S1 occurs during period T3. At time t1, the lock signal S2 changes from the first signal level L1 to the second signal level L2. The source driver circuit 114 feeds back the lock signal S2 having the second signal level L2 to the timing controller circuit 112 to notify the timing controller circuit 112 that noise S1 occurs.

[0048] After receiving the lock signal S2 having the second signal level L2, the timing controller circuit 112 adjusts the data depth of the image data D from the first data depth D1 to the second data depth D2 during the effective period of the frame period T1. The first data depth D1 is greater than the second data depth D2. For example, the timing controller circuit 112 may adjust the data depth of the image data D from 8 bits to 6 bits, or from 10 bits to 8 bits. In an embodiment, the timing controller circuit 112 may adjust the data depth of the image data D during the interframe blanking interval of the frame period T1.

[0049] The second data depth D2 is maintained for a predetermined time length T2. For example, the second data depth D2 may be maintained for more than one frame period T1. That is, the predetermined time length T2 is greater than one frame period T1. The predetermined time length T2 may be determined by a frame counter of the timing controller circuit 112. Next, the timing controller circuit 112 restores the data depth of the image data D from the second data depth D2 to the first data depth D1 during the interframe blanking interval of the frame period T1. For example, at time t2 of the interframe blanking interval, the data depth of the image data D is restored from the second data depth D2 to the first data depth D1. In an embodiment, the timing controller circuit 112 may restore the data depth of the image data D during the effective period of the frame period T1.

[0050] Figure 4 FIG. 1 is a flow chart showing a method for driving a display panel to display image data according to an embodiment of the present invention. Figure 3 and Figure 4 The driving method of this embodiment is at least suitable for Figure 1When the lock signal S2 indicates that the noise S1 occurs, the timing controller circuit 112 adjusts the data depth of the image data D.

[0051] Taking the display device 100 as an example, in step S100, the source driver circuit 114 senses whether the noise S1 occurs and outputs the lock signal S2. In step S110, when the lock signal S2 indicates that the noise S1 occurs, the timing controller circuit 112 adjusts the data depth of the image data D. In step S120, the source driver circuit 114 drives the display panel 120 to display an image according to the image data D.

[0052] The driving method of the display device according to the embodiment of the present invention can be Figures 1 to 3 The embodiments of the present invention are fully taught, suggested and described in detail, and therefore no further description is given here.

[0053] Figure 5 FIG. 2 is a flow chart showing a method for driving a display panel to display image data according to another embodiment of the present invention. Figure 3 and Figure 5 The driving method of this embodiment is at least suitable for Figure 1 When the lock signal S2 indicates that the noise S1 occurs, the timing controller circuit 112 adjusts the data depth of the image data D.

[0054] Taking the display device 100 as an example, in step S200, the source driver circuit 114 drives the display panel 120 to display an image according to the image data D having the first data depth D1. In step S210, the source driver circuit 114 senses whether the noise S1 occurs and outputs the lock signal S2 to the timing controller circuit 112. When the noise S1 occurs at time t1, the source driver circuit 114 outputs the lock signal S2 having the second signal level L2 to the timing controller circuit 112 to notify the timing controller circuit 112 that the noise S1 occurs. The process proceeds to step S220.

[0055] In step S220, when the lock signal S2 indicates that noise occurs, the timing controller circuit 112 adjusts the data depth of the image data D from the first data depth D1 to the second data depth D2. The second data depth D2 is maintained for a predetermined time length T2. Next, in step S230, the timing controller circuit 112 restores the data depth of the image data D from the second data depth D2 to the first data depth D1 during the interframe blanking interval of the frame period T1.

[0056] On the contrary, when the noise S1 does not occur, the source driver circuit 114 outputs a lock signal S2 having a first signal level L1 to the timing controller circuit 112 to notify the timing controller circuit 112 that the noise S1 does not occur. The process returns to step S200. When the lock signal S2 indicates that the noise S1 does not occur, the timing controller circuit 112 does not adjust the data depth of the image data D. The source driver circuit 114 continues to drive the display panel 120 to display an image according to the image data D having the first data depth D1.

[0057] The driving method of the display device according to the embodiment of the present invention can be Figures 1 to 4 The embodiments of the present invention are fully taught, suggested and described in detail, and therefore no further description is given here.

[0058] Figure 6 FIG. 2 is a schematic diagram showing signals and data of a display driving circuit according to another embodiment of the present invention. Figure 6 , the timing controller circuit 112 outputs the scan signal S3 to the gate on array (GOA) circuit of the display panel 120. The scan signal S3 is configured to drive the scan line of the display panel 120. In the present embodiment, when the lock signal S2 indicates that the noise S1 occurs, the timing controller circuit 112 adjusts the frame rate of the image data D from the first frame rate F1 to the second frame rate F2.

[0059] Specifically, the frame rate of the image data D during the first frame period T11 is the first frame rate F1, and the frame rate of the image data D during the second frame period T12 is the second frame rate F2. The second frame period T12 is after and adjacent to the first frame period T11, and the first frame rate F1 is greater than the second frame rate F2. Noise S1 may occur during period T3, and the lock signal S2 changes from the first signal level L1 to the second signal level L2 at time t3 to indicate the occurrence of noise S1. The timing controller circuit 112 stops outputting the scan signal S3 at time t3. The timing controller circuit 112 adjusts the frame rate of the image data D from the first frame rate F1 to the second frame rate F2 during the second frame period T12.

[0060] The second frame rate F2 is maintained for a predetermined time length T2, and the predetermined time length T2 is determined by the timing controller circuit 112. For example, the second frame rate F2 can be maintained for more than one frame period T1. That is, the predetermined time length T2 is greater than one frame period T1.

[0061] Next, the timing controller circuit 112 restores the frame rate of the image data D from the second frame rate F2 to the first frame rate F1 during the interframe blanking interval of the frame cycle T1. For example, at time t4 of the interframe blanking interval, the frame rate of the image data D is restored from the second frame rate F2 to the first frame rate F1.

[0062] Figure 7 FIG. 1 is a flow chart showing a method for driving a display panel according to an embodiment of the present invention. Figure 6 and Figure 7 The driving method of this embodiment is at least suitable for Figure 1 When the lock signal S2 indicates that the noise S1 occurs, the timing controller circuit 112 adjusts the frame rate of the display panel 120.

[0063] Taking the display device 100 as an example, in step S300, the source driver circuit 114 senses whether the noise S1 occurs and outputs the lock signal S2. In step S310, when the lock signal S2 indicates that the noise S1 occurs, the timing controller circuit 112 adjusts the frame rate of the image data D. In step S320, the source driver circuit 114 drives the display panel 120 to display an image according to the frame rate (e.g., the second frame rate F2).

[0064] The driving method of the display device according to the embodiment of the present invention can be Figure 1 , Figure 2 and Figure 6 The embodiments of the present invention are fully taught, suggested and described in detail, and therefore no further description is given here.

[0065] Figure 8 FIG. 2 is a flow chart showing a method for driving a display panel to display image data according to another embodiment of the present invention. Figure 6 and Figure 8 The driving method of this embodiment is at least suitable for Figure 1 When the lock signal S2 indicates that the noise S1 occurs, the timing controller circuit 112 adjusts the frame rate of the image data D.

[0066] Taking the display device 100 as an example, in step S400, the source driver circuit 114 drives the display panel 120 to display an image according to the image data D at the first frame rate F1. In step S410, the source driver circuit 114 senses whether the noise S1 occurs and outputs the lock signal S2 to the timing controller circuit 112. When the noise S1 occurs at time t3, the source driver circuit 114 outputs the lock signal S2 having the second signal level L2 to the timing controller circuit 112 to notify the timing controller circuit 112 that the noise S1 occurs. The process proceeds to step S420.

[0067] In step S420, when the lock signal S2 indicates that noise occurs, the timing controller circuit 112 adjusts the frame rate of the image data D from the first frame rate F1 to the second frame rate F2. The second frame rate F2 is maintained for a predetermined time length T2. Next, in step S430, the timing controller circuit 112 restores the frame rate of the image data D from the second frame rate F2 to the first frame rate F1 during the interframe blanking interval of the frame period T1.

[0068] On the contrary, when the noise S1 does not occur, the source driver circuit 114 outputs a lock signal S2 having a first signal level L1 to the timing controller circuit 112 to notify the timing controller circuit 112 that the noise S1 does not occur. The process returns to step S400. When the lock signal S2 indicates that the noise S1 does not occur, the timing controller circuit 112 does not adjust the frame rate of the image data D. The source driver circuit 114 continues to drive the display panel 120 to display an image according to the image data D at the first frame rate F1.

[0069] The driving method of the display device according to the embodiment of the present invention can be Figure 1 , Figure 2 , Figure 6 and Figure 7 The embodiments of the present invention are fully taught, suggested and described in detail, and therefore no further description is given here.

[0070] In summary, in an embodiment of the present invention, when the source driver circuit senses noise, the timing controller circuit can dynamically adjust the data depth or frame rate to improve signal quality and increase the signal-to-noise ratio. When the noise disappears, the data depth or frame rate returns to the initial setting. Therefore, the problem of external noise interference can be solved.

[0071] It will be apparent to those skilled in the art that various modifications and variations may be made to the disclosed embodiments without departing from the scope or spirit of the present disclosure. In summary, the present disclosure is intended to cover various modifications and variations as long as they fall within the scope of the appended claims and their equivalents.

Claims

1. A display driving circuit, adapted to drive a display panel to display an image, the display driving circuit comprising: a source driver circuit configured to sense whether noise occurs and output a lock signal, wherein the lock signal indicates whether the noise occurs; as well as a timing controller circuit coupled to the source driver circuit and configured to output image data to the source driver circuit and receive the lock signal from the source driver circuit, When the lock signal indicates that the noise occurs, the timing controller circuit adjusts the data depth of the image data or the frame rate of the image data.

2. The display driving circuit according to claim 1, wherein the timing controller circuit adjusts the data depth of the image data from a first data depth to a second data depth during an effective period of a frame period, wherein the first data depth is greater than the second data depth. 3 . The display driving circuit according to claim 2 , wherein the timing controller circuit restores the data depth of the image data from the second data depth to the first data depth during an interframe blanking interval of the frame period. 4 . The display driving circuit according to claim 2 , wherein the second data depth is maintained for a predetermined time length, and the predetermined time length is determined by the timing controller circuit. 5 . The display driving circuit of claim 1 , wherein the timing controller circuit adjusts the frame rate of the image data from a first frame rate to a second frame rate during a next frame period, wherein the first frame rate is greater than the second frame rate. 6 . The display driving circuit according to claim 5 , wherein the timing controller circuit restores the frame rate of the image data from the second frame rate to the first frame rate during an interframe blanking interval of the next frame period. 7 . The display driving circuit according to claim 5 , wherein the second frame rate is maintained for a predetermined time length, and the predetermined time length is determined by the timing controller circuit.

8. The display driving circuit according to claim 1, wherein the lock signal comprises a first signal level and a second signal level, and the second signal level is lower than the first signal level, wherein the first signal level of the lock signal indicates that the noise does not occur, and the second signal level of the lock signal indicates that the noise occurs.

9. A method for driving a display panel to display image data, comprising: sensing whether noise occurs and outputting a lock signal, wherein the lock signal indicates whether the noise occurs; When the lock signal indicates the presence of the noise, adjusting the data depth of the image data; as well as The display panel is driven according to the image data to display the image data.

10. The method for driving a display panel to display image data according to claim 9, wherein in the step of adjusting the data depth of the image data, the data depth of the image data is adjusted from a first data depth to a second data depth during an effective period of a frame period, wherein the first data depth is greater than the second data depth.

11. The method for driving a display panel to display image data according to claim 10, further comprising: The data depth of the image data is restored from the second data depth to the first data depth during an interframe blanking interval of the frame period. 12 . The method for driving a display panel to display image data according to claim 10 , wherein the second data depth is maintained for a predetermined time length, and the predetermined time length is determined by a timing controller circuit.

13. The method for driving a display panel to display image data according to claim 9, further comprising: When the lock signal indicates that the noise is not present, the data depth of the image data is not adjusted.

14. A method for driving a display panel to display image data according to claim 9, wherein the lock signal comprises a first signal level and a second signal level, and the second signal level is lower than the first signal level, wherein the first signal level of the lock signal indicates that the noise does not occur, and the second signal level of the lock signal indicates that the noise occurs.

15. A method for driving a display panel to display image data, comprising: sensing whether noise occurs and outputting a lock signal, wherein the lock signal indicates whether the noise occurs; When the lock signal indicates the presence of the noise, adjusting the frame rate of the image data; as well as The display panel is driven according to the frame rate to display image data.

16. A method for driving a display panel to display image data according to claim 15, wherein in the step of adjusting the frame rate of the image data, the frame rate of the image data is adjusted from a first frame rate to a second frame rate during a next frame period, wherein the first frame rate is greater than the second frame rate.

17. The method for driving a display panel to display image data according to claim 16, further comprising: The frame rate of the image data is restored from the second frame rate to the first frame rate during an interframe blanking interval of the next frame period. 18 . The method for driving a display panel to display image data according to claim 16 , wherein the second frame rate is maintained for a predetermined time length, and the predetermined time length is determined by a timing controller circuit.

19. The method for driving a display panel to display image data according to claim 15, further comprising: When the lock signal indicates that the noise is not present, the frame rate of the image data is not adjusted.

20. A method for driving a display panel to display image data according to claim 15, wherein the lock signal comprises a first signal level and a second signal level, and the second signal level is lower than the first signal level, wherein the first signal level of the lock signal indicates that the noise does not occur, and the second signal level of the lock signal indicates that the noise occurs.

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