Ccd rectifier, radio frequency energy harvesting circuit, chip and communication device
By using a series-parallel CCDD rectifier, complementary switching devices are alternately turned on and off, which solves the problem of circuit stage limitation, improves voltage amplification and output voltage, and enhances the rectifier's conversion efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY CO LTD
- Filing Date
- 2024-11-19
- Publication Date
- 2026-06-16
AI Technical Summary
The number of circuit stages in existing CCDD rectifiers limits the voltage amplification factor and output voltage, and increasing the number of stages is affected by parasitic capacitance, which limits the conversion efficiency.
The CCDD rectifier, which adopts a series-parallel structure, increases the number of circuit stages by combining the first and second rectifier modules and uses complementary switching devices to alternately turn on and off, thereby forming current path switching, avoiding short circuits, reducing transistor threshold voltage, and saving control signal lines.
Without increasing circuit area and parasitic capacitance, the number of circuit stages is doubled, the output voltage is doubled, and the conversion efficiency is significantly improved.
Smart Images
Figure CN119765952B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of rectifier technology, and more specifically, to a CCDD rectifier, a radio frequency energy harvesting circuit, a chip, and a communication device. Background Technology
[0002] Cross-coupled differential-drive (CCDD) rectifiers use complementary switching devices to alternately turn on and off to switch current paths, thereby achieving rectification. The complementary switching devices ensure current continuity, avoid direct short circuits, and improve the conversion efficiency of CCDD rectifiers.
[0003] On the one hand, the voltage amplification factor of a CCDD rectifier is related to the number of circuit stages; the larger the number of circuit stages, the greater the current amplification factor. On the other hand, the output voltage of a CCDD rectifier is affected by the parasitic capacitance of each stage. Increasing the number of circuit stages will limit the output voltage or even reduce it. Since the parasitic capacitance of each stage limits the output voltage, the voltage amplification factor of a CCDD rectifier is limited when the number of circuit stages is set to 5 or 6. Summary of the Invention
[0004] This application provides a CCDD rectifier, a radio frequency energy harvesting circuit, a chip, and a communication device.
[0005] The CCDD rectifier provided in this application may include a first signal line, a second signal line, a first rectifier module, and a second rectifier module. The first signal line is configured to receive a first AC voltage signal. The second signal line is configured to receive a second AC voltage signal, the polarity of which is opposite to that of the first AC voltage signal. The first rectifier module may include multiple stages of first capacitors and multiple stages of first switch modules. The second rectifier module may include multiple stages of second capacitors and multiple second switch modules. Each stage of the first capacitor has its first terminal connected to the first signal line, each stage of the first switch module is connected to the second terminal of the corresponding stage of the first capacitor, and each stage of the first switch module is also connected to the next stage of the first switch module. Each stage of the first switch module is configured to periodically turn on and off, so that each stage of the first capacitor periodically charges and discharges. The first terminal of each stage of the second capacitor is connected to the second signal line, and each stage of the second switch module is connected to the second terminal of the corresponding stage of the second capacitor. The first stage of the second switch module is connected to the last stage of the first switch module, and each stage of the second switch module is also connected to the next stage of the second switch module. Each stage of the second switch module is configured to periodically turn on and off so that each stage of the second capacitor can periodically charge and discharge.
[0006] It is understood that the first and second rectifier modules can be used in combination, so that the voltage amplification factor of the CCDD rectifier is determined by the sum of the number of stages in the first and second switching modules. Compared with the CCDD rectifier structure in related technologies, the CCDD rectifier provided in this application doubles the number of circuit stages without increasing the circuit area and parasitic capacitance, thereby improving the conversion efficiency of the CCDD rectifier.
[0007] In some implementations, each first switching module is configured to periodically turn on and off according to a second AC voltage signal, and each second switching module is configured to periodically turn on and off according to a first AC voltage signal.
[0008] In this way, by multiplexing the first AC voltage signal provided by the first signal line and the second AC voltage signal provided by the second signal line, the CCDD rectifier does not need to set up additional control signal lines, thus saving circuit resources.
[0009] In some embodiments, each first switching module includes a first transistor and a second transistor. The first terminal of the first transistor is connected to the first terminal of the second transistor and to the second terminal of the corresponding first capacitor. The second terminal of the first transistor is connected to the corresponding previous-stage first switching module, and the second terminal of the second transistor is connected to the corresponding next-stage first switching module. The second terminal of the second transistor in the final stage first switching module is connected to the first-stage second switching module.
[0010] Thus, based on the connection relationship between the first transistor and the second transistor, a cascade relationship of multiple first switching modules can be realized.
[0011] In some implementations, the second terminal of the first transistor of the first-stage first switching module is grounded.
[0012] Thus, during the first operating cycle of the CCDD rectifier, the first signal line can charge the first capacitor of the first stage.
[0013] In some implementations, each first switching module includes a third capacitor, with a first terminal connected to a second signal line and a second terminal connected to the control electrode of the first transistor and the control electrode of the second transistor.
[0014] In this way, the third capacitor can quickly release or absorb charge, helping the transistor respond to signal changes more quickly.
[0015] In some implementations, when the first transistor is on, the second transistor is off; when the second transistor is on, the first transistor is off.
[0016] In this way, the first and second transistors can alternately turn on and off to switch the current path, thereby achieving the purpose of rectification. The first and second transistors can act as complementary switching devices to ensure the continuity of current, avoid direct short circuits, and improve the conversion efficiency of the rectifier.
[0017] In some embodiments, the first transistor is an NMOS transistor and the second transistor is a PMOS transistor, or the first transistor is a PMOS transistor and the second transistor is an NMOS transistor; the body terminal of the first transistor is connected to the gate terminal, and the body terminal of the second transistor is connected to the gate terminal.
[0018] In this way, connecting the body terminal of the first transistor to the gate terminal and connecting the body terminal of the second transistor to the gate terminal can reduce the threshold voltage of the transistor, thereby reducing the output voltage loss of the first rectifier module.
[0019] In some embodiments, each stage of the second switching module includes a third transistor and a fourth transistor. The first terminal of the third transistor is connected to the first terminal of the fourth transistor and to the second terminal of the corresponding stage's second capacitor. The second terminal of the third transistor is connected to the corresponding previous stage's second switching module, and the second terminal of the fourth transistor is connected to the corresponding next stage's second switching module. The second terminal of the third transistor in the first stage's second switching module is connected to the last stage's first switching module.
[0020] Thus, based on the connection relationship between the third and fourth transistors, multiple second switch modules can be cascaded.
[0021] In some implementations, the second terminal of the fourth transistor in the last stage of the second switching module is configured to provide the output voltage of the rectifier.
[0022] Thus, the second terminal of the fourth transistor in the last stage of the second switching module can be set as the output terminal of the CCDD rectifier.
[0023] In some embodiments, each stage of the second switching module includes a fourth capacitor, with a first terminal of each fourth capacitor connected to the signal line and a second terminal of the fourth capacitor connected to the control electrode of the third transistor and the control electrode of the fourth transistor.
[0024] In this way, the fourth capacitor can quickly release or absorb charge, helping the transistor respond to signal changes more quickly.
[0025] In some implementations, the fourth transistor is turned off when the third transistor is on, and the third transistor is turned off when the fourth transistor is on.
[0026] In this way, the third and fourth transistors can alternately turn on and off to switch the current path, thereby achieving the purpose of rectification. The third and fourth transistors can act as complementary switching devices to ensure the continuity of current, avoid direct short circuits, and improve the conversion efficiency of the rectifier.
[0027] In some embodiments, the third transistor is an NMOS transistor and the fourth transistor is a PMOS transistor, or the third transistor is a PMOS transistor and the fourth transistor is an NMOS transistor; the body terminal of the third transistor is connected to the gate terminal, and the body terminal of the fourth transistor is connected to the gate terminal.
[0028] Thus, connecting the body and gate of the third transistor and the body and gate of the fourth transistor can reduce the threshold voltage of the transistors, thereby reducing the output voltage loss of the second rectifier module.
[0029] In some embodiments, the rectifier further includes multiple bias modules. Each bias module is connected between the second terminal of the corresponding first-stage first capacitor and the control terminal of the corresponding first-stage first switching module, and each bias module is configured to provide a bias voltage to the second terminal of the first capacitor and the control terminal of the corresponding first-stage first switching module; or each bias module is connected between the second terminal of the corresponding second-stage second capacitor and the control terminal of the corresponding first-stage second switching module, and each bias module is configured to provide a bias voltage to the second terminal of the second capacitor and the control terminal of the corresponding first-stage second switching module.
[0030] Thus, the bias module provides a bias voltage to the transistors of the first and second switching modules. The bias voltage increases the on-resistance of the transistors, reduces reverse leakage current from the transistors to the input terminal, and reduces output voltage loss.
[0031] In some embodiments, each bias module includes a bias transistor. The first terminal of the bias transistor is connected to a control terminal and to the second terminal of the corresponding first-stage first capacitor, and the second terminal of the bias transistor is connected to the control terminal of the corresponding first-stage first switching module; or the first terminal of the bias transistor is connected to a control terminal and to the second terminal of the corresponding first-stage second capacitor, and the second terminal of the bias transistor is connected to the control terminal of the corresponding first-stage second switching module.
[0032] Thus, the bias transistor provides a bias voltage that can be applied to the transistors of the first and second switching modules.
[0033] In some embodiments, each bias module includes a bias diode. The anode of the bias diode is connected to the second terminal of the corresponding first-stage first capacitor, and the cathode of the bias diode is connected to the control terminal of the corresponding first-stage first switching module; or the anode of the bias diode is connected to the second terminal of the corresponding first-stage second capacitor, and the cathode of the bias diode is connected to the control terminal of the corresponding first-stage second switching module.
[0034] Thus, the bias diode provides a bias voltage that can be applied to the transistors of the first and second switching modules.
[0035] In some embodiments, the bias transistor is an NMOS transistor, and the body terminal of the bias transistor is connected to the gate terminal.
[0036] In this way, the gate and body terminals of the bias transistor are connected, which can reduce the threshold voltage of the bias transistor, thereby reducing the output voltage loss of the first rectifier module and the output voltage loss of the second rectifier module.
[0037] This application provides an embodiment of a radio frequency (RF) energy harvesting circuit. The RF energy harvesting circuit includes a harvesting and conversion circuit, a storage capacitor, and a CCDD rectifier as described in the above embodiment. The harvesting and conversion circuit is configured to harvest an RF signal and convert the RF signal into a corresponding AC voltage signal for output. The CCDD rectifier is configured to convert the AC voltage signal output by the conversion circuit into a DC voltage signal for output. The storage capacitor is configured to store the DC voltage signal output by the CCDD rectifier.
[0038] In some implementations, the acquisition and conversion circuit may include an antenna, a first matching network, and a second matching network. The antenna is configured to acquire a radio frequency (RF) signal and convert the RF signal into a corresponding single-ended voltage signal. The first matching network is configured to adjust the input impedance of the antenna to match the impedance of the CCDD rectifier. The second matching network is configured to convert the single-ended voltage signal into a corresponding double-ended differential voltage signal and provide it to the CCDD rectifier.
[0039] In some embodiments, the first matching network includes a first matching capacitor, a second matching capacitor, and a matching inductor. A first terminal of the first matching capacitor is connected to a first terminal of the matching inductor and is also connected to the antenna. A second terminal of the first matching capacitor is grounded. A second terminal of the matching inductor is connected to a first terminal of the second matching capacitor and is also connected to the second matching network. A second terminal of the second matching capacitor is grounded.
[0040] This application also provides a chip, which may include the radio frequency energy harvesting circuit of the above embodiments.
[0041] This application also provides a communication device, which may include the chip or radio frequency energy harvesting circuit described in the above embodiments.
[0042] This application provides a CCDD rectifier, a radio frequency energy harvesting circuit, a chip, and a communication device. The CCDD rectifier may include a first signal line, a second signal line, a first rectifier module, and a second rectifier module. The first signal line is configured to receive a first AC voltage signal. The second signal line is configured to receive a second AC voltage signal, the polarity of which is opposite to that of the first AC voltage signal. The first rectifier module may include multiple stages of first capacitors and multiple stages of first switch modules. The second rectifier module may include multiple stages of second capacitors and multiple second switch modules. Each stage of the first capacitor has its first terminal connected to the first signal line, each stage of the first switch module is connected to the second terminal of the corresponding stage of the first capacitor, and each stage of the first switch module is also connected to the next stage of the first switch module. Each stage of the first switch module is configured to periodically turn on and off, so that each stage of the first capacitor periodically charges and discharges. The first terminal of each stage of the second capacitor is connected to the second signal line, and each stage of the second switch module is connected to the second terminal of the corresponding stage of the second capacitor. The first stage of the second switch module is connected to the last stage of the first switch module, and each stage of the second switch module is also connected to the next stage of the second switch module. Each stage of the second switch module is configured to periodically turn on and off so that each stage of the second capacitor can periodically charge and discharge.
[0043] In the CCDD rectifier of this application embodiment, the first rectifier module and the second rectifier module can be used in combination, so that the voltage amplification factor of the CCDD rectifier is determined according to the sum of the number of stages of the first switching module and the number of stages of the second switching module. Compared with the CCDD rectifier structure in related technologies, the CCDD rectifier provided by this application embodiment doubles the number of circuit stages without increasing the circuit area and parasitic capacitance, thereby improving the conversion efficiency of the CCDD rectifier.
[0044] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0045] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, wherein:
[0046] Figure 1 This is a schematic diagram of a CCDD rectifier with a series-parallel structure according to an embodiment of this application;
[0047] Figure 2This is a circuit diagram of a CCDD rectifier with a series-parallel structure according to certain embodiments of this application;
[0048] Figure 3 This is a circuit diagram of a CCDD rectifier in related technologies;
[0049] Figure 4 This is a circuit diagram of the first stage circuit of the series-parallel structure according to the embodiments of this application;
[0050] Figure 5 This is a circuit diagram of the last stage circuit of the series-parallel structure in the embodiments of this application;
[0051] Figure 6 This is a schematic diagram of a dynamically biased series-parallel CCDD rectifier according to an embodiment of this application;
[0052] Figure 7 This is a circuit diagram of a dynamically lead-biased series-parallel CCDD rectifier according to certain embodiments of this application;
[0053] Figure 8 This is a circuit diagram of the first stage circuit of the dynamically ahead biased series-parallel structure according to the embodiments of this application.
[0054] Figure 9 This is a circuit diagram of the last stage circuit of the dynamically ahead biased series-parallel structure in the embodiments of this application.
[0055] Figure 10 This is a schematic diagram of the radio frequency energy harvesting circuit according to an embodiment of this application;
[0056] Figure 11 This is a schematic diagram of the chip and communication device according to an embodiment of this application;
[0057] Figure 12 This is a schematic diagram of the output voltage of a CCDD rectifier in related technologies;
[0058] Figure 13 This is a schematic diagram of the output voltage of the CCDD rectifier with a series-parallel structure according to an embodiment of this application;
[0059] Figure 14 This is a schematic diagram of the output voltage of the dynamically lead-biased series-parallel CCDD rectifier according to an embodiment of this application.
[0060] Figure label:
[0061] The system includes: rectifier 100, first signal line 10, second signal line 20, first rectifier module 30, first capacitor 31, first switch module 32, first transistor 321, second transistor 322, third capacitor 323, second rectifier module 40, second capacitor 41, second switch module 42, third transistor 421, fourth transistor 422, fourth capacitor 423, bias module 50, bias transistor 51, RF energy harvesting circuit 1000, harvesting and conversion circuit 200, antenna 210, first matching network 220, first matching capacitor 221, second matching capacitor 222, matching inductor 223, second matching network 230, storage capacitor 300, chip 2000, and communication equipment 3000. Detailed Implementation
[0062] The embodiments of this application are described in detail below, and the embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0063] Cross-coupled differential-drive (CCDD) rectifiers use complementary switching devices to alternately turn on and off to switch current paths, thereby achieving rectification. The complementary switching devices ensure current continuity, avoid direct short circuits, and improve the conversion efficiency of CCDD rectifiers.
[0064] On the one hand, the voltage amplification factor of a CCDD rectifier is related to the number of circuit stages; the larger the number of circuit stages, the greater the current amplification factor. On the other hand, the output voltage of a CCDD rectifier is affected by the parasitic capacitance of each stage. Increasing the number of circuit stages will limit the output voltage or even reduce it. Since the parasitic capacitance of each stage limits the output voltage, the voltage amplification factor of a CCDD rectifier is limited when the number of circuit stages is set to 5 or 6.
[0065] This application provides a CCDD rectifier (such as...) Figure 1 , Figure 2 , Figures 4-9 As shown, the CCDD rectifier has a series-parallel structure. The CCDD rectifier provided in this application can double the number of circuit stages and double the output voltage without increasing the circuit area and parasitic capacitance, thus improving the power conversion efficiency of the CCDD rectifier.
[0066] Reference Figure 1The CCDD rectifier 100 provided in this application embodiment may include a first signal line 10, a second signal line 20, a first rectifier module 30, and a second rectifier module 40. The first signal line 10 is configured to receive a first AC voltage signal. The second signal line 20 is configured to receive a second AC voltage signal, the polarity of which is opposite to that of the first AC voltage signal. The first rectifier module 30 may include multiple stages of first capacitors 31 and multiple stages of first switch modules 32. The second rectifier module 40 may include multiple stages of second capacitors 41 and multiple second switch modules 42. Each stage of the first capacitor 31 has its first terminal connected to the first signal line 10, each stage of the first switch module 32 is connected to the second terminal of the corresponding stage of the first capacitor 31, and each stage of the first switch module 32 is also connected to the next stage of the first switch module 32. Each stage of the first switch module 32 is configured to periodically turn on and off, so that each stage of the first capacitor 31 is periodically charged and discharged. The first end of each stage of the second capacitor 41 is connected to the second signal line 20, and each stage of the second switch module 42 is connected to the second end of the corresponding stage of the second capacitor 41. The first stage of the second switch module 42 is connected to the last stage of the first switch module 32, and each stage of the second switch module 42 is also connected to the next stage of the second switch module 42. Each stage of the second switch module 42 is configured to periodically turn on and off so that each stage of the second capacitor 41 is periodically charged and discharged.
[0067] Specifically, the first signal line 10 and the second signal line 20 can be set as the differential input signal lines of the CCDD rectifier 100. The CCDD rectifier 100 can rectify the differential signal of the first AC voltage signal and the second AC voltage signal, which can eliminate the influence of common-mode noise and improve the accuracy of the CCDD rectifier 100.
[0068] The first switching module 32 and the second switching module 42 of each stage periodically turn on and off, causing the first signal line 10 to charge the first capacitor 31 of each stage sequentially, and the second signal line 20 to charge the second capacitor 41 of each stage sequentially. The rectifier 100 uses complementary switching devices to alternately turn on and off to switch the current path, thereby achieving the purpose of rectification. The complementary switching devices ensure the continuity of current, avoid direct short circuits, and improve the conversion efficiency of the rectifier 100.
[0069] Since the first-stage second switch module 42 can be cascaded with the last-stage first switch module, the first-stage second switch module 42 can be used as the next cascaded unit of the last-stage switch module, so that the voltage amplification factor of the CCDD rectifier 100 is determined by the sum of the number of stages of the first switch module 32 and the number of stages of the second switch module 42.
[0070] The first rectifier module 30 may include multiple cascaded first switch modules 32. The first rectifier module 30 can provide an amplified output voltage at node N1 and supply the output voltage to the second rectifier module 40. The second rectifier module 40 may include multiple cascaded second switch modules 42. The second rectifier module 40 can amplify the voltage connected to node N1 and output it at node N2. The amplification factor of the first rectifier module 30 can be set to m, the amplification factor of the second rectifier module 40 can be set to n, and the amplification factor of the CCDD rectifier 100 can be set to m+n.
[0071] by Figure 2 For example, the first signal line 10 can be set as signal line VP, and the second signal line 20 can be set as signal line VN. Capacitor elements C1, C4, C7, and C10 can be set as four cascaded first capacitors 31. Capacitor elements C13, C16, C19, and C22 can be set as four cascaded second capacitors 41.
[0072] During the first operating cycle of the CCDD rectifier 100, signal line VP can charge capacitor C1. During the second operating cycle of the CCDD rectifier 100, capacitor C1 can discharge through the first-stage first switching module 32. During the third operating cycle of the CCDD rectifier 100, signal line VP can charge capacitor C4. During the fourth operating cycle of the CCDD rectifier 100, capacitor C4 can discharge through the second-stage first switching module 32. During the fifth operating cycle of the CCDD rectifier 100, signal line VP can charge capacitor C7. During the sixth operating cycle of the CCDD rectifier 100, capacitor C7 can discharge through the third-stage first switching module 32. During the seventh operating cycle of the CCDD rectifier 100, signal line VP can charge capacitor C10. During the eighth operating cycle of the CCDD rectifier 100, capacitor C10 can discharge through the fourth-stage first switching module 32.
[0073] The charging and discharging processes of capacitors C13, C16, C19, and C22 can be referenced from those of capacitors C1, C4, C7, and C10, and will not be elaborated here.
[0074] The voltage at which the capacitor discharges each time can be set to V0. The first rectifier module 30 has 4 circuit stages, and the voltage output by the first rectifier module 30 at node N1 can be set to 4V0. The second rectifier module 40 has 4 circuit stages, and the voltage output by the second rectifier module 40 at node N2 can be set to 8V0. The CCDD rectifier 100 can be set to 8 circuit stages.
[0075] Reference Figure 3 In related technologies, the rectifier modules of the CCDD rectifier 100 are connected in parallel, and the output voltage is proportional to the number of circuit stages of the switching module. Due to the influence of parasitic capacitance in each stage, increasing the number of stages will limit the output voltage or even reduce the output voltage. Generally, the CCDD rectifier 100 of this structure has 5 to 6 stages.
[0076] It is understandable that the first rectifier module 30 and the second rectifier module 40 can be used in combination so that the voltage amplification factor of the CCDD rectifier 100 is determined by the sum of the number of stages of the first switching module 32 and the number of stages of the second switching module 42.
[0077] Thus, compared to the CCDD rectifier 100 structure in related technologies, the CCDD rectifier 100 provided in this application doubles the number of circuit stages without increasing the circuit area and parasitic capacitance, thereby improving the conversion efficiency of the CCDD rectifier 100.
[0078] In some implementations, each first switching module 32 is configured to periodically turn on and off according to a second AC voltage signal, and each second switching module 42 is configured to periodically turn on and off according to a first AC voltage signal.
[0079] Specifically, the second AC voltage signal provided by the second signal line 20 can control the periodic on and off of each stage of the first switching module 32. The second signal line 20 can serve as the control signal line for each stage of the first switching module 32, eliminating the need for an additional control signal line for the first switching module 32 in the CCDD rectifier 100, thus saving circuit resources.
[0080] by Figure 2 For example, the first switch module 32 may include transistors MN1, MP1, MN2, MP2, MN3, MP3, MN4, and MP4, and the signal line VN may be connected to the control electrode of transistors MN1, MP1, MN2, MP2, MN3, MP3, MN4, and MP4.
[0081] The first AC voltage signal provided by the first signal line 10 can control the periodic on and off of each stage of the second switching module 42. The first signal line 10 can serve as the control signal line for each stage of the second switching module 42, eliminating the need for additional control signal lines for the second switching module 42 in the CCDD rectifier 100, thus saving circuit resources.
[0082] by Figure 2For example, the second switch module 42 may include transistors MN5, MP5, MN6, MP6, MN7, MP7, MN8, and MP8, and the signal line VP may be connected to the control electrode of transistors MN5, MP5, MN6, MP6, MN7, MP7, MN8, and MP8.
[0083] The second AC voltage signal provided by the second signal line 20 can control the periodic on and off of each stage's first switching module 32. Since the second signal line 20 can serve as the control signal line for each stage's first switching module 32, the CCDD rectifier 100 does not require an additional control signal line for the first switching module 32, thus saving circuit resources.
[0084] Thus, by multiplexing the first AC voltage signal provided by the first signal line 10 and the second AC voltage signal provided by the second signal line 20, the CCDD rectifier 100 does not need to set up additional control signal lines, saving circuit resources.
[0085] In some embodiments, each first switching module 32 includes a first transistor 321 and a second transistor 322. The first terminal of the first transistor 321 is connected to the first terminal of the second transistor 322 and to the second terminal of the corresponding first capacitor 31. The second terminal of the first transistor 321 is connected to the corresponding previous-stage first switching module 32, and the second terminal of the second transistor 322 is connected to the corresponding next-stage first switching module 32. The second terminal of the second transistor 322 of the last-stage first switching module 32 is connected to the first-stage second switching module 42.
[0086] Specifically, with Figure 2 For example, in the first-stage first-switch module 32, the first transistor 321 can be set as transistor MN1, and the second transistor 322 can be set as transistor MP1. In the second-stage first-switch module 32, the first transistor 321 can be set as MN2, and the second transistor 322 can be set as MP2. In the third-stage first-switch module 32, the first transistor 321 can be set as MN3, and the second transistor 322 can be set as MP3. In the fourth-stage first-switch module 32, the first transistor 321 can be set as MN4, and the second transistor 322 can be set as MP4.
[0087] The first terminal of transistor MN1 is connected to the first terminal of transistor MP1 and to capacitor C1. The first terminal of transistor MN2 is connected to the first terminal of transistor MP2 and to capacitor C4. The first terminal of transistor MN3 is connected to the first terminal of transistor MP3 and to capacitor C7. The first terminal of transistor MN4 is connected to the first terminal of transistor MP4 and to capacitor C10. The second terminal of transistor MP1 is connected to the second terminal of transistor MN2, the second terminal of transistor MP2 is connected to the second terminal of transistor MN3, the second terminal of transistor MP3 is connected to the second terminal of transistor MN4, and the second terminal of transistor MN4 is connected to node N1.
[0088] Thus, based on the connection relationship between the first transistor 321 and the second transistor 322, a cascade relationship of multiple first switch modules 32 can be realized.
[0089] In some implementations, the second terminal of the first transistor 321 of the first-stage first switching module 32 is grounded.
[0090] Specifically, with Figure 4 For example, in the first-stage first switch module 32, the first transistor 321 can be set as transistor MN1, and the second transistor 322 can be set as transistor MP1. The first terminal of transistor MN1 can be grounded.
[0091] During the first operating cycle of the CCDD rectifier 100, signal line VN controls transistor MN1 to turn on, allowing the voltage applied to the first terminal of transistor MN1 to be written to the first terminal of capacitor C1, thus enabling a low-level signal to be applied to the first terminal of capacitor C1. The second terminal of capacitor C1 is connected to signal line VP, and the AC voltage signal provided by signal line VP charges capacitor C1.
[0092] Thus, during the first operating cycle of the CCDD rectifier 100, the first signal line 10 can charge the first stage first capacitor 31.
[0093] In some embodiments, each first switching module 32 includes a third capacitor 323, the first end of which is connected to the second signal line 20, and the second end of which is connected to the control electrode of the first transistor 321 and the control electrode of the second transistor 322.
[0094] Specifically, with Figure 2For example, in the first-stage first switch module 32, the third capacitor 323 may include capacitor element C2 and capacitor element C3. The first end of capacitor element C2 can be connected to signal line VN, and the second end of capacitor element C2 can be connected to the control electrode of transistor MN1. The first end of capacitor element C3 can be connected to signal line VN, and the second end of capacitor element C3 can be connected to the control electrode of transistor MP1.
[0095] In the second-stage first switch module 32, the third capacitor 323 can be configured as capacitor element C5 and capacitor element C6. The first terminal of capacitor element C5 can be connected to signal line VN, and the second terminal of capacitor element C5 can be connected to the control electrode of transistor MN2. The first terminal of capacitor element C6 can be connected to signal line VN, and the second terminal of capacitor element C6 can be connected to the control electrode of transistor MP2.
[0096] In the third-stage first switch module 32, the third capacitor 323 can be configured as capacitor element C8 and capacitor element C9. The first end of capacitor element C8 can be connected to signal line VN, and the second end of capacitor element C8 can be connected to the control electrode of transistor MN3. The first end of capacitor element C9 can be connected to signal line VN, and the second end of capacitor element C9 can be connected to the control electrode of transistor MP3.
[0097] In the fourth-stage first switch module 32, the third capacitor 323 can be configured as capacitor element C11 and capacitor element C12. The first end of capacitor element C11 can be connected to signal line VN, and the second end of capacitor element C11 can be connected to the control electrode of transistor MN4. The first end of capacitor element C12 can be connected to signal line VN, and the second end of capacitor element C12 can be connected to the control electrode of transistor MP4.
[0098] The capacitor connected to the control electrode of the transistor can act as a buffer to help drive the transistor, reducing the current required to drive the transistor, thereby reducing power consumption and improving the switching speed of the circuit. The third capacitor 323 can store charge. When the control signal changes, the third capacitor 323 can quickly release or absorb charge, helping the transistor respond to signal changes more quickly.
[0099] In this way, the third capacitor 323 can quickly release or absorb charge, helping the transistor respond to signal changes more quickly.
[0100] In some embodiments, when the first transistor 321 is turned on, the second transistor 322 is turned off. When the second transistor 322 is turned on, the first transistor 321 is turned off.
[0101] Specifically, in the first-stage first-switch module 32, when transistor MN1 is on, transistor MP1 is off, and capacitor C1 can be charged. When transistor MN1 is off, transistor MP1 is on, and capacitor C1 can discharge through transistor MP1. In the second-stage first-switch module 32, when transistor MN2 is on, transistor MP2 is off, and capacitor C4 can be charged. When transistor MN2 is off, transistor MP2 is on, and capacitor C4 can discharge through transistor MP2. In the third-stage first-switch module 32, when transistor MN3 is on, transistor MP3 is off, and capacitor C7 can be charged. When transistor MN3 is off, transistor MP3 is on, and capacitor C7 can discharge through transistor MP3. In the fourth-stage first-switch module 32, when transistor MN4 is on, transistor MP4 is off, and capacitor C10 can be charged. When transistor MN4 is off, transistor MP4 is on, and capacitor C10 can discharge through transistor MP4.
[0102] Thus, the first transistor 321 and the second transistor 322 can alternately turn on and off to switch the current path, thereby achieving the purpose of rectification. The first transistor 321 and the second transistor 322 can act as complementary switching devices to ensure the continuity of current, avoid direct short circuits, and improve the conversion efficiency of the rectifier 100.
[0103] In some embodiments, the first transistor 321 is an NMOS transistor and the second transistor 322 is a PMOS transistor, or the first transistor 321 is a PMOS transistor and the second transistor 322 is an NMOS transistor. The body terminal of the first transistor 321 is connected to its gate terminal, and the body terminal of the second transistor 322 is connected to its gate terminal.
[0104] Specifically, both the first transistor 321 and the second transistor 322 can be configured as MOSFETs. Connecting the gate and body of the first transistor 321 reduces its threshold voltage. Connecting the gate and body of the second transistor 322 reduces its threshold voltage, thereby reducing the output voltage loss of the first rectifier module 30.
[0105] by Figure 2 For example, the voltage at which the capacitor element discharges each time can be set to V0, the number of circuit stages of the first rectifier module 30 is 4, and the voltage output of the first rectifier module 30 at node N1 can be set to 4V0.
[0106] The voltage amplitude provided by the first signal line 10 can be set to VRF, the threshold voltage of the first transistor 321 and the threshold voltage of the second transistor 322 can both be set to VTH, V0 = VRF - VTH, and the voltage output by the first rectifier module 30 at node N1 can be set to 4(VRF - VTH).
[0107] Thus, connecting the body terminal of the first transistor 321 to the gate terminal and connecting the body terminal of the second transistor 322 to the gate terminal can reduce the threshold voltage of the transistor, thereby reducing the output voltage loss of the first rectifier module 30.
[0108] In some embodiments, each stage of the second switching module 42 includes a third transistor 421 and a fourth transistor 422. The first terminal of the third transistor 421 is connected to the first terminal of the fourth transistor 422 and to the second terminal of the corresponding first-stage second capacitor 41. The second terminal of the third transistor 421 is connected to the corresponding previous-stage second switching module 42, and the second terminal of the fourth transistor 422 is connected to the corresponding next-stage second switching module 42. The second terminal of the third transistor 421 of the first-stage second switching module 42 is connected to the last-stage first switching module 32.
[0109] Specifically, with Figure 2 For example, in the first-stage second switch module 42, the third transistor 421 can be set as transistor MN5, and the fourth transistor 422 can be set as transistor MP5. In the second-stage second switch module 42, the third transistor 421 can be set as MN6, and the fourth transistor 422 can be set as MP6. In the third-stage second switch module 42, the third transistor 421 can be set as MN7, and the fourth transistor 422 can be set as MP7. In the fourth-stage second switch module 42, the third transistor 421 can be set as MN8, and the fourth transistor 422 can be set as MP8.
[0110] The first terminal of transistor MN5 is connected to the first terminal of transistor MP5 and to capacitor C13. The first terminal of transistor MN6 is connected to the first terminal of transistor MP6 and to capacitor C16. The first terminal of transistor MN7 is connected to the first terminal of transistor MP7 and to capacitor C19. The first terminal of transistor MN8 is connected to the first terminal of transistor MP8 and to capacitor C22. The first terminal of transistor MP5 can be connected to node N1. The second terminal of transistor MP5 is connected to the second terminal of transistor MN6, the second terminal of transistor MP6 is connected to the second terminal of transistor MN7, and the second terminal of transistor MP7 is connected to the second terminal of transistor MN8.
[0111] Thus, based on the connection relationship between the third transistor 421 and the fourth transistor 422, a cascade relationship of multiple second switch modules 42 can be realized.
[0112] In some implementations, the second terminal of the fourth transistor 422 of the last-stage second switching module 42 is configured to provide the output voltage of the rectifier 100.
[0113] Specifically, with Figure 5 For example, in the last stage second switch module 42, the third transistor 421 can be set as transistor MN8, the fourth transistor 422 can be set as transistor MP8, and the second terminal of transistor MP8 can be connected to node VOUT.
[0114] The voltage at which the capacitor discharges each time can be set to V0. The second terminal of transistor MP8 can provide an output voltage of 8V0, which serves as the output voltage of CCDD rectifier 100.
[0115] In some embodiments, each stage of the second switching module 42 includes a fourth capacitor 423, the first end of each fourth capacitor 423 being connected to a signal line, and the second end of the fourth capacitor 423 being connected to the control electrode of the third transistor 421 and the control electrode of the fourth transistor 422.
[0116] Specifically, with Figure 2 For example, in the first-stage second switch module 42, the fourth capacitor 423 may include capacitor element C14 and capacitor element C15. The first end of capacitor element C14 can be connected to signal line VP, and the second end of capacitor element C14 can be connected to the control electrode of transistor MN5. The first end of capacitor element C15 can be connected to signal line VP, and the second end of capacitor element C15 can be connected to the control electrode of transistor MP5.
[0117] In the second-stage second switch module 42, the fourth capacitor 423 can be configured as capacitor element C17 and capacitor element C18. The first terminal of capacitor element C17 can be connected to signal line VP, and the second terminal of capacitor element C17 can be connected to the control electrode of transistor MN6. The first terminal of capacitor element C18 can be connected to signal line VP, and the second terminal of capacitor element C18 can be connected to the control electrode of transistor MP6.
[0118] In the third-stage second switch module 42, the fourth capacitor 423 can be configured as capacitor element C20 and capacitor element C21. The first end of capacitor element C20 can be connected to signal line VP, and the second end of capacitor element C20 can be connected to the control electrode of transistor MN7. The first end of capacitor element C21 can be connected to signal line VP, and the second end of capacitor element C21 can be connected to the control electrode of transistor MP7.
[0119] In the fourth-stage second switch module 42, the fourth capacitor 423 can be configured as capacitor element C23 and capacitor element C24. The first terminal of capacitor element C23 can be connected to signal line VP, and the second terminal of capacitor element C23 can be connected to the control electrode of transistor MN8. The first terminal of capacitor element C24 can be connected to signal line VP, and the second terminal of capacitor element C24 can be connected to the control electrode of transistor MP8.
[0120] The capacitor connected to the control electrode of the transistor can act as a buffer to help drive the transistor, reducing the current required to drive the transistor, thereby reducing power consumption and improving the switching speed of the circuit. The fourth capacitor 423 can store charge. When the control signal changes, the fourth capacitor 423 can quickly release or absorb charge, helping the transistor respond to signal changes more quickly.
[0121] In this way, the fourth capacitor 423 can quickly release or absorb charge, helping the transistor respond to signal changes more quickly.
[0122] In some implementations, when the third transistor 421 is on, the fourth transistor 422 is off. When the fourth transistor 422 is on, the third transistor 421 is off.
[0123] Specifically, in the first-stage second switch module 42, when transistor MN5 is on, transistor MP5 is off, allowing capacitor C13 to be charged. When transistor MN5 is off, transistor MP5 is on, allowing capacitor C13 to discharge through transistor MP5. In the second-stage second switch module 42, when transistor MN6 is on, transistor MP6 is off, allowing capacitor C16 to be charged. When transistor MN6 is off, transistor MP6 is on, allowing capacitor C16 to discharge through transistor MP6. In the third-stage second switch module 42, when transistor MN7 is on, transistor MP7 is off, allowing capacitor C19 to be charged. When transistor MN7 is off, transistor MP7 is on, allowing capacitor C19 to discharge through transistor MP7. In the fourth-stage second switch module 42, when transistor MN8 is on, transistor MP8 is off, allowing capacitor C22 to be charged. When transistor MN8 is off, transistor MP8 is on, allowing capacitor C22 to discharge through transistor MP8.
[0124] Thus, the third transistor 421 and the fourth transistor 422 can alternately turn on and off to switch the current path, thereby achieving the purpose of rectification. The third transistor 421 and the fourth transistor 422 can act as complementary switching devices to ensure the continuity of current, avoid direct short circuits, and improve the conversion efficiency of the rectifier 100.
[0125] In some embodiments, the third transistor 421 is an NMOS transistor and the fourth transistor 422 is a PMOS transistor, or the third transistor 421 is a PMOS transistor and the fourth transistor 422 is an NMOS transistor. The body terminal of the third transistor 421 is connected to the gate terminal, and the body terminal of the four transistors is connected to the gate terminal.
[0126] Specifically, both the third transistor 421 and the fourth transistor 422 can be configured as MOSFETs. Connecting the gate and body of the third transistor 421 reduces its threshold voltage. Connecting the gate and body of the fourth transistor 422 reduces its threshold voltage, thereby reducing the output voltage loss of the first rectifier module 30.
[0127] by Figure 2 For example, the voltage at which the capacitor element discharges each time can be set to V0, the number of circuit stages of the second rectifier module 40 is 4, and the voltage output of the second rectifier module 40 at node N2 can be set to 8V0.
[0128] The voltage amplitude provided by the first signal line 10 can be set to VRF, and the voltage amplitude provided by the second signal line 20 can be set to VRF. The threshold voltage of the third transistor 421 and the threshold voltage of the fourth transistor 422 can both be set to VTH, V0 = VRF - VTH, and the voltage output by the second rectifier module 40 at node N2 can be set to 8(VRF - VTH).
[0129] Thus, connecting the body terminal of the third transistor 421 to the gate terminal and connecting the body terminal of the fourth transistor 422 to the gate terminal can reduce the threshold voltage of the transistors, thereby reducing the output voltage loss of the second rectifier module 40.
[0130] Reference Figure 6 The rectifier 100 provided in this embodiment further includes a plurality of bias modules 50. Each bias module 50 is connected between the second terminal of the corresponding first-stage first capacitor 31 and the control terminal of the corresponding first-stage first-switch module 32, and each bias module 50 is configured to provide a bias voltage to the second terminal of the first capacitor 31 and the control terminal of the corresponding first-stage first-switch module 32; or each bias module 50 is connected between the second terminal of the corresponding second-stage second capacitor 41 and the control terminal of the corresponding second-stage first-switch module 42, and each bias module 50 is configured to provide a bias voltage to the second terminal of the second capacitor 41 and the control terminal of the corresponding second-stage first-switch module 42.
[0131] Specifically, the bias module 50 can be connected between the control electrode of the first transistor 321 and the first capacitor 31. The bias module 50 can also be connected between the second transistor 322 and the first capacitor 31. The bias module 50 can be connected between the control electrode of the third transistor 421 and the second capacitor 41. The bias module 50 can also be connected between the fourth transistor 422 and the second capacitor 41. The bias voltage provided by the bias module 50 can increase the on-resistance of the transistors.
[0132] It is understandable that during the alternating conduction of transistors in the CCDD rectifier 100, reverse leakage of the output voltage to the input terminal can occur through the transistors. The bias voltage provided by the bias module 50 can increase the on-resistance of the transistors, thereby reducing reverse leakage of the transistors to the input terminal and reducing output voltage loss.
[0133] Thus, the bias module 50 provides a bias voltage to the transistors of the first switch module 32 and the second switch module 42. The bias voltage can increase the on-resistance of the transistors, reduce the reverse leakage current of the transistors to the input terminal, and reduce the output voltage loss.
[0134] In some embodiments, each bias module 50 includes a bias transistor 51. The first terminal of the bias transistor 51 is connected to the control terminal and to the second terminal of the corresponding first-stage capacitor 31, and the second terminal of the bias transistor 51 is connected to the control terminal of the corresponding first-stage switching module 32; or the first terminal of the bias transistor 51 is connected to the control terminal and to the second terminal of the corresponding second-stage capacitor 41, and the second terminal of the bias transistor 51 is connected to the control terminal of the corresponding second-stage switching module 42.
[0135] Specifically, with Figure 7For example, bias transistor 51 may include transistors M1 to M16. The first terminal and control terminal of transistor M1 can both be connected to capacitor C1, and the second terminal of transistor M1 can be connected to the control terminal of transistor MN1. The first terminal and control terminal of transistor M2 can both be connected to capacitor C1, and the second terminal of transistor M2 can be connected to the control terminal of transistor MP1. The first terminal and control terminal of transistor M3 can both be connected to capacitor C2, and the second terminal of transistor M3 can be connected to the control terminal of transistor MN2. The first terminal and control terminal of transistor M4 can both be connected to capacitor C2, and the second terminal of transistor M4 can be connected to the control terminal of transistor MP2. The first terminal and control terminal of transistor M5 can both be connected to capacitor C3, and the second terminal of transistor M5 can be connected to the control terminal of transistor MN3. The first terminal and control terminal of transistor M6 can both be connected to capacitor C7, and the second terminal of transistor M6 can be connected to the control terminal of transistor MP3. The first terminal and control terminal of transistor M7 can both be connected to capacitor C10, and the second terminal of transistor M7 can be connected to the control terminal of transistor MN4. The first and control terminals of transistor M8 can both be connected to capacitor C10, and the second terminal of transistor M8 can be connected to the control terminal of transistor MP4. The first and control terminals of transistor M9 can both be connected to capacitor C13, and the second terminal of transistor M9 can be connected to the control terminal of transistor MN5. The first and control terminals of transistor M10 can both be connected to capacitor C13, and the second terminal of transistor M10 can be connected to the control terminal of transistor MP5. The first and control terminals of transistor M11 can both be connected to capacitor C16, and the second terminal of transistor M11 can be connected to the control terminal of transistor MN6. The first and control terminals of transistor M12 can both be connected to capacitor C16, and the second terminal of transistor M12 can be connected to the control terminal of transistor MP6. The first and control terminals of transistor M13 can both be connected to capacitor C19, and the second terminal of transistor M13 can be connected to the control terminal of transistor MN7. The first and control terminals of transistor M14 can both be connected to capacitor C19, and the second terminal of transistor M14 can be connected to the control terminal of transistor MP7. Both the first terminal and the control terminal of transistor M15 can be connected to capacitor C22, and the second terminal of transistor M15 can be connected to the control terminal of transistor MN8. Similarly, both the first terminal and the control terminal of transistor M16 can be connected to capacitor C22, and the second terminal of transistor M16 can be connected to the control terminal of transistor MP8.
[0136] The first terminal of the bias transistor 51 is shorted to the control terminal. The bias transistor 51 can be used as an equivalent diode. The anode of the equivalent diode is connected to the corresponding capacitor element, and the cathode of the equivalent diode is connected to the control terminal of the transistors of the first switching module 32 and the second switching module 42. The equivalent diode can provide the corresponding bias voltage.
[0137] Thus, bias transistor 51 provides a bias voltage that can be applied to the transistors of the first switching module 32 and the second switching module 42.
[0138] In some embodiments, each bias module 50 includes a bias diode. The anode of the bias diode is connected to the second terminal of the corresponding first-stage capacitor 31, and the cathode of the bias diode is connected to the control terminal of the corresponding first-stage switching module 32; or the anode of the bias diode is connected to the second terminal of the corresponding second-stage capacitor 41, and the cathode of the bias diode is connected to the control terminal of the corresponding second-stage switching module 42.
[0139] Specifically, the connection relationship of the bias diodes can be referred to the connection relationship of the equivalent diodes of the bias transistor 51 mentioned above, which will not be elaborated here.
[0140] Thus, the bias diode provides a bias voltage that can be applied to the transistors of the first switching module 32 and the second switching module 42.
[0141] In some implementations, the bias transistor 51 is an NMOS transistor, and the body terminal of the bias transistor 51 is connected to the gate terminal.
[0142] Specifically, all bias transistors 51 can be configured as NMOS transistors. The first terminal of the bias transistor 51 can be configured as the drain of the NMOS transistor, and the second terminal of the bias transistor 51 can be configured as the source of the NMOS transistor. The gate terminal and the body terminal of the bias transistor 51 are connected, which can reduce the threshold voltage of the bias transistor 51, thereby reducing the output voltage loss of the first rectifier module 30 and the output voltage loss of the second rectifier module 40.
[0143] by Figure 8 For example, in the first stage circuit of the CCDD rectifier 100 circuit, the voltage at which the capacitor element C1 discharges each time can be set to (V0-VTH-Vth). Among them, VTH can be set to the threshold voltage of the first transistor 321 and the threshold voltage of the second transistor 322, and Vth can be set to the threshold voltage of the bias transistor 51.
[0144] by Figure 9For example, in the last stage of the CCDD rectifier 100 circuit, the voltage at which capacitor C22 discharges each time can be set to (V0-VTH-Vth). Here, VTH can be set to the threshold voltage of the first transistor 321 and the threshold voltage of the second transistor 322, and Vth can be set to the threshold voltage of the bias transistor 51.
[0145] In this way, the gate and body terminals of the bias transistor 51 are connected, which can reduce the threshold voltage of the bias transistor 51, thereby reducing the output voltage loss of the first rectifier module 30 and the output voltage loss of the second rectifier module 40.
[0146] Reference Figure 10 This application provides a radio frequency energy harvesting circuit 1000. The radio frequency energy harvesting circuit 1000 includes a harvesting and conversion circuit 200, a storage capacitor 300, and a CCDD rectifier 100 as described in the above embodiment.
[0147] Specifically, the acquisition and conversion circuit 200 is configured to acquire radio frequency (RF) signals and convert them into corresponding AC voltage signals for output. The CCDD rectifier 100 is configured to convert the AC voltage signal output by the conversion circuit into a DC voltage signal for output. The storage capacitor 300 is configured to store the DC voltage signal output by the CCDD rectifier 100.
[0148] In some implementations, the acquisition and conversion circuit 200 may include an antenna 210, a first matching network 220, and a second matching network 230.
[0149] Specifically, antenna 210 is configured to acquire radio frequency (RF) signals and convert them into corresponding single-ended voltage signals. First matching network 220 is configured to adjust the input impedance of antenna 210 to match the impedance of antenna 210 with that of CCDD rectifier 100. Second matching network 230 is configured to convert the single-ended voltage signals into corresponding dual-ended differential voltage signals and provide them to CCDD rectifier 100.
[0150] The second matching network 230 can be configured as a balun, which can convert a balanced signal into an unbalanced differential signal and provide the corresponding differential signal to the CCDD rectifier 100. The CCDD rectifier 100 can access the differential signal provided by the second matching network 230 based on signal lines VP and VN.
[0151] A balun can include inductors and capacitors, which can adjust the circuit's input impedance to match an external unbalanced system, thereby improving signal transmission efficiency and reducing energy loss.
[0152] In some embodiments, the first matching network 220 includes a first matching capacitor 221, a second matching capacitor 222, and a matching inductor 223. A first terminal of the first matching capacitor 221 is connected to a first terminal of the matching inductor 223 and is also connected to the antenna 210. A second terminal of the first matching capacitor 221 is grounded. A second terminal of the matching inductor 223 is connected to a first terminal of the second matching capacitor 222 and is also connected to the second matching network 230. The second terminal of the second matching capacitor 222 is grounded.
[0153] Specifically, the first matching capacitor 221, the second matching capacitor 222, and the matching inductor 223 can form a corresponding capacitor-inductor resonant circuit. The capacitance and inductance values of the first matching capacitor 221, the second matching capacitor 222, and the matching inductor 223 can be adjusted based on the input impedance of the antenna 210 and the impedance of the rectifier 100.
[0154] Maximum power transfer is achieved when the input impedance of a capacitor-inductor resonant circuit matches the external load impedance. Ideally, when these two impedances are equal, the circuit achieves perfect matching, at which point the circuit transfers all input power to the load without any reflection back to the source.
[0155] Reference Figure 11 This application also provides a chip 2000 and a communication device 3000. The chip 2000 may include the radio frequency energy harvesting circuit 1000 of the above embodiments. The communication device 3000 may include the chip 2000 or the radio frequency energy harvesting circuit 1000 of the above embodiments.
[0156] CCDD rectifier 100 in related technologies (such as Figure 3 The output voltage simulation diagram can be referenced. Figure 12 With an input RF signal power of -34dBm and a frequency of 915MHz, the output voltage of the CCDD rectifier 100 is 337mV.
[0157] CCDD rectifier 100 with series-parallel structure (e.g.) Figure 1 , Figure 2 , Figure 4 , Figure 5 The output voltage simulation diagram shown can be referenced. Figure 13 With an input RF signal power of -34dBm and a frequency of 915MHz, the output voltage of the CCDD rectifier 100 is 673mV. Compared to CCDD rectifiers 100 in related technologies, the series-parallel structure of the CCDD rectifier 100 provides twice the output voltage.
[0158] Dynamically lead-biased series-parallel CCDD rectifier 100 (e.g.) Figures 6-9 The output voltage simulation diagram shown can be referenced. Figure 14 With an input RF signal power of -34dBm and a frequency of 915MHz, the output voltage of the CCDD rectifier 100 is 683mV. Compared to the series-parallel structure of the CCDD rectifier 100, the series-parallel structure provides an additional 10mV higher output voltage.
[0159] In the description of this specification, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with an embodiment or example that are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, without contradiction, those skilled in the art can combine and integrate different embodiments or examples described in this specification, as well as features of different embodiments or examples.
[0160] Furthermore, the term "connection" should be interpreted broadly. For example, it can include fixed connections, detachable connections, or integral connections; it can include direct connections or indirect connections through an intermediate medium; and it can also include internal communication between two elements. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0161] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0162] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order according to the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.
[0163] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.
Claims
1. A CCDD rectifier, characterized in that, include: The first signal line is configured to connect to the first AC voltage signal; The second signal line is configured to receive a second AC voltage signal, the polarity of which is opposite to that of the first AC voltage signal. The first rectifier module includes multiple stages of first capacitors and multiple stages of first switch modules. The first terminal of each stage of the first capacitor is connected to the first signal line. Each stage of the first switch module is connected to the second terminal of the corresponding stage of the first capacitor. Each stage of the first switch module is also connected to the next stage of the first switch module. Each stage of the first switch module is configured to periodically turn on and off according to the second AC voltage signal, so that each stage of the first capacitor can periodically charge and discharge. The second rectifier module includes multiple stages of second capacitors and multiple second switch modules. The first terminal of each stage of the second capacitor is connected to the second signal line. Each stage of the second switch module is connected to the second terminal of the corresponding stage of the second capacitor. The first stage of the second switch module is connected to the last stage of the first switch module. Each stage of the second switch module is also connected to the next stage of the second switch module. Each stage of the second switch module is configured to periodically turn on and off according to the first AC voltage signal, so that each stage of the second capacitor is periodically charged and discharged.
2. The CCDD rectifier according to claim 1, characterized in that, Each stage of the first switching module includes a first transistor and a second transistor. The first terminal of the first transistor is connected to the first terminal of the second transistor and to the second terminal of the corresponding first capacitor. The second terminal of the first transistor is connected to the corresponding first switching module of the previous stage. The second terminal of the second transistor is connected to the corresponding first switching module of the next stage. The second terminal of the second transistor of the last stage of the first switching module is connected to the second switching module of the first stage.
3. The CCDD rectifier according to claim 2, characterized in that, The second terminal of the first transistor in the first stage of the first switching module is grounded.
4. The CCDD rectifier according to claim 2, characterized in that, Each stage of the first switching module includes a third capacitor, the first end of which is connected to the second signal line, and the second end of which is connected to the control electrode of the first transistor and the control electrode of the second transistor.
5. The CCDD rectifier according to claim 2, characterized in that, When the first transistor is on, the second transistor is off; when the second transistor is on, the first transistor is off.
6. The CCDD rectifier according to claim 5, characterized in that, The first transistor is an NMOS transistor, and the second transistor is a PMOS transistor, or the first transistor is a PMOS transistor and the second transistor is an NMOS transistor; the body terminal of the first transistor is connected to the gate terminal, and the body terminal of the second transistor is connected to the gate terminal.
7. The CCDD rectifier according to claim 1, characterized in that, Each stage of the second switching module includes a third transistor and a fourth transistor. The first terminal of the third transistor is connected to the first terminal of the fourth transistor and to the second terminal of the corresponding first-stage second capacitor. The second terminal of the third transistor is connected to the corresponding previous-stage second switching module. The second terminal of the fourth transistor is connected to the corresponding next-stage second switching module. The second terminal of the third transistor in the first-stage second switching module is connected to the last-stage first switching module.
8. The CCDD rectifier according to claim 7, characterized in that, The second terminal of the fourth transistor in the final stage of the second switching module is configured to provide the output voltage of the rectifier.
9. The CCDD rectifier according to claim 7, characterized in that, Each stage of the second switching module includes a fourth capacitor, the first end of each fourth capacitor is connected to the signal line, and the second end of the fourth capacitor is connected to the control electrode of the third transistor and the control electrode of the fourth transistor.
10. The CCDD rectifier according to claim 7, characterized in that, When the third transistor is on, the fourth transistor is off; when the fourth transistor is on, the third transistor is off.
11. The CCDD rectifier according to claim 10, characterized in that, The third transistor is an NMOS transistor, and the fourth transistor is a PMOS transistor, or the third transistor is a PMOS transistor and the fourth transistor is an NMOS transistor; the body terminal of the third transistor is connected to the gate terminal, and the body terminal of the fourth transistor is connected to the gate terminal.
12. The CCDD rectifier according to any one of claims 1-11, characterized in that, The rectifier further includes multiple bias modules, each bias module being connected between the second terminal of the corresponding first-stage first capacitor and the control terminal of the corresponding first-stage first switch module, and each bias module being configured to provide a bias voltage to the second terminal of the first capacitor and the control terminal of the corresponding first-stage first switch module. or Each bias module is connected between the second terminal of the corresponding first-stage second capacitor and the control terminal of the corresponding first-stage second switch module. Each bias module is configured to provide a bias voltage to the second terminal of the second capacitor and the control terminal of the corresponding first-stage second switch module.
13. The CCDD rectifier according to claim 12, characterized in that, Each of the bias modules includes a bias transistor, the first terminal of which is connected to the control terminal and to the second terminal of the corresponding first-stage first capacitor, and the second terminal of the bias transistor is connected to the control terminal of the corresponding first-stage first-switch module. or The first terminal of the bias transistor is connected to the control terminal and to the second terminal of the corresponding first-stage second capacitor. The second terminal of the bias transistor is connected to the control terminal of the corresponding first-stage second switching module.
14. The CCDD rectifier according to claim 13, characterized in that, The bias transistor is an NMOS transistor, and the body terminal and gate terminal of the bias transistor are connected.
15. The CCDD rectifier according to claim 12, characterized in that, Each of the bias modules includes a bias diode, the anode of which is connected to the second terminal of the corresponding first-stage first capacitor, and the cathode of which is connected to the control terminal of the corresponding first-stage first-switch module. or The anode of the bias diode is connected to the second terminal of the corresponding first-stage second capacitor, and the cathode of the bias diode is connected to the control terminal of the corresponding first-stage second switching module.
16. A radio frequency energy harvesting circuit, characterized in that, The radio frequency energy harvesting circuit includes: The acquisition and conversion circuit is configured to acquire radio frequency signals and convert the radio frequency signals into corresponding AC voltage signals for output. The CCDD rectifier according to any one of claims 1-15 is configured to convert the AC voltage signal output by the conversion circuit into a DC voltage signal output. A storage capacitor is configured to store the DC voltage signal output by the CCDD rectifier.
17. The radio frequency energy harvesting circuit according to claim 16, characterized in that, The acquisition and conversion circuit includes: The antenna is configured to acquire radio frequency signals and convert the radio frequency signals into corresponding single-ended voltage signals. A first matching network is configured to adjust the input impedance of the antenna to match the impedance of the CCDD rectifier; The second matching network is configured to convert the single-ended voltage signal into a corresponding double-ended differential voltage signal and provide it to the CCDD rectifier.
18. The radio frequency energy harvesting circuit according to claim 17, characterized in that, The first matching network includes a first matching capacitor, a second matching capacitor, and a matching inductor. The first end of the first matching capacitor is connected to the first end of the matching inductor and is connected to the antenna. The second end of the first matching capacitor is grounded. The second end of the matching inductor is connected to the first end of the second matching capacitor and is connected to the second matching network. The second end of the second matching capacitor is grounded.
19. A chip, characterized in that, The chip includes the CCDD rectifier according to any one of claims 1-15, or the radio frequency energy harvesting circuit according to any one of claims 16-18.
20. A communication device, characterized in that, The communication device includes the radio frequency energy harvesting circuit according to any one of claims 16-18, or the chip according to claim 19.