A new power transmission method for isolating RS-485 buses

Abstract

The invention discloses a novel power transmission method for isolating RS-485 bus, and the invention relates to the remote power supply field of low-power consumption equipment such as RS-485 sensor, including power switch, signal blocking inductor, master device RS-485 transceiver, slave device RS-485 transceiver, receiving end DCDC converter, AC coupling / DC blocking capacitor, matching resistor, FSK modulator, FSK demodulation circuit, transmission cable, 24V power supply at the master device end. The novel power transmission method for isolating RS-485 bus described in the invention can realize the coupling of power supply to the A / B signal line of RS-485 for transmission, and does not affect the normal communication of RS-485, provides a 3W power supply to the device end, and facilitates the use of some low-power remote devices. By reducing the power supply line, the power supply can be transmitted simultaneously with the RS-485 line, and the power can be controlled according to the self-recovery fuse of PTC at the load end to avoid short circuit and overload, which affects the power supply of other branches.

Description

Technical Field

[0001] The invention relates to the field of remote power supply for low-power consumption equipment such as RS-485 sensors, and in particular to a novel power transmission method for isolating an RS-485 bus. Background Art

[0002] At present, many sensors and other data acquisition interfaces are low-power and small-sized devices. Their power supply is a difficult problem. Usually, a separate power supply is required. Common power supplies are 5V, 12V, 24V, etc. It is often necessary to provide a separate power supply device for the sensor or device. If it is possible to power the device through the RS-485 interface, a power supply method similar to PoE can be realized, providing a 3W power supply capacity, which will greatly facilitate the wiring and use of the device.

[0003] Therefore, it is necessary to propose a new power transmission method for isolating RS-485 bus to solve the above problems. Summary of the invention

[0004] The main purpose of the present invention is to provide a novel power transmission method for isolating RS-485 bus, which can effectively solve the problems in the background technology.

[0005] To achieve the above object, the technical solution adopted by the present invention is:

[0006] A novel power transmission method for isolating an RS-485 bus, comprising a power switch, a signal blocking inductor, a master device RS-485 transceiver, a slave device RS-485 transceiver, a receiving end DCDC converter, an AC coupling / DC blocking capacitor, a matching resistor, an FSK modulator, an FSK demodulation circuit, a transmission cable, and a 24V power supply at the master device end. The transmission cable performs power transmission based on the RS-485 bus. The power switch is composed of a MOS tube. The 24V power supply at the master device end is electrically connected to the power switch. The power switch is electrically connected to the signal blocking inductor. The power switch connects the positive and negative poles of the 24V power supply at the master device end through the signal blocking inductor. The pole is directly added to the signal cable, the signal blocking inductor is used to separate the 24V power supply of the main device end from the signal of the transmission cable, the DCDC converter at the receiving end is used to step down the voltage transmitted by the transmission cable, and is used to convert the voltage to the working voltage required by the first power end, the FSK modulator is used to modulate the original low-speed data signal into a high-frequency FSK-expressed digital signal, the master device RS-485 transceiver and the slave device RS-485 transceiver are used to convert the signal modulated by the FSK modulator into a standard RS-485 level, and the master device RS-485 transceiver and the slave device RS-485 transceiver are electrically connected to the AC coupling / DC blocking capacitor.

[0007] Preferably, the value of the AC coupling / DC blocking capacitor is 0.1uF-1uF, the inductance of the signal blocking inductor is 50uH-100uH, and the master device RS-485 transceiver and the slave device RS-485 transceiver both transmit signals via VA-VB when receiving signals.

[0008] Preferably, the method comprises the following steps:

[0009] S1: The transmission cable based on RS-485 bus is used for power transmission. The 24V power supply at the main device end passes through the power switch composed of MOS tube and then through the signal blocking inductor. The positive and negative poles of the 24V power supply at the main device end are directly added to the signal cable. After being transmitted to the receiving end of the transmission cable, the 24V power supply and signal at the main device end are separated by the signal blocking inductor.

[0010] S2: The power supply enters the DC conversion circuit at this time, which steps down the transmitted voltage and converts it to the working voltage required by the first power end. During the transmission process, the original low-speed data signal is modulated into a high-frequency FSK digital signal by the FSK modulator, and then converted into a standard RS-485 level after passing through one of the master device RS-485 transceiver and the slave device RS-485 transceiver.

[0011] S3: After the DC component is removed through AC coupling / DC blocking capacitors, it is superimposed on the transmission cable. Since the receiving signal of the master RS-485 transceiver or the slave RS-485 transceiver is transmitted through VA-VB, as long as the power supply is isolated by the capacitor outside the master RS-485 transceiver or the slave RS-485 transceiver, it will not damage the transceiver used, nor affect the restoration of the signal.

[0012] S4: High-frequency signals will not flow back directly to the ground or crosstalk to the power supply through the inductive path. The data received by the master device RS-485 transceiver or one of the slave device RS-485 transceivers is modulated into the original low-speed digital signal through the FSK demodulation circuit. The current value transmitted through the cable depends on the load. One device is preset to be 3W. When the maximum number of devices is 8, the total power supply is 24W, and the maximum power supply current is 1A.

[0013] Preferably, in S2, the modulation method of the FSK modulator comprises the following operation steps:

[0014] S201: F1 in the signal frequency represents data 1, and F2 represents data 0, wherein F1 and F2 are close but have a frequency difference, F1 and F2 are much higher than the baud rate, the frequencies of F1 and F2 are fixed, and the frequencies of F1 and F2 are selected at 5±1MHz. Based on this, the modulated output data signal becomes an FSK modulated signal. When the frequency interval between F1 and F2 satisfies Δf=1 / 4 (data rate), the modulation index is 0.5, and the maximum spectrum utilization and anti-interference ability are achieved at this time;

[0015] S203: The modulation method of the FSK modulator peripheral circuit is implemented by using a digital open-loop counting method or a DDS method, wherein the digital open-loop counting method includes the following steps:

[0016] The FSK modulator circuit is implemented inside the FPGA. The analog phase-locked loop inside the FPGA is used to output a frequency. The reference frequency enters a counter. The value of the counter is: M+m, where the value of m is determined by the Tx input. When Tx is 0, m=0, and the value of the counter is M. When the counter overflows, the output level is flipped, and the output frequency is: Since the input frequency of the counter is unique, changing the frequency only modifies the value of the counter, and the frequency adjustment granularity is a multiple of the period of the reference frequency;

[0017] DDS includes the following steps:

[0018] If the frequency control is: f cw =0x0001, the reference frequency is: f REF =20MHz, the minimum output frequency is: The output accuracy of DDS is 305.18Hz. As long as the frequency control word f cw The value can be freely output, and the output result is phase continuous.

[0019] Preferably, in S4, the demodulation method of the FSK demodulation circuit selects a zero-crossing detection method, including the following steps:

[0020] The differential circuit of the FSK demodulation circuit is an ideal differential network composed of an operational amplifier and an RC network, so that the edge of the input square wave signal can be collected. The output result of the operational amplifier is: Adjust the values ​​of Rf and Ci to adjust the slope of the output waveform. The differential result of the square wave is a positive or negative signal, so the op amp in the differential circuit needs a positive or negative voltage supply. A simple RC circuit can be used to achieve this: the output voltage is The absolute value circuit is implemented using an operational amplifier;

[0021] The pulse width adjustment circuit is usually composed of a monostable trigger. Here, 74HC123 is used. The trigger time of the monostable is adjusted through external R and C. The trigger width of each pulse is adjusted to 50%-75% of the 5MHz cycle as needed, which is used for waveform adjustment of the post-stage filter shaping circuit.

[0022] The low-pass filter shaping circuit is a combination of an integration circuit and a Schmitt trigger circuit in terms of circuit implementation. First, a single-powered operational amplifier circuit is used to smooth multiple continuous pulses into a continuous waveform, and then a Schmitt circuit is used to perform window triggering according to the VL / VH level of TTL / CMOS, restoring the originally not very smooth signal to a standard TTL / CMOS level, thereby completing the demodulation of the FSK signal.

[0023] Compared with the prior art, the present invention provides a novel power transmission method for isolating an RS-485 bus, which has the following beneficial effects:

[0024] 1. This new power transmission method for isolating the RS-485 bus can couple the power supply to the A / B signal line of RS-485 for transmission without affecting the normal communication of RS-485. It provides a 3W power supply to the device end, which is convenient for the use of some low-power remote devices.

[0025] 2. This new power transmission method for isolating the RS-485 bus reduces the power supply lines. The power can be transmitted simultaneously with the RS-485 line. The power can be controlled according to the PTC self-recovery fuse at the load end to avoid short circuit and overload, which affects the power supply of other branches.

[0026] 3. This new power transmission method for isolating the RS-485 bus uses the FSK modulation method, which is slightly more complex than the simple ASK (OOK) circuit, but provides higher anti-interference ability and spectrum utilization, and can be transmitted over longer distances than the common ASK modulation method.

[0027] 4. This new power transmission method for isolating the RS-485 bus uses a higher DC power supply coupling, reduces the transmission current, and can transmit sufficient power while using a thinner signal line, which is convenient for the layout of the device end. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a relationship diagram between the data rate and the communication distance of the RS-485 bus of the present invention;

[0029] Figure 2 It is a waveform diagram of the reference 0 potential point of the A / B line of the RS-485 signal of the present invention;

[0030] Figure 3 It is the working principle diagram of the open-loop counting method of the present invention;

[0031] Figure 4 It is the working principle diagram of the DDS of the present invention;

[0032] Figure 5 It is a structural block diagram and waveform change diagram of the present invention for demodulating FSK signals based on the zero-crossing detection method;

[0033] Figure 6 It is an ideal differential network diagram composed of the operational amplifier and the RC network of the present invention;

[0034] Figure 7 is the RC circuit diagram of the present invention;

[0035] Figure 8 It is a diagram of the operational amplifier used in the absolute value circuit of the present invention;

[0036] Fig. 9 It is a design diagram of coupling of RS-485 signal and power supply of the present invention.

[0037] In the figure: 1. Power switch; 2. Signal blocking inductor; 3. Master device RS-485 transceiver; 4. Slave device RS-485 transceiver; 5. DCDC converter at the receiving end; 6. AC coupling / DC blocking capacitor; 7. Matching resistor; 8. FSK modulator; 9. FSK demodulation circuit; 10. Transmission cable. DETAILED DESCRIPTION

[0038] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further explained below in conjunction with specific implementation methods.

[0039] Embodiment 1:

[0040] like Fig. 9As shown, a novel power transmission method for isolating an RS-485 bus includes a power switch 1, a signal blocking inductor 2, a master device RS-485 transceiver 3, a slave device RS-485 transceiver 4, a receiving end DCDC converter (5), an AC coupling / DC blocking capacitor 6, a matching resistor 7, an FSK modulator 8, an FSK demodulation circuit 9, a transmission cable 10, and a 24V power supply at the master device end. The transmission cable 10 performs power transmission based on the RS-485 bus. The power switch 1 is composed of a MOS tube. The 24V power supply at the master device end is electrically connected to the power switch 1. The power switch 1 is electrically connected to the signal blocking inductor 2. The power switch 1 transmits the 24V power at the master device end through the signal blocking inductor 2. The positive and negative electrodes of the source are directly added to the signal cable 10, the signal blocking inductor 2 is used to separate the 24V power supply at the master device end from the signal of the transmission cable 10, the DCDC converter 5 at the receiving end is used to step down the voltage transmitted by the transmission cable 10, and is used to convert the voltage to the working voltage required by the first power end, the FSK modulator 8 is used to modulate the original low-speed data signal into a high-frequency FSK-expressed digital signal, the master device RS-485 transceiver 3 and the slave device RS-485 transceiver 4 are used to convert the signal modulated by the FSK modulator 8 into a standard RS-485 level, and the master device RS-485 transceiver 3 and the slave device RS-485 transceiver 4 are electrically connected to the AC coupling / DC blocking capacitor 6;

[0041] The value of the AC coupling / DC blocking capacitor 6 is 0.1uF-1uF, the inductance of the signal blocking inductor 2 is 50uH-100uH, and the master device RS-485 transceiver 3 and the slave device RS-485 transceiver 4 both transmit signals via VA-VB when receiving signals.

[0042] A novel power transmission method for isolating an RS-485 bus includes the following steps:

[0043] S1: The transmission cable 10 based on the RS-485 bus is used for power transmission. The 24V power supply at the main device end passes through the power switch 1 composed of a MOS tube and then passes through the signal blocking inductor 2. The positive and negative electrodes of the 24V power supply at the main device end are directly added to the signal cable 10. After being transmitted to the power receiving end of the transmission cable 10, the 24V power supply at the main device end and the signal are separated by the signal blocking inductor 2.

[0044] S2: The power supply enters the DC conversion circuit 5 at this time, and the transmitted voltage is stepped down and converted to the working voltage required by the first power end. During the transmission process, the original low-speed data signal is modulated into a high-frequency FSK digital signal by the FSK modulator 8, and then converted into a standard RS-485 level after passing through one of the master device RS-485 transceiver 3 and the slave device RS-485 transceiver 4;

[0045] The modulation method of the FSK modulator 8 comprises the following steps:

[0046] S201: F1 in the signal frequency represents data 1, and F2 represents data 0, wherein F1 and F2 are close but have a frequency difference, F1 and F2 are much higher than the baud rate, the frequencies of F1 and F2 are fixed, and the frequencies of F1 and F2 are selected at 5±1MHz. Based on this, the modulated output data signal becomes an FSK modulated signal. When the frequency interval between F1 and F2 satisfies Δf=1 / 4 (data rate), the modulation index is 0.5, and the maximum spectrum utilization and anti-interference ability are achieved at this time;

[0047] S203: The modulation method of the peripheral circuit of the FSK modulator 8 is implemented by using a digital open-loop counting method or a DDS, wherein the digital open-loop counting method includes the following steps:

[0048] The circuit of FSK modulator 8 is implemented inside FPGA, and uses the analog phase-locked loop inside FPGA to output a frequency. The reference frequency enters a counter, and the value of the counter is: M+m, where the value of m is determined by the Tx input. When Tx is 0, m=0, and the value of the counter is M. When the counter overflows, the output level is flipped, and the output frequency is: Since the input frequency of the counter is unique, changing the frequency only modifies the value of the counter, and the frequency adjustment granularity is a multiple of the period of the reference frequency;

[0049] DDS includes the following steps:

[0050] If the frequency control is: f cw =0x0001, the reference frequency is: f REF =20MHz, the minimum output frequency is: The output accuracy of DDS is 305.18Hz. As long as the frequency control word f cw The value can be freely output, and the output result is phase continuous;

[0051] S3: After the DC component is removed by the AC coupling / DC blocking capacitor 6, it is superimposed on the transmission cable 10. Since the receiving signal of one of the master device RS-485 transceiver 3 and the slave device RS-485 transceiver 4 is transmitted through VA-VB, as long as the power supply is isolated by the capacitor outside one of the master device RS-485 transceiver 3 and the slave device RS-485 transceiver 4, it will not cause damage to the transceiver used, nor affect the restoration of the signal;

[0052] S4: High-frequency signals will not flow back directly to the ground or crosstalk to the power supply through the inductor path. The data received by the master device RS-485 transceiver 3 and the slave device RS-485 transceiver 4 is modulated into the original low-speed digital signal through the FSK demodulation circuit 9. The current value transmitted through the cable depends on the load. One device is preset to be 3W. When the maximum number of devices is 8, the total power supply is 24W, and the maximum power supply current is 1A.

[0053] The demodulation method of the FSK demodulation circuit 9 uses a zero-crossing detection method, including the following steps:

[0054] The differential circuit of the FSK demodulation circuit 9 is an ideal differential network composed of an operational amplifier and an RC network, so that the edge of the input square wave signal is collected. The output result of the operational amplifier is: Adjust the values ​​of Rf and Ci to adjust the slope of the output waveform. The differential result of the square wave is a positive or negative signal, so the op amp in the differential circuit needs a positive or negative voltage supply. A simple RC circuit can be used to achieve this: the output voltage is The absolute value circuit is implemented using an operational amplifier;

[0055] The pulse width adjustment circuit is usually composed of a monostable trigger. Here, 74HC123 is used. The trigger time of the monostable is adjusted through external R and C. The trigger width of each pulse is adjusted to 50%-75% of the 5MHz cycle as needed, which is used for waveform adjustment of the post-stage filter shaping circuit.

[0056] The low-pass filter shaping circuit is a combination of an integration circuit and a Schmitt trigger circuit in terms of circuit implementation. First, a single-powered operational amplifier circuit is used to smooth multiple continuous pulses into a continuous waveform, and then a Schmitt circuit is used to perform window triggering according to the VL / VH level of TTL / CMOS, restoring the originally not very smooth signal to a standard TTL / CMOS level, thereby completing the demodulation of the FSK signal.

[0057] Embodiment 2:

[0058] The digital signal transmitted on the A / B line of the conventional RS-485 bus has a common mode voltage of -7 to +12V, and the minimum signal voltage difference between the A / B lines is 200mV. Under normal circumstances, in order to ensure the communication distance and data reliability, the RS-485 bus rate is less than 120Kbps, and the communication distance can reach 1200 meters. Figure 1 This is the relationship between the data rate and communication distance of the RS-485 bus. From 1, we can see that a rate of about 5Mbps is a rate that takes both the rate and distance into consideration after coupling the power supply. The copper loss generated by the cable with a transmission distance that is too long is not conducive to the transmission of power.

[0059] Since the low-speed RS-485 signal contains too much DC component, and since the transmitted data is not scrambled, it cannot be guaranteed that the weight of 0 and 1 in the transmitted data is 5 / 5. This brings a problem. Even if the baud rate is high, the DC component may increase due to continuous 0 and continuous 1. The increase in DC component will affect the coupling / separation of power supply and signal. Figure 2 It is the waveform of the reference 0 potential point of the A / B line of the RS-485 signal. With reference to this waveform, the transmitted data is scrambled so that the weight of the 1 / 0 waveform is guaranteed to be 5 / 5 under any circumstances. At the same time, the baud rate is greatly improved, making the waveform close to an AC sine wave. By utilizing the AC and DC characteristics of capacitors and inductors, the power supply and signal can be combined for transmission.

[0060] The scrambling algorithm for preprocessing data is complex and requires synchronization of the scrambled data. The data cannot be decoded, which is difficult to achieve in general microprocessors. The common method is to use data to modulate the amplitude of a higher frequency sine wave and then send it (OOK method). However, as mentioned above, the transmission distance of RS-485 signals will decay linearly with the increase of baud rate. The reason is that the voltage difference amplitude of the A / B line of the signal cannot be less than 200mV. The OOK modulated signal is more sensitive to amplitude and the transmission distance will be further reduced. The new method is to use frequency modulation, that is, F1 represents data 1 and F2 represents data 2. Data 0 is shown, F1 and F2 are close but have a frequency difference, F1 and F2 are much higher than the baud rate, the frequencies of F1 and F2 are fixed, which is convenient for data modulation and demodulation in the sending and receiving circuits, and the frequencies of F1 and F2 are selected at 5±1MHz. The modulated output data signal becomes an FSK modulated signal. The advantage of FSK modulation is that the signal amplitude remains unchanged, and it has stronger anti-interference ability than the common ASK (OOK method); when the frequency interval between F1 and F2 satisfies Δf=1 / 4 (data rate), the modulation index is 0.5, which is called MSK, the minimum keying frequency shift, which can achieve maximum spectrum utilization and anti-interference ability.

[0061] Embodiment three:

[0062] There are many ways to implement FSK and MSK modulation circuits, but frequency modulation is usually more complicated than amplitude modulation. At present, the integration is relatively high, and the peripheral circuit is relatively simple. It is implemented by using FPGA to use digital open-loop counting method or DDS core. The open-loop counting method:

[0063] This circuit is implemented inside the FPGA and uses the analog phase-locked loop inside the FPGA to output a higher frequency, such as Figure 3The reference frequency enters a counter, and the value of the counter is: M+m (the value of m is determined by the Tx input. When Tx is 0, m=0, and the value of the counter is M). When the counter overflows, the output level is flipped, and the output frequency is: Taking the target frequency of 5MHz as an example, when M=50, m=0, the output is 5MHz. When m=1, the output is 4.902MHz. At this time, Δf=98KHz. Since the input frequency of the counter is unique, changing the frequency only modifies the value of the counter. The frequency adjustment granularity is a multiple of the period of the reference frequency. The FSK signal output in this way is phase continuous, but in order to accurately control the modulation degree, the reference frequency needs to be further increased.

[0064] like Figure 4 As shown in the figure, the DDS method is used to implement FSK / MSK:

[0065] A complete sine wave is not required here, and a square wave can be output. Phase modulation is not required. To change the output waveform, just change the waveform table from a sine wave to a square wave. The square wave is only 0 and 1 in data, so even a 32-bit precision waveform table only stores two values ​​0 and 1. The 32-bit precision can be transformed into an address table, that is, the address is used to determine whether the output should be 0 or 1. Only a 16-bit address is needed here to obtain a very high resolution. In the address, 0x0000-0x7FFF is 1, 0x8000 to 0xFFFF is 0, and the frequency control word is also 16 bits.

[0066] If the frequency control is: f cw =0x0001, the reference frequency is: f REF =20MHz, the minimum output frequency is: The output accuracy of DDS is 305.18Hz. As long as the frequency control word f cw The value can be freely output, and the output result is phase-continuous. Taking the reference frequency of 20MHz as an example, if you want to output a frequency of 5MHz, you only need to change the frequency control word to 0x4000, according to the rate of 5.2Kbps, MSK modulation calculation, Δf=28800Hz, calculated according to the DDS reference frequency of 20MHz, the frequency control word only needs to be switched between 0x4000 and 0x404D. Therefore, the streamlined DDS is very simple and convenient in implementation, structural complexity, reference frequency requirements, output accuracy and control method, and can even be implemented with CPLD.

[0067] FSK demodulation circuit: There are many ways to demodulate FSK signals, the most common of which are direct detection method: this method uses a bandpass filter with a wide enough bandwidth to remove other frequency interference, and then multiplies the filtered signal with two reference signals of different frequencies to obtain two discrete amplitude modulated signals, and then uses a low-pass filter to remove the amplitude modulation part to finally obtain the demodulated signal; frequency identification method: this demodulation method includes direct frequency identification method and two-step frequency identification method. The direct frequency identification method uses a narrowband filter to filter out signals of non-target frequencies, and then performs rectification and smoothing filtering to obtain a DC signal with an amplitude of the target frequency. The two-step frequency identification method first performs envelope detection, and then performs smoothing filtering and frequency judgment; receiving filtering method: this method uses a broadband filter to filter out all signals, and then passes the filtered signal through two narrowband filters. The device separates the two frequency modulated signals, and further processes these separated signals, such as rectification and smoothing filtering, to obtain the demodulated signal; Envelope detection method: This method uses a linear envelope detector and a low-pass filter to replace the multiplier and low-pass filter in coherent demodulation, and completes the demodulation by comparison and judgment; Zero-crossing detection method: This method identifies different frequencies by detecting the zero-crossing point of the signal. These methods have their own advantages and disadvantages and are suitable for different application scenarios. For example, the direct detection method is simple and direct and does not require special hardware; while the frequency identification method and the receiving filtering method require more complex processing steps. Since the output signal of the RS-485 transceiver is a well-shaped square wave FSK signal that meets the TTL / CMOS level, the zero-crossing detection method is the simplest to demodulate the FSK signal structure and circuit. The block diagram and waveform changes are shown in the figure. Figure 5 As shown;

[0068] Figure 5 The differential circuit in Figure 6 The ideal differential network composed of the simple operational amplifier and RC network shown above allows the edge of the input square wave signal to be sampled. The output result of the operational amplifier is: By adjusting the values ​​of Rf and Ci, the slope of the output waveform can be adjusted. The differential result of the square wave is a positive or negative signal, so the op amp in the differential circuit needs to be powered by positive or negative voltages. It can also be achieved with a simple RC circuit, such as Figure 7 As shown, the output voltage is:

[0069] Absolute value circuits are usually implemented using op amps, such as Figure 8 As shown, because the first-stage op amp separates the positive and negative half cycles of the signal through two diodes, and the second-stage op amp subtracts the two signals, the positive half axis signal minus the negative half cycle signal is equivalent to flipping the negative half cycle signal to the positive half cycle, thereby realizing the absolute value circuit. Here, since the signal frequency is as high as 5MHz, it is recommended to use Schottky diodes;

[0070] The pulse width adjustment circuit is usually composed of a monostable trigger, such as the common 74HC123. The trigger time of the monostable can be adjusted through external R and C. The trigger width of each pulse can be adjusted to 50% to 75% of the 5MHz cycle as needed, which is convenient for the waveform adjustment of the post-stage filter shaping circuit;

[0071] The low-pass filter shaping circuit is a combination of an integration circuit and a Schmitt trigger circuit in terms of circuit implementation. First, a single-powered operational amplifier circuit is used to smooth multiple continuous pulses into a continuous waveform, and then a Schmitt circuit is used to perform a window trigger according to the VL / VH level of TTL / CMOS to restore the originally not very smooth signal to a standard TTL / CMOS level, thereby completing the demodulation of the FSK signal.

[0072] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It should be understood by those skilled in the art that the present invention is not limited to the above embodiments. The above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention to be protected. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A novel power transmission method for isolating an RS-485 bus, comprising a power switch (1), a signal blocking inductor (2), a master device RS-485 transceiver (3), a slave device RS-485 transceiver (4), a receiving end DCDC converter (5), an AC coupling / DC blocking capacitor (6), a matching resistor (7), an FSK modulator (8), an FSK demodulation circuit (9), a transmission cable (10), and a 24V power supply at the master device end, characterized in that: The transmission cable (10) performs power transmission based on the RS-485 bus. The power switch (1) is composed of a MOS tube. The 24V power supply at the main device end is electrically connected to the power switch (1). The power switch (1) is electrically connected to a signal blocking inductor (2). The power switch (1) directly adds the positive and negative electrodes of the 24V power supply at the main device end to the signal cable (10) through the signal blocking inductor (2). The signal blocking inductor (2) is used to separate the 24V power supply at the main device end from the signal of the transmission cable (10). The DCDC converter (5) at the power receiving end The device is used to step down the voltage transmitted by the transmission cable (10) and to convert the voltage to the working voltage required by the first power end. The FSK modulator (8) is used to modulate the original low-speed data signal into a high-frequency FSK-expressed digital signal. The master device RS-485 transceiver (3) and the slave device RS-485 transceiver (4) are used to convert the signal modulated by the FSK modulator (8) into a standard RS-485 level. The master device RS-485 transceiver (3) and the slave device RS-485 transceiver (4) are electrically connected to an AC coupling / DC blocking capacitor (6).

2. A novel power transmission method for isolating an RS-485 bus according to claim 1, characterized in that: The value of the AC coupling / DC blocking capacitor (6) is 0.1uF-1uF, the inductance of the signal blocking inductor (2) is 50uH-100uH, and the master device RS-485 transceiver (3) and the slave device RS-485 transceiver (4) both implement signal transmission through VA-VB when receiving signals.

3. A novel power transmission method for isolating an RS-485 bus according to claim 2, characterized in that: The steps include: S1: The transmission cable (10) based on the RS-485 bus is used for power transmission. The 24V power supply at the main device end passes through the power switch (1) composed of a MOS tube and then passes through the signal blocking inductor (2). The positive and negative electrodes of the 24V power supply at the main device end are directly added to the signal cable (10). After being transmitted to the power receiving end of the transmission cable (10), the 24V power supply at the main device end and the signal are separated by the signal blocking inductor (2); S2: The power supply enters the DC conversion circuit (5) at this time, and the transmitted voltage is stepped down and converted to the working voltage required by the first power end. During the transmission process, the original low-speed data signal is modulated by the FSK modulator (8) into a high-frequency FSK digital signal, and then converted into a standard RS-485 level after passing through one of the master device RS-485 transceiver (3) and the slave device RS-485 transceiver (4); S3: After the DC component is removed by the AC coupling / DC blocking capacitor (6), it is superimposed on the transmission cable (10). Since the signal received by one of the master device RS-485 transceiver (3) and the slave device RS-485 transceiver (4) is transmitted via VA-VB, as long as the power supply is isolated by the capacitor outside one of the master device RS-485 transceiver (3) and the slave device RS-485 transceiver (4), it will not cause damage to the transceiver used, nor will it affect the restoration of the signal. S4: High-frequency signals will not flow back directly to the ground or crosstalk to the power supply through the inductive path. The data received by the master device RS-485 transceiver (3) or one of the slave device RS-485 transceivers (4) is modulated into the original low-speed digital signal through the FSK demodulation circuit (9). The current value transmitted through the cable depends on the load. One device is preset to be 3W. When the maximum number of devices is 8, the total power supply is 24W, and the maximum power supply current is 1A.

4. A novel power transmission method for isolating an RS-485 bus according to claim 3, characterized in that: In S2, the modulation method of the FSK modulator (8) comprises the following operation steps: S201: F1 in the signal frequency represents data 1, and F2 represents data 0, wherein F1 and F2 are close but have a frequency difference, F1 and F2 are much higher than the baud rate, the frequencies of F1 and F2 are fixed, and the frequencies of F1 and F2 are selected at 5±1MHz. Based on this, the modulated output data signal becomes an FSK modulated signal. When the frequency interval between F1 and F2 satisfies Δf=1 / 4 (data rate), the modulation index is 0.5, and the maximum spectrum utilization and anti-interference ability are achieved at this time; S203: The modulation method of the FSK modulator (8) peripheral circuit is implemented by selecting a digital open-loop counting method or a DDS method, wherein the digital open-loop counting method includes the following steps: The circuit of the FSK modulator (8) is implemented inside the FPGA, and uses the analog phase-locked loop inside the FPGA to output a frequency. The reference frequency enters a counter, and the value of the counter is: M+m, where the value of m is determined by the Tx input. When Tx is 0, m=0, and the value of the counter is M. When the counter overflows, the output level is flipped, and the output frequency is: Since the input frequency of the counter is unique, changing the frequency only modifies the value of the counter, and the frequency adjustment granularity is a multiple of the period of the reference frequency; DDS includes the following steps: If the frequency control is: f cw =0x0001, the reference frequency is: f REF =20MHz, the minimum output frequency is: The output accuracy of DDS is 305.18Hz. As long as the frequency control word f cw The value of can freely control the output result, and the output result is phase continuous.

5. A novel power transmission method for isolating RS-485 bus according to claim 3, characterized in that: In S4, the demodulation method of the FSK demodulation circuit (9) is a zero-crossing detection method, which includes the following steps: The differential circuit of the FSK demodulation circuit (9) is converted into an ideal differential network composed of an operational amplifier and an RC network, so that the edge of the input square wave signal can be sampled. The output result of the operational amplifier is: Adjust the values ​​of Rf and Ci to adjust the slope of the output waveform. The differential result of the square wave is a positive or negative signal, so the op amp in the differential circuit needs a positive or negative voltage supply. A simple RC circuit can be used to achieve this: the output voltage is The absolute value circuit is implemented using an operational amplifier; The pulse width adjustment circuit is usually composed of a monostable trigger. Here, 74HC123 is used. The trigger time of the monostable is adjusted through external R and C. The trigger width of each pulse is adjusted to 50%-75% of the 5MHz cycle as needed, which is used for waveform adjustment of the post-stage filter shaping circuit. The low-pass filter shaping circuit is a combination of an integration circuit and a Schmitt trigger circuit in terms of circuit implementation. First, a single-powered operational amplifier circuit is used to smooth multiple continuous pulses into a continuous waveform, and then a Schmitt circuit is used to perform window triggering according to the VL / VH level of TTL / CMOS, restoring the originally not very smooth signal to a standard TTL / CMOS level, thereby completing the demodulation of the FSK signal.

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