A regression test auxiliary debugging method, device and medium based on hierarchical clustering algorithm

By applying a hierarchical clustering algorithm in chip design, the error information in regression tests is sorted and classified, and the problem of verification personnel being large-scale and prone to missed in regression tests is solved, achieving more efficient debugging and problem investigation.

CN119782127APending Publication Date: 2025-04-08SHANDONG SINOCHIP SEMICON CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411823691.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-12
Publication Date
2025-04-08

AI Technical Summary

Technical Problem

In complex chip design, the log file and statistical environment errors need to be frequently checked during the regression testing process, resulting in large workloads for verification personnel and easy to miss problems.

Method used

The method based on hierarchical clustering algorithm is adopted to extract error information in the log, and classify and classify it through hierarchical clustering algorithm, reducing the amount of information that verification personnel need to check and automatically output error information.

Benefits of technology

It effectively reduces the time for verification engineers to extract error fields in data comparison and in regression tests, reduces labor consumption, improves debug speed and work efficiency, and ensures the integrity of problem investigation.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119782127A_ABST
    Figure CN119782127A_ABST
Patent Text Reader

Abstract

The present invention relates to the field of chips, and specifically to a regression test fault debugging method, device and medium based on a hierarchical clustering algorithm. The present invention supports setting a time to check regression test results, statistics regression log error information, and supports setting a time to open the waveform to be debugged in advance. Error information classification is performed based on a hierarchical clustering algorithm. Assuming that there are n error messages, the n error messages are regarded as n samples to be clustered, and the similarity between each sample is calculated. The cluster samples with the closest similarity are classified into one category, and the process is repeated until the n cluster samples are classified. The present invention can effectively reduce the time for verification engineers to compare data and extract error fields during the verification process, can count all error situations, and can prepare waveforms in advance according to the set time, thereby reducing the time consumption of engineers' working time, effectively improving the debugging speed, and improving work efficiency.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of chip design, and in particular to a regression test auxiliary debug method, device and medium based on a hierarchical clustering algorithm. Background Art

[0002] Nowadays, chips are highly complex and the functional design of chip modules is complex. There are also many test cases developed for functional point verification. In the process of test case development, bugs in the RTL code can be continuously discovered and fixed. New bugs may arise after the repairs. It is necessary to perform regression testing of the developed test cases while continuously developing test cases, and to continuously perform regression testing after all test cases are developed. Running regression tests does not consume a lot of manpower, but once a problem occurs, it is necessary to check the log file and count the environmental errors. Regression testing is mostly scheduled at night and then checked during the day. In the early stage of regression, whether it is an environmental problem or an RTL code bug, there are more errors in the early stage, and a lot of manpower is required to troubleshoot the problem. Summary of the invention

[0003] In view of the defects of the prior art, the present invention provides a regression test auxiliary debugging method, device and medium based on a hierarchical clustering algorithm, which performs statistical classification of error information based on the hierarchical clustering algorithm, so that verification engineers can quickly check the problem classification, reduce the workload of verification personnel in regression testing, and ensure that no problems are missed.

[0004] In order to solve the technical problem, the technical solution adopted by the present invention is: a regression test auxiliary debugging method based on a hierarchical clustering algorithm, comprising the following steps: S01. Extract the error information in the log; S02, classifying the extracted error information based on the hierarchical clustering algorithm, assuming that there are n error information, the n error information are regarded as n samples to be clustered, the similarity between each sample to be clustered is calculated, and the samples to be clustered with the closest similarity are classified into one category, and the process is repeated until the n samples to be clustered are classified; S03, extracting the set parameters from the small clusters classified by the hierarchical clustering algorithm, and listing the bit intervals of inconsistent parameters in the small clusters; S04, outputting the classified error information to a designated file; S05. Set the time for re-running the test case with an error according to the structure of the regression test. After the set time is reached, re-run the test case with an error and dump the waveform.

[0005] Furthermore, in step S02, a top-down hierarchical clustering algorithm is used to classify error messages with high similarity. Assuming that there are n error messages, the n error messages are regarded as n samples to be clustered. The n samples to be clustered are 1 large cluster. Each sample to be clustered contains different parameter information. The cosine similarity is used to calculate the similarity between the error messages. The closer the cosine value is to 1, the more similar the two vectors are, and the closer the cosine value is to 0, the less similar the two vectors are. The samples to be clustered with the closest similarity are classified into one category, and the process is repeated until the n samples to be clustered are classified.

[0006] Furthermore, the error information of each sample to be clustered includes four parameters: valid, address, data, and strobe. If a parameter output by the reference model is inconsistent with a parameter output by the design to be tested, the marking vector is 1, and if they are consistent, the marking vector is 0. Two samples are taken in turn to calculate the similarity until all samples are classified.

[0007] Furthermore, the method supports setting a time for checking the regression test results and configuring the checking time. When the regression test reaches the configured checking time, the method automatically performs the regression result checking.

[0008] Furthermore, in step S05, the .rc file to be opened is prepared in advance, and after the set time is reached, the .rc file is directly opened.

[0009] Furthermore, the number of opened .rc files is 1 or more.

[0010] The present invention also discloses a regression test assisted debugging device based on a hierarchical clustering algorithm, comprising a processor and a memory storing program instructions, wherein the processor is configured to execute the regression test assisted debugging method based on a hierarchical clustering algorithm as described above when running the program instructions.

[0011] The present invention also discloses a storage medium storing program instructions, which, when running, execute the regression test auxiliary debugging method based on the hierarchical clustering algorithm as described above.

[0012] The beneficial effects of the present invention are as follows: the present method can effectively reduce the time for verification engineers to compare data and extract error fields during the verification process, can count all error situations, and can prepare waveforms in advance according to the set time, thereby reducing the time consumption of engineers' working time, effectively improving the debugging speed, and improving work efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic diagram for checking the regression results according to the set time; Figure 2 Flowchart for checking regression results. DETAILED DESCRIPTION

[0014] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0015] Example 1 The present embodiment discloses a regression test assisted debugging method based on a hierarchical clustering algorithm. To facilitate the troubleshooting of chip regression test results, the method supports setting a time to check regression test results, statistical regression log error information, and supports setting a time to open the waveform to be debugged in advance.

[0016] First, it supports setting time to check regression test results.

[0017] Since the regression time is long and when the regression test is performed at night, the verification engineer will always debug during working hours, so this method supports setting the time to check the regression results, such as Figure 1 As shown, after the inspection time is configured, the simulation reaches the configured system inspection time, and the system can directly inspect and screen the regression results, saving the time for screening during work.

[0018] Secondly, the error information is counted based on the hierarchical clustering algorithm.

[0019] Nowadays, many signals have large bit widths and correspond to many fields (field refers to the bit interval of the register). When checking, engineers need to compare each field to check which fields have problems and then debug. Comparing the fields according to the spec will take a certain amount of time and may result in comparison errors, resulting in a waste of debugging time. This function supports counting error information and classifying the error information, effectively reducing the field alignment time and accelerating the location of problems, such as Figure 2 As shown. Secondly, the process of statistical error information based on the hierarchical clustering algorithm is as follows: S01. Extract error information from the log.

[0020] S02. Classify the extracted error information based on the hierarchical clustering algorithm. Assuming there are n error messages, regard the n error messages as n samples to be clustered, calculate the similarity between each sample to be clustered, classify the samples to be clustered with the closest similarity into one category, and repeat until the n samples to be clustered are classified.

[0021] Hierarchical clustering is a clustering method that gradually merges (or splits) data into multiple levels. It is usually divided into two types: bottom-up (agglomerated) and top-down (divisive). In the bottom-up method, each data point is initially considered as a separate cluster, and then the distances between clusters are calculated until all data points are in one cluster. The top-down method starts with a large cluster and gradually splits it into smaller clusters based on some criteria.

[0022] In this embodiment, a top-down hierarchical clustering algorithm is used to classify error information with high similarity. Assuming that there are n error messages, the n error messages are regarded as n samples to be clustered, and the n samples to be clustered are 1 large cluster. Each sample to be clustered contains different parameter information. The cosine similarity is used to calculate the similarity between the error messages. In space, the cosine value of the angle between two vectors is used as a measure of the difference between the two clustering specimens. The closer the cosine value is to 1, the closer the angle is to 0, indicating that the two vectors are more similar. The closer the cosine value is to 0, the closer the angle is to 90, indicating that the two vectors are more dissimilar. The samples to be clustered with the closest similarity are classified into one category, and the process is repeated until the n samples to be clustered are classified.

[0023] The calculation formula for cosine distance is: , in are two samples to be clustered, and n is the total number of samples to be clustered.

[0024] For example, there are n samples to be clustered, and the error information of each sample to be clustered includes four parameters: valid, address, data, and strobe. Valid means valid, address refers to the address, data refers to the data, and strobe refers to the valid byte of data (i.e., transmission data) (8 bits are 1 byte); the overall meaning is that when valid is 1 (i.e., valid), the valid byte specified by data is written to the specified address. If a parameter output by the reference model is inconsistent with a parameter output by the design to be tested, the marker vector is 1, and if they are consistent, the marker vector is 0. Take two samples to calculate the similarity, namely sample 1 and sample 2. If the reference model in sample 1 has only the parameter address inconsistent with dut, then the sample 1 vector a={0, 1, 0, 0}, and sample 2 has only the strobe inconsistent, then the sample 2 vector b={0, 0, 0, 1}, then: .

[0025] Therefore, the similarity between sample 1 and sample 2 is 0, and they are divided into two categories. All samples are classified in turn.

[0026] S03. Supports distinguishing and comparing certain set parameters according to the specified bit interval. The specific method is to extract the set parameters from the small clusters classified by the hierarchical clustering algorithm, and list the inconsistent bit intervals of the parameters in the small clusters, so as to facilitate the verification engineer to locate the function points.

[0027] S04. Output the classified error information to a designated file.

[0028] This method supports the controllable opening of waveform files and the opening of dump waveform signals.

[0029] Since regression testing takes a long time, generally regression testing will not dump waveforms, which will affect the speed of simulation and occupy a large amount of memory resources. Therefore, when debugging, the test cases with errors need to be rerun to dump waveforms. This solution can rerun the test cases with errors according to the regression results and the set time, and dump waveforms. There is no need for verification engineers to rerun the test cases with errors, and there is no need to wait for the test cases to be rerun. Verification engineers need to prepare the .rc (i.e., the signal path file saved in advance) files that need to be opened in advance. After the set time is reached, this function can directly keep the .rc files open.

[0030] You can control the opening of multiple waveform files. By default, one waveform is opened. You can configure the number of waveforms to open and open multiple waveform files for parallel debugging.

[0031] Example 2 The embodiment of the present disclosure provides a regression test assisted debug device based on a hierarchical clustering algorithm, including a processor and a memory. Optionally, the device may also include a communication interface and a bus. The processor, the communication interface, and the memory may communicate with each other through the bus. The communication interface may be used for information transmission. The processor may call the logic instructions in the memory to execute the regression test assisted debug method based on the hierarchical clustering algorithm of the above embodiment.

[0032] In addition, the logic instructions in the above-mentioned memory can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product.

[0033] The memory, as a computer-readable storage medium, can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the method in the embodiment of the present disclosure. The processor executes the function application and data processing by running the program instructions / modules stored in the memory, that is, the regression test auxiliary debug method based on the hierarchical clustering algorithm in the above embodiment is implemented.

[0034] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory may include a high-speed random access memory and may also include a non-volatile memory.

[0035] Example 3 An embodiment of the present disclosure provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to execute the above-mentioned regression test auxiliary debugging method based on the hierarchical clustering algorithm.

[0036] The computer-readable storage medium mentioned above may be a transient computer-readable storage medium or a non-transitory computer-readable storage medium.

[0037] The technical solution of the embodiment of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiment of the present disclosure. The aforementioned storage medium may be a non-transient storage medium, including: a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a disk or an optical disk, and other media that can store program codes, or a transient storage medium.

[0038] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent only possible changes. Unless explicitly required, separate components and functions are optional, and the order of operation may vary. The parts and features of some embodiments may be included in or replace the parts and features of other embodiments. Moreover, the words used in this application are only used to describe the embodiments and are not used to limit the scope of protection. As used in the description in the text, unless the context clearly indicates, the singular forms of "a", "an" and "the" are intended to include plural forms as well. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of one or more associated listings. In addition, when used in this application, the term "comprise" and its variants "comprises" and / or comprising refer to the presence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof. In the absence of further restrictions, the elements defined by the sentence "including one..." do not exclude the presence of other identical elements in the process, method or device including the elements. In this article, each embodiment may focus on the differences from other embodiments, and the same and similar parts between the embodiments may refer to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can refer to the description of the method part.

[0039] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software may depend on the specific application and design constraints of the technical solution. The technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the embodiments of the present disclosure. The technicians may clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.

Claims

1. A regression test assisted debugging method based on a hierarchical clustering algorithm, characterized in that: The following steps are involved: S01. Extract the error information in the log; S02, classifying the extracted error information based on the hierarchical clustering algorithm, assuming that there are n error information, the n error information are regarded as n samples to be clustered, the similarity between each sample to be clustered is calculated, and the samples to be clustered with the closest similarity are classified into one category, and the process is repeated until the n samples to be clustered are classified; S03, extracting the set parameters from the small clusters classified by the hierarchical clustering algorithm, and listing the bit intervals of inconsistent parameters in the small clusters; S04, outputting the classified error information to a designated file; S05. Set the time for re-running the test case with an error according to the structure of the regression test. After the set time is reached, re-run the test case with an error and dump the waveform.

2. The regression test auxiliary debugging method based on hierarchical clustering algorithm according to claim 1 is characterized in that: In step S02, a top-down hierarchical clustering algorithm is used to classify error messages with high similarity. Assuming there are n error messages, the n error messages are regarded as n samples to be clustered. The n samples to be clustered are 1 large cluster. Each sample to be clustered contains different parameter information. The cosine similarity is used to calculate the similarity between the error messages. The closer the cosine value is to 1, the more similar the two vectors are, and the closer the cosine value is to 0, the less similar the two vectors are. The samples to be clustered with the closest similarity are classified into one category, and the process is repeated until the n samples to be clustered are classified.

3. The regression test auxiliary debugging method based on hierarchical clustering algorithm according to claim 2 is characterized in that: The error information of each sample to be clustered includes four parameters: valid, address, data, and strobe. If a parameter output by the reference model is inconsistent with a parameter output by the design to be tested, the marking vector is 1, and if they are consistent, the marking vector is 0. Two samples are taken in turn to calculate the similarity until all samples are classified.

4. The regression test auxiliary debugging method based on hierarchical clustering algorithm according to claim 1 is characterized in that: This method supports setting a time to check the regression test results and configuring the check time. When the regression test reaches the configured check time, this method automatically performs the regression result check.

5. The regression test auxiliary debugging method based on hierarchical clustering algorithm according to claim 1, characterized in that: In step S05, the .rc file to be opened is prepared in advance, and when the set time is reached, the .rc file is directly opened.

6. The regression test auxiliary debugging method based on hierarchical clustering algorithm according to claim 5 is characterized in that: The number of opened .rc files is 1 or more.

7. A regression test auxiliary debug device based on a hierarchical clustering algorithm, comprising a processor and a memory storing program instructions, characterized in that: The processor is configured to execute the regression test assisted debugging method based on the hierarchical clustering algorithm as described in any one of claims 1 to 6 when running the program instructions.

8. A storage medium storing program instructions, characterized in that: When the program instructions are run, they execute the regression test auxiliary debugging method based on the hierarchical clustering algorithm as described in any one of claims 1 to 6.