Pytorch transplanting method based on domestic Shenwei processor

Abstract

The invention relates to the technical field of artificial intelligence, in particular to a pytorch transplanting method based on a domestic Shenwei processor, which comprises the following steps of: configuring an architecture adaptation layer swMath between a pytorch framework and the Shenwei processor to realize one-to-one mapping between a plurality of adaptation interfaces and pytorch operators of the pytorch framework; identifying a high-performance computing library in the pytorch framework, realizing the high-performance computing library and optimizing the high-performance computing library based on a Shenwei processor to obtain the optimized high-performance computing library, integrating the optimized high-performance computing library into a unified dynamic link library, and linking the unified dynamic link library with a libtorch.so library of the pytorch framework; and compiling C / C + + library file codes by using cross compilers sw-gcc and sw-g + + aiming at the Shenwei processor on the X86 platform, generating an executable file of the Shenwei processor, and running the executable file on the Shenwei processor. By means of the method and device, efficient operation of the pytorch framework on the Shenwei processor is achieved, and the calculation efficiency and performance of a deep learning task are improved.

Description

Technical Field

[0001] The present application relates to the field of artificial intelligence technology, and in particular to a pytorch transplantation method based on a domestically produced Shenwei processor. Background Art

[0002] With the rapid development of artificial intelligence technology, deep learning frameworks have become one of the core tools for researching and developing artificial intelligence applications. In particular, pytorch, as an open source deep learning framework, has become the first choice for researchers and developers around the world due to its flexibility, ease of use, and rich API and model libraries. pytorch can efficiently support tasks such as building, training, debugging, and reasoning deep learning models, greatly improving the efficiency of research and application of artificial intelligence technology.

[0003] However, as the complexity of deep learning models continues to increase, traditional computing resources (such as CPUs and GPUs) often face performance bottlenecks, especially in training and reasoning tasks of large-scale data sets. In particular, in deep learning tasks with high computing loads, the limitations of CPU and GPU performance in data processing and computing power have gradually become a key factor restricting the development of deep learning.

[0004] The existing pytorch framework, especially in terms of hardware acceleration, is mainly optimized for x86 CPUs and NVIDIA GPUs. These hardware platforms have specific instruction sets and programming models, and pytorch implements efficient computing libraries and optimization algorithms on these hardware platforms. These computing libraries, such as cuDNN and NCCL, use the parallel computing capabilities of NVIDIA GPUs to significantly improve the computing efficiency of deep learning tasks.

[0005] However, for the Shenwei processor platform, the pytorch framework has certain limitations in existing technologies. The Shenwei processor has a unique architecture and instruction set, and its programming environment and tool chain are completely different from the x86 architecture and NVIDIA GPU. Many high-performance computing libraries and modules in the existing pytorch framework are developed for specific hardware platforms (such as NVIDIA GPU), which may make these computing libraries not directly compatible with the Shenwei processor, thus affecting the running performance of the pytorch framework on this platform. Summary of the invention

[0006] The embodiment of the present application provides a pytorch transplantation method based on the domestically produced Shenwei processor to achieve efficient operation of the pytorch framework on the Shenwei processor and improve the computing efficiency and performance of deep learning tasks.

[0007] To achieve the above purpose, the embodiment of the present application provides a pytorch transplantation method based on the domestic Shenwei processor, including: The step of building an architecture adaptation layer is to configure an architecture adaptation layer swMath between the pytorch framework and the Shenwei processor. The architecture adaptation layer swMath is provided with multiple adaptation interfaces, and a corresponding Shenwei implementation is defined for each pytorch operator of the pytorch framework, so as to achieve a one-to-one mapping between the multiple adaptation interfaces and the pytorch operators of the pytorch framework, and when the adaptation interface is called, the Shenwei processor can be called to perform operator operations, so as to bridge the pytorch framework with the Shenwei processor with the help of the architecture adaptation layer swMath, so as to bridge the architectural differences between the two.

[0008] Based on this step, when executing the corresponding operator operation, PyTorch will call the corresponding operator's adapter interface and perform calculations on the Shenwei processor, directly mapping PyTorch's standard operator operations to the optimized implementation for the Shenwei processor.

[0009] The high-performance computing library transplantation step identifies the high-performance computing library that depends on the CUDA platform in the pytorch framework, implements the high-performance computing library and optimizes it based on the Shenwei processor to obtain the optimized high-performance computing library, wherein the optimized high-performance computing library includes the basic mathematical operation library swBLAS, the deep learning operator library swDNN and the tensor operation library swTensor, and integrates the basic mathematical operation library swBLAS, the deep learning operator library swDNN and the tensor operation library swTensor into a unified dynamic link library libswmath.so and modifies the connection configuration of pytorch to link the dynamic link library libswmath.so with the libtorch.so library of the pytorch framework, so as to correctly link the system library and runtime library specific to the Shenwei platform; Compile and adapt the steps, use the cross-compilers sw-gcc and sw-g++ for the Shenwei processor on the X86 platform to compile the C / C++ library file code, generate the Shenwei processor executable file and run it on the Shenwei processor. Specifically, use the CMake tool to modify CMakeLists.txt to add cross-compilation configuration, implement cross-compilation of C / C++ library files on the X86 platform, complete the construction and registration of Python extension modules on the Shenwei platform, and control the file transfer and compilation process between the X86 platform and the Shenwei platform through automated scripts.

[0010] In some embodiments, in the step of building the architecture adaptation layer, an environment variable is configured for each of the pytorch operators, and the pytorch operator calls the default CPU for calculation or calls the Shenwei processor for calculation by configuring the environment variable to utilize the parallel computing capability of the Shenwei processor. When the value of the environment variable is 0, the default CPU implementation of the pytorch architecture is called, and when the value of the environment variable is 1, the operation is performed on the Shenwei processor by calling the adaptation interface corresponding to the pytorch operator to control the execution path of the operator.

[0011] In some embodiments, the high performance computing library transplantation step further comprises: The optimization steps of the basic mathematical operation library split the matrix operation into basic computing units, use the SIMD instructions of the Shenwei processor for vectorized processing, realize single instruction multiple data parallelism, and use the DMA method to directly transfer data between the main memory and the slave core processor of the Shenwei processor, reducing data transmission overhead and improving computing speed.

[0012] In some embodiments, the high performance computing library transplantation step further comprises: The deep learning operator library optimization step divides the input data and weight data into multiple data blocks and then performs the calculation operation. The size of each data block matches the cache size of the Shenwei processor, so that the data in the cache can be used as much as possible during the calculation process, reducing the number of memory accesses and improving the calculation efficiency. The calculation operations of the computationally intensive operators in the deep learning operator library swDNN are divided into multiple computational subtasks. Each subtask is independently executed in parallel on the slave core of the Shenwei processor, and the pipeline technology is used to achieve the overlap of calculation and data transmission to reduce waiting time. Among them, computationally intensive operators include but are not limited to the convolution operator Conv2d and the pooling operator Pooling.

[0013] In some of the embodiments, during the execution of the subtasks, the parallel programming model of the Shenwei processor (such as OpenMP, MPI, etc.) is used to achieve communication and synchronization between multiple cores.

[0014] In some embodiments, the high performance computing library transplantation step further comprises: Optimize the tensor operation library, develop the swTensor library to implement tensor operations, and optimize memory access and vectorize acceleration based on the Shenwei processor. The tensor operations include but are not limited to transposition operations, slicing operations, and splicing operations.

[0015] Based on the above steps, the data layout and storage method are optimized according to the memory access characteristics of the Shenwei processor, and the performance of basic tensor operations is improved through vectorization and parallelization technologies.

[0016] In some of the embodiments, the method further includes: configuring a performance counter interface to read core performance data through the hardware abstraction layer HAL provided by the Shenwei platform to collect performance data of the Shenwei processor core.

[0017] Compared with the related art, the pytorch transplantation method based on the domestic Shenwei processor provided in the embodiment of the present application overcomes the differences in architecture and instruction set between the Shenwei processor and the traditional CPU and GPU, and ensures that the pytorch framework can run smoothly on the Shenwei processor; optimizes the underlying implementation of pytorch according to the memory access mode and parallel computing model of the Shenwei processor to improve the computing performance of the pytorch framework on the Shenwei processor; re-implements or optimizes the high-performance computing libraries and components in the pytorch framework that depend on specific hardware platforms to achieve the matching degree between the pytorch framework and the Shenwei processor to improve the working performance of the pytorch framework; simplifies the programming environment and tool chain of the Shenwei processor, and reduces the technical threshold for transplanting pytorch to the Shenwei processor; ensures the stability and reliability of the transplanted pytorch framework on the Shenwei processor, while maintaining compatibility with the original pytorch ecosystem, and realizes the efficient transplantation and operation of the pytorch framework on the domestic Shenwei processor, providing powerful computing support for deep learning models.

[0018] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1 It is a flow chart of the transplantation method according to an embodiment of the present application. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. Based on the embodiments provided in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0021] Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. In addition, it can also be understood that although the efforts made in this development process may be complicated and lengthy, for ordinary technicians in this field related to the content disclosed in this application, some changes in design, manufacturing or production based on the technical content disclosed in this application are just conventional technical means, and should not be understood as insufficient content disclosed in this application.

[0022] Reference to "embodiments" in this application means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those of ordinary skill in the art that the embodiments described in this application may be combined with other embodiments without conflict.

[0023] Unless otherwise defined, the technical terms or scientific terms involved in this application should be understood by people with ordinary skills in the technical field to which this application belongs. The words "one", "a", "a", "the" and the like involved in this application do not indicate a quantity limitation, and may indicate the singular or plural. The terms "include", "comprise", "have" and any of their variations involved in this application are intended to cover non-exclusive inclusions; for example, a process, method, system, product or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units that are not listed, or may also include other steps or units inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The "multiple" involved in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three relationships, for example, "A and / or B" can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific ordering of the objects.

[0024] The embodiment of the present application analyzes key features such as the instruction set, memory hierarchy, and parallel computing model of the Shenwei processor based on its hardware specifications and programming manual, and designs an architecture adaptation layer on this basis.

[0025] Taking Sunway TaihuLight as an example, the Sunway processor uses the self-developed Sunway instruction set, especially the SW64 architecture. In terms of memory hierarchy, it adopts hierarchical memory, and each computing unit is equipped with local memory combined with global shared memory. Parallel computing models include those based on MPI, OpenACC, or unique parallel models, such as slave core co-processing mode, as well as SIMD instructions, multi-level cache, high-bandwidth network interconnection, etc.

[0026] By porting the pytorch framework to the Sunway processor, we can fully utilize its high-performance characteristics, accelerate the training and reasoning process of deep learning models, and realize the efficient operation of the deep learning framework, fully utilize the computing power of the Sunway processor, and improve the execution efficiency of deep learning tasks. Therefore, in order to give full play to the computing power of the Sunway processor, the pytorch framework needs to be improved and optimized in a targeted manner. This includes not only the porting and re-implementation of existing libraries, but also the optimization of the scheduling and resource management of computing tasks to adapt to the unique hardware architecture and performance characteristics of the Sunway processor.

[0027] This embodiment provides a pytorch transplantation method based on the domestic Shenwei processor. Figure 1 is a flowchart of a pytorch transplantation method based on a domestic Shenwei processor according to an embodiment of the present application, such as Figure 1 As shown, the process includes the following steps: The step S1 of building the architecture adaptation layer is to configure an architecture adaptation layer swMath between the pytorch framework and the Shenwei processor. The architecture adaptation layer swMath is provided with multiple adaptation interfaces, and a corresponding Shenwei implementation is defined for each pytorch operator of the pytorch framework, so as to realize a one-to-one mapping between the multiple adaptation interfaces and the pytorch operators of the pytorch framework, and when the adaptation interface is called, the Shenwei processor can be called to perform operator operations, so as to bridge the pytorch framework with the Shenwei processor with the help of the architecture adaptation layer swMath, so as to bridge the architectural differences between the two. Among them, the pytorch operators of the pytorch framework include, for example but not limited to, add, mul, div, etc., which realize basic data operations such as element-by-element addition, subtraction, multiplication and division, and matrix operations such as matmul. The adaptation interface of the matrix multiplication operation will use the parallel computing power of the Shenwei processor to accelerate the operation. The same is true for conv2d and activation function operators (such as relu function, sigmoid function, etc.), which will not be repeated here.

[0028] Based on this step, when executing the corresponding operator operation, PyTorch will call the corresponding operator's adapter interface and perform calculations on the Shenwei processor, directly mapping PyTorch's standard operator operations to the optimized implementation for the Shenwei processor.

[0029] Figure 1 The process shown also includes: a high-performance computing library transplantation step S2, identifying a high-performance computing library in the pytorch framework that depends on the CUDA platform, implementing the high-performance computing library and optimizing it based on the Shenwei processor to obtain an optimized high-performance computing library, wherein the optimized high-performance computing library includes a basic mathematical operation library swBLAS, a deep learning operator library swDNN, and a tensor operation library swTensor, integrating the basic mathematical operation library swBLAS, the deep learning operator library swDNN, and the tensor operation library swTensor into a unified dynamic link library libswmath.so and modifying the connection configuration of pytorch to link the dynamic link library libswmath.so with the libtorch.so library of the pytorch framework to correctly link the system library and runtime library specific to the Shenwei platform; wherein, the high-performance computing library refers to a series of libraries that rely on the CUDA platform (Compute Unified Device Architecture) for parallel computing, such as cuDNN (CUDA Deep Neural Network Library) and cuBLAS (CUDA Basic Linear Algebra Subprograms), cuDNN is designed for deep neural networks and provides highly optimized GPU acceleration functions for forward and backward propagation calculations, which can significantly improve the performance of deep learning models. cuBLAS provides GPU acceleration for basic linear algebra operations, such as matrix multiplication and vector dot product, which are the basis of deep learning algorithms.

[0030] Compile and adapt step S3, use the cross-compilers sw-gcc and sw-g++ for the Shenwei processor on the X86 platform to compile the C / C++ library file code, generate the Shenwei processor executable file and run it on the Shenwei processor. Specifically, use the CMake tool to modify CMakeLists.txt to add cross-compilation configuration, implement cross-compilation of C / C++ library files on the X86 platform, and complete the construction and registration of Python extension modules on the Shenwei platform. The file transfer and compilation process between the X86 platform and the Shenwei platform is controlled by an automated script. This script can use scp to transfer files and ssh to remotely execute commands. The automated script is run on the X86 platform, which is responsible for transferring the source code to the Shenwei platform and executing CMake and compilation commands there. Once the compilation is completed, it is run directly on the Shenwei platform.

[0031] Use the CMake tool to modify CMakeLists.txt to add cross-compilation configuration. In the CMakeLists.txt file in the root directory of the CMake project, add or modify the following content to configure cross-compilation: cmake #Set the C / C++ compiler set(CMAKE_C_COMPILER${SW_TOOLCHAIN_PATH} / sw-gcc) set(CMAKE_CXX_COMPILER ${SW_TOOLCHAIN_PATH} / sw-g++) #Set cross-compilation flag set(CMAKE_CROSSCOMPILING TRUE) Based on the above configuration, developers can perform Python-related tasks on the Shenwei platform without having to understand the underlying compilation details.

[0032] Based on the above steps, a one-to-one mapping from pytorch operators to Shenwei optimized implementations is achieved, ensuring that each key operator can find its corresponding Shenwei optimized version and that the pytorch framework can seamlessly use the high-performance computing capabilities of the Shenwei processor. The high-performance computing library is re-implemented in a modular reconstruction manner, and the key computing functions in the high-performance computing library are vectorized using the SIMD instruction set of the Shenwei processor to perform computationally intensive operations and use the DMA method to directly transfer data between the main memory and slave core processor of the Shenwei processor, thereby improving the computing speed.

[0033] In some of the embodiments, in the step S1 of building the architecture adaptation layer, an environment variable is configured for each of the pytorch operators, and the pytorch operator calls the default CPU for calculation or calls the Shenwei processor for calculation by configuring the environment variable, so as to utilize the parallel computing capability of the Shenwei processor. Wherein, when the value of the environment variable is 0, the default CPU implementation of the pytorch architecture is called, and when the value of the environment variable is 1, the operation is performed on the Shenwei processor by calling the adaptation interface corresponding to the pytorch operator to control the execution path of the operator. For example, but not limited to, the environment variable name of the addition operator is configured as SW_ADD_ENABLE, the environment variable name of the conv2d matrix operation operator is configured as: SW_CONV2D_ENABLE, the environment variable name of the matmul matrix operation operator is configured as: SW_MATMUL_ENABLE, etc.

[0034] Based on the above environment variables, fine-grained control is achieved on the execution mode of each operator, thus achieving the optimal balance between computational efficiency and computational accuracy.

[0035] In some embodiments, the high performance computing library transplantation step S2 further includes: The optimization step of the basic mathematical operation library is to split the matrix operation into basic computing units, use the SIMD instructions of the Shenwei processor for vectorized processing, realize single instruction multiple data parallelism, and directly transfer data between the main memory and the slave core processor of the Shenwei processor by using the DMA method, thereby reducing data transmission overhead and improving the operation speed. The matrix operation includes but is not limited to general matrix multiplication GEMM (General Matrix Multiply) and general matrix-vector multiplication GEMV (General Matrix-Vector Multiply). The matrix operation is split into appropriate blocks as basic computing units. The size of the block is set according to the SIMD bit width. For example, for FP32 type data, the SIMD bit width is 512, and the size of this block is configured as a multiple of 512 / 32=16.

[0036] In addition, the embodiment of the present application also optimizes the data access mode and calculation order for the cache hierarchy of the Shenwei processor. Specifically, it includes: analyzing the calculation dependencies of matrix operations and rearranging the calculation order to reduce the waiting time and data movement during the calculation process; for example but not limited to, in matrix multiplication, the order of multiplication operations can be adjusted so that each multiplication can use the data in the cache, thereby reducing memory access; through loop unrolling, multiple iterations are merged into one iteration, reducing the overhead of loop control and improving the pipeline efficiency of instructions, and through loop fusion, multiple related loops are merged into one loop to reduce the number of data transfers between memory and cache.

[0037] In some embodiments, the high performance computing library transplantation step S2 further includes: The deep learning operator library optimization step divides the input data and weight data into multiple data blocks and then performs the calculation operation. The size of each data block matches the cache size of the Shenwei processor, so that the data in the cache can be used as much as possible during the calculation process, reducing the number of memory accesses and improving the calculation efficiency. The calculation operations of the computationally intensive operators in the deep learning operator library swDNN are divided into multiple computational subtasks. Each subtask is independently executed in parallel on the slave core of the Shenwei processor, and the pipeline technology is used to achieve the overlap of calculation and data transmission to reduce waiting time. Among them, computationally intensive operators include but are not limited to the convolution operator Conv2d and the pooling operator Pooling.

[0038] In some of the embodiments, during the execution of the subtasks, the parallel programming model of the Shenwei processor (such as OpenMP, MPI, etc.) is used to achieve communication and synchronization between multiple cores. In the convolution operation, the convolution operator Conv2d can divide the processes of loading input data, loading weight data, calculating, and storing output data into different operation subtasks, and optimize them through pipeline technology.

[0039] In some embodiments, the high performance computing library transplantation step S2 further includes: Optimize the tensor operation library, develop the swTensor library to implement tensor operations, and optimize memory access and vectorize acceleration based on the Shenwei processor. The tensor operations include but are not limited to transposition operations, slicing operations, and splicing operations.

[0040] Among them, memory access optimization and vectorization acceleration based on Shenwei processor include: In the data layout optimization step, the tensor is divided into multiple tensor blocks, each of which is aligned and allocated according to the LDM capacity (Local Device Memory) of the Shenwei processor, and the DMA engine is used to achieve efficient main memory-LDM data transmission; at the same time, the asymmetric storage mode ASM of the Shenwei processor is used to put high-frequency access data into the fast storage area. Among them, stride pre-calculation is used for continuous access mode.

[0041] Among them, memory access optimization and vectorization acceleration based on Shenwei processor also include: The vectorization acceleration step uses the SIMD instructions of the Shenwei processor to vectorize tensor operations. Taking the transpose operation as an example, a 64×64 floating-point matrix is ​​transposed using 4-way vector parallelism.

[0042] It further includes: the application of pipeline parallel acceleration, taking the tensor splicing operation as an example, using DMA to load the input block from the main memory to the LDM, using vector instructions to reorganize the data, and then writing the result block back to the main memory through DMA.

[0043] Based on the above steps, the data layout and storage method are optimized according to the memory access characteristics of the Shenwei processor, and the performance of basic tensor operations is improved through vectorization and parallelization technologies.

[0044] In some of the embodiments, the method also includes: configuring a performance counter interface, reading core performance data through the hardware abstraction layer HAL provided by the Shenwei platform to collect performance data of the Shenwei processor core. Specifically, define the performance event types supported by the Shenwei processor, including but not limited to the number of clock cycles, the number of retired instructions, memory bandwidth usage, etc.; provide a C / C++ interface for pytorch to call, and generate a dynamic library for pytorch to call. In addition, pytorch performance analysis tools are also supported, supporting hot function analysis and performance bottleneck identification. Specifically, combine Shenwei performance data with pytorch's Profiler, add Shenwei performance data collection logic in torch / autograd / profiler.py, associate pytorch operators (such as aten::matmul) with Shenwei performance data, combine pytorch's Profiler output with Shenwei data, and generate an interactive flame graph.

[0045] In addition, in order to help developers get started quickly, the embodiments of the present application also provide detailed documentation and tutorials, including installation guides, API references, and use cases.

[0046] In another embodiment, the present application also designs a test case that covers the core functions and common models of pytorch, such as tensor operations, automatic differentiation, data loading, etc., to ensure the correctness of the transplanted framework on the Shenwei processor. After the successful development of pytorch, the megatron framework was transplanted at the same time, and the LLama175 billion parameter model was successfully trained on the Shenwei supercomputer, verifying the compatibility and stability of pytorch.

[0047] In another embodiment, the embodiment of the present application also provides a model migration guide, including code modification suggestions and practical logic, to help users migrate the model to the Shenwei processor.

[0048] It should be noted that the steps shown in the above process or the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0049] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0050] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A pytorch transplantation method based on the domestic Shenwei processor, characterized in that: include: The step of building an architecture adaptation layer is to configure an architecture adaptation layer swMath between the pytorch framework and the Shenwei processor. The architecture adaptation layer swMath is provided with multiple adaptation interfaces, and a corresponding Shenwei implementation is defined for each pytorch operator of the pytorch framework, so as to achieve a one-to-one mapping between the multiple adaptation interfaces and the pytorch operators of the pytorch framework, and when the adaptation interface is called, the Shenwei processor can be called to perform operator calculations; The high-performance computing library transplantation step includes identifying the high-performance computing library that depends on the CUDA platform in the pytorch framework, implementing the high-performance computing library and optimizing it based on the Shenwei processor to obtain the optimized high-performance computing library, wherein the optimized high-performance computing library includes the basic mathematical operation library swBLAS, the deep learning operator library swDNN and the tensor operation library swTensor, integrating the basic mathematical operation library swBLAS, the deep learning operator library swDNN and the tensor operation library swTensor into a unified dynamic link library libswmath.so and linking the dynamic link library libswmath.so with the libtorch.so library of the pytorch framework; Compile and adapt the steps, use the cross-compilers sw-gcc and sw-g++ for the Shenwei processor on the X86 platform to compile the C / C++ library file code, generate the Shenwei processor executable file and run it on the Shenwei processor.

2. The pytorch transplantation method based on the domestic Shenwei processor according to claim 1 is characterized in that: In the step of building the architecture adaptation layer, an environment variable is configured for each of the pytorch operators, and the pytorch operator calls the default CPU for calculation or calls the Shenwei processor for calculation through the configuration of the environment variable.

3. The pytorch transplantation method based on the domestic Shenwei processor according to claim 2 is characterized in that: When the value of the environment variable is 0, the default CPU implementation of the pytorch architecture is called. When the value of the environment variable is 1, the operation is performed on the Shenwei processor by calling the adapter interface corresponding to the pytorch operator to control the execution path of the operator.

4. The pytorch transplantation method based on the domestic Shenwei processor according to claim 2 is characterized in that: The high performance computing library transplantation step further comprises: The basic mathematical operation library optimization steps split the matrix operation into basic computing units, use the SIMD instructions of the Shenwei processor for vectorized processing, and use the DMA method to directly transfer data between the main memory and the slave core processor of the Shenwei processor.

5. The pytorch transplantation method based on the domestic Shenwei processor according to claim 4 is characterized in that: The high performance computing library transplantation step further comprises: The deep learning operator library optimization step divides the input data and weight data into multiple data blocks and then performs calculation operations. It also divides the calculation operations of the computationally intensive operators in the deep learning operator library swDNN into multiple calculation subtasks. Each subtask is independently executed in parallel on the slave core of the Shenwei processor.

6. The pytorch transplantation method based on the domestic Shenwei processor according to claim 5 is characterized in that: During the execution of the subtasks, the parallel programming model of the Shenwei processor is used to achieve communication and synchronization between multiple cores.

7. The pytorch transplantation method based on the domestic Shenwei processor according to claim 5 is characterized in that: The high performance computing library transplantation step further comprises: Optimize the tensor operation library, develop the swTensor library to implement tensor operations, and optimize memory access and vectorization acceleration based on the Shenwei processor.

8. The pytorch transplantation method based on the domestic Shenwei processor according to claim 6 is characterized in that: Also includes: Configure a performance counter interface to read core performance data through the hardware abstraction layer HAL provided by the Shenwei platform.

9. The pytorch transplantation method based on the domestic Shenwei processor according to claim 1 is characterized in that: In the compilation and adaptation step, the CMake tool is used to modify CMakeLists.txt to add cross-compilation configuration.

10. The pytorch transplantation method based on the domestic Shenwei processor according to claim 7 is characterized in that: The tensor operations include transposition operations, slicing operations, and concatenation operations.

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