Front-end gate circuit chip and system for sinusoidally gated single-photon detectors
By integrating coincident gate signal, sinusoidal gate signal and sinusoidal gate amplitude detection signal generation modules on the chip, the problems of large size and high power consumption of the front-end gate circuit of high-speed sinusoidal gated single-photon detector are solved, and a miniaturized and highly integrated quantum communication system is realized.
Patent Information
- Application Number
- CN202411867476.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-18
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2044-12-18
AI Technical Summary
In the existing technology, the front-end gate circuit of high-speed sinusoidally gated single-photon detectors has complex functions and high power consumption, and lacks effective integration solutions, resulting in a large size and difficulty in meeting the miniaturization requirements of quantum communication systems.
The coincidence gate signal generation module, sine gate signal generation module and sine gate amplitude detection signal generation module are integrated on the chip. Through bandpass filtering, low-noise amplification, phase shifting and detection, the coincidence gate signal, sine gate signal and sine gate amplitude detection signal are generated. They are used to shield noise and detect signal amplitude. They are encapsulated in a low-temperature co-fired ceramic substrate and a metal tube shell.
The volume of the front-end gate circuit is significantly reduced, the integration of the high-speed sinusoidal-gated single-photon detector is improved, high-precision signal adjustment and noise filtering are achieved, and the stability and performance of the system are improved.
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Figure CN119826967B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of single-photon detection, and more particularly to a front-end gate circuit chip and system for a sinusoidally gated single-photon detector. Background Art
[0002] High-speed sinusoidally gated single-photon detectors are key instruments in practical quantum communication systems. With the large-scale deployment of quantum communication networks, the size and cost of single-photon detectors are becoming increasingly stringent. The design of miniaturized, high-speed gated single-photon detectors is urgently needed. However, due to the complex functions and high power consumption of the front-end gate circuits, there is currently no effective integrated solution. Summary of the Invention
[0003] In view of this, the present invention provides a front-end gate circuit chip and system for a sinusoidally gated single-photon detector.
[0004] One aspect of the present invention provides a front-end gate circuit chip for a sinusoidally gated single-photon detector, comprising:
[0005] a coincidence gate signal generation module configured to perform bandpass filtering and low-noise amplification on the frequency reference signal input to the front-end gate circuit chip to obtain an intermediate coincidence gate signal, perform phase shifting on the intermediate coincidence gate signal to obtain a coincidence gate signal, and output the coincidence gate signal, wherein the coincidence gate signal is used by the sinusoidally gated single-photon detector to shield signals outside the effective gate width;
[0006] a sinusoidal gate signal generating module, electrically connected to the gate signal generating module, configured to receive the intermediate coincidence gate signal, amplify the intermediate coincidence gate signal to obtain an intermediate sinusoidal gate signal, filter the intermediate sinusoidal gate signal to obtain a sinusoidal gate signal, and output the sinusoidal gate signal, wherein the sinusoidal gate signal is used as a gate signal for a single-photon avalanche diode in the sinusoidally gated single-photon detector;
[0007] The sinusoidal gate amplitude detection signal generating module is electrically connected to the above-mentioned sinusoidal gate signal generating module, and is configured to receive the above-mentioned intermediate sinusoidal gate signal, detect and amplify the above-mentioned intermediate sinusoidal gate signal to obtain a sinusoidal gate amplitude detection signal, and output the above-mentioned sinusoidal gate amplitude detection signal, wherein the above-mentioned sinusoidal gate amplitude detection signal is used to detect the amplitude of the above-mentioned sinusoidal gate signal when used in the above-mentioned sinusoidal gated single-photon detector.
[0008] According to an embodiment of the present invention, the coincidence gate signal generating module includes an intermediate coincidence gate signal generating unit, wherein the intermediate coincidence gate signal generating unit includes a first bandpass filter, a first-stage low-noise amplifier, a first attenuator, a first phase shifter, a voltage-controlled attenuator, and a second-stage low-noise amplifier electrically connected in sequence;
[0009] The first bandpass filter is configured to filter the frequency reference signal to obtain a first intermediate frequency reference signal, and output the first intermediate frequency reference signal;
[0010] The first-stage low noise amplifier and the first attenuator are configured to perform amplitude adjustment on the first intermediate frequency reference signal to obtain a second intermediate frequency reference signal that meets the amplitude input requirement of the first phase shifter, and output the second intermediate frequency reference signal;
[0011] The first phase shifter is configured to perform an initial phase adjustment on the second intermediate frequency reference signal to obtain a third intermediate frequency reference signal, and output the third intermediate frequency reference signal;
[0012] The voltage-controlled attenuator is configured to perform amplitude adjustment on the third intermediate frequency reference signal to obtain a fourth intermediate frequency reference signal, and output the fourth intermediate frequency reference signal;
[0013] The secondary low noise amplifier is configured to amplify the fourth intermediate frequency reference signal to obtain the intermediate coincidence gate signal, and output the intermediate coincidence gate signal.
[0014] According to an embodiment of the present invention, the coincidence gate signal generating module includes a coincidence gate signal generating unit, and the coincidence gate signal generating unit is electrically connected to the intermediate coincidence gate signal generating unit, wherein the coincidence gate signal generating unit includes a power divider and a second phase shifter electrically connected thereto;
[0015] The power divider is connected to the secondary low-noise discharge, and the power divider includes two paths, one of which outputs the intermediate coincidence gate signal to the sinusoidal gate signal generation module, and the other outputs the intermediate coincidence gate signal to the second phase shifter;
[0016] The second phase shifter is configured to perform relative phase adjustment on the intermediate coincidence gate signal to obtain the coincidence gate signal, and output the coincidence gate signal.
[0017] According to an embodiment of the present invention, the sinusoidal gate signal generating module includes a second attenuator, a power amplifier, a coupled microstrip line, and a second bandpass filter electrically connected in sequence;
[0018] The second attenuator is configured to attenuate the intermediate coincidence gate signal to obtain a first intermediate coincidence gate signal, and output the first intermediate coincidence gate signal;
[0019] The power amplifier is configured to amplify the first intermediate coincidence gate signal to obtain the intermediate sinusoidal gate signal, and output the intermediate sinusoidal gate signal;
[0020] The coupled microstrip line includes two paths, one of which outputs the intermediate sinusoidal gate signal to the sinusoidal gate amplitude detection signal generation module, and the other outputs the intermediate sinusoidal gate signal to the second bandpass filter;
[0021] The second bandpass filter is configured to filter the intermediate sinusoidal gate signal and then output the sinusoidal gate signal.
[0022] According to an embodiment of the present invention, the sinusoidal gate amplitude detection signal generating module includes a third attenuator, a detector and an operational amplifier electrically connected in sequence;
[0023] The third attenuator is configured to attenuate the intermediate sinusoidal gate signal to obtain a first intermediate sinusoidal gate signal and output the first intermediate sinusoidal gate signal;
[0024] The detector is configured to detect the first intermediate sinusoidal gate signal to obtain a voltage signal and output the voltage signal;
[0025] The operational amplifier is configured to amplify the voltage signal to obtain the sinusoidal gate amplitude detection signal and output the sinusoidal gate amplitude detection signal.
[0026] According to an embodiment of the present invention, the front-end gate circuit chip further includes:
[0027] A low-temperature co-fired ceramic substrate is provided with the coincidence gate signal generating module, the sinusoidal gate signal generating module and the sinusoidal gate amplitude detection signal generating module.
[0028] According to an embodiment of the present invention, the low-temperature co-fired ceramic substrate, the coincidence gate signal generating module, the sinusoidal gate signal generating module and the sinusoidal gate amplitude detection signal generating module are packaged in a metal tube shell.
[0029] According to an embodiment of the present invention, the metal tube shell is filled with nitrogen.
[0030] According to an embodiment of the present invention, the front-end gate circuit chip has a length less than 30 mm, a width less than 20 mm, and a height less than 3 mm.
[0031] Another aspect of the present invention provides a sinusoidally gated single-photon detector system, comprising:
[0032] Sinusoidally gated single-photon detectors; and
[0033] The front-end gate circuit chip mentioned above is configured to provide a coincidence gate signal, a sinusoidal gate signal and a sinusoidal gate amplitude detection signal to the sinusoidal gated single photon detector.
[0034] According to an embodiment of the present invention, the present invention integrates a coincidence gate signal generation module for generating a coincidence gate signal, a sinusoidal gate signal generation module for generating a sinusoidal gate signal, and a sinusoidal gate amplitude detection signal generation module for generating a sinusoidal gate amplitude detection signal on a chip, which can significantly reduce the volume of the front-end gate circuit of the sinusoidal-gated single-photon detector and greatly improve the integration of the high-speed sinusoidal-gated single-photon detector. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
[0036] Figure 1 A block diagram of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown;
[0037] Figure 2A A block diagram of a coincidence gate signal generation module of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown;
[0038] Figure 2B A block diagram showing an intermediate coincidence gate signal generating unit and a coincidence gate signal generating unit of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown;
[0039] Figure 3 A block diagram of a sinusoidal gate signal generating module of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown;
[0040] Figure 4 A block diagram showing a sinusoidal gate amplitude detection signal generating module of a front-end gate circuit chip for a sinusoidally gated single photon detector according to an embodiment of the present invention is shown; and
[0041] Figure 5 FIG. 4 shows a block diagram of a sinusoidally gated single-photon detector system according to an embodiment of the present invention. DETAILED DESCRIPTION
[0042] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of embodiments of the present invention. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.
[0043] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the presence of the features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.
[0044] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.
[0045] When expressions such as "at least one of A, B, and C, etc." are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).
[0046] High-speed sinusoidally gated single-photon detectors are a key instrument in practical quantum communication systems. With the large-scale deployment of quantum communication networks, the size and cost requirements of single-photon detectors are becoming increasingly stringent. Therefore, the design of miniaturized, high-speed gated single-photon detectors is urgently needed. The generation and detection of high-power, high-frequency sinusoidal gate signals are key technologies in high-speed sinusoidally gated single-photon detectors. In related technologies, the sinusoidal gate signal is primarily implemented using board-level discrete components, which consumes a large amount of space. Furthermore, the front-end gate circuitry is complex and consumes high power.
[0047] In view of this, an embodiment of the present invention provides a front-end gate circuit chip for a sinusoidally gated single-photon detector, comprising a coincidence gate signal generating module, configured to perform bandpass filtering and low-noise amplification on a frequency reference signal input to the front-end gate circuit chip to obtain an intermediate coincidence gate signal, phase-shift the intermediate coincidence gate signal to obtain a coincidence gate signal, and output the coincidence gate signal, wherein the coincidence gate signal is used for the sinusoidally gated single-photon detector to shield signals outside the effective gate width range; a sinusoidal gate signal generating module, electrically connected to the gate signal generating module, configured to receive the intermediate coincidence gate signal, and phase-shift the intermediate coincidence gate signal to obtain a coincidence gate signal, and output the coincidence gate signal. The gate signal is amplified to obtain an intermediate sinusoidal gate signal, the intermediate sinusoidal gate signal is filtered to obtain a sinusoidal gate signal, and the sinusoidal gate signal is output, wherein the sinusoidal gate signal is used as the gate signal of the single-photon avalanche diode in the sinusoidally gated single-photon detector; a sinusoidal gate amplitude detection signal generation module is electrically connected to the sinusoidal gate signal generation module, configured to receive the intermediate sinusoidal gate signal, detect and amplify the intermediate sinusoidal gate signal to obtain a sinusoidal gate amplitude detection signal, and output a sinusoidal gate amplitude detection signal, wherein the sinusoidal gate amplitude detection signal is used to detect the amplitude of the sinusoidal gate signal when used in the sinusoidally gated single-photon detector.
[0048] Figure 1 A block diagram of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown.
[0049] like Figure 1 As shown, the front-end gate circuit chip 100 for the sinusoidally gated single-photon detector includes a coincidence gate signal generation module 110 , a sinusoidal gate signal generation module 120 and a sinusoidal gate amplitude detection signal generation module 130 .
[0050] The coincidence gate signal generation module 110 is configured to perform bandpass filtering and low-noise amplification on the frequency reference signal input to the front-end gate circuit chip to obtain an intermediate coincidence gate signal, phase-shift the intermediate coincidence gate signal to obtain a coincidence gate signal, and output the coincidence gate signal, wherein the coincidence gate signal is used by the sinusoidally gated single-photon detector to shield signals outside the effective gate width range.
[0051] The sinusoidal gate signal generating module 120 is electrically connected to the gate signal generating module 110 and is configured to receive an intermediate coincident gate signal, amplify the intermediate coincident gate signal to obtain an intermediate sinusoidal gate signal, filter the intermediate sinusoidal gate signal to obtain a sinusoidal gate signal, and output the sinusoidal gate signal, wherein the sinusoidal gate signal is used as a gate signal of a single-photon avalanche diode in a sinusoidally gated single-photon detector.
[0052] The sinusoidal gate amplitude detection signal generation module 130 is electrically connected to the sinusoidal gate signal generation module 120, and is configured to receive the intermediate sinusoidal gate signal, detect and amplify the intermediate sinusoidal gate signal to obtain a sinusoidal gate amplitude detection signal, and output the sinusoidal gate amplitude detection signal, wherein the sinusoidal gate amplitude detection signal is used to detect the amplitude of the sinusoidal gate signal when used in a sinusoidally gated single-photon detector.
[0053] According to an embodiment of the present invention, a coincidence gate signal generation module is configured to generate a coincidence gate signal using a frequency reference signal and provide the coincidence gate signal to a sinusoidally gated single-photon detector. The sinusoidally gated single-photon detector uses the coincidence gate signal to shield signals outside the effective gate width, thereby reducing noise in the sinusoidally gated single-photon detector.
[0054] According to an embodiment of the present invention, the coincidence gate signal generation module may also generate an intermediate coincidence gate signal and provide it to the sinusoidal gate signal generation module. The sinusoidal gate signal generation module is configured to generate a sinusoidal gate signal using the intermediate coincidence gate signal and provide it to the sinusoidally gated single-photon detector. The sinusoidally gated single-photon detector uses the sinusoidal gate signal as the gate signal for the single-photon avalanche diode in the sinusoidally gated single-photon detector.
[0055] According to an embodiment of the present invention, the sinusoidal gate signal generation module can also generate an intermediate sinusoidal gate signal and provide it to the sinusoidal gate amplitude detection signal generation module. The sinusoidal gate amplitude detection signal generation module is configured to use the intermediate sinusoidal gate signal to generate a sinusoidal gate amplitude detection signal and provide it to the sinusoidally gated single-photon detector. The sinusoidally gated single-photon detector uses the sinusoidal gate amplitude detection signal to detect the amplitude of the sinusoidal gate signal when used in the sinusoidally gated single-photon detector. The gate amplitude is adjusted in real time based on the detection results to ensure stable detector operation.
[0056] According to an embodiment of the present invention, the present invention integrates a coincidence gate signal generation module for generating a coincidence gate signal, a sinusoidal gate signal generation module for generating a sinusoidal gate signal, and a sinusoidal gate amplitude detection signal generation module for generating a sinusoidal gate amplitude detection signal on a chip, which can significantly reduce the volume of the front-end gate circuit of the sinusoidal-gated single-photon detector and greatly improve the integration of the high-speed sinusoidal-gated single-photon detector.
[0057] Figure 2A A block diagram of a coincidence gate signal generation module of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown.
[0058] Figure 2B A block diagram of an intermediate coincidence gate signal generating unit and a coincidence gate signal generating unit of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown.
[0059] like Figure 2A and Figure 2BAs shown, the coincidence gate signal generating module 210 includes an intermediate coincidence gate signal generating unit 211 and a coincidence gate signal generating unit 212, wherein the intermediate coincidence gate signal generating unit 211 includes a first bandpass filter 2111, a first-stage low noise amplifier 2112, a first attenuator 2113, a first phase shifter 2114, a voltage-controlled attenuator 2115 and a second-stage low noise amplifier 2116 electrically connected in sequence.
[0060] The first bandpass filter 2111 is configured to filter the frequency reference signal to obtain a first intermediate frequency reference signal, and output the first intermediate frequency reference signal.
[0061] The first-stage low noise amplifier 2112 and the first attenuator 2113 are configured to adjust the amplitude of the first intermediate frequency reference signal to obtain a second intermediate frequency reference signal that meets the amplitude input requirement of the first phase shifter, and output the second intermediate frequency reference signal.
[0062] The first phase shifter 2114 is configured to perform an initial phase adjustment on the second intermediate frequency reference signal to obtain a third intermediate frequency reference signal, and output the third intermediate frequency reference signal.
[0063] The voltage-controlled attenuator 2115 is configured to perform amplitude adjustment on the third intermediate frequency reference signal to obtain a fourth intermediate frequency reference signal, and output the fourth intermediate frequency reference signal.
[0064] The secondary low noise amplifier 2116 is configured to amplify the fourth intermediate frequency reference signal to obtain an intermediate coincidence gate signal, and output the intermediate coincidence gate signal.
[0065] According to an embodiment of the present invention, the coincidence gate signal generating unit 212 is electrically connected to the intermediate coincidence gate signal generating unit 211 , wherein the coincidence gate signal generating unit 212 includes a power divider 2121 and a second phase shifter 2122 that are electrically connected.
[0066] The power divider 2121 is electrically connected to the secondary low noise amplifier 2116 . The power divider 2121 includes two paths, one of which outputs the intermediate coincidence gate signal to the sine gate signal generation module, and the other outputs the intermediate coincidence gate signal to the second phase shifter 2122 .
[0067] The second phase shifter 2122 is configured to perform relative phase adjustment on the intermediate coincidence gate signal to obtain a coincidence gate signal, and output the coincidence gate signal.
[0068] According to an embodiment of the present invention, the frequency reference signal may be a sinusoidal frequency reference signal with a frequency of 1.25 GHz.
[0069] The frequency reference signal is input into the first bandpass filter in the coincidence gate signal generation module for filtering to produce a first intermediate frequency reference signal. The first intermediate frequency reference signal is amplitude modulated by sequentially connecting to a first low-noise amplifier and a first attenuator to meet the input amplitude requirements of the first phase shifter. The first phase shifter can be a 6-digital controlled phase shifter. The sinusoidally gated single-photon detector can digitally control the first phase shifter to adjust the overall phase of the second intermediate frequency reference signal, thereby adjusting the overall phase of the coincidence gate signal and the sinusoidal gate signal output by the front-end gate chip. The output of the first phase shifter is connected to a voltage-controlled attenuator, which the sinusoidally gated single-photon detector can control to adjust the amplitude of the third intermediate frequency reference signal. The output of the voltage-controlled attenuator is sequentially connected to a second low-noise amplifier and a power divider. The second low-noise amplifier amplifies the fourth intermediate frequency reference signal to produce an intermediate coincidence gate signal. The power divider can output two intermediate coincidence gate signals of equal amplitude, one of which outputs the signal "out1," the intermediate coincidence gate signal, which is output to the sinusoidal gate signal generation module. The other output is connected to the second phase shifter, which can also use a 6-digital controlled phase shifter. The sinusoidal gated single photon detector can adjust the relative phase of the intermediate coincidence gate signal through the digitally controlled second phase shifter, so that the relative phase of the coincidence gate signal and the sinusoidal gate signal output by the front-end gate chip is adjusted. The second phase shifter outputs the out2 signal, which is the coincidence gate signal.
[0070] Figure 3 A block diagram of a sinusoidal gate signal generating module of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown.
[0071] like Figure 3 As shown, the sinusoidal gate signal generating module 320 includes a second attenuator 321 , a power amplifier 322 , a coupled microstrip line 323 and a second bandpass filter 324 which are electrically connected in sequence.
[0072] The second attenuator is configured to attenuate the intermediate coincidence gate signal to obtain a first intermediate coincidence gate signal, and output the first intermediate coincidence gate signal.
[0073] The power amplifier is configured to amplify the first intermediate coincident gate signal to obtain an intermediate sinusoidal gate signal, and output the intermediate sinusoidal gate signal.
[0074] The coupled microstrip line includes two paths, one of which outputs the intermediate sinusoidal gate signal to the sinusoidal gate amplitude detection signal generation module, and the other outputs the intermediate sinusoidal gate signal to the second bandpass filter.
[0075] The second bandpass filter is configured to filter the intermediate sinusoidal gate signal and then output a sinusoidal gate signal.
[0076] According to an embodiment of the present invention, a second attenuator attenuates the intermediate coincidence gate signal to obtain a first intermediate coincidence gate signal, such that the amplitude of the first intermediate coincidence gate signal is controlled within the input range of the power amplifier. The power amplifier amplifies the first intermediate coincidence gate signal, for example, by 20 dB, to obtain an intermediate sinusoidal gate signal. The coupled microstrip line can divide the intermediate sinusoidal gate signal into two outputs with a power ratio of 1:99. One output power accounts for 1% and outputs the out3 signal, i.e., the intermediate sinusoidal gate signal, which is output to the sinusoidal gate amplitude detection signal generation module. The other output power accounts for 99% and is filtered by the second bandpass filter to output the out4 signal, i.e., the sinusoidal gate signal.
[0077] Figure 4 A block diagram of a sinusoidal gate amplitude detection signal generating module of a front-end gate circuit chip for a sinusoidally gated single-photon detector according to an embodiment of the present invention is shown.
[0078] like Figure 4 As shown, the sinusoidal gate amplitude detection signal generating module 430 includes a third attenuator 431 , a detector 432 and an operational amplifier 433 which are electrically connected in sequence.
[0079] The third attenuator 431 is configured to attenuate the intermediate sinusoidal gate signal to obtain a first intermediate sinusoidal gate signal and output the first intermediate sinusoidal gate signal.
[0080] The detector 432 is configured to detect the first intermediate sinusoidal gate signal to obtain a voltage signal, and output the voltage signal.
[0081] The operational amplifier 433 is configured to amplify the voltage signal to obtain a sinusoidal gate amplitude detection signal, and output the sinusoidal gate amplitude detection signal.
[0082] According to an embodiment of the present invention, the third attenuator attenuates the intermediate sinusoidal gate signal to obtain a first intermediate sinusoidal gate signal, and outputs the first intermediate sinusoidal gate signal to the detector. The detector obtains a voltage signal based on the power of the first intermediate sinusoidal gate signal, and outputs the voltage signal to the operational amplifier. The operational amplifier amplifies the voltage signal to obtain a sinusoidal gate amplitude detection signal, and outputs the out5 signal, i.e., the sinusoidal gate amplitude detection signal.
[0083] According to an embodiment of the present invention, since the performance indicators of the sinusoidal gated single-photon detector are very sensitive to the amplitude of the sinusoidal gate signal, in actual use, the amplitude of the sinusoidal gate signal will slowly change with environmental parameters such as temperature and air pressure. The amplitude of the sinusoidal gate signal can be adjusted in real time according to the value of the sinusoidal gate amplitude detection signal, thereby ensuring the stable operation of the sinusoidal gated single-photon detector.
[0084] According to an embodiment of the present invention, the front-end gate circuit chip further includes a low-temperature co-fired ceramic substrate, on which are disposed a coincidence gate signal generation module, a sinusoidal gate signal generation module, and a sinusoidal gate amplitude detection signal generation module. The bare chip die can be soldered to the low-temperature co-fired ceramic substrate.
[0085] According to an embodiment of the present invention, a low-temperature co-fired ceramic substrate, a coincidence gate signal generation module, a sinusoidal gate signal generation module, and a sinusoidal gate amplitude detection signal generation module are encapsulated in a metal housing. The metal housing is filled with nitrogen. The metal housing can be capped with a Kovar alloy to form a system-in-package chip.
[0086] According to an embodiment of the present invention, the front-end gate circuit chip has a length less than 30 mm, a width less than 20 mm, and a height less than 3 mm.
[0087] Figure 5 FIG. 4 shows a block diagram of a sinusoidally gated single-photon detector system according to an embodiment of the present invention.
[0088] like Figure 5 As shown, the sinusoidal gated single photon detector system 500 includes a sinusoidal gated single photon detector 510 and a front-end gate circuit chip 520. The front-end gate circuit chip 520 is configured to provide the sinusoidal gated single photon detector 510 with a coincidence gate signal, a sinusoidal gate signal, and a sinusoidal gate amplitude detection signal.
[0089] According to the embodiment of the present invention, the front-end gate circuit chip can refer to the description of other embodiments of the present invention, which will not be repeated here.
[0090] The sinusoidal-gated single-photon detector system can achieve wide-range adjustment of the peak-to-peak value of the sinusoidal gate signal and high-precision adjustment of the gate signal delay. It can also use the coincidence gate signal to filter out the dark count noise of the sinusoidal-gated single-photon detector when the gate is closed. The amplitude of the sinusoidal gate signal can be adjusted in real time using the output value of the sinusoidal gate amplitude detection signal, improving the system's performance and stability. In summary, the front-end gate circuit provided by the present invention achieves the full functionality of the gate circuit while significantly reducing the circuit size and significantly improving the system's integration.
[0091] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of the systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each box in the flowchart or block diagram may represent a module, program segment, or portion of code, which contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the boxes may occur in an order different from that marked in the accompanying drawings. For example, two boxes shown in succession may actually be executed substantially in parallel, or they may sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, as well as the combination of boxes in the block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or may be implemented using a combination of dedicated hardware and computer instructions. It will be understood by those skilled in the art that the features described in the various embodiments of the present invention may be combined and / or coupled in various ways, even if such combinations or couplings are not explicitly described in the present invention. In particular, the features described in the various embodiments of the present invention may be combined and / or coupled in various ways without departing from the spirit and teachings of the present invention. All such combinations and / or combinations fall within the scope of the present invention.
[0092] The above describes embodiments of the present invention. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present invention. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination. Without departing from the scope of the present invention, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.
Claims
1. A front-end gate circuit chip for a sinusoidally gated single-photon detector, characterized in that: include: a coincidence gate signal generation module configured to perform bandpass filtering and low-noise amplification on the frequency reference signal input to the front-end gate circuit chip to obtain an intermediate coincidence gate signal, perform phase shifting on the intermediate coincidence gate signal to obtain a coincidence gate signal, and output the coincidence gate signal, wherein the coincidence gate signal is used by the sinusoidally gated single-photon detector to shield signals outside the effective gate width; a sinusoidal gate signal generating module, electrically connected to the gate signal generating module, configured to receive the intermediate coincidence gate signal, amplify the intermediate coincidence gate signal to obtain an intermediate sinusoidal gate signal, filter the intermediate sinusoidal gate signal to obtain a sinusoidal gate signal, and output the sinusoidal gate signal, wherein the sinusoidal gate signal is used as a gate signal for a single-photon avalanche diode in the sinusoidally gated single-photon detector; A sinusoidal gate amplitude detection signal generation module is electrically connected to the sinusoidal gate signal generation module and is configured to receive the intermediate sinusoidal gate signal, detect and amplify the intermediate sinusoidal gate signal to obtain a sinusoidal gate amplitude detection signal, and output the sinusoidal gate amplitude detection signal, wherein the sinusoidal gate amplitude detection signal is used to detect the amplitude of the sinusoidal gate signal when used in the sinusoidal gated single photon detector.
2. The front-end gate circuit chip according to claim 1, characterized in that: The coincidence gate signal generating module includes an intermediate coincidence gate signal generating unit, wherein the intermediate coincidence gate signal generating unit includes a first bandpass filter, a first-stage low noise amplifier, a first attenuator, a first phase shifter, a voltage-controlled attenuator, and a second-stage low noise amplifier electrically connected in sequence; The first bandpass filter is configured to filter the frequency reference signal to obtain a first intermediate frequency reference signal, and output the first intermediate frequency reference signal; The first-stage low noise amplifier and the first attenuator are configured to perform amplitude adjustment on the first intermediate frequency reference signal to obtain a second intermediate frequency reference signal that meets the amplitude input requirement of the first phase shifter, and output the second intermediate frequency reference signal; The first phase shifter is configured to perform an initial phase adjustment on the second intermediate frequency reference signal to obtain a third intermediate frequency reference signal, and output the third intermediate frequency reference signal; The voltage-controlled attenuator is configured to perform amplitude adjustment on the third intermediate frequency reference signal to obtain a fourth intermediate frequency reference signal, and output the fourth intermediate frequency reference signal; The secondary low noise amplifier is configured to amplify the fourth intermediate frequency reference signal to obtain the intermediate coincidence gate signal, and output the intermediate coincidence gate signal.
3. The front-end gate circuit chip according to claim 2, characterized in that: The coincidence gate signal generating module includes a coincidence gate signal generating unit, the coincidence gate signal generating unit is electrically connected to the intermediate coincidence gate signal generating unit, wherein the coincidence gate signal generating unit includes a power divider and a second phase shifter electrically connected; The power divider is connected to the secondary low-noise discharge, and the power divider includes two paths, one of which outputs the intermediate coincidence gate signal to the sinusoidal gate signal generation module, and the other outputs the intermediate coincidence gate signal to the second phase shifter; The second phase shifter is configured to perform relative phase adjustment on the intermediate coincidence gate signal to obtain the coincidence gate signal, and output the coincidence gate signal.
4. The front-end gate circuit chip according to claim 1, characterized in that: The sinusoidal gate signal generating module includes a second attenuator, a power amplifier, a coupled microstrip line and a second bandpass filter electrically connected in sequence; The second attenuator is configured to attenuate the intermediate coincidence gate signal to obtain a first intermediate coincidence gate signal, and output the first intermediate coincidence gate signal; The power amplifier is configured to amplify the first intermediate coincidence gate signal to obtain the intermediate sinusoidal gate signal, and output the intermediate sinusoidal gate signal; The coupled microstrip line includes two paths, one of which outputs the intermediate sinusoidal gate signal to the sinusoidal gate amplitude detection signal generation module, and the other outputs the intermediate sinusoidal gate signal to the second bandpass filter; The second bandpass filter is configured to filter the intermediate sinusoidal gate signal and then output the sinusoidal gate signal.
5. The front-end gate circuit chip according to claim 1, characterized in that: The sinusoidal gate amplitude detection signal generating module includes a third attenuator, a detector and an operational amplifier electrically connected in sequence; The third attenuator is configured to attenuate the intermediate sinusoidal gate signal to obtain a first intermediate sinusoidal gate signal and output the first intermediate sinusoidal gate signal; The detector is configured to detect the first intermediate sinusoidal gate signal to obtain a voltage signal and output the voltage signal; The operational amplifier is configured to amplify the voltage signal to obtain the sinusoidal gate amplitude detection signal, and output the sinusoidal gate amplitude detection signal.
6. The front-end gate circuit chip according to any one of claims 1 to 5, characterized in that: The front-end gate circuit chip also includes: A low-temperature co-fired ceramic substrate is provided on which the coincidence gate signal generation module, the sinusoidal gate signal generation module and the sinusoidal gate amplitude detection signal generation module are arranged.
7. The front-end gate circuit chip according to claim 6, wherein the low-temperature co-fired ceramic substrate, the coincidence gate signal generation module, the sinusoidal gate signal generation module and the sinusoidal gate amplitude detection signal generation module of the front-end gate circuit chip are encapsulated in a metal tube shell.
8. The front-end gate circuit chip according to claim 7, characterized in that: The metal tube shell is filled with nitrogen.
9. The front-end gate circuit chip according to any one of claims 1 to 5, characterized in that: The front-end gate circuit chip has a length of less than 30 mm, a width of less than 20 mm, and a height of less than 3 mm.
10. A sinusoidally gated single-photon detector system, characterized in that: include: Sine-gated single-photon detector; as well as The front-end gate circuit chip according to any one of claims 1 to 9, configured to provide a coincidence gate signal, a sinusoidal gate signal, and a sinusoidal gate amplitude detection signal to the sinusoidal-gated single-photon detector.
Citation Information
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