Interface verification method, electronic device, storage medium and program product

Abstract

The present application discloses an interface verification method, an electronic device, a storage medium, and a program product, relating to the technical field of servers. After starting the firmware interface of the server, an interface verification program is imported into the firmware interface, and the command-line interface of the firmware interface is set to have access rights to the interface verification program. The interface verification program is run on the command-line interface of the firmware interface to verify the reliability of the target keyboard controller style interface, and a reliability verification result of the target keyboard controller style interface is obtained. Without booting the operating system, the reliability verification of the keyboard controller style interface can be implemented on the command-line interface of the firmware interface after the firmware interface is started, solving the technical problems in the related art of relatively strict requirements for the hardware environment and long verification waiting time, and achieving the technical effects of reducing the dependence on the hardware environment and shortening the verification waiting time.

Description

Technical Field

[0001] This application relates to the technical field of servers, and particularly to an interface verification method, an electronic device, a storage medium, and a program product. Background Art

[0002] The Keyboard Controller Style (KCS) interface in a server is a key component to ensure system stability. The server host and the Baseboard Management Controller (BMC) use this KCS interface to transfer important information. Therefore, the reliability of this KCS interface is crucial. In related technologies, the reliability verification of the KCS interface mainly relies on the Intelligent Platform Management Interface (IPMI) tool under the server host operating system.

[0003] However, this method of verifying the reliability of the KCS interface can only be carried out after the host operating system is fully started, has relatively strict requirements for the hardware environment, and has a long verification waiting time. Summary of the Invention

[0004] This application provides an interface verification method, an electronic device, a storage medium, and a program product to at least solve the problem that the reliability verification method of the KCS interface in related technologies can only be carried out after the host operating system is fully started, has relatively strict requirements for the hardware environment, and has a long verification waiting time.

[0005] This application provides an interface verification method, including:

[0006] Starting the firmware interface of the server;

[0007] Importing an interface verification program into the firmware interface and setting the command-line interface of the firmware interface to have access rights to the interface verification program;

[0008] Running the interface verification program in the command-line interface of the firmware interface to verify the reliability of the target Keyboard Controller Style interface and obtaining the reliability verification result of the target Keyboard Controller Style interface.

[0009] This application also provides an electronic device, including: a memory for storing a computer program; a processor for implementing the steps of any of the above interface verification methods when executing the computer program.

[0010] This application also provides a computer-readable storage medium, in which a computer program is stored, and the computer program implements the steps of any of the above interface verification methods when executed by a processor.

[0011] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above interface verification methods when executed by a processor.

[0012] Through the present application, after starting the firmware interface of the server, the interface verification program is imported into the firmware interface, and the command-line interface of the firmware interface is set to have access rights to the interface verification program. The interface verification program is run on the command-line interface of the firmware interface to verify the reliability of the target keyboard controller style interface, and a reliability verification result of the target keyboard controller style interface is obtained. Without booting the operating system, the reliability verification of the keyboard controller style interface can be implemented on the command-line interface of the firmware interface after the firmware interface is started, solving the technical problems of relatively strict requirements for the hardware environment and long verification waiting time in the related art, and achieving the technical effects of reducing the dependence on the hardware environment and shortening the verification waiting time. Description of the Drawings

[0013] To more clearly illustrate the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and those of ordinary skill in the art can obtain other drawings based on these drawings without creative efforts.

[0014] Figure 1 Schematic diagram of the operating environment of the KCS interface verification tool in the related art;

[0015] Figure 2 Schematic diagram of the operating environment of the KCS interface verification tool in the embodiment of the present application;

[0016] Figure 3 Schematic diagram of the structure of the interface verification system provided in the embodiment of the present application;

[0017] Figure 4 Schematic diagram of the flowchart of an interface verification method provided in the embodiment of the present application;

[0018] Figure 5 Schematic diagram of the flowchart of another interface verification method provided in the embodiment of the present application;

[0019] Figure 6 Schematic diagram of the flowchart of another interface verification method provided in the embodiment of the present application;

[0020] Figure 7 Schematic diagram of the flowchart of the operation of the interface verification program provided in the embodiment of the present application;

[0021] Figure 8 Schematic diagram of the flowchart of the host KCS write process provided in the embodiment of the present application;

[0022] Figure 9 It is a schematic flowchart of the host KCS read process provided by an embodiment of this application;

[0023] Figure 10 It is a schematic hardware structure diagram of an electronic device provided by an embodiment of this application. Detailed implementation manners

[0024] Next, the technical solutions in the embodiments of this application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this application.

[0025] It should be noted that in the description of this application, the terms "include", "comprise" or any other variant thereof are intended to cover a non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0026] As a high-performance computing device that provides shared resources for clients, the server is controlled by an operating system and includes a server host and a BMC. Among them, the server host and the BMC implement the transfer of important information through the KCS interface, such as configuration management information, fault diagnosis information, etc. Therefore, the reliability of the KCS interface is crucial for ensuring the system stability of the server.

[0027] In the related art, the verification of the KCS interface needs to be carried out in cooperation with the server host and the BMC. Generally, a KCS interface verification tool is used to verify the reliability of the KCS interface. Verifying the KCS interface on the server host side usually depends on the IPMI tool under the server host operating system. Figure 1 It is a schematic diagram of the operating environment of the KCS interface verification tool in the related art. As Figure 1 shown, the KCS interface verification tool, that is, the IPMI tool, runs under the operating system of the server host, and the IPMI tool under the server host operating system is used to verify the KCS interface.

[0028] However, the startup of the operating system of the server host is highly dependent on the board environment and requires the Unified Extensible Firmware Interface (UEFI for short) for booting. This results in relatively strict requirements for the hardware environment in the verification of the KCS interface, making it impossible to quickly carry out verification work in the early stage of the project and leading to a long verification waiting time.

[0029] Moreover, there are generally multiple groups of KCS interfaces on the server. For the full-coverage verification of multiple groups of KCS interfaces by the server host operating system, it is necessary to install the corresponding IPMI tool for each group of KCS interfaces and adapt it before verifying the corresponding KCS interface, resulting in low verification efficiency.

[0030] In view of the above problems, the embodiments of the present application provide an interface verification method, an electronic device, a storage medium, and a program product. The method is applied to the server host and includes: starting the firmware interface of the server; importing the interface verification program into the firmware interface and setting the command-line interface of the firmware interface to have access rights to the interface verification program; running the interface verification program in the command-line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtaining the reliability verification result of the target keyboard controller style interface. In the method provided by the above solution, by running the interface verification program in the command-line interface of the firmware interface when the firmware interface of the server is started, the reliability of the target keyboard controller style interface can be verified without booting the operating system and without installing and adapting the IPMI tool under the operating system. It is only necessary to run the interface verification program in the command-line interface of the firmware interface to verify the reliability of the target keyboard control style interface. Figure 2 This is a schematic diagram of the operating environment of the KCS interface verification tool according to the embodiments of the present application. As Figure 2 shown, the operation of the KCS interface verification tool according to the embodiments of the present application depends on the startup of UEFI and runs in the command-line interface of UEFI to implement the reliability verification of the KCS interface. Among them, the KCS interface verification tool according to the embodiments of the present application realizes the verification of the KCS interface based on the interface verification program according to the embodiments of the present application. UEFI is the firmware interface according to the embodiments of the present application, and the command-line interface of UEFI can be the UEFI shell. It should be noted that under the UEFI shell, binary files with the.efi file extension can be executed, that is, the interface verification program is a binary file with the.efi file extension.

[0031] It can be seen that the interface verification method, electronic device, storage medium, and program product provided by the embodiments of the present application solve the technical problems in the related art of relatively strict requirements for the hardware environment and long verification waiting time, and achieve the technical effects of reducing the dependence on the hardware environment and shortening the verification waiting time.

[0032] To enable those skilled in the art of the present technology to better understand the solution of this application, the following provides a further detailed description of this application in conjunction with the accompanying drawings and specific implementation manners.

[0033] In combination with the specific application environment architecture or specific hardware architecture on which the execution of the interface verification method depends, the specific application environment architecture or specific hardware architecture is described herein.

[0034] The interface verification method, electronic device, storage medium, and program product provided by the embodiments of this application are applicable to verifying the reliability of the KCS interface in a server. As Figure 3 shown, it is a schematic structural diagram of the interface verification system based on this application. The interface verification system includes a server host and a BMC, and the server host and the BMC are connected by a bus. In this embodiment, the bus is taken as an example of an Enhanced Serial Peripheral Interface (abbreviation: eSPI) bus for illustration. This bus can also be a Low Pin Count (abbreviation: LPC) bus, and no specific limitation is made here. In this embodiment, the server host is taken as an example of a server host based on the X86 architecture, and it can also be other types of server hosts, and no specific limitation is made here.

[0035] Among them, the KCS interface is a serial communication interface on the eSPI bus and is a physical interface in the server for sending IPMI commands. The server host and the BMC communicate through the KCS interface. Exemplarily, there are four groups of KCS interfaces on the eSPI bus, namely KCS interface 0, KCS interface 1, KCS interface 2, and KCS interface 3. It can be understood that the KCS interface is also a serial communication interface on the LPC bus.

[0036] The server host includes UEFI. The operation of the KCS interface verification tool, that is, the KCS verification tool, depends on UEFI. After UEFI is started, the KCS interface verification tool is run under the UEFI shell to implement the reliability verification of each group of KCS interfaces. Among them, the reliability verification of any group of KCS interfaces includes: the KCS verification tool of the server host performs KCS data sending and receiving through this KCS interface, and determines the reliability verification result of this KCS interface by comparing the received KCS data with the sent KCS data.

[0037] Specifically, the KCS verification tool of the server host sends KCS data to the BMC through this KCS interface. The BMC firmware in the BMC receives the KCS data through this KCS interface and writes the KCS data into the cache. The BMC firmware in the BMC sends the KCS data in the cache to the server host through this KCS interface. The KCS verification tool of the server host receives the KCS data sent by the BMC through this KCS interface, compares the received KCS data with the sent KCS data. If they are consistent, it is determined that the reliability verification of this KCS interface passes. Among them, when performing reliability verification on any group of KCS interfaces, the BMC firmware performs KCS data sending and receiving through this group of KCS interfaces. It should be noted that Figure 3 taking the reliability verification of KCS interface 0 as an example.

[0038] An embodiment of the present application provides an interface verification method, which is applied to a server host. It should be noted that the host mentioned in the following text is the server host. Figure 4 is a flowchart of the interface verification method provided by the embodiment of the present application. As Figure 4 shown, this process includes the following steps:

[0039] Step S401, start the firmware interface of the server.

[0040] Among them, this firmware interface is the aforementioned UEFI. The UEFI firmware is the first program run by the server host. UEFI is a new generation of firmware interface standard, which is used to replace the traditional Basic Input Output System (BIOS for short).

[0041] Step S402, import the interface verification program into the firmware interface and set the command line interface of the firmware interface to have access rights to the interface verification program.

[0042] Figure 5 is a flowchart of the interface verification method provided by the embodiment of the present application. As Figure 5 shown, after the UEFI starts up, import the KCS interface verification tool into the UEFI to make the KCS interface verification tool visible under the UEFI shell.

[0043] As can be seen from the above, the KCS interface verification tool realizes the verification of the KCS interface based on the interface verification program. Then, importing the KCS interface verification tool into the UEFI means importing the interface verification program into the UEFI. This interface verification program is an executable program in efi format.

[0044] Make the KCS interface verification tool visible under the UEFI shell, that is, set the command-line interface of the firmware interface to have access rights to the interface verification program. That is to say, the command-line interface of the firmware interface is the UEFI shell.

[0045] Step S403, run the interface verification program in the command-line interface of the firmware interface to verify the reliability of the target keyboard controller style interface, and obtain the reliability verification result of the target keyboard controller style interface.

[0046] Among them, as Figure 5 shown, execute the KCS interface verification tool to verify the KCS interface and return the verification result. That is, run the interface verification program under the UEFI shell to verify the reliability of the target KCS interface, and obtain the reliability verification result of the target KCS interface.

[0047] As described above, under the UEFI shell, the interface verification program is a binary file ending with the.efi file extension. Then, running the KCS interface verification tool under the UEFI shell can be exemplarily expressed as "KCSTestTool.efi [KCS base address] [data to be sent] [number of verifications]". Among them, the input parameters of the interface verification program include the KCS base address, the data to be sent, and the number of verifications, which are input by the user or set in advance.

[0048] The interface verification method provided by the embodiments of the present application, after starting the firmware interface of the server, imports the interface verification program into the firmware interface, and sets the command-line interface of the firmware interface to have access rights to the interface verification program. Run the interface verification program in the command-line interface of the firmware interface to verify the reliability of the target keyboard controller style interface, and obtain the reliability verification result of the target keyboard controller style interface. There is no need to boot the operating system, and the reliability verification of the keyboard controller style interface can be realized in the command-line interface of the firmware interface after the firmware interface is started. Since the UEFI firmware is the first program run by the server host and the UEFI shell is the inherent interactive command interface of the UEFI firmware, therefore, the method of verifying the KCS interface under the UEFI shell omits the steps of first booting the operating system by the UEFI firmware and then installing and adapting the IPMI tool under the operating system when verifying the target KCS interface in the related art. It can be carried out only under the UEFI shell inherent in the UEFI firmware, solving the technical problems of relatively strict hardware environment requirements and long verification waiting time in the related art, and achieving the technical effects of reducing the dependence on the hardware environment and shortening the verification waiting time.

[0049] Moreover, the interface verification method provided by the embodiments of this application can flexibly use any data verification KCS interface, is not dependent on a specific hardware platform and a specific version of the UEFI firmware, can be copied to the UEFI shell for direct use, and has universality. This method directly outputs the reliability verification result of the target KCS interface instead of the original data, and the result is more intuitive. By inputting the base addresses of different KCS interfaces, different KCS interfaces can be verified, which has flexibility, eliminates the steps of the UEFI firmware booting the operating system and installing and adapting the IPMI tool under the operating system, greatly reduces the workload of KCS interface verification, is simple and easy to use, and improves the verification efficiency.

[0050] An embodiment of this application provides an interface verification method, which is applied to a server host. Figure 6 is a flowchart of the interface verification method provided by the embodiments of this application, as Figure 6 shown, this process includes the following steps:

[0051] Step S601, start the firmware interface of the server. For details, please refer to Figure 4 step S401 of the embodiment shown, which will not be elaborated here.

[0052] Step S602, import the interface verification program into the firmware interface, and set the command line interface of the firmware interface to have access rights to the interface verification program. For details, please refer to Figure 4 step S402 of the embodiment shown, which will not be elaborated here.

[0053] Step S603, run the interface verification program in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface, and obtain the reliability verification result of the target keyboard controller style interface.

[0054] Specifically, the above step S603 includes:

[0055] Step S6031, obtain and parse the input parameters of the interface verification program to obtain the base address of the target keyboard controller style interface, the data to be sent, and the verification times threshold.

[0056] Among them, Figure 7 is a flowchart of the operation of the interface verification program provided by the embodiments of this application. As Figure 7 shown, run the interface verification program, obtain and parse the input parameters of the interface verification program, and obtain the KCS base address, the data to be sent, and the verification times in the input parameters.

[0057] The KCS base address in this input parameter is the base address of the target KCS interface, that is, a group of KCS interfaces to be verified currently. Different KCS base addresses represent different KCS interfaces. For example, 0xCA0 represents KCS interface 0.

[0058] The data to be sent in the input parameter is the data to be sent, and the number of verification times in the input parameter is the verification times threshold.

[0059] It should be noted that the base address of the target KCS interface and the verification times threshold are stored in variables, and the data to be sent is stored in the allocated address space.

[0060] Step S6032, set the bus decoding enable register to map the register addresses of multiple groups of keyboard controller style interfaces to the bus.

[0061] Among them, as Figure 7 shown, decode the KCS address to the eSPI bus. That is, set the eSPI bus decoding enable register on the host side to decode the input / output address (Input / Output, abbreviated as I / O) 0xCA0 - 0xCAF to the eSPI bus. The bus decoding enable register in the embodiment of the present application can be the eSPI bus decoding enable register. 0xCA0 - 0xCAF is the common address of the KCS interface.

[0062] It should be noted that under the UEFI shell, the reading and writing of the register address of the KCS interface are the reading and writing of the IO address space, corresponding to the input (IN) and output (OUT) instructions under the X86 server architecture.

[0063] Step S6033, enable the bus decoding enable register, and based on the base address of the target keyboard controller style interface, generate an address pulse of the target keyboard controller style interface on the bus to activate the target keyboard controller style interface and communicate with the controller based on the target keyboard controller style interface.

[0064] Among them, after enabling the bus decoding enable register, reading and writing the I / O addresses in the range of 0xCA0 - 0xCAF by the server host will generate corresponding read and write pulses of the address on the eSPI bus.

[0065] When the server host communicates with any group of KCS interfaces, it is necessary to generate corresponding address pulses on the eSPI bus. In this embodiment, according to the base address of the target KCS interface in the input parameter, it can be known that the target KCS interface is to be verified currently. Then the server host needs to communicate with the target KCS interface. Based on the base address of the target KCS interface, an address pulse of the target KCS interface is generated on the eSPI bus to activate the target KCS interface and communicate with the controller based on the target KCS interface. Among them, the controller can be the above-mentioned BMC.

[0066] It can be understood that by modifying the KCS base address in the input parameters, an address pulse of the KCS interface corresponding to the KCS base address can be generated on the eSPI bus, so as to use the corresponding KCS interface for communication and achieve the reliability verification of different KCS interfaces.

[0067] Step S6034: Based on the data to be sent and the verification times threshold, verify the reliability of the target keyboard controller style interface to obtain the reliability verification result of the target keyboard controller style interface.

[0068] Among them, after activating the target KCS interface, based on the data to be sent and the verification times threshold, verify the reliability of the target KCS interface to obtain the reliability verification result of the target KCS interface.

[0069] It should be noted that the KCS interface is a standard interface defined in the IPMI specification, and the IPMI specification defines the standard command format of IPMI commands between the BMC and the server host. Each group of KCS interfaces has 4 registers. That is, for any group of keyboard controller style interfaces, the group of keyboard controller style interfaces includes an input data register, an output data register, a status register, and a command register. Among them, each register is 1 byte wide, and the four registers together occupy 2 bytes of address space, and the low address of this address space is the base address of the KCS interface. The addresses of the input data register and the output data register are the same, and the addresses of the status register and the command register are the same.

[0070] For any group of keyboard controller style interfaces, the address of its input data register and the address of its output data register are the base address of the group of keyboard controller style interfaces, and the address of its status register and the address of its command register are preset addresses, and the preset address is the base address of the group of keyboard controller style interfaces plus a preset value. The preset value can be 1, that is, the addresses of the status register and the command register are the base address of the group of KCS interfaces plus 1.

[0071] Exemplarily, if the KCS base address is 0xCA0, it corresponds to KCS interface 0. The addresses of the input data register and the output data register of this KCS interface 0 are 0xCA0, and the addresses of the command register and the status register of this KCS interface 0 are 0xCA1. Among them, the definition of the register bits in each register can be seen in the IPMI specification.

[0072] Among them, bit 0 of the status register is the Output Buffer Full flag (OBF for short). When the BMC writes a value to address 0xCA0, OBF is automatically set to 1, indicating that there is data in the output buffer; when the value at address 0xCA0 is read by the host, OBF is automatically cleared to 0, indicating that the data in the output buffer has been taken away.

[0073] Bit 1 of the status register is the Input Buffer Full flag (IBF for short). When the host writes a value to address 0xCA1, IBF is automatically set to 1, indicating that there is data in the input buffer; when the value at address 0xCA1 is read by the BMC, IBF is automatically cleared to 0, indicating that the data in the input buffer has been taken away.

[0074] Bits 6 (bit6) and 7 (bit7) of the status register are status bits, which can represent 4 states, namely the idle state (IDLE_STATE), the read state (READ_STATE), the write state (WRITE_STATE), and the error state (ERROR_STATE). These status bits can be set and detected during the interaction between the host and the BMC.

[0075] It should be noted that the base address of each group of KCS interfaces can be changed through the registers on the BMC side.

[0076] The interface verification method provided by the embodiments of this application, by obtaining and parsing the input parameters of the interface verification program, using the bus decoding enable register, maps the register addresses of multiple groups of keyboard controller style interfaces to the bus, enables the bus decoding enable register, based on the base address of the target keyboard controller style interface, activates the target keyboard controller style interface, and based on the data to be sent and the verification times threshold, verifies the reliability of the target keyboard controller style interface, improving the automation degree and efficiency of the verification process of the target KCS interface.

[0077] In some optional implementation manners, the above step S6034 includes:

[0078] Step a1, based on the target keyboard controller style interface, write the data to be sent into the buffer of the controller.

[0079] As Figure 7 shown, after decoding the KCS address to the eSPI bus, that is, after activating the target KCS interface, start to verify the reliability of the target KCS interface. It can be understood that the reliability verification of the target KCS interface may need to be performed multiple times until the verification times threshold is reached to obtain the reliability verification result of the target KCS interface.

[0080] Among them, each reliability verification of the target KCS interface includes a host KCS write process and a host KCS read process. The host KCS write process is to write the data to be sent into the buffer of the controller based on the target keyboard controller style interface.

[0081] It should be noted that the host KCS write process is the KCS interface sending process. The host KCS write process and the host KCS read process require the host and BMC to work together, and the working process follows the IPMI specification.

[0082] Step a2: Read the target data in the buffer of the controller based on the target keyboard controller style interface.

[0083] After the host KCS write process is completed, the host KCS read process is carried out, that is, based on the target keyboard controller style interface, read the target data in the buffer of the controller.

[0084] Step a3: Determine the result of this reliability verification of the target keyboard controller style interface based on the data to be sent and the target data.

[0085] Among them, for any reliability verification of the target KCS interface, it is judged whether the read data is consistent with the expected result, that is, whether the data to be sent and the target data are consistent. According to the judgment result, the result of this reliability verification of the target KCS interface is determined.

[0086] Step a4: If the result of this reliability verification is that the reliability verification passes, then judge whether the current verification times reach the verification times threshold.

[0087] Among them, the verification times threshold is preset by technicians and is not specifically limited here.

[0088] Step a5: If the current verification times do not reach the verification times threshold, then return to execute the step of writing the data to be sent into the buffer of the controller based on the target keyboard controller style interface until the current verification times reach the verification times threshold to obtain the reliability verification result of the target keyboard controller style interface.

[0089] If the result of this reliability verification is that the reliability verification passes and the current verification times do not reach the verification times threshold, then the verification times are incremented by 1, and the next reliability verification is executed until the current verification times reach the verification times threshold to obtain the reliability verification result of the target KCS interface.

[0090] The interface verification method provided by the embodiments of this application can directly verify the reliability of the target KCS interface by writing the data to be sent into the controller buffer, reading the target data in the controller buffer, and comparing the data to be sent and the target data. The credibility of the reliability verification result of the target KCS interface is improved through multiple loop verifications.

[0091] In some alternative embodiments, the above interface verification method further includes:

[0092] Step b1, if the current reliability verification result is that the reliability verification fails, determine that the reliability verification result of the target keyboard controller style interface fails.

[0093] That is to say, in the case where any reliability verification of the target KCS interface fails, determine that the reliability verification result of the target KCS interface fails, without performing the remaining reliability verifications of the target KCS interface, and directly obtain the reliability verification result of the target KCS interface.

[0094] The interface verification method provided by the embodiments of the present application directly determines that the reliability verification of the target KCS interface fails in the case where any reliability verification of the target KCS interface fails, avoiding the continuation of subsequent meaningless verification steps and improving the efficiency of interface reliability verification.

[0095] In some alternative embodiments, the above interface verification method further includes:

[0096] Step c1, if the current verification times reach the verification times threshold, determine that the reliability verification result of the target keyboard controller style interface passes.

[0097] It can be understood that only when each reliability verification result passes can the current verification times reach the verification times threshold. In this case, directly determine that the reliability verification of the target KCS interface passes.

[0098] In some alternative embodiments, the above step a1 includes:

[0099] Step a11, wait for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0.

[0100] Figure 8 This is a schematic flowchart of the host KCS write process provided by the embodiments of the present application. As Figure 8 shown, the host waits for IBF to be 0 and clears OBF. That is, the host waits for the IBF of the target status register of the target KCS interface to be cleared to 0.

[0101] Among them, clearing IBF to 0 is an operation on the BMC side. The BMC initializes the target KCS interface on the BMC side and clears IBF.

[0102] Step a12, if the waiting time does not exceed the preset waiting time threshold, clear the output buffer full flag bit of the target status register.

[0103] If the waiting time does not exceed the preset waiting time threshold and the IBF of the target status register of the target KCS interface is cleared to 0, then clear the OBF of the target status register. Here, the preset waiting time can be 5 seconds, which is not specifically limited here.

[0104] It should be noted that the purpose of clearing the OBF to 0 is to prepare for subsequent data transmission. The purpose of waiting for the IBF to be cleared to 0 is to ensure that the input buffer of the BMC is empty so that the BMC can receive new data.

[0105] Step a13, write the write start command into the target command register of the target keyboard controller style interface and wait for the input buffer full flag bit to be cleared to 0 again.

[0106] The host writes the write start command WR_START to the target command register of the target KCS interface and waits for the IBF to be cleared to 0 again. That is, the host writes WR_START to the command register and waits for IBF = 0. Among them, when the host writes the write start command to the target command register, it will set the IBF to 1, indicating that there is new data in the input buffer of the BMC. After the BMC detects that the IBF becomes 1, it will trigger the IBF interrupt. The IBF interrupt service program of the BMC will process this interrupt and recognize that this is an interrupt generated by the write command. Then, the BMC will perform a series of operations: set the status bit of the target status register to WRITE_STATE, indicating entering the write data state; write data to the target output data register of the target KCS interface to set the OBF to 1, informing the host that the BMC is ready to respond; read the target command register to clear the IBF and prepare to receive the next data; according to the read WR_START command, set the variable phase to KCS_PHASE_WRITE_START, and the subsequent IBF interrupt program of the BMC will process the data sent by the host according to the value of this variable.

[0107] Step a14, read the target status register to determine whether the status bit of the target status register is in the write state.

[0108] When the IBF is cleared to 0 again, the host reads the status register to determine whether the status is WRITE_STATE. That is, read the target status register to determine whether the status bit of the target status register is in the write state.

[0109] Step a15, if the status bit of the target status register is in the write state, then clear the output buffer full flag bit to 0.

[0110] If the status bit of the target status register is in the write state, then the host clears the OBF, that is, clears the OBF to 0.

[0111] If the status bit of the target status register is not in the write state, an error exit occurs, that is, it is determined that the reliability verification result of this time for the target KCS interface fails the reliability verification.

[0112] Step a16: Write the data to be sent into the target output data register of the target keyboard controller style interface in the way of writing one byte each time, so that the controller reads the target input data register of the target keyboard controller style interface to obtain the written data to be sent, and saves the data to be sent in the buffer.

[0113] Specifically, as Figure 8 shown, the host writes the data to be sent into the data register of the KCS one byte at a time, that is, the host writes the data to be sent into the target output data register in the way of writing one byte each time.

[0114] Each time the host writes the target output data register, it sets IBF to 1, which will trigger the BMC to generate an IBF interrupt. The IBF interrupt service program of the BMC will process this interrupt, identify that this is an interrupt generated by writing data, and then enter the data processing flow. At this time, the BMC will perform different processing according to the value of the variable phase:

[0115] If phase is KCS_PHASE_WRITE_START, the BMC will set phase to KCS_PHASE_WRITE_DATA and continue to process subsequent data in this state.

[0116] If phase is KCS_PHASE_WRITE_DATA, the BMC will set the status bit of the target status register to WRITE_STATE, write the status information of successfully receiving the data sent by the host to the target output data register to set OBF to 1, read the target input data register to clear IBF to 0, and save the KCS data received from the host, that is, the single-byte data, to the buffer.

[0117] It should be noted that due to the design method of address multiplexing adopted by the KCS interface, the same physical address represents different register functions under different operation entities (host and BMC) and different operation directions (read and write).

[0118] From the perspective of the host, when the host performs a write operation on the base address of the KCS interface, it corresponds to the output data register of the host, and the host writes the data it wants to send to the BMC into this register.

[0119] From the perspective of the BMC, for the write operation of the host, the base address of this KCS interface corresponds to the input data register of the BMC, and the BMC can read the data sent by the host from this register.

[0120] Each time the host writes to the target output data register, it waits for the IBF to be cleared. After the IBF is cleared, the host reads the status register, i.e., the target status register of the target KCS interface, and checks if the status is WRITE_STATE. If it is not WRITE_STATE, an error occurs and the process exits.

[0121] If the status is WRITE_STATE, the host clears the OBF and prepares to write the next byte.

[0122] Check if the data to be written to the target output data register is the last byte of the KCS data, i.e., check if the data to be written to the target output data register is the last byte of the data to be sent.

[0123] If it is not, continue to transfer the data to be sent by writing it to the target output data register one byte at a time, i.e., return to the step of writing the data to be sent to the target output data register one byte at a time, and write it to the target output data register byte by byte.

[0124] If it is, the host writes the write end command, i.e., WR_END, to the command register, i.e., the target command register of the target KCS interface, and waits for the IBF to be cleared. Here, when the host writes WR_END to the target command register, this operation sets the IBF to 1, triggering the BMC to generate an IBF interrupt. The IBF interrupt service program of the BMC will handle this interrupt and recognize that it is an interrupt generated by a write command. Then, the BMC will perform a series of operations: set the status of the target status register to WRITE_STATE; write data to the target output data register to set the OBF to 1; read the target command register to clear the IBF; according to the read WR_END command, set the variable phase to KCS_PHASE_WRITE_END_CMD. Subsequently, the IBF interrupt program of the BMC will process the data of the last byte sent by the host based on the value of this variable.

[0125] When the IBF is cleared, the host reads the status register and checks if the status is WRITE_STATE. If it is not WRITE_STATE, an error occurs and the process exits.

[0126] If the status is WRITE_STATE, the host clears the OBF and prepares to write the last byte.

[0127] The host writes the last byte of KCS data, that is, the host writes the last byte of the data to be sent to the target output data register, which triggers the BMC to generate an IBF interrupt. The BMC's IBF interrupt service program will handle this interrupt and recognize that this is an interrupt generated by writing data. If the variable phase is KCS_PHASE_WRITE_END_CMD at this time, the BMC will set the status of the target status register to READ_STATE, read the target input data register to clear IBF to 0, save the last byte of KCS data read to the cache, and set the value of the variable phase to KCS_PHASE_WRITE_DONE. At the same time, the BMC will notify the upper-layer application to read all the received KCS data, that is, the target data, from the cache. At this point, the entire host KCS write process ends and enters the host KCS read process.

[0128] The interface verification method provided in the embodiment of the present application introduces a preset waiting time threshold to limit the waiting time, thereby avoiding the occurrence of infinite waiting and improving the response speed of the system. It can also exit the waiting state in time under abnormal circumstances and enter the subsequent processing flow, thereby improving the overall verification efficiency.

[0129] In some optional implementations, the above interface verification method further includes:

[0130] Step d1: if the waiting time exceeds a preset waiting time threshold, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

[0131] Among them, if the waiting time exceeds the preset waiting time threshold and the IBF of the target status register of the target KCS interface is not cleared to 0, then the reliability verification result of the target KCS interface is determined to be the reliability verification failed, and it can be known that the reliability verification result of the target KCS interface is the reliability verification failed.

[0132] In some optional implementations, the above step a2 includes:

[0133] Step a21, waiting for the input buffer full flag of the target status register of the target keyboard controller style interface to be cleared.

[0134] in, Figure 9 The following is a flow chart of the host KCS read process provided in the embodiment of the present application. Figure 9 As shown, the host KCS read process starts, and the host waits for IBF to be cleared, that is, waits for IBF of the target status register of the target KCS interface to be cleared.

[0135] It should be noted that when the host waits for the first time, IBF is cleared to 0 by the BMC at the end of the host KCS write process, and subsequently IBF is cleared to 0 in the IBF interrupt program of the BMC.

[0136] Step a22: Read the target status register and determine whether the status bit of the target status register is in the read state or the idle state. After writing the last byte of the data to be sent into the buffer of the controller, the controller sets the status bit of the target status register to the read state. After all the target data in the buffer is sent to the server host, the controller sets the status bit of the target status register to the idle state.

[0137] Among them, the host reads the status register and determines whether status is READ_STATE, that is, determines whether the status bit of the target status register is in the read state. The BMC sets status to READ_STATE at the end of the host KCS write process, and then the BMC initializes the KCS data and length information sent to the host, and uses the system call of the KCS interface to write the first byte of the target data in the buffer into the KCS output data register, that is, the target output data register.

[0138] If status is not READ_STATE, then determine whether status is IDLE_STATE. After the BMC writes the last byte of the target data into the target output data register, it sets status to IDLE_STATE. That is to say, after all the target data in the buffer is sent to the server host, the BMC sets the status bit of the target status register to the idle state.

[0139] Step a23: If the status bit of the target status register is in the read state, then when the output buffer full flag bit of the target status register is 1, read the target input data register of the target keyboard controller style interface, obtain the single-byte target data sent by the controller, write a read command to the target output data register of the target keyboard controller style interface, and return to execute the step of waiting for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0.

[0140] If status is READ_STATE, the host waits for OBF to be set to 1, and the host reads the data register of the KCS byte by byte, that is, the host reads the target input data register of the target KCS interface byte by byte. It can be understood that the controller writes the target data into the target output data register byte by byte.

[0141] It should be noted that when the host waits for OBF to be set to 1 for the first time, the BMC writes the first byte of the target data in the cache to the target output data register through a system call of the target KCS interface and sets OBF to 1. When the host waits for OBF to be set to 1 subsequently, the BMC writes a single-byte target data to the target output data register in the IBF interrupt service routine and sets OBF to 1, thus ending the host's wait.

[0142] Among them, after the host reads the single-byte target data in the target input data register each time, it increments the length of the read data by 1 to determine the length of the target data that has been read.

[0143] After reading the single-byte target data in the target input data register each time, the host also needs to write the read command, that is, READ, to the KCS data register, that is, the target output data register of the target KCS interface, and then jump to the step of waiting for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0 to continue the next loop reading. It can be understood that the host KCS read process is implemented through a loop. The host stores the read data in the host's cache and records the length of the read data.

[0144] After the host writes the read command to the target output data register of the target KCS interface, the BMC will generate an IBF interrupt. The BMC clears IBF in the IBF interrupt service routine by reading the KCS input data register, that is, the target input data register. If the BMC wants to continue sending data, the BMC keeps the status of the target status register of the target KCS interface as READ_STATE and writes the data to be sent to the target output data register of the target KCS interface byte by byte each time, and sets OBF to 1. If the data sending is completed, the BMC writes redundant bytes to the target output data register of the target KCS interface, sets OBF to 1, and sets the status of the target status register to IDLE_STATE.

[0145] Step a24, if the status bit of the target status register is in the idle state, then when the output buffer full flag bit of the target status register is 1, read the target input data register, obtain the redundant bytes, discard the redundant bytes, and determine the target data based on the single-byte target data sent by the controller.

[0146] Among them, when status is IDLE_STATE, the host waits for OBF to be set to 1. When OBF is set to 1, the host reads the redundant bytes from the KCS data register, that is, reads the target input data register, obtains the redundant bytes, discards the redundant bytes, and determines the target data based on the single-byte target data sent by the controller.

[0147] So far, the host KCS read process ends.

[0148] In some alternative embodiments, the above interface verification method further includes:

[0149] Step e1, if the status bit of the target status register is not the read status and not the idle status, determine that the reliability verification result of the current time for the target keyboard controller style interface fails the reliability verification.

[0150] Among them, as Figure 9 shown, if status is not READ_STATE and not IDLE_STATE, then exit with an error, that is, determine that the reliability verification result of the current time for the target keyboard controller style interface fails the reliability verification.

[0151] The interface verification method provided by the embodiments of the present application directly determines that the reliability verification result of the current time for the target KCS interface fails the reliability verification when the status bit of the target status register is not the read status and not the idle status, and then determines that the reliability verification of the target KCS interface fails, avoiding continuing to execute subsequent meaningless verification steps and improving the efficiency of interface reliability verification.

[0152] In some alternative embodiments, the above step a3 includes:

[0153] Step a31, compare the data length of the data to be sent with the data length of the target data.

[0154] Among them, the host reads the target data returned from the BMC side read from the host's cache and compares it with the expected result. As Figure 7 shown, determine whether the read data is consistent with the expected result. Among them, the read data is the target data, and the expected result is the data to be sent by the host.

[0155] Specifically, first compare the data length of the data to be sent with the data length of the target data.

[0156] Step a32, if the data length of the data to be sent is different from the data length of the target data, determine that the reliability verification result of the current time for the target keyboard controller style interface fails the reliability verification.

[0157] Among them, if the data length of the data to be sent is different from the data length of the target data, it indicates that the read data is inconsistent with the expected result, and determine that the reliability verification result of the current time for the target KCS interface fails the reliability verification.

[0158] In some alternative embodiments, the above interface verification method further includes:

[0159] Step f1, if the data length of the data to be sent is the same as that of the target data, compare the data content of the data to be sent with the data content of the target data.

[0160] Step f2, if the data content of the data to be sent is the same as that of the target data, determine that the result of this reliability verification of the target keyboard controller style interface is that the reliability verification passes.

[0161] The interface verification method provided by the embodiments of this application can, by comparing the content of the data to be sent and the target data, further perform detailed verification at the specific content level of the data on the basis of the same data length. Only when the data content is also exactly the same, it is determined that this reliability verification passes, which improves the credibility of the reliability verification result of the target KCS interface.

[0162] In some optional embodiments, the above interface verification method further includes:

[0163] Step g1, if the data content of the data to be sent is different from that of the target data, determine that the result of this reliability verification of the target keyboard controller style interface is that the reliability verification fails.

[0164] In some optional embodiments, the above step S6034 includes:

[0165] Step h1, based on the target keyboard controller style interface, write the data to be sent into the buffer of the controller.

[0166] Step h2, based on the target keyboard controller style interface, read the target data from the buffer of the controller.

[0167] Step h3, based on the data to be sent and the target data, determine the result of this reliability verification of the target keyboard controller style interface.

[0168] Step h4, save the result of this reliability verification, and judge whether the current verification times reach the verification times threshold.

[0169] Step h5, if the current verification times do not reach the verification times threshold, return to execute the step of writing the data to be sent into the buffer of the controller based on the target keyboard controller style interface until the current verification times reach the verification times threshold, and obtain the reliability verification result of the target keyboard controller style interface.

[0170] Specifically, obtaining the reliability verification result of the target keyboard controller style interface includes:

[0171] According to the multiple reliability verification results of the saved target KCS interface, judge whether the number of reliability verification results that are reliability verification passes in the multiple reliability verification results exceeds the preset number threshold.

[0172] If the number of reliability verification results that pass the reliability verification among multiple reliability verification results exceeds a preset quantity threshold, it is determined that the reliability verification result of the target keyboard controller style interface passes the reliability verification.

[0173] If the number of reliability verification results that pass the reliability verification among multiple reliability verification results does not exceed the preset quantity threshold, it is determined that the reliability verification result of the target keyboard controller style interface fails the reliability verification.

[0174] Among them, the preset quantity threshold is determined by technicians. Generally, it is greater than half of the verification times threshold.

[0175] During the data transmission process, a single reliability verification may fail due to various random factors, but this does not necessarily mean that there is a reliability problem with the interface itself. The interface verification method provided by the embodiments of the present application can, to a certain extent, exclude the interference of these random errors by performing multiple reliability verifications and counting the number of passed reliability verifications, and more accurately reflect the true reliability of the interface.

[0176] It should be noted that the interface verification method provided by the embodiments of the present application is applicable to all platforms that support UEFI.

[0177] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases, the former is a better implementation method.

[0178] Embodiments of the present application also provide an electronic device, as Figure 10 shown, including a processor 1001 and a memory 1002. A computer program is stored in the memory 1002, and the processor 1001 is configured to run the computer program to execute the steps in any of the above-mentioned interface verification method embodiments.

[0179] Embodiments of the present application also provide a computer-readable storage medium, in which a computer program is stored. Among them, the computer program is configured to execute the steps in any of the above-mentioned interface verification method embodiments when running.

[0180] In an exemplary embodiment, the above-mentioned computer-readable storage medium may include, but is not limited to: USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), mobile hard disks, magnetic disks, or optical discs and other various media that can store computer programs.

[0181] An embodiment of the present application also provides a computer program product. The computer program product includes a computer program, and when the computer program is executed by a processor, the steps in any of the above-described interface verification method embodiments are implemented.

[0182] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium. The non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-described interface verification method embodiments are implemented.

[0183] Those skilled in the art can further realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods for each specific application to implement the described functions, but such implementation should not be considered to exceed the scope of the present application.

[0184] The above has introduced in detail an interface verification method, an electronic device, a storage medium, and a program product provided by the present application. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims

1. An interface verification method, characterized in that: include: Start the server's firmware interface; Importing the interface verification program into the firmware interface, and setting the command line interface of the firmware interface to have access rights to the interface verification program; Running the interface verification program in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtain a reliability verification result of the target keyboard controller style interface; The step of running the interface verification program in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtaining the reliability verification result of the target keyboard controller style interface includes: Obtaining and parsing the input parameters of the interface verification program to obtain the base address of the target keyboard controller style interface, the data to be sent, and the verification times threshold; Set the bus decoding enable register to map the register addresses of multiple groups of keyboard controller style interfaces to the bus; Enable the bus decoding enable register, generate an address pulse of the target keyboard controller style interface on the bus based on the base address of the target keyboard controller style interface to activate the target keyboard controller style interface, and communicate with the controller based on the target keyboard controller style interface; Based on the data to be sent and the verification times threshold, verify the reliability of the target keyboard controller style interface to obtain a reliability verification result of the target keyboard controller style interface; Among them, for any group of keyboard controller style interfaces, the group of keyboard controller style interfaces includes an input data register, an output data register, a status register and a command register, the address of the input data register and the address of the output data register are the base address of the group of keyboard controller style interfaces, the address of the status register and the address of the command register are preset addresses, and the preset address is the base address of the group of keyboard controller style interfaces plus a preset value.

2. The interface verification method according to claim 1, characterized in that: The verifying the reliability of the target keyboard controller style interface based on the data to be sent and the verification times threshold, and obtaining the reliability verification result of the target keyboard controller style interface, includes: Based on the target keyboard controller style interface, writing the data to be sent into a buffer area of ​​the controller; Based on the target keyboard controller style interface, read the target data of the buffer area of ​​the controller; Determine the reliability verification result of the target keyboard controller style interface based on the data to be sent and the target data; If the reliability verification result of this time is that the reliability verification has passed, then determining whether the current number of verifications has reached the verification number threshold; If the current number of verifications does not reach the verification times threshold, return to execute the step of writing the data to be sent into the cache area of ​​the controller based on the target keyboard controller style interface until the current number of verifications reaches the verification times threshold, and obtain the reliability verification result of the target keyboard controller style interface.

3. The interface verification method according to claim 2, characterized in that: The method further comprises: If the reliability verification result of this time is that the reliability verification fails, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

4. The interface verification method according to claim 2, characterized in that: The method further comprises: If the current verification times reaches the verification times threshold, it is determined that the reliability verification result of the target keyboard controller style interface is reliability verification passed.

5. The interface verification method according to claim 2, characterized in that: The step of writing the data to be sent into a buffer area of ​​the controller based on the target keyboard controller style interface includes: Waiting for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0; If the waiting time does not exceed the preset waiting time threshold, clearing the output buffer full flag bit of the target status register to 0; Writing a write start command into the target command register of the target keyboard controller style interface, and waiting for the input buffer full flag to be cleared to 0 again; Read the target status register to determine whether the status bit of the target status register is in a write state; If the status bit of the target status register is in the write state, clearing the output buffer full flag bit to 0; The data to be sent is written into the target output data register of the target keyboard controller style interface in a single-byte writing manner, so that the controller reads the target input data register of the target keyboard controller style interface, obtains the written data to be sent, and saves the data to be sent into the cache.

6. The interface verification method according to claim 5, characterized in that: The method further comprises: If the waiting time exceeds the preset waiting time threshold, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

7. The interface verification method according to claim 2, characterized in that: The step of reading target data from a buffer area of ​​the controller based on the target keyboard controller style interface includes: Waiting for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0; Read the target status register to determine whether the status bit of the target status register is in a read state or an idle state, wherein after writing the last byte of the data to be sent into the buffer area of ​​the controller, the controller sets the status bit of the target status register to a read state, and after sending all the target data in the buffer area to the server host, the controller sets the status bit of the target status register to an idle state; If the status bit of the target status register is in a read state, then when the output buffer full flag bit of the target status register is 1, read the target input data register of the target keyboard controller style interface, obtain the single-byte target data sent by the controller, write a read command to the target output data register of the target keyboard controller style interface, and return to execute the step of waiting for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0; If the status bit of the target status register is in an idle state, then when the output buffer full flag bit of the target status register is 1, the target input data register is read to obtain redundant bytes, the redundant bytes are discarded, and the target data is determined based on the single-byte target data sent by the controller.

8. The interface verification method according to claim 7, characterized in that: The method further comprises: If the status bit of the target status register is not in the read state and is not in the idle state, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

9. The interface verification method according to claim 2, characterized in that: The determining the reliability verification result of the target keyboard controller style interface based on the data to be sent and the target data includes: Comparing the data length of the data to be sent with the data length of the target data; If the data length of the data to be sent is different from the data length of the target data, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification has failed.

10. The interface verification method according to claim 9, characterized in that: The method further comprises: If the data length of the data to be sent is the same as the data length of the target data, comparing the data content of the data to be sent with the data content of the target data; If the data content of the data to be sent is the same as the data content of the target data, it is determined that the reliability verification result of the target keyboard controller style interface is reliability verification passed.

11. The interface verification method according to claim 10, characterized in that: The method further comprises: If the data content of the data to be sent is different from the data content of the target data, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

12. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the interface verification method as claimed in any one of claims 1 to 11 when executing the computer program.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the interface verification method according to any one of claims 1 to 11.

14. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the interface verification method according to any one of claims 1 to 11 are implemented.

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