Wafer center positioning method and related device

By performing edge extraction and sub-region segmentation on multiple wafer edge images, combining edge positions to form curves, and determining the wafer center using circular fitting, the accurate positioning problem of wafer center positioning is solved, improving the accuracy of measurement and calculation efficiency.

CN119887912APending Publication Date: 2025-04-25SUZHOU MEGAROBO TECH CO LTD
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Patent Information

Application Number
CN202411934923.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-26
Publication Date
2025-04-25

AI Technical Summary

Technical Problem

How to accurately locate the center position of the wafer to ensure the accuracy of measurement and evaluation of the incision error of the lithography machine during chip manufacturing.

Method used

By obtaining multiple edge images containing the edges of the wafer, extracting the edge regions and dividing them into sub-regions, calculating and combining the edge positions of the sub-regions, forming a wafer edge curve, and determining the wafer center through circular fitting.

Benefits of technology

It improves the accuracy and reliability of the wafer center position, enhances the credibility and correctness of edge computing, and reduces the amount of calculated data.

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Abstract

The invention discloses a wafer center positioning method and a related device, and relates to the technical field of chip manufacturing, and the method comprises the steps: segmenting an edge region of a plurality of edge images containing wafer edges into a plurality of sub-regions, extracting the edge positions of the sub-regions to obtain the edge positions of the edge region, enabling an edge curve to better fit a real edge, and improving the accuracy of wafer center positioning. The credibility and correctness of edge calculation are improved, the edge positions of the preset number of edge areas are spliced into the wafer edge curve, edge image splicing is replaced, the calculated data volume is further reduced, meanwhile, the priori knowledge that the edge curve of the wafer is circular is utilized, circle fitting is carried out on the edge curve, and the accuracy of edge calculation is improved. And the accuracy and reliability of the center position of the wafer are ensured.
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Description

Technical Field

[0001] The present application relates to the field of chip manufacturing technology, and in particular to a wafer center positioning method and related devices. Background Art

[0002] Chips are the core and cornerstone of high-end manufacturing, and determine the development of high-tech industries. Photolithography is an extremely critical part of the chip manufacturing process. The process level of photolithography directly determines the process and performance of the chip. Chips are made up of multiple layers of circuits, and the manufacture of a chip often requires dozens of photolithography to complete. The alignment deviation between adjacent circuit layers in the chip is also called overlay error. The rapid measurement and accurate evaluation of overlay error is the key to optimizing the operating parameters of the lithography machine and managing the process yield.

[0003] After the lithography machine performs lithography, there will be a certain amount of overlay deviation. If the overlay deviation is to be measured, a wafer map needs to be established. The wafer map describes the distribution of the overlay marks and can guide the measurement equipment to perform measurements. However, the establishment of the wafer map depends on the center position of the wafer. Therefore, the accuracy of the center position of the wafer directly determines the accuracy of the positioning of the overlay marks and indirectly affects the measurement of the overlay deviation. How to accurately locate the center position of the wafer has become a technical problem that urgently needs to be solved in this field. Summary of the invention

[0004] In view of the above problems, the present application provides a wafer center positioning method and related devices to ensure the accuracy and reliability of the wafer center position. The specific scheme is as follows:

[0005] A first aspect of the present application provides a wafer center positioning method, comprising:

[0006] Acquire multiple edge images including the edge of the wafer;

[0007] Extracting edge regions from the plurality of edge images respectively;

[0008] Dividing the plurality of edge regions into a plurality of sub-regions respectively, and extracting the edge position of each of the sub-regions;

[0009] Merging edge positions of all the sub-regions in the same edge region to obtain an edge position of the edge region;

[0010] The edge positions of a preset number of the edge regions are spliced ​​into a wafer edge curve, and a circle fitting is performed on the wafer edge curve to obtain the wafer center.

[0011] In a possible implementation, before respectively extracting edge regions from the plurality of edge images, the wafer center positioning method further includes:

[0012] De-noising is performed on the plurality of edge images.

[0013] In a possible implementation, extracting edge regions from the plurality of edge images respectively includes:

[0014] Performing binarization processing on the plurality of edge images respectively to obtain binarized images;

[0015] The edge region is extracted from each of the binarized images respectively.

[0016] In a possible implementation, extracting the edge position of each sub-region includes:

[0017] For each of the sub-regions, edge gradient information in the sub-region is calculated, and a position with a maximum gradient value is determined as an edge position of the sub-region.

[0018] In a possible implementation, stitching the edge positions of a preset number of the edge regions into a wafer edge curve, and performing circle fitting on the wafer edge curve to obtain the wafer center includes:

[0019] randomly selecting three edge regions from a plurality of edge regions;

[0020] Calculate the parameters of the circle model based on the edge positions of the three selected edge regions;

[0021] Substituting edge positions of the plurality of edge regions into a circle model, calculating the distance from the edge position of each edge region to the circle model, and determining the edge region corresponding to the edge position whose distance is less than a threshold as a target edge region;

[0022] Recording the number of the target edge regions, determining the circle model with the largest number of the target edge regions as the optimal circle model, and returning to execute the step of randomly selecting three edge regions from the plurality of edge regions until the number of iterations reaches a preset number or the optimal circle model does not change any more;

[0023] The center of the optimal circle model is determined as the wafer center.

[0024] A second aspect of the present application provides a wafer center positioning device, comprising:

[0025] An image acquisition unit, used for acquiring a plurality of edge images including the edge of the wafer;

[0026] A first edge extraction unit, used for extracting edge regions from the plurality of edge images respectively;

[0027] A second edge extraction unit, used for dividing the plurality of edge regions into a plurality of sub-regions, and extracting an edge position of each of the sub-regions;

[0028] An edge merging unit, used for merging edge positions of all the sub-regions in the same edge region to obtain an edge position of the edge region;

[0029] The circle fitting unit is used to splice the edge positions of a preset number of the edge areas into a wafer edge curve, and to perform circle fitting on the wafer edge curve to obtain the wafer center.

[0030] In a possible implementation, the wafer center positioning device further includes:

[0031] The denoising processing unit is used to perform denoising processing on the multiple edge images before respectively extracting edge regions from the multiple edge images.

[0032] A third aspect of the present application provides an electronic device, comprising at least one processor and a memory connected to the processor, wherein:

[0033] The memory is used to store computer programs;

[0034] The processor is used to execute the computer program so that the electronic device can implement the wafer center positioning method of the above-mentioned first aspect or any implementation manner of the first aspect.

[0035] The fourth aspect of the present application provides a computer program product, including computer-readable instructions. When the computer-readable instructions are executed on an electronic device, the electronic device implements the wafer center positioning method of the first aspect or any implementation of the first aspect.

[0036] A fifth aspect of the present application provides a computer storage medium, which carries one or more computer programs. When the one or more computer programs are executed by an electronic device, the electronic device can implement the wafer center positioning method of the above-mentioned first aspect or any implementation of the first aspect.

[0037] By means of the above technical scheme, the present application provides a wafer center positioning method and related devices, which divide the edge area of ​​multiple edge images containing the wafer edge into multiple sub-areas, extract the edge positions of the sub-areas to obtain the edge positions of the edge area, so that the edge curve is more closely aligned with the real edge, thereby improving the reliability and accuracy of edge calculation, and splicing the edge positions of a preset number of edge areas into a wafer edge curve instead of edge image splicing, thereby further reducing the amount of calculated data, and at the same time utilizing the prior knowledge that the edge curve of the wafer is circular to perform circle fitting on the edge curve, thereby ensuring the accuracy and reliability of the wafer center position. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and the originals and elements are not necessarily drawn to scale.

[0039] Figure 1 A schematic diagram of a process flow of a wafer center positioning method provided in an embodiment of the present application;

[0040] Figure 2 A schematic diagram of an edge area provided in an embodiment of the present application;

[0041] Figure 3 A schematic diagram of a sub-region in an edge region provided in an embodiment of the present application;

[0042] Figure 4 A schematic diagram of the edge position of a sub-region in an edge region provided in an embodiment of the present application;

[0043] Figure 5 A schematic diagram of the edge position of an edge region obtained by merging the edge positions of all sub-regions in the same edge region provided in an embodiment of the present application;

[0044] Figure 6 A schematic diagram of the structure of a wafer center positioning device provided in an embodiment of the present application;

[0045] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0046] The following describes the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation method section of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application.

[0047] The embodiments of the present application are described below in conjunction with the accompanying drawings. Those skilled in the art will appreciate that, with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0048] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and need not be used to describe a specific order or sequential order. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances, which is only to describe the distinction mode adopted by the objects of the same attributes when describing in the embodiments of the present application. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, so that the process, method, system, product or equipment comprising a series of units need not be limited to those units, but may include other units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0049] The embodiment of the present application provides a wafer center positioning method. The wafer center positioning method of the embodiment of the present application is described in detail below with reference to the accompanying drawings.

[0050] Reference Figure 1 , Figure 1 A schematic diagram of a wafer center positioning method provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, a wafer center positioning method provided in an embodiment of the present application may include steps 101 to 105, and these steps are described in detail below.

[0051] 101: Acquire multiple edge images including the edge of the wafer;

[0052] Wafer refers to the silicon wafer used to make silicon semiconductor circuits. Its raw material is silicon. High-purity polysilicon is dissolved and doped with silicon crystal seeds, and then slowly pulled out to form cylindrical single crystal silicon. After grinding, polishing and slicing, the silicon crystal rod is formed into a silicon wafer, also known as a wafer.

[0053] The multiple edge images are images corresponding to various components of the edge of the wafer that needs to be centrally positioned.

[0054] 102: extracting edge regions from multiple edge images respectively;

[0055] Image detection technology is used to extract the edge area of ​​the wafer from multiple edge images.

[0056] 103: Divide the plurality of edge regions into a plurality of sub-regions respectively, and extract the edge position of each sub-region;

[0057] Specifically, the edge region is longitudinally divided into a plurality of sub-regions along the edge region, and the sub-regions may be rectangular.

[0058] There are many methods for extracting the edge position of the sub-region, such as the Canny edge detection method, the Sobel edge detection method, the Prewitt edge detection method, the Roberts edge detection method, the gradient-based edge detection method, and the like.

[0059] 104: Merge edge positions of all sub-regions in the same edge region to obtain an edge position of the edge region;

[0060] When acquiring edge images, the edges in the edge area are nonlinear due to noise generated by factors such as light. For nonlinear edges, directly using a large rectangular area to calculate the edge will result in errors. By dividing the edge area into multiple sub-areas, that is, by switching complex graphics into simple small rectangles, the error can be controlled within a very small range, and the accurate edge position in the sub-area is obtained. The edge positions of all sub-areas in the same edge area are merged to make the edge curve fit the real edge more closely, thereby improving the credibility and accuracy of edge calculation.

[0061] At the same time, the number of sub-regions in the same edge region is settable, which can reduce the amount of calculated data to a certain extent and further improve the calculation efficiency.

[0062] 105: splicing edge positions of a preset number of edge regions into a wafer edge curve, and performing circle fitting on the wafer edge curve to obtain a wafer center.

[0063] It can be understood that three points that are not on a straight line can define a circle, so the preset number is at least 3.

[0064] Compared with directly stitching edge images, the edge positions of a preset number of edge areas are stitched into a wafer edge curve, which can further reduce the amount of calculated data and ensure the real-time performance of the positioning method.

[0065] The edge splicing can be done in a clockwise direction or a counterclockwise direction.

[0066] The formula for calculating the center of a circle is as follows:

[0067] f=∑((x i -x c ) 2 +(y i -y c ) 2 -R 2 ) 2

[0068] Among them, (x i ,y i ) is the coordinate of the edge point in the edge position. (x c ,yc ) is the coordinate of the center of the circle obtained by fitting, R is the radius of the circle obtained by fitting, and (x c ,y c ) are the calculated coordinates of the circle center.

[0069] The present embodiment discloses a method for locating the center of a wafer. The method divides the edge area of ​​multiple edge images containing the edge of the wafer into multiple sub-areas, extracts the edge positions of the sub-areas to obtain the edge positions of the edge area, so that the edge curve is more closely aligned with the real edge, thereby improving the reliability and accuracy of edge calculation. The edge positions of a preset number of edge areas are spliced ​​into a wafer edge curve to replace edge image splicing, thereby further reducing the amount of calculated data. At the same time, the prior knowledge that the edge curve of the wafer is circular is used to perform circle fitting on the edge curve, thereby ensuring the accuracy and reliability of the wafer center position.

[0070] In a possible implementation, in order to reduce the influence of noise on edge images and improve the quality of edge images, before extracting edge regions from edge images, this embodiment further includes performing denoising processing on multiple edge images.

[0071] Exemplarily, Gaussian filtering is used to perform denoising on multiple edge images. Since the main component of noise is Gaussian white noise, Gaussian filtering can filter out Gaussian white noise while retaining the edges and details of edge images. In addition, since the Gaussian function is rotationally symmetric, the degree of smoothness in all directions is the same, and the edge direction of the original image will not be changed.

[0072] The formula for Gaussian filtering is as follows:

[0073]

[0074] Among them, G(x,y) represents the value of the Gaussian function at the point (x,y), σ represents the standard deviation of the Gaussian distribution, and controls the width of the Gaussian function, that is, the blurring degree of the filter. The larger σ is, the wider the Gaussian function is and the stronger the blurring effect is. The smaller σ is, the narrower the Gaussian function is and the weaker the blurring effect is.

[0075] It should be noted that other denoising methods can also be used, such as the mean filtering algorithm, the median filtering algorithm, the bilateral filtering algorithm, etc., which are not specifically limited in this embodiment. Among them, the mean filtering algorithm replaces the value of the pixel by calculating the average value of the pixels around each pixel to smooth the image and reduce the impact of noise. The median filtering algorithm replaces the value of each pixel with the median of the pixel values ​​around it, which is particularly suitable for removing impulse noise such as salt and pepper noise, while better maintaining the edge information of the image. The bilateral filtering algorithm combines the characteristics of mean filtering and Gaussian filtering, not only considering the spatial proximity between pixels, but also considering the similarity of pixel values, and is suitable for denoising while maintaining edge information.

[0076] In a possible implementation, the method of extracting edge regions from a plurality of edge images respectively includes the following steps 1021-1022:

[0077] 1021: performing binarization processing on the plurality of edge images respectively to obtain a binarized image;

[0078] 1022: Extract edge regions from each binarized image respectively.

[0079] In order to facilitate the positioning of the wafer edge, the background area of ​​the wafer is generally set to a dark color, and the edge area in the edge image can be determined by the background area of ​​the wafer.

[0080] This embodiment uses image binarization processing technology to convert the edge image into a binary image containing only two pixel values, and determines the boundary area of ​​the two pixel values ​​in the binary image as the edge area. This achieves the approximate positioning of the edge area and ensures the timeliness and accuracy of edge computing. Figure 2 The red frame shown is the edge area in the edge image.

[0081] Exemplarily, the global threshold method, Otsu method, adaptive threshold method, etc. can be used to perform binarization on multiple edge images. Among them, the global threshold method is the simplest binarization method. It selects a fixed threshold and sets all pixel values ​​above the threshold to white and those below the threshold to black. The Otsu method is a method for automatically determining the threshold, which determines the optimal threshold by minimizing the intra-class variance or maximizing the inter-class variance. The adaptive threshold method does not use a single global threshold, but calculates a local threshold for each small area of ​​the image. This method is more robust to lighting changes and shadows.

[0082] like Figure 3 As shown, the edge region is divided into multiple sub-regions, and each small rectangle corresponds to a sub-region.

[0083] In a possible implementation, extracting the edge position of the sub-region specifically involves calculating edge gradient information within the sub-region, and determining the position with the maximum gradient value as the edge position of the sub-region. The edge position of the sub-region is as follows: Figure 4 Specifically, calculating the edge gradient information of the sub-region includes the following steps 1031-1032:

[0084] 1031: Project the sub-region in the horizontal direction and the vertical direction to obtain the projection curve

[0085] 1032: Take the first-order derivative of the projection curve and calculate its corresponding gradient curve.

[0086] Gradient information focuses on the rate of change of pixel values ​​in an image rather than the absolute value. This property makes the gradient more robust when facing different lighting conditions. The gradient reflects the degree of difference between adjacent pixels in an image, that is, the local contrast. Even if the entire scene becomes brighter or darker (the overall grayscale value changes), as long as the relative brightness difference between the object and the background, or between the parts inside the object remains unchanged, the gradients at these positions will not be greatly affected. Therefore, this embodiment uses edge gradient information to calculate the position of the sub-region, avoiding the situation where edge extraction fails due to lighting, and improving the robustness of edge extraction.

[0087] After extracting the edge positions of the sub-regions, the edge positions of all sub-regions in the same edge region are merged to obtain Figure 5 The edge positions of the edge regions are shown.

[0088] In a possible implementation, in order to improve the accuracy of the wafer center, a random sampling consensus (RANSAC) strategy can be used to obtain edge regions of at least three edge images from multiple edge images for circle fitting, and the center of the circle with the minimum error is obtained through multiple iterations as the wafer center. Specifically, the following steps A1-A5 are included:

[0089] A1: Randomly select three edge regions from multiple edge regions;

[0090] A2: Calculate the parameters of the circle model based on the edge positions of the three selected edge regions;

[0091] Specifically, the method for calculating the parameters of the circle model here is consistent with step 105, and will not be repeated here.

[0092] The parameters of the circle model include the coordinates of the center and the radius.

[0093] A3: Substitute the edge positions of multiple edge regions into the circle model, calculate the distance between the edge position of each edge region and the circle model, and determine the edge region corresponding to the edge position whose distance is less than a threshold as the target edge region;

[0094] A4: Record the number of target edge regions, determine the circle model with the largest number of target edge regions as the optimal circle model, and return to execute step A1 until the number of iterations reaches a preset number or the optimal circle model does not change;

[0095] A5: The center of the optimal circle model is determined as the wafer center.

[0096] The RANSAC strategy uses an iterative method to estimate the parameters of the circle model from a set of observation data containing outliers (or erroneous data). Compared with the least squares method, it incorporates the idea of ​​eliminating unqualified data, so it can give faster and more accurate identification results for data samples with some erroneous data. It avoids the situation where the center of the circle is abnormally located due to dirt or damage on the edge of the wafer, and ensures the robustness and accuracy of the center of the circle location.

[0097] A wafer center positioning method provided in an embodiment of the present application is introduced above, and a device for executing the above-mentioned wafer center positioning method will be introduced below.

[0098] See also Figure 6 , Figure 6 This is a schematic diagram of the structure of a wafer center positioning device provided in an embodiment of the present application. Figure 6 As shown, the wafer center positioning device comprises:

[0099] An image acquisition unit 601 is used to acquire multiple edge images including the edge of the wafer;

[0100] A first edge extraction unit 602, configured to extract edge regions from the plurality of edge images respectively;

[0101] A second edge extraction unit 603 is used to divide the plurality of edge regions into a plurality of sub-regions, and extract an edge position of each of the sub-regions;

[0102] An edge merging unit 604 is used to merge edge positions of all the sub-regions in the same edge region to obtain an edge position of the edge region;

[0103] The circle fitting unit 605 is used to splice the edge positions of a preset number of the edge regions into a wafer edge curve, and perform circle fitting on the wafer edge curve to obtain the wafer center.

[0104] In a possible implementation, the wafer center positioning device further includes:

[0105] The denoising processing unit is used to perform denoising processing on the multiple edge images before respectively extracting edge regions from the multiple edge images.

[0106] In a possible implementation, the first edge extraction unit 602 is specifically configured to perform binarization processing on the plurality of edge images respectively to obtain binary images; and extract edge regions from each of the binary images respectively.

[0107] In a possible implementation, the second edge extraction unit 603 is specifically configured to calculate, for each of the sub-regions, edge gradient information within the sub-region, and determine a position with a maximum gradient value as an edge position of the sub-region.

[0108] In a possible implementation, the circle fitting unit 605 includes:

[0109] A selection subunit, configured to randomly select three edge regions from the plurality of edge regions;

[0110] A first calculation subunit, used for calculating parameters of the circle model according to edge positions of the three selected edge regions;

[0111] A second calculation subunit is used to substitute the edge positions of the plurality of edge regions into the circle model, calculate the distance between the edge position of each edge region and the circle model, and determine the edge region corresponding to the edge position whose distance is less than a threshold as the target edge region;

[0112] a recording subunit, used for recording the number of the target edge regions, determining the circle model with the largest number of the target edge regions as the optimal circle model, and triggering the region selection subunit until the number of iterations reaches a preset number or the optimal circle model does not change any more;

[0113] The determination subunit is used to determine the center of the optimal circle model as the wafer center.

[0114] A wafer center positioning device disclosed in this embodiment divides the edge area of ​​multiple edge images containing the wafer edge into multiple sub-areas, extracts the edge positions of the sub-areas to obtain the edge position of the edge area, so that the edge curve is more closely aligned with the real edge, thereby improving the credibility and accuracy of edge calculation. The edge positions of a preset number of edge areas are spliced ​​into a wafer edge curve instead of edge image splicing, further reducing the amount of calculated data. At the same time, the edge curve is fitted with a circle by utilizing the prior knowledge that the edge curve of the wafer is circular, thereby ensuring the accuracy and reliability of the wafer center position.

[0115] The present application also provides an electronic device in an embodiment. Figure 7 As shown, it shows a schematic diagram of the structure of an electronic device suitable for implementing the embodiments of the present application. The electronic device in the embodiments of the present application may include but is not limited to fixed terminals such as mobile phones, notebook computers, PDAs (personal digital assistants), PADs (tablet computers), desktop computers, etc. Figure 7 The electronic device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0116] like Figure 7As shown, the electronic device may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 701, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 702 or a program loaded from a storage device 708 into a random access memory (RAM) 703. When the electronic device is powered on, various programs and data required for the operation of the electronic device are also stored in the RAM 703. The processing device 701, the ROM 702, and the RAM 703 are connected to each other via a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0117] Typically, the following devices may be connected to the I / O interface 705: an input device 706 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; an output device 707 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 708 including, for example, a memory card, a hard disk, etc.; and a communication device 709. The communication device 709 may allow the electronic device to communicate with other devices wirelessly or by wire to exchange data. Although Figure 7 An electronic device having various devices is shown, but it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented or possessed instead.

[0118] An embodiment of the present application also provides a computer program product including computer-readable instructions. When the computer-readable instructions are executed on an electronic device, the electronic device implements any one of the wafer center positioning methods provided in the embodiments of the present application.

[0119] A computer-readable storage medium is also provided in an embodiment of the present application. The storage medium carries one or more computer programs. When the one or more computer programs are executed by an electronic device, the electronic device can implement any one of the wafer center positioning methods provided in the embodiment of the present application.

[0120] It should also be noted that the device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed over multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. In addition, in the drawings of the device embodiments provided by the present application, the connection relationship between the modules indicates that there is a communication connection between them, which may be specifically implemented as one or more communication buses or signal lines.

[0121] Through the description of the above implementation mode, the technicians in the field can clearly understand that the present application can be implemented by means of software plus necessary general hardware, and of course, it can also be implemented by special hardware including special integrated circuits, special CPUs, special memories, special components, etc. In general, all functions completed by computer programs can be easily implemented by corresponding hardware, and the specific hardware structure used to implement the same function can also be various, such as analog circuits, digital circuits or special circuits. However, for the present application, software program implementation is a better implementation mode in more cases. Based on such an understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a readable storage medium, such as a computer floppy disk, a U disk, a mobile hard disk, a ROM, a RAM, a disk or an optical disk, etc., including a number of instructions to enable a computer device (which can be a personal computer, a training device, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0122] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments may be implemented in the form of a computer program product.

[0123] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a training device, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, training device, or data center. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a training device, a data center, etc. that includes one or more available media integrations. The available medium may be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)), etc.

Claims

1. A wafer center positioning method, characterized in that: include: Acquire multiple edge images including the edge of the wafer; Extracting edge regions from the plurality of edge images respectively; Dividing the plurality of edge regions into a plurality of sub-regions respectively, and extracting the edge position of each of the sub-regions; Merging edge positions of all the sub-regions in the same edge region to obtain an edge position of the edge region; The edge positions of a preset number of the edge regions are spliced ​​into a wafer edge curve, and a circle fitting is performed on the wafer edge curve to obtain the wafer center.

2. The wafer center positioning method according to claim 1, characterized in that: Before respectively extracting edge regions from the plurality of edge images, the wafer center positioning method further includes: De-noising is performed on the plurality of edge images.

3. The wafer center positioning method according to claim 1, characterized in that: The step of extracting edge regions from the plurality of edge images respectively comprises: Performing binarization processing on the plurality of edge images respectively to obtain binarized images; The edge region is extracted from each of the binarized images respectively.

4. The wafer center positioning method according to claim 1, characterized in that: The step of extracting the edge position of each sub-region comprises: For each of the sub-regions, edge gradient information in the sub-region is calculated, and a position with a maximum gradient value is determined as an edge position of the sub-region.

5. The wafer center positioning method according to claim 1, characterized in that: The step of splicing the edge positions of a preset number of edge regions into a wafer edge curve and performing circle fitting on the wafer edge curve to obtain a wafer center comprises: randomly selecting three edge regions from a plurality of edge regions; Calculate the parameters of the circle model based on the edge positions of the three selected edge regions; Substituting edge positions of the plurality of edge regions into a circle model, calculating the distance from the edge position of each edge region to the circle model, and determining the edge region corresponding to the edge position whose distance is less than a threshold as a target edge region; Recording the number of the target edge regions, determining the circle model with the largest number of the target edge regions as the optimal circle model, and returning to execute the step of randomly selecting three edge regions from the plurality of edge regions until the number of iterations reaches a preset number or the optimal circle model does not change any more; The center of the optimal circle model is determined as the wafer center.

6. A wafer center positioning device, characterized in that: include: An image acquisition unit, used for acquiring a plurality of edge images including the edge of the wafer; A first edge extraction unit, used for extracting edge regions from the plurality of edge images respectively; A second edge extraction unit, used for dividing the plurality of edge regions into a plurality of sub-regions, and extracting an edge position of each of the sub-regions; An edge merging unit, used for merging edge positions of all the sub-regions in the same edge region to obtain an edge position of the edge region; The circle fitting unit is used to splice the edge positions of a preset number of the edge areas into a wafer edge curve, and perform circle fitting on the wafer edge curve to obtain the wafer center.

7. The wafer center positioning device according to claim 6, characterized in that: The wafer center positioning device also includes: The denoising processing unit is used to perform denoising processing on the multiple edge images before respectively extracting edge regions from the multiple edge images.

8. An electronic device, characterized in that: The method comprises at least one processor and a memory connected to the processor, wherein: The memory is used to store computer programs; The processor is used to execute the computer program so that the electronic device can implement the wafer center positioning method as described in any one of claims 1 to 5.

9. A computer program product, characterized in that It comprises computer-readable instructions, and when the computer-readable instructions are executed on an electronic device, the electronic device implements the wafer center positioning method as claimed in any one of claims 1 to 5.

10. A computer storage medium, characterized in that: The storage medium carries one or more computer programs, and when the one or more computer programs are executed by an electronic device, the electronic device can implement the wafer center positioning method as described in any one of claims 1 to 5.

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