Spot inspection method of integrated circuit test system and integrated circuit test system

Abstract

The invention relates to a point inspection method of an integrated circuit test system and the integrated circuit test system. In response to a test start instruction sent for the target test station, sending a target test signal to the target test station so as to test the to-be-tested sample on the target test station; wherein the to-be-tested sample is internally provided with identity identification information; the to-be-tested sample is any one of a first preset number of standard spot inspection samples, or any one of a second preset number of untested integrated circuit samples; receiving a response signal output by the to-be-tested sample aiming at the target test signal; determining a test result corresponding to the to-be-tested sample according to a preset response mapping relation, the response signal and the identity identification information; determining a point inspection result corresponding to the integrated circuit test system according to the test results corresponding to the plurality of to-be-tested samples; the working state of the system can be evaluated in real time on the premise that normal work is not affected, and the point inspection efficiency of the system is improved.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuit testing, and in particular to an integrated circuit testing system inspection method and an integrated circuit testing system. Background Art

[0002] The rapid development of integrated circuit testing technology has made a huge contribution to the widespread application of integrated circuits. In each stage of integrated circuit development, production, and application, repeated inspections and tests are required to ensure product quality and to ensure that products that meet system requirements are produced.

[0003] Due to the differences in peripheral hardware and environment, the integrated circuit test system will have certain system errors, which will lead to deviations in the test results and cause serious production quality accidents. Therefore, in order to ensure the accuracy of integrated circuit testing and improve the reliability of integrated circuit test results, technicians need to regularly inspect the integrated circuit test system to detect whether the test system is currently faulty or the test results are abnormal.

[0004] However, the prior art has the problem that manual inspection leads to low efficiency and low timeliness of inspection of integrated circuit test systems. Summary of the invention

[0005] Based on this, it is necessary to provide an integrated circuit test system inspection method and an integrated circuit test system to address the above technical issues.

[0006] In a first aspect, the present application provides a spot inspection method for an integrated circuit test system, which is applied to a test machine, and the method comprises:

[0007] In response to a test start instruction sent to a target test station, a target test signal is sent to the target test station to test the sample to be tested on the target test station; wherein the sample to be tested has identity information built in; the sample to be tested is any one of a first preset number of standard spot inspection samples, or any one of a second preset number of untested integrated circuit samples;

[0008] Receiving a response signal output by the sample to be tested in response to the target test signal;

[0009] Determine the test result corresponding to the sample to be tested according to the preset response mapping relationship, the response signal and the identity information;

[0010] According to the test results corresponding to each of the plurality of samples to be tested, the spot inspection result corresponding to the integrated circuit test system is determined.

[0011] In one embodiment, determining the test result corresponding to the sample to be tested according to the preset response mapping relationship, the response signal and the identity information includes:

[0012] Determining the sample type of the sample to be tested according to the identity information;

[0013] In a case where the sample to be tested is an untested integrated circuit sample, determining a test result corresponding to the sample to be tested according to the response signal;

[0014] In the case where the sample to be tested is a standard spot inspection sample, the test result corresponding to the sample to be tested is determined according to a preset response mapping relationship, the response signal and the identity information; wherein the preset response mapping relationship includes the correspondence between the identity information corresponding to the standard spot inspection sample and the standard response signal corresponding to the standard spot inspection sample.

[0015] In one embodiment, when the sample to be tested is a standard spot inspection sample, determining the test result corresponding to the sample to be tested according to a preset response mapping relationship, the response signal and the identity information includes:

[0016] According to the identity identification information, determining a target standard response signal matching the identity identification information from the preset response mapping relationship;

[0017] The test result corresponding to the sample to be tested is determined according to the target standard response signal and the response signal.

[0018] In one embodiment, determining the test result corresponding to the sample to be tested according to the target standard response signal and the response signal includes:

[0019] If the response signal matches the target standard response signal, generating a first result;

[0020] If the response signal does not match the target standard response signal, generating a second result;

[0021] According to the first result or the second result, a test result corresponding to the sample to be tested is obtained.

[0022] In one embodiment, determining the spot inspection result corresponding to the integrated circuit test system according to the test results corresponding to each of the plurality of samples to be tested includes:

[0023] Obtaining a set of test results corresponding to a first preset number of the standard spot inspection samples from the test results corresponding to each of the plurality of samples to be tested;

[0024] According to the test result set, a spot check result corresponding to the integrated circuit test system is determined.

[0025] In one embodiment, determining the spot check result corresponding to the integrated circuit test system according to the test result set includes:

[0026] If the test result set does not meet the preset condition, determining that the inspection result corresponding to the integrated circuit test system is a system abnormality;

[0027] If the test result set meets the preset condition, it is determined that the inspection result corresponding to the integrated circuit test system is that the system is normal.

[0028] In one embodiment, the method further comprises:

[0029] According to the test result, a sorting signal corresponding to the sample to be tested is generated, and the sorting signal is sent to a sorting machine to control the sorting machine to sort the sample to be tested according to the sorting signal.

[0030] In a second aspect, the present application further provides an integrated circuit testing system, the system comprising a tester and a sorter; the tester and the sorter are in communication connection; the tester comprises at least one test station; the sorter comprises at least one test station; the test station and the test station are in communication connection one by one;

[0031] The test machine is used to execute the inspection method of the integrated circuit test system described in any one of the embodiments of the first aspect above.

[0032] In a third aspect, the present application further provides a testing machine, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method described in any one of the embodiments of the first aspect when executing the computer program.

[0033] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the method described in any one of the embodiments of the first aspect above are implemented.

[0034] In a fifth aspect, the present application further provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the method described in any one of the embodiments of the first aspect above.

[0035] The spot inspection method of the integrated circuit test system and the integrated circuit test system are applied to a test machine, and include: in response to a test start instruction sent to a target test station, sending a target test signal to the target test station to test the sample to be tested on the target test station; wherein the sample to be tested has built-in identity identification information; the sample to be tested is any one of a first preset number of standard spot inspection samples, or any one of a second preset number of untested integrated circuit samples; based on the identity identification information, the standard spot inspection sample and the untested integrated circuit sample can be accurately distinguished, laying a foundation for realizing accurate spot inspection of the integrated circuit test system; further, receiving a response signal output by the sample to be tested for the target test signal; and testing the sample to be tested according to the preset response information. The mapping relationship, response signal and identity information are used to determine the test results corresponding to the sample to be tested; thus, according to the test results corresponding to the multiple samples to be tested, the inspection results corresponding to the integrated circuit test system can be accurately determined; based on this, by mixing a first preset number of standard inspection samples with a second preset number of untested integrated circuit samples, standard inspection samples can be inserted into the system for testing during the actual working process, so that the system can evaluate its own working status and performance in real time and seamlessly without affecting the normal work, effectively avoiding the impact of traditional regular shutdown inspections on production progress, reducing unnecessary downtime, and being able to promptly and quickly discover potential abnormalities in the integrated test circuit system, thereby improving the efficiency and timeliness of the integrated circuit test system inspection. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0037] Figure 1 is a schematic diagram of the overall structure of an integrated circuit testing system in one embodiment;

[0038] Figure 2 A schematic diagram of a flow chart of a spot inspection method for an integrated circuit test system in one embodiment;

[0039] Figure 3 A schematic flow chart of a step of determining a test result corresponding to a sample to be tested in one embodiment;

[0040] Figure 4 It is a flowchart of a spot inspection method of an integrated circuit test system in a specific embodiment;

[0041] Figure 5FIG. 4 is a diagram showing the internal structure of a testing machine in one embodiment. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0043] The spot inspection method of the integrated circuit testing system in the prior art mainly relies on the autonomous operation of the technicians, who manually place the designated spot inspection samples on the test station of the sorting machine and then control the testing machine to test the integrated circuit; to ensure the accuracy of the spot inspection results, it is usually necessary to test multiple spot inspection samples, which requires the technicians to repeat the above operations multiple times, and the entire spot inspection process is time-consuming. Based on this, the embodiment of the present application aims to provide a spot inspection method for an integrated circuit testing system to solve the problems of low efficiency and low timeliness of spot inspection of integrated circuit testing systems in the prior art.

[0044] In one embodiment, Figure 1 As shown, Figure 1 The overall structure diagram of an integrated circuit test system in an embodiment; the integrated circuit test system includes a tester 100 and a sorter 200; wherein the tester 100 includes at least one test station; the sorter 200 includes at least one test station; the number of test stations and test stations is equal; it should be noted that the test stations and test stations are connected one-to-one via test cables; wherein the test cables are communication lines. The sorter 200 also includes at least one communication port; the communication port is connected one-to-one with the test stations.

[0045] Exemplarily, each test station of the test machine 100 is connected to the corresponding test station of the sorting machine 200 through a test cable, and each test station of the test machine 100 is also connected to the corresponding communication port of the sorting machine 200 through a sorting signal line; the test machine 100 and the sorting machine 200 transmit test signals and test results through the test cables, and transmit test start instructions and sorting signals through the sorting signal lines.

[0046] Among them, the sorting machine 200 also includes a control module, a manipulator group, a loading module (not shown in the figure), and an unloading module (not shown in the figure); wherein the control module is connected to the manipulator group, and the control module is also connected to each test station and a communication port; the control module is used to generate a loading control instruction after the test starts, so as to control the manipulator group to load the samples to be tested; the control module is also used to generate an unloading control instruction according to the sorting signals received by each communication port, so as to control the manipulator group to sort and unload the samples to be tested at the test station.

[0047] Among them, the robot group is used to place the samples to be tested at the loading port of the sorting machine at the corresponding test station according to the loading control instructions sent by the control module; the robot group is also used to place the samples to be tested at the test station into the designated unloading port after the testing of the samples to be tested at the test station is completed according to the unloading control instructions sent by the control module, and then coordinate with each test station to realize automated integrated circuit testing.

[0048] It can be understood that based on the manipulator group, automated control of loading and unloading of samples to be tested is achieved, which can effectively avoid the problem of integrated circuit pins accidentally scratching the contact surface of the test station due to manual loading.

[0049] Among them, the loading module is pre-installed with multiple loading tubes; each loading tube is pre-loaded with a certain number of samples to be tested; during the integrated circuit testing process, the samples to be tested are transported to the loading port in sequence according to the order of the pre-loaded loading tubes and the order of the samples to be tested in the tubes, and then the robot group loads them to the corresponding test station.

[0050] Among them, the unloading module is used to sort the samples to be tested to the corresponding unloading channels through the manipulator group; for example, if the test result of the sample to be tested shows that the sample to be tested is a good product, the sample to be tested is placed in the finished product material tube; if the test result of the sample to be tested shows that the sample to be tested is a defective product, the sample to be tested is placed in the defective product material tube. It should be noted that this embodiment only uses one of the multiple unloading methods as an example; the choice of unloading method needs to be set according to the actual test requirements and is not specifically limited here.

[0051] Optionally, the sorting machine 200 also includes an interactive module (not shown in the figure); the interactive module is communicatively connected to the control module, and the interactive module is used to receive interactive instructions input from the outside and transmit the interactive instructions to the control module; the interactive module is also used to display the prompt information provided by the control module and the test results corresponding to the samples to be tested.

[0052] In one embodiment, Figure 2 As shown, Figure 2 The flowchart of the spot inspection method of the integrated circuit test system in one embodiment is shown in FIG. 1 . The spot inspection method of the integrated circuit test system is applied to the test machine and includes the following steps:

[0053] Step S201 , in response to a test start instruction sent to a target test station, a target test signal is sent to the target test station to test a sample to be tested on the target test station.

[0054] The target test station refers to any one of the at least one test station in the sorting machine; the target test station corresponds to the target test station in the test machine; the target test station refers to the test station corresponding to the target test station in the at least one test station in the test machine. The test start instruction is used to control the target test station in the test machine to start testing.

[0055] The sample to be tested has built-in identification information; the identification information is used to determine the type of the sample to be tested. The sample types of the sample to be tested include standard inspection samples and untested integrated circuit samples. The sample to be tested is any one of the first preset number of standard inspection samples; or any one of the second preset number of untested integrated circuit samples. The standard inspection sample refers to an integrated circuit sample that has completed testing under a standard test environment and has good performance.

[0056] It should be noted that the first preset number and the second preset number need to be set according to actual test requirements and are not specifically limited here.

[0057] In an exemplary embodiment, the same or different first identity information can be built into the first preset number of standard spot inspection samples, and the same or different second identity information can be built into the second preset number of untested integrated circuit samples; wherein the first identity information and the second identity information do not have any intersection. For example, the first preset number is 50, and 50 standard spot inspection samples have ID1-ID50 built into them in sequence; the second preset number is 100, and all 100 untested integrated circuit samples have ID0 built into them; it is only necessary to ensure that the identity information built into the standard spot inspection samples and the untested integrated circuit samples has no intersection.

[0058] The target test signal refers to a specific signal generated by the test machine and sent to the target test station, which is used to trigger the sample to be tested to output a corresponding response signal. The response signal refers to the output or reaction generated after receiving the target test signal, which is used to evaluate the performance, characteristics or status of the sample to be tested.

[0059] Exemplarily, after the sample to be tested is placed at the target test station and loading is completed, a test start instruction for the target test station is sent to the target test station corresponding to the testing machine through the sorting machine. The target test station responds to the test start instruction sent to the target test station and sends a target test signal to the target test station to test the sample to be tested on the target test station.

[0060] Step S202, receiving a response signal output by the sample to be tested in response to a target test signal.

[0061] In an exemplary embodiment, when the target test signal is used to trigger the output of identity information of the sample to be tested, the response signal includes the identity information corresponding to the sample to be tested. When the target test signal is used to detect the performance of the sample to be tested, the response signal includes the response data of the sample to be tested according to the target test signal.

[0062] It is understandable that the response signal is related to the test requirements corresponding to the actual target test signal, and needs to be determined according to the actual test requirements, which is not specifically limited here.

[0063] Exemplarily, the sample to be tested is tested according to the target test signal by the target test station, and the response signal output by the sample to be tested for the target test signal is transmitted to the target test station corresponding to the test machine via the test cable, and the corresponding response signal is received by the target test station.

[0064] Step S203, determining the test result corresponding to the sample to be tested according to the preset response mapping relationship, the response signal and the identity information.

[0065] The preset response mapping relationship includes the corresponding relationship between the identity information corresponding to the standard spot inspection sample and the standard response signal corresponding to the standard spot inspection sample. The standard response signal refers to the standard output response data of the standard spot inspection sample under the standard test environment.

[0066] It is understandable that the preset response mapping relationship needs to be stored in advance in the corresponding analysis module or storage module inside the test machine so that it can be directly called during the test process.

[0067] In an exemplary embodiment, when the identity information corresponding to each of the multiple standard spot inspection samples is different, the preset response mapping relationship includes the correspondence between the identity information corresponding to each of the multiple standard spot inspection samples and the standard response signals corresponding to each of the multiple standard spot inspection samples.

[0068] In another exemplary embodiment, when the identity information corresponding to each of the plurality of standard spot inspection samples is the same, the preset response mapping relationship includes the correspondence between the identity information corresponding to the standard spot inspection sample and the same standard response signal. For example, a first preset number of standard spot inspection samples having the same standard response signal are selected, and the same identity information is built into the first preset number of standard spot inspection samples, based on which the accuracy of the preset response mapping relationship can be ensured.

[0069] In an exemplary embodiment, the test result corresponding to the sample to be tested is determined according to a preset response mapping relationship, a response signal and identity information, which can be: according to the identity information, a standard response signal corresponding to the identity information is matched from the preset response mapping relationship; if there is a standard response signal matching the identity information in the preset response mapping relationship, the test result corresponding to the sample to be tested is determined according to the standard response signal and the response signal; if there is no standard response signal matching the identity information in the preset response mapping relationship, the test result corresponding to the sample to be tested is determined according to the response signal.

[0070] Step S204, determining the spot inspection result corresponding to the integrated circuit test system according to the test results corresponding to the plurality of samples to be tested.

[0071] The test results corresponding to the multiple samples to be tested include the test results corresponding to a first preset number of standard inspection samples and the test results corresponding to a second preset number of untested integrated circuit samples.

[0072] The inspection result includes a normal system and an abnormal system. In an exemplary embodiment, when the inspection result corresponding to the integrated circuit test system is an abnormal system, an abnormality prompt signal is generated to inform the staff in time so as to perform system maintenance in time to ensure the reliability of the system.

[0073] It can be understood that based on the test results corresponding to each of the first preset number of standard spot inspection samples, the spot inspection results corresponding to the integrated circuit test system can be determined; based on the test results corresponding to each of the second preset number of untested integrated circuit samples, it can be determined whether the performance of each untested integrated circuit sample meets the preset requirements. Among them, the preset requirements need to be set according to the integrated circuit test requirements and are not specifically limited here.

[0074] In this embodiment, by mixing the first preset number of standard inspection samples with the second preset number of untested integrated circuit samples, the standard inspection samples can be inserted in the actual working process to test the system, so that the system can evaluate its own working status and performance in real time and seamlessly without affecting normal work, effectively avoiding the impact of traditional regular shutdown inspections on production progress, reducing unnecessary downtime, and being able to promptly and quickly discover potential anomalies in the integrated test circuit system, thereby improving the efficiency and timeliness of the integrated circuit test system inspection. At the same time, based on the built-in identity information of the sample to be tested, the standard inspection samples and the untested integrated circuit samples can be accurately distinguished, laying the foundation for accurate inspection of the integrated circuit test system.

[0075] In one embodiment, Figure 3 As shown, Figure 3The flowchart of the step of determining the test result corresponding to the sample to be tested in one embodiment is as follows; according to the preset response mapping relationship, the response signal and the identity information, the test result corresponding to the sample to be tested is determined, including the following steps:

[0076] Step S301, determining the sample type of the sample to be tested according to the identity information.

[0077] Among them, the sample types of the samples to be tested include standard inspection samples and untested integrated circuit samples.

[0078] It should be noted that the identity identification information can be embedded in the sample to be tested during the production process of the sample to be tested, or can be embedded in the sample to be tested after the production is completed, and no specific limitation is made here.

[0079] It should be noted that when setting the identity information of the samples to be tested, the identity information corresponding to each sample to be tested needs to be recorded and saved to lay the foundation for subsequent work. For example, the identity information corresponding to each standard inspection sample and each untested integrated circuit sample is stored in a preset database to ensure the accuracy and traceability of the test process.

[0080] In an exemplary embodiment, the method for determining the sample type of the sample to be tested based on the identity information may be: obtaining a preset database; comparing the identity information of the sample to be tested with the identity information in the preset database to determine the sample type of the sample to be tested.

[0081] Step S302: when the sample to be tested is an untested integrated circuit sample, a test result corresponding to the sample to be tested is determined according to the response signal.

[0082] Among them, when the sample to be tested is an untested integrated circuit sample, the test results may include but are not limited to good products and defective products; illustratively, during the normal testing process, the sample to be tested will be unloaded to the corresponding position according to the test results; for example, when the test results are classified as good products and defective products, good products will be placed in the finished product material tube, and defective products will be placed in the defective product material tube.

[0083] Optionally, the test results may also include good product grades and defective product grades, which need to be set according to actual application requirements and are not specifically limited here.

[0084] Exemplarily, based on the identity identification information, the sample type of the sample to be tested is identified. When it is determined that the sample to be tested is an untested integrated circuit sample, the response signal output by the untested integrated circuit sample is analyzed to determine the test result corresponding to the untested integrated circuit sample; for example, whether the untested integrated circuit sample is a good product or a defective product.

[0085] Step S303, when the sample to be tested is a standard spot inspection sample, the test result corresponding to the sample to be tested is determined according to the preset response mapping relationship, the response signal and the identity information.

[0086] In an exemplary embodiment, step S303, when the sample to be tested is a standard spot inspection sample, determining the test result corresponding to the sample to be tested according to the preset response mapping relationship, the response signal and the identity information, includes the following steps:

[0087] Step 1: According to the identity information, determine a target standard response signal matching the identity information from a preset response mapping relationship.

[0088] Step 2: Determine the test result corresponding to the sample to be tested according to the target standard response signal and the response signal.

[0089] Among them, the preset response mapping relationship includes the correspondence between the identity information corresponding to the standard spot inspection sample and the standard response signal corresponding to the standard spot inspection sample. It should be noted that the preset response mapping relationship needs to be determined based on the configuration strategy of the identity information corresponding to the standard spot inspection sample and the standard response signal corresponding to the standard spot inspection sample, and is not specifically limited here.

[0090] When the sample to be tested is a standard inspection sample, the test result may include, but is not limited to, normal and abnormal.

[0091] Exemplarily, when the sample to be tested is a standard spot inspection sample, according to the preset response mapping relationship and the identity information corresponding to the standard spot inspection sample, a target standard response signal that matches the identity information of the standard spot inspection sample is determined from the preset response mapping relationship; when the response signal output by the standard spot inspection sample matches the target standard response signal corresponding to the standard spot inspection sample, the test result corresponding to the standard spot inspection sample is normal; when the response signal output by the standard spot inspection sample does not match the target standard response signal corresponding to the standard spot inspection sample, the test result corresponding to the standard spot inspection sample is abnormal.

[0092] In this embodiment, the built-in identity information can be used to clearly distinguish between untested integrated circuit samples and standard inspection samples, ensuring that each sample to be tested can receive corresponding tests according to its actual type; at the same time, based on the preset response mapping relationship and the identity information corresponding to the standard inspection samples, the test results corresponding to the standard inspection samples can be accurately determined, laying the foundation for quickly identifying potential abnormal behaviors in the integrated circuit testing system to provide early warnings.

[0093] In one embodiment, determining the test result corresponding to the sample to be tested according to the target standard response signal and the response signal includes the following steps:

[0094] Step 1: If the response signal matches the target standard response signal, a first result is generated.

[0095] Step 2: If the response signal does not match the target standard response signal, a second result is generated.

[0096] Step 3: Obtain the test result corresponding to the sample to be tested according to the first result or the second result.

[0097] The first result is normal, which indicates that the response signal output by the standard inspection sample meets the expected standard, i.e., the target standard response signal. The second result is abnormal, which indicates that the response signal output by the standard inspection sample deviates from the expected standard, i.e., the target standard response signal.

[0098] Exemplarily, if the response signal output by the standard spot inspection sample matches the target standard response signal corresponding to the standard spot inspection sample, a first result corresponding to the standard spot inspection sample is generated, and the first result is normal; if the response signal output by the standard spot inspection sample does not match the target standard response signal corresponding to the standard spot inspection sample, a second result corresponding to the standard spot inspection sample is generated, and the second result is abnormal.

[0099] In this embodiment, by matching and analyzing the response signal with the target standard response signal, the test result corresponding to the standard inspection sample can be accurately determined, laying a foundation for timely discovering potential problems of the integrated circuit test system.

[0100] In one embodiment, determining the spot inspection result corresponding to the integrated circuit test system according to the test results corresponding to each of the plurality of samples to be tested includes the following steps:

[0101] Step 1: Obtain a test result set corresponding to a first preset number of standard spot inspection samples from the test results corresponding to each of the multiple samples to be tested.

[0102] Step 2: Determine the inspection result corresponding to the integrated circuit test system according to the test result set.

[0103] The test results corresponding to the multiple samples to be tested include the test results corresponding to a first preset number of standard inspection samples and the test results corresponding to a second preset number of untested integrated circuit samples.

[0104] The test result set includes the test results corresponding to each of the first preset number of standard inspection samples.

[0105] Exemplarily, according to the test results corresponding to the first preset number of standard spot inspection samples in the test results corresponding to the plurality of samples to be tested, the test result set corresponding to the first preset number of standard spot inspection samples is determined. Then, by analyzing the test result set, the spot inspection result corresponding to the integrated circuit test system can be accurately determined.

[0106] In this embodiment, by analyzing the test result set corresponding to the first preset number of standard spot inspection samples, the spot inspection result corresponding to the integrated circuit test system can be accurately determined, thereby improving the efficiency and timeliness of the integrated circuit test system spot inspection.

[0107] In one embodiment, determining the spot check result corresponding to the integrated circuit test system according to the test result set includes the following steps:

[0108] Step 1: If the test result set does not meet the preset condition, it is determined that the inspection result corresponding to the integrated circuit test system is a system abnormality.

[0109] Step 2: If the test result set meets the preset conditions, it is determined that the inspection result corresponding to the integrated circuit test system is that the system is normal.

[0110] The preset conditions need to be set according to the actual test requirements and are not specifically limited here. However, when setting the preset conditions, the influence of accidental factors must be taken into account to avoid the problem of low accuracy of the inspection results due to misjudgment caused by accidental factors.

[0111] Exemplarily, the preset condition may be a preset ratio range; wherein the preset ratio range may be a preset normal ratio range or a preset abnormal ratio range, which is not specifically limited herein.

[0112] In an exemplary embodiment, if the proportion of the first result in the test result set does not meet the preset normal proportion range, the inspection result corresponding to the integrated circuit test system is determined to be a system abnormality; if the proportion of the first result in the test result set meets the preset normal proportion range, the inspection result corresponding to the integrated circuit test system is determined to be a system normal.

[0113] In another exemplary embodiment, if the proportion of the second result in the test result set does not meet the preset abnormal proportion range, the spot inspection result corresponding to the integrated circuit test system is determined to be system abnormal; if the proportion of the second result in the test result set meets the preset abnormal proportion range, the spot inspection result corresponding to the integrated circuit test system is determined to be system normal. Among them, the first result is normal; the second result is abnormal.

[0114] In this embodiment, by setting preset conditions, the problem of low accuracy of spot inspection results due to misjudgment caused by accidental factors can be effectively avoided, thereby improving the reliability and accuracy of the spot inspection results corresponding to the integrated circuit test system.

[0115] In one embodiment, the spot inspection method of the integrated circuit test system further includes:

[0116] According to the test results, a sorting signal corresponding to the sample to be tested is generated, and the sorting signal is sent to the sorting machine to control the sorting machine to sort the sample to be tested according to the sorting signal.

[0117] Among them, the sorting signal is used to control the sorting machine to sort and discharge the samples to be tested to the specified location.

[0118] For example, Figure 1 Taking the integrated circuit testing system as an example, the control module in the sorting machine 200 receives the sorting signal sent by the test machine corresponding to the target test station through the communication port connected to the target test station, and then generates a material unloading control instruction according to the sorting signal and transmits it to the robot group, and then the robot group unloads the sample to be tested on the target test station to the specified position corresponding to the sorting signal.

[0119] In an exemplary embodiment, in the case where the sample to be tested is an untested integrated circuit sample, if the test result corresponding to the sample to be tested is a good product, a sorting signal corresponding to the sample to be tested is generated according to the test result, i.e., a good product, and the sorting signal corresponding to the good product is sent to the sorting machine via the communication port connected to the target test station, so as to control the sorting machine to discharge the sample to be tested to the finished product material tube for printing and taping according to the sorting signal. If the test result corresponding to the sample to be tested is a defective product, a sorting signal corresponding to the sample to be tested is generated according to the test result, i.e., a defective product, and the sorting signal corresponding to the defective product is sent to the sorting machine via the communication port connected to the target test station, so as to control the sorting machine to discharge the sample to be tested to the defective product material tube according to the sorting signal.

[0120] In another exemplary embodiment, when the sample to be tested is a standard spot inspection sample, a sorting signal corresponding to the standard spot inspection sample is generated based on the identity identification information of the standard spot inspection sample, and the sorting signal corresponding to the standard spot inspection sample is sent to the sorting machine via the communication port connected to the target test station to control the sorting machine to discharge the standard spot inspection sample into an empty spot inspection tube for collection according to the sorting signal.

[0121] In this embodiment, based on the test results, a sorting signal corresponding to the sample to be tested can be accurately generated, and then the sorting signal is sent to the sorting machine, which can control the sorting machine to automatically sort the sample to be tested according to the sorting signal, effectively reducing manual intervention and improving the degree of automation of the integrated circuit testing system.

[0122] In a specific embodiment, when the sample to be tested is a standard spot inspection sample, the test result corresponding to the sample to be tested is determined according to the preset response mapping relationship, the response signal and the identity identification information. It can be: during the testing process of a first preset number of standard spot inspection samples, the corresponding response signals are first saved until the testing of the first preset number of standard spot inspection samples is completed. Then, according to the preset response mapping relationship and the identity identification information corresponding to each standard spot inspection sample, the response signals corresponding to the first preset number of standard spot inspection samples are uniformly analyzed to simultaneously obtain the test results corresponding to each of the first preset number of standard spot inspection samples.

[0123] In another specific embodiment, when the sample to be tested is a standard spot inspection sample, the test result corresponding to the sample to be tested is determined according to a preset response mapping relationship, a response signal and identity information. It can also be: for each standard spot inspection sample in a first preset number of standard spot inspection samples, during the test process, after determining the response signal corresponding to the standard spot inspection sample, directly analyze the response signal corresponding to the standard spot inspection sample according to the preset response mapping relationship and the identity information corresponding to the standard spot inspection sample to obtain the test result corresponding to the standard spot inspection sample and store it, and so on; until the first preset number of standard spot inspection samples all obtain their respective corresponding test results.

[0124] In one specific embodiment, Figure 4 As shown, Figure 4 The schematic diagram of the flow chart of the spot inspection method of the integrated circuit test system in a specific embodiment; The spot inspection method of the integrated circuit test system is applied to Figure 1 The integrated circuit test system shown is described by taking the target test station in the test machine and the target test station in the sorting machine as examples, and includes the following steps:

[0125] Step S401: the sorting machine control module generates a feeding control instruction according to the start-up instruction and transmits it to the robot group.

[0126] The start instruction is used to trigger the integrated circuit test system to be in working state.

[0127] Step S402: the robot group loads the sample to be tested to the target testing station according to the loading control instruction.

[0128] Step S403, after the sample to be tested is loaded to the target test station, a test start instruction is generated by the sorting machine control module and sent to the target test station through the communication port corresponding to the target test station.

[0129] Step S404 : the target test station sends a target test signal to the target test station via the test cable in response to the test start instruction sent to the target test station.

[0130] In step S405, the target test station tests the sample to be tested on the target test station according to the target test signal, and transmits the response signal output by the sample to be tested in response to the target test signal to the target test station via the test cable.

[0131] Step S406, the target test station receives a response signal output by the sample to be tested in response to the target test signal, and determines a test result corresponding to the sample to be tested according to a preset response mapping relationship, the response signal and the identity information.

[0132] Step S407 : the target test station determines the spot inspection result corresponding to the integrated circuit test system according to the test results corresponding to the plurality of samples to be tested.

[0133] After step S406, the following steps are also included:

[0134] Step S408, generating a sorting signal corresponding to the sample to be tested according to the test result, and sending the sorting signal to the sorting machine control module via the communication port corresponding to the target test station.

[0135] Step S409: the sorting machine control module generates a material unloading control instruction according to the sorting signal, and controls the robot assembly to sort the samples to be tested.

[0136] The inspection method of the integrated circuit test system is applied to the integrated circuit test system. By mixing the first preset number of standard inspection samples with the second preset number of untested integrated circuit samples, the standard inspection samples can be inserted in the actual working process to test the system, so that the system can evaluate its own working status and performance in real time and seamlessly without affecting normal work, effectively avoiding the impact of traditional regular shutdown inspections on production progress, reducing unnecessary downtime, and being able to timely and quickly discover potential anomalies in the integrated test circuit system, thereby improving the inspection efficiency and timeliness of the integrated circuit test system. At the same time, by using the built-in identity information, it is possible to clearly distinguish between untested integrated circuit samples and standard inspection samples, ensuring that each sample to be tested can receive corresponding tests according to its actual type; at the same time, based on the preset response mapping relationship and the identity information corresponding to the standard inspection sample, the test result corresponding to the standard inspection sample can be accurately determined, laying the foundation for quickly identifying potential abnormal behaviors in the integrated circuit test system to provide early warning.

[0137] In one embodiment, an integrated circuit test system includes a tester and a sorter; the tester and the sorter are in communication connection; the tester includes at least one test station; the sorter includes at least one test station; the test station and the test station are in communication connection in a one-to-one correspondence;

[0138] The tester is used to execute any one of the above-mentioned inspection methods for the integrated circuit test system.

[0139] It should be noted that the specific structure of the integrated circuit test system of this embodiment is the same as the specific structure of the integrated circuit test system described in the above embodiment, and will not be repeated here.

[0140] The implementation process of the spot inspection method for the integrated circuit test system in this embodiment is the same as the principle of the implementation process of the spot inspection method for the integrated circuit test system recorded in the above embodiment, and will not be repeated here.

[0141] The integrated circuit test system of this embodiment tests standard inspection samples during actual work, so that the system can evaluate its own working status and performance in real time and seamlessly without affecting normal work, effectively avoiding the impact of traditional periodic shutdown inspections on production progress, reducing unnecessary downtime, and being able to promptly and quickly discover potential anomalies in the integrated test circuit system, thereby improving the reliability of the integrated circuit test system.

[0142] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0143] In an exemplary embodiment, a test machine is provided, the internal structure diagram of the test machine can be as follows: Figure 5As shown. The test machine includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the test machine is used to provide computing and control capabilities. The memory of the test machine includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the test machine is used to store inspection-related data of the integrated circuit test system. The input / output interface of the test machine is used to exchange information between the processor and an external device. The communication interface of the test machine is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a method for inspecting an integrated circuit test system is implemented.

[0144] Those skilled in the art will understand that Figure 5 The structure shown in the figure is merely a block diagram of a portion of the structure related to the scheme of the present application, and does not constitute a limitation on the test machine to which the scheme of the present application is applied. The specific test machine may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0145] In one embodiment, a testing machine is further provided, including a memory and a processor. The memory stores a computer program, and the processor implements the steps in the above method embodiments when executing the computer program.

[0146] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0147] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0148] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0149] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0150] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A spot inspection method for an integrated circuit test system, characterized in that: Applied to a testing machine, the method comprises: In response to a test start instruction sent to a target test station, a target test signal is sent to the target test station to test the sample to be tested on the target test station; wherein the sample to be tested has identity information built in; the sample to be tested is any one of a first preset number of standard spot inspection samples, or any one of a second preset number of untested integrated circuit samples; Receiving a response signal output by the sample to be tested in response to the target test signal; Determine the test result corresponding to the sample to be tested according to the preset response mapping relationship, the response signal and the identity information; According to the test results corresponding to each of the plurality of samples to be tested, the spot inspection result corresponding to the integrated circuit test system is determined.

2. The method according to claim 1, characterized in that The step of determining the test result corresponding to the sample to be tested according to the preset response mapping relationship, the response signal and the identity information includes: Determining the sample type of the sample to be tested according to the identity information; In a case where the sample to be tested is an untested integrated circuit sample, determining a test result corresponding to the sample to be tested according to the response signal; In the case where the sample to be tested is a standard spot inspection sample, the test result corresponding to the sample to be tested is determined according to a preset response mapping relationship, the response signal and the identity information; wherein the preset response mapping relationship includes the correspondence between the identity information corresponding to the standard spot inspection sample and the standard response signal corresponding to the standard spot inspection sample.

3. The method according to claim 2, characterized in that In the case where the sample to be tested is a standard spot inspection sample, determining the test result corresponding to the sample to be tested according to the preset response mapping relationship, the response signal and the identity information includes: According to the identity identification information, determining a target standard response signal matching the identity identification information from the preset response mapping relationship; The test result corresponding to the sample to be tested is determined according to the target standard response signal and the response signal.

4. The method according to claim 3, characterized in that Determining the test result corresponding to the sample to be tested according to the target standard response signal and the response signal includes: If the response signal matches the target standard response signal, generating a first result; If the response signal does not match the target standard response signal, generating a second result; According to the first result or the second result, a test result corresponding to the sample to be tested is obtained.

5. The method according to claim 1, characterized in that Determining the spot inspection result corresponding to the integrated circuit test system according to the test results corresponding to each of the plurality of samples to be tested includes: Obtaining a set of test results corresponding to a first preset number of the standard spot inspection samples from the test results corresponding to each of the plurality of samples to be tested; According to the test result set, a spot check result corresponding to the integrated circuit test system is determined.

6. The method according to claim 5, characterized in that Determining the spot check result corresponding to the integrated circuit test system according to the test result set includes: If the test result set does not meet the preset condition, determining that the inspection result corresponding to the integrated circuit test system is a system abnormality; If the test result set meets the preset condition, it is determined that the inspection result corresponding to the integrated circuit test system is that the system is normal.

7. The method according to claim 1, characterized in that The method further comprises: According to the test result, a sorting signal corresponding to the sample to be tested is generated, and the sorting signal is sent to a sorting machine to control the sorting machine to sort the sample to be tested according to the sorting signal.

8. An integrated circuit testing system, characterized in that: The system comprises a tester and a sorter; the tester and the sorter are connected in communication; the tester comprises at least one test station; the sorter comprises at least one test station; the test station and the test station are connected in communication in a one-to-one correspondence; The test machine is used to execute the inspection method of the integrated circuit test system according to any one of claims 1 to 7.

9. A testing machine, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

11. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

Images