Data scheduling system and method, storage medium and program product

Abstract

The data scheduling system according to the present application comprises: one or more hosts configured to determine configuration parameters based on a communication scenario, and configured to generate transmission data; a programmable data scheduling circuit configured to receive the configuration parameters, and configure an internal circuit structure of the programmable data scheduling circuit based on the configuration parameters to obtain a configured data scheduler, by which the transmission data is received; and one or more slaves configured to receive the transmission data scheduled via the configured data scheduler.

Description

Technical Field

[0001] The present application relates to the field of system on chip (SoC), and in particular to a data scheduling system, method, storage medium and program product. Background Art

[0002] In the scenario where the high-speed host computer as the host in the chip works together with the low-speed peripherals as the slaves, the data scheduler schedules the transmission data. Usually, the data scheduler is only used for one-to-one node communication and is only designed for specific types of peripheral communications. Its internal pathways are closely dependent on the specific instruction content. Once the type of peripheral changes, the hardware structure of the data scheduler must be re-customized. Therefore, when facing different communication scenarios with dynamic changes in the number of communication nodes and traffic size, it is often necessary to modify the type and number of data schedulers. With the increase in the number and type of nodes, the hardware implementation cost of the data scheduler increases significantly. Summary of the invention

[0003] One aspect of the present application provides a data scheduling system, comprising: one or more hosts, configured to determine configuration parameters based on a communication scenario, and configured to generate transmission data; a programmable data scheduling circuit, configured to receive the configuration parameters, and configure the internal circuit structure of the programmable data scheduling circuit based on the configuration parameters to obtain a configured data scheduler, and the transmission data is received by the configured data scheduler; and one or more slaves, configured to receive the transmission data scheduled by the configured data scheduler.

[0004] In some embodiments, the configured data scheduler includes: a data receiving subcircuit, which includes one or more data receiving parts corresponding to one or more hosts respectively based on the configuration parameters, and each data receiving part receives the transmission data from the corresponding host; a transmission temporary storage subcircuit, which includes one or more transmission storage parts corresponding to one or more slaves respectively based on the configuration parameters, and is configured to temporarily store the transmission data received from the data receiving subcircuit in the transmission storage part corresponding to the slave to which the transmission data is to be transmitted, and the size of the one or more transmission storage parts is configured based on the flow rate of transmission data from different hosts to different slaves; and a data scheduling subcircuit, configured to schedule the transmission data temporarily stored in each transmission storage part of the transmission temporary storage subcircuit to the slave corresponding to the transmission storage part according to a predetermined rule set based on the configuration parameters.

[0005] In some embodiments, the configured data scheduler also includes: a read back temporary storage sub-circuit, which includes one or more read back storage parts corresponding to the one or more hosts respectively based on the configuration parameters, and each read back storage part is configured to temporarily store the read back data to be sent by the slave machine to the host corresponding to the read back storage part in response to receiving the transmission data; wherein the size of the one or more read back storage parts is configured based on the flow rate of read back data from different slave machines to different hosts.

[0006] In some embodiments, the configured data scheduler also includes: an interrupt monitoring subcircuit, configured to monitor events of the configured data scheduler during the scheduling of the transmission data, and in response to monitoring a predetermined event, generate an interrupt signal and report it to one or more hosts; and the one or more hosts include a monitoring response module, configured to monitor the interrupt signal reported by the interrupt monitoring subcircuit of the configured data scheduler, and when the interrupt signal is monitored, perform processing corresponding to the monitored interrupt signal.

[0007] In some embodiments, the interrupt monitoring subcircuit is further configured to: determine whether the interrupt priority of the generated interrupt signal is higher than a predetermined priority based on the configuration parameters; in response to the interrupt priority of the generated interrupt signal being higher than the predetermined priority, report the generated interrupt signal to one or more hosts; and in response to the interrupt priority of the generated interrupt signal being not higher than the predetermined priority, clear the generated interrupt signal without reporting it to one or more hosts.

[0008] In some embodiments, the configured data scheduler also includes: a safety verification subcircuit, configured to determine its circuit structure based on the configuration parameters, and to verify whether an error occurs during the operation of the configured data scheduler based on the determined circuit structure; the interrupt monitoring subcircuit is also configured to generate an interrupt signal and report it to one or more hosts in response to monitoring an error occurs during the operation of the configured data scheduler.

[0009] In some embodiments, the security check subcircuit includes a data check subcircuit, which is configured to determine a data check algorithm based on the configuration parameters, and to check whether an error occurs in the transmission process of the transmitted data based on the determined data check algorithm; the interrupt monitoring subcircuit is also configured to generate an interrupt signal and report it to one or more hosts in response to monitoring an error in the transmission data during the transmission process.

[0010] In some embodiments, the transmission temporary storage subcircuit is further configured to, when the capacity of the transmission data temporarily stored in the transmission temporary storage subcircuit reaches a predetermined threshold set based on the configuration parameters, close the receiving channel for receiving the transmission data from the data receiving subcircuit; the interrupt monitoring subcircuit is further configured to, in response to monitoring that the capacity of the transmission data temporarily stored in the transmission temporary storage subcircuit reaches the predetermined threshold, generate the interrupt signal and report it to the one or more hosts.

[0011] In some embodiments, the transmission data has a host identifier and a slave identifier and a data content portion adapted to the type of the slave; the transmission temporary storage subcircuit temporarily stores the transmission data in a transmission storage portion corresponding to the slave identifier based on the slave identifier of the transmission data; the readback temporary storage subcircuit temporarily stores the readback data corresponding to the transmission data in a readback storage portion corresponding to the host identifier based on the host identifier of the transmission data.

[0012] In some embodiments, the transmission data has a fast transmission flag and a priority flag, and the configured data scheduler determines whether to enable the data scheduling sub-circuit to directly obtain the transmission data received by the data receiving sub-circuit without passing through the transmission temporary storage sub-circuit based on the fast transmission flag; the data scheduling sub-circuit is also configured to determine the priority order of transmitting the transmission data to the slave machine based on the priority flag.

[0013] Another aspect of the present application provides a data scheduling method, comprising: determining configuration parameters based on a communication scenario between a host and a slave; configuring an internal circuit structure of a programmable data scheduling circuit based on the configuration parameters to obtain a configured data scheduler; and sending the transmission data to the configured data scheduler so that the configured data scheduler schedules the transmission data.

[0014] Another aspect of the present application provides a non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the above-mentioned data scheduling method when executed by a processor.

[0015] Another aspect of the present application provides a computer program product, including a computer program, and the computer program performs the above data scheduling method when executed by a processor.

[0016] According to the data scheduling system, method, storage medium and program product of the present application, a programmable data scheduling circuit is controlled by one or more hosts, and a data scheduler based on a communication scenario is generated. The structure and function of the programmable data scheduling circuit can be solidified according to the communication scenario in which the host and the slave are located, so as to obtain a data scheduler whose structure and function can be flexibly changed according to actual needs. The data scheduling system according to the above embodiment can be easily applied to the communication of transmission data from multiple hosts to multiple slaves, and can be applied to various types of slave devices, avoiding the large-scale hardware changes for data scheduling caused by modifying the number or type of the host and the slave each time. Therefore, the data scheduler according to the above embodiment can adapt to various communication scenarios, greatly increasing the versatility. The data scheduling system according to the above embodiment can adapt to various communication needs in an efficient, flexible and low-cost manner, without the need to increase the hardware overhead for data scheduling due to the change of the communication scenario between the host and the slave. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic block diagram showing the configuration of a data scheduling system according to an embodiment of the present application.

[0018] Figure 2 is a schematic block diagram showing the configuration of a configured data scheduler according to an embodiment of the present application.

[0019] Figure 3 is a schematic block diagram showing the configuration of a data receiving sub-circuit according to an embodiment of the present application.

[0020] Figure 4 is a schematic block diagram showing the configuration of a transmission temporary storage sub-circuit and a data scheduling sub-circuit according to an embodiment of the present application.

[0021] Figure 5 2 is a schematic diagram showing the configuration of a read-back temporary storage sub-circuit and a corresponding data transmission path according to an embodiment of the present application.

[0022] Figure 6 is a schematic block diagram showing the configuration of a data check subcircuit according to an embodiment of the present application.

[0023] Figure 7 is a schematic diagram showing the data format of transmission data according to an embodiment of the present application.

[0024] Figure 8 is a flow chart showing a data scheduling method according to an embodiment of the present application. DETAILED DESCRIPTION

[0025] In the system on chip, the data scheduler is used to perform data scheduling between the host and the slave to build a physical path for data communication between the host and the slave, and realize the host's control over the slave. For example, the high-speed host computer inside the ISP chip schedules the transmission data to the low-speed I2C peripheral through the data scheduler to control the low-speed I2C peripheral.

[0026] Figure 1 1 is a schematic block diagram showing the configuration of a data scheduling system 100 according to an embodiment of the present application. The data scheduling system 100 according to an embodiment of the present application includes: one or more hosts 120 , a programmable data scheduling circuit 140 ′ and one or more slaves 160 .

[0027] One or more hosts 120 are devices or nodes that initiate data (e.g., instructions) transmission. Each host 120 has an independent physical entity, such as a CPU, and implements its functions by executing software programs on it. Each host 120 has an interface for connecting to a programmable data scheduling circuit 140'. Exemplarily, each host 120 is connected to the programmable data scheduling circuit 140 through its respective interface via a bus interface, such as an AHB (Advanced High-performance Bus) interface. The software programs running in each host 120 may be the same or different, and one or more hosts 100 may also be referred to as a host computer.

[0028] One or more hosts 100 are configured to determine configuration parameters based on a communication scenario, and are configured to generate transmission data. A communication scenario refers to a communication scenario in which one or more hosts 120 and one or more slaves 160 are located, such as the number of hosts 120 and slaves 160 participating in the communication, the type of equipment, the communication method, the size of node traffic, etc. The communication method is, for example, serial communication, parallel communication, network-based communication, etc. Node traffic refers to the amount of data transmitted or received by each device node per unit time. Transmission data is data to be transmitted from one or more hosts 100 to the slave 160, such as control instructions, processing parameters, etc. There are multiple configuration parameters, for example, respectively used to indicate the number of hosts 120 and slaves 160 participating in the communication, the type of equipment, the communication method, the size of node traffic, etc., and respectively used to configure each sub-circuit in the programmable data scheduling circuit 140'.

[0029] When the data scheduling system 100 includes multiple hosts 120, the multiple hosts 120 preferably share a set of bus interfaces to connect to the programmable data scheduling circuit 140' (or the configured data scheduler 140). In this case, the multiple hosts 120 interact and communicate with each other synchronously to prevent the configuration parameters from being overwritten or miswritten.

[0030] The programmable data scheduling circuit 140 ′ is configured to receive configuration parameters, and configure the internal circuit structure of the programmable data scheduling circuit 140 ′ based on the configuration parameters to obtain a configured data scheduler 140 , and the configured data scheduler 140 receives the transmission data.

[0031] Specifically, the programmable data scheduling circuit 140' includes a parameter configuration subcircuit 145, which includes, for example, a plurality of control status registers (CSR). CSR is a register used to control and monitor the operation of a hardware module, and the internal circuit structure of the programmable data scheduling circuit 140' is adjusted according to the configuration parameters stored in the CSR. The host 120 can read and modify these parameters to achieve precise control of the behavior of the internal hardware circuit of the programmable data scheduling circuit 140'. The programmable data scheduling circuit 140' is communicatively connected to one or more hosts 120 via a physical interface. The programmable data scheduling circuit 140' receives configuration parameters and subsequent transmission data from the host 120 via the physical interface.

[0032] The configuration parameters received by the programmable data scheduling circuit 140' are input to the parameter configuration subcircuit 145, which is used to construct the actual working circuit structure of the programmable data scheduling circuit 140' to form a configured data scheduler 140. The configured data scheduler 140 implements the functions that the host 120 wants it to implement according to these configuration parameters. For example, the host 120 can write the number of hosts and slaves (number of nodes) into the parameter configuration subcircuit 145 as a configuration parameter, and the programmable data scheduling circuit 140' can adjust the topology of the system or the resource allocation strategy according to the number of nodes; the host 120 can write the estimated flow size of the transmission data from different hosts to different slaves into the parameter configuration subcircuit 145 as a configuration parameter, and the programmable data scheduling circuit 140' can configure the memory and memory partition according to the estimated flow size; the host 120 can write the scheduling transmission strategy into the parameter configuration subcircuit 145, and the programmable data scheduling circuit 140' can adjust the order and timing of data scheduling and transmission according to the scheduling transmission strategy. The configured data scheduler 140 receives transmission data from the host 120 via one or more physical interfaces connected to each host 120. The programmable data scheduling circuit 140' or the configured data scheduler 140 includes various circuit structures such as gate circuits and memories, which provide a physical link for transmitting data; in a specific implementation, the programmable data scheduling circuit 140' is, for example, an ASIC, and the configuration parameters are loaded into the ASIC serving as the programmable data scheduling circuit 140' through a hardware description language. The ASIC configures the corresponding circuit structure according to these configuration parameters and loads the algorithm to obtain the configured data scheduler 140.

[0033] It is easy to understand that the parameter configuration sub-circuit 145 is connected to the programmable data scheduling circuit 140' or the sub-circuit inside the configured data scheduler 140, such as the data receiving sub-circuit 142, the transmission temporary storage sub-circuit 144, the data scheduling sub-circuit 146, the data checking sub-circuit 147, the read-back temporary storage sub-circuit 148, etc., which will be described later, to configure and solidify its circuit structure.

[0034] One or more slaves 160 are configured to receive the transmission data scheduled via the configured data scheduler 140 .

[0035] One or more slaves 160 are connected to the programmable data scheduling circuit 140' through a physical interface, and receive the transmission data scheduled by the configured data scheduler 140 through the physical interface. Exemplarily, the configured data scheduler 140 schedules the transmission data to the corresponding destination slave according to the destination slave indicated in the transmission data. One or more slaves 160 perform corresponding operations based on the received transmission data, for example, the slave 160 adjusts its own working state based on the received transmission data, and generates an execution result as readback data, ready to be transmitted back to the host 120.

[0036] According to the data scheduling system 100 of the above embodiment, one or more hosts 120 control the programmable data scheduling circuit 140', and generate a data scheduler 140 based on the communication scenario. The structure and function of the programmable data scheduling circuit 140' can be solidified according to the communication scenario in which the host and the slave are located, so as to obtain a data scheduler 140 whose structure and function can be flexibly changed according to actual needs. According to the data scheduling system 100 of the above embodiment, it can be easily applied to the communication of transmission data from multiple hosts to multiple slaves, and can be applied to various types of slave devices, avoiding the large-scale hardware changes for data scheduling caused by modifying the number or type of the host and the slave each time. Therefore, the data scheduler 140 according to the above embodiment can adapt to various communication scenarios, greatly increasing the versatility. According to the data scheduling system 100 of the above embodiment, it can adapt to various communication needs in an efficient, flexible and low-cost manner, without a large increase in the hardware overhead for data scheduling due to the change of the communication scenario between the host and the slave.

[0037] In some embodiments, the configured data scheduler 140 includes a data receiving subcircuit 142 , a transmission buffer subcircuit 144 , and a data scheduling subcircuit 146 .

[0038] Figure 21 is a schematic block diagram showing the configuration of the configured data scheduler 140 according to an embodiment of the present application. It is easy to understand that the configured data scheduler 140 is solidified by the programmable data scheduling circuit 140', so the configured data scheduler 140 also includes a parameter configuration subcircuit 145, which is used to solidify the programmable data scheduling circuit 140' into the configured data scheduler 140. The programmable data scheduling circuit 140' also includes a data receiving subcircuit 142, a transmission temporary storage subcircuit 144 and a data scheduling subcircuit 146. The data receiving subcircuit 142, the transmission temporary storage subcircuit 144 and the data scheduling subcircuit 146 of the programmable data scheduling circuit 140' are configured and solidified based on the configuration parameters received by the parameter configuration subcircuit 145 to form the data receiving subcircuit 142, the transmission temporary storage subcircuit 144 and the data scheduling subcircuit 146 of the configured data scheduler 140.

[0039] The data receiving subcircuit 142 includes one or more data receiving sections corresponding to one or more hosts 120 respectively based on configuration parameters, and each data receiving section receives transmission data from a corresponding host.

[0040] Figure 3 1 is a schematic block diagram showing the configuration of the data receiving subcircuit 142 according to an embodiment of the present application. The data receiving subcircuit 142 configures its own structure based on the configuration parameters received by the parameter configuration subcircuit 145. In the configured data scheduler 140, the data receiving subcircuit 142 includes one or more data receiving parts corresponding to one or more hosts 120 based on the number of hosts 120. That is, each host 120 corresponds to a data receiving part separately, and the data receiving part receives the transmission data sent by the host 120. In the example implementation, each data receiving part is a physical hardware input port on the configured data scheduler 140, each host 120 independently corresponds to a physical hardware input port and is connected to this physical hardware input port, and each physical hardware input port includes a small amount of buffer space for buffering the received transmission data. The transmission data sent by the host 120 is received by the configured data scheduler 140 via the corresponding data receiving part.

[0041] The transmission temporary storage subcircuit 144 is connected to the data receiving subcircuit 142. The transmission temporary storage subcircuit 144 includes one or more transmission storage parts corresponding to one or more slaves 160 respectively based on the configuration parameters, and is configured to temporarily store the transmission data received from the data receiving subcircuit 142 in the transmission storage part corresponding to the slave 160 to which the transmission data is to be transmitted. The size of the one or more transmission storage parts is configured based on the flow rate of transmission data from different hosts to different slaves.

[0042] Figure 4 1 is a schematic block diagram showing the configuration of the transmission temporary storage subcircuit 144 and the data scheduling subcircuit 146 according to an embodiment of the present application. The transmission temporary storage subcircuit 144 configures its own structure based on the configuration parameters received by the parameter configuration subcircuit 145. In the configured data scheduler 140, the transmission temporary storage subcircuit 144 includes one or more transmission storage parts corresponding to one or more slaves 160 based on the number of slaves 160. Exemplarily, the transmission temporary storage subcircuit 144 is a single memory, such as a single SPRAM, which is divided into multiple transmission storage parts with continuous address spaces based on the number of slaves 160. The number of transmission storage parts is consistent with the number of slaves 160, and each transmission storage part is used to temporarily store the transmission data whose destination is the slave corresponding to the transmission storage part. That is, the transmission data is temporarily stored in the corresponding transmission storage part according to its destination slave. More specifically, the control logic of each transmission storage part (i.e., each address space) is implemented as a FIFO (First-In-First-Out). FIFO is a data buffer structure, and the transmission data to be sent to the same slave 160 is stored and retrieved in the transmission storage part corresponding to the slave 160 in the order of entry.

[0043] Preferably, after the transmission data passes through the data receiving sub-circuit 142 and before entering the transmission temporary storage sub-circuit 144 , the transmission data also passes through the data arbitration sub-circuit for arbitration to determine the order in which the multiple transmission data are written into the transmission temporary storage sub-circuit 144 .

[0044] The size of one or more transmission storage parts is configured based on the flow rate of transmission data from different hosts 120 to different slaves 160. The host 120 estimates the size of each transmission data, and thus uses the flow rate of transmission data from different hosts to different slaves as a configuration parameter. The transmission temporary storage subcircuit 144 divides its internal space based on the flow rate of transmission data from different hosts to different slaves, thereby dividing it into multiple transmission storage parts, so that the size of the transmission storage part increases as the flow rate of transmission data to be received by the corresponding slave increases, that is, the transmission storage part corresponding to the slave receiving a larger transmission data flow is divided into a larger storage space, and the transmission storage part corresponding to the slave receiving a smaller transmission data flow is divided into a smaller storage space.

[0045] The data scheduling subcircuit 146 is connected to the transmission temporary storage subcircuit 144 and is configured to schedule the transmission data temporarily stored in each transmission storage part of the transmission temporary storage subcircuit 144 to the slave 160 corresponding to the transmission storage part according to a predetermined rule set based on the configuration parameters.

[0046] As described above, the transmission temporary storage subcircuit 144 can be implemented as a single memory. Subject to the throughput limit of the memory, in the scenario where the transmission data in multiple address spaces (i.e., multiple transmission storage parts) need to be sent to the corresponding slave 160 at the same time, the data scheduling subcircuit 146 performs arbitration to determine the transmission order of the transmission data. The predetermined rule is a rule for arbitrating the transmission order of the transmission data, which is set according to the configuration parameters determined by the host 120. For example, the predetermined rule can be to determine the transmission order according to the priority in the transmission data, or to determine the transmission order according to the order in which the transmission data arrives at the transmission temporary storage subcircuit 144.

[0047] More specifically, the data scheduling subcircuit 146 communicates with each slave 160 through a handshake protocol to schedule the transmission data temporarily stored in the transmission storage part to the corresponding slave 160. It is easy to understand that the data scheduling subcircuit 146 and the slave 160 transmit the transmission data through a physical link.

[0048] According to the data scheduling system 100 of the above embodiment, the circuit structure of the specific operation of the configured data scheduler 140 is configured and solidified according to the configuration parameters determined by the host 120. The transmission data is transmitted to the transmission temporary storage subcircuit 144 corresponding to the slave 160 through the data receiving subcircuit 142 corresponding to the host 120, and the transmission data received from the host 120 is mapped to the address space corresponding to the slave 160, so that it can be easily applied to the communication of transmission data from multiple hosts 120 to multiple slaves 160. In addition, the data scheduling system 100 configures the internal temporary storage space size (i.e., the size of multiple transmission storage parts) of different paths according to the flow size of the transmission data from different hosts 120 to different slaves 160, so as to be used for temporarily storing the transmission data to be sent to different slaves 160 respectively, avoiding the need to adjust the hardware of the data scheduler in large quantities when the communication flow between nodes changes. Furthermore, the predetermined rules for transmitting data are also set by the host 120, so that the data scheduling system 100 that meets the actual needs can be obtained.

[0049] In some embodiments, the configured data scheduler 140 also includes a read back temporary storage subcircuit 148, which includes one or more read back storage parts corresponding to one or more hosts 120 respectively based on configuration parameters, and each read back storage part is configured to temporarily store read back data that the slave 160 is to send to the host corresponding to the read back storage part in response to receiving the transmission data; the size of the one or more read back storage parts is configured based on the flow of read back data from different slaves to different hosts.

[0050] When the slave 160 receives the transmission data from the host 120, the slave 160 will return the readback data for the transmission data. For example, in the case where the transmission data sent by the host 120 to the slave 160 is a control instruction, the slave 160 can return the specific execution status of the control instruction (such as execution success or execution failure) and the corresponding operation result of the slave 160 to the host 120 that sent the control instruction to it. The process of the slave 160 returning the readback data to the host 120 is also scheduled and transmitted by the configured data scheduler 140.

[0051] Figure 5 FIG. 1 is a schematic diagram showing the configuration of the read-back temporary storage sub-circuit 148 and the corresponding data transmission path according to an embodiment of the present application. Figure 3 The readback temporary storage subcircuit 148 in the configured data scheduler 140 is shown to include readback storage parts 1 to N, and the readback storage parts 1 to N correspond to the hosts 1 to N one by one. The readback temporary storage subcircuit 148 can be a memory divided into a plurality of storage parts. Each readback storage part is configured to temporarily store the readback data that the slave 160 is to send to the host 120 corresponding to the readback storage part in response to receiving the transmission data. More specifically, the slave 160 transmits the readback data to the host 120 from which the transmission data received by it comes, that is, the slave 160 sends the readback data to the host 120 from which the data received by the slave 160 comes. Accordingly, according to the host 120 to which the data is to be sent, the readback storage part to which the readback data is to be temporarily stored is selected. Furthermore, each readback storage part is also divided into a plurality of areas corresponding to each slave 160 one by one, and the readback data from different slaves 160 are temporarily stored in different areas of the readback storage part.

[0052] When data readback occurs, the slave 160 generates readback data according to the received transmission data, and the readback data is to be transmitted to the host 120 from which the transmission data received by the slave 160 comes. The readback data is temporarily stored in the corresponding readback storage part according to the host 120 to which it is to be transmitted. As a result, the corresponding readback interrupt signal (generated by the interrupt monitoring subcircuit 149 described later) is reported to the host 120. In response to receiving the readback interrupt signal, the host 120 sends a readback request to the readback temporary storage subcircuit 148, and the readback temporary storage subcircuit 148 sends the readback data to the corresponding host based on the readback request. Subject to the throughput limit of the readback temporary storage subcircuit 148, the configured data scheduler 140 may also include a readback arbitration subcircuit to arbitrate the order of sending the readback data. The arbitration rules of the readback arbitration subcircuit may be determined by the configuration parameters determined by the host 120.

[0053] The size of one or more readback storage parts is configured based on the flow rate of readback data from different slaves to different hosts. The host 120 estimates the size of each readback data, and thus uses the flow rate of readback data from different slaves to different hosts as a configuration parameter. The readback temporary storage subcircuit 148 divides its internal space into multiple readback storage parts based on the flow rate of readback data from different slaves to different hosts, so that the size of the readback storage part increases as the flow rate of readback data to be received by the corresponding host increases, that is, the readback storage part corresponding to the host receiving a larger readback data flow is divided into a larger storage space, and the readback storage part corresponding to the host receiving a smaller readback data flow is divided into a smaller storage space.

[0054] According to the data scheduling system 100 of the above embodiment, the configured data scheduler 140 can reasonably schedule the readback data sent by the slave 160 to the host 120 in response to receiving the transmission data. In addition, the data scheduling system 100 configures the internal temporary storage space size of different paths (i.e., the size of multiple readback storage parts) according to the flow size of the readback data from different slaves 160 to different hosts 120, so as to be used for temporarily storing the transmission data to be sent to different hosts 120 respectively, avoiding the competition conflict of multiple readback data being read back to the same space at the same time, and there is no need to adjust the hardware of the data scheduler in large quantities due to the change of the communication flow between nodes.

[0055] In some embodiments, the configured data scheduler 140 further includes: an interrupt monitoring subcircuit 149 configured to monitor events in the process of scheduling transmission data by the configured data scheduler 140, and in response to monitoring a predetermined event, generate an interrupt signal and report it to one or more hosts 120. One or more hosts 120 include a monitoring response module configured to monitor the interrupt signal reported by the interrupt monitoring subcircuit of the configured data scheduler, and when an interrupt signal is monitored, perform processing corresponding to the monitored interrupt signal.

[0056] See again Figure 2 , the configured data scheduler 140 also includes an interrupt monitoring subcircuit 149. The interrupt monitoring subcircuit 149 monitors the operation of the data scheduler 140 in real time. Once a situation that meets a specific condition (predetermined event) is detected, an interrupt signal will be generated in real time, and the interrupt signal will be reported to one or more hosts 120, so that the host 120 is informed that a predetermined event has occurred in the configured data scheduler 140, so as to perform corresponding processing. The predetermined event is, for example, a specific state of the configured data scheduler 140, such as the occurrence of internal errors in each subcircuit in the configured data scheduler 140, the generation of readback data, data verification errors, memory capacity exceeding a threshold, and the arrival of a specific time threshold.

[0057] The predetermined events may be set for each host 120 based on the configuration parameters. The predetermined events set for each host 120 may be different. For example, some of the multiple hosts 120 do not need to pay attention to a specific event, and the host 120 may shield the interrupt signal of the specific event, that is, for the host 120, the predetermined event that triggers the interrupt signal does not include the specific event.

[0058] The monitoring response module of one or more hosts 120 monitors the interrupt signal reported by the configured data scheduler 140 in real time, and when the interrupt signal is detected, performs processing corresponding to the detected interrupt signal. As described above, the interrupt signal includes multiple types, indicating different events respectively, and the monitoring response module of one or more hosts 120 performs corresponding processing according to the detected interrupt signal, such as issuing an instruction to repair the corresponding error, issuing a readback request, issuing an instruction to retransmit data, etc.

[0059] According to the data scheduling system 100 of the above embodiment, the host 120 monitors the operation process of the configured data scheduler 140, that is, monitors the data scheduling process, can timely discover and handle situations arising in the data scheduling process, control the overall scheduling process, and improve the reliability of the data scheduling system 100.

[0060] In some embodiments, the interrupt monitoring subcircuit 149 is further configured to: determine whether the priority of the generated interrupt signal is higher than a predetermined priority based on configuration parameters; in response to the priority of the generated interrupt signal being higher than the predetermined priority, report the generated interrupt signal to one or more hosts; and in response to the priority of the generated interrupt signal being not higher than the predetermined priority, clear the generated interrupt signal without reporting it to one or more hosts.

[0061] The configuration parameters may include parameters for setting the corresponding interrupt priority for each interrupt signal. A lower priority is set for the type of non-fatal and low-frequency interrupt signals, and a higher priority is set for the type of interrupt signals that affect the data scheduling work of the data scheduling system 100. The interrupt monitoring subcircuit 149 only reports the interrupt signals with a higher priority than the predetermined priority to one or more hosts 120 in real time. For interrupt signals with a lower priority than the predetermined priority, the interrupt signal is automatically cleared without being reported to one or more hosts 120; in this case, the interrupt monitoring subcircuit 149 records the number of times the interrupt signal is generated and the generated interrupt signal is cleared, for example, by recording the number of times the interrupt signal is cleared through a counter in the configured data scheduler 140, and records the information related to the cleared interrupt signal in the memory; after waiting for all transmission data transmission to be completed and all transmission data to be effectively transmitted, the interrupt monitoring subcircuit 149 reports the historical error interrupt signal to the host 120, so that the host 120 queries the corresponding counter and memory to obtain the historical error, and optionally performs corresponding processing.

[0062] According to the data scheduling system 100 of the above embodiment, an automatic processing mechanism for interrupt signal generation is added to the configured data scheduler 140 side, which reduces the software scheduling pressure on the host 120 side and improves the data scheduling efficiency of the data scheduling system 100.

[0063] In some embodiments, the configured data scheduler 140 also includes: a safety check subcircuit, configured to determine its circuit structure based on configuration parameters, and to check whether an error occurs during the operation of the configured data scheduler 140 based on the determined circuit structure; the interrupt monitoring subcircuit 149 is also configured to generate an interrupt signal and report it to one or more hosts 120 in response to monitoring an error occurring during the operation of the configured data scheduler 140.

[0064] The configured data scheduler 140 may include a security check subcircuit for implementing various verification functions, which is distributed in various parts of the configured data scheduler 140. For example, the configured data scheduler 140 may include a data check subcircuit 147, which is connected to the data scheduling subcircuit 146, and is used to receive the transmission data scheduled by the data scheduling subcircuit 146, and to verify the correctness of the transmission data before sending it to the slave; the configured data scheduler 140 may include a register security check subcircuit, which is set in the parameter configuration subcircuit 145, and is used to verify the register parity error of the parameter configuration subcircuit 145; the configured data scheduler 140 may also include a memory security check subcircuit, which is set in the transmission temporary storage subcircuit 144, and is used to self-check the storage error inside the transmission temporary storage subcircuit 144. The security check subcircuit determines its circuit structure based on the configuration parameters, and specifically includes or enables which security check subcircuits, thereby determining which verification functions it specifically implements.

[0065] The interrupt monitoring subcircuit 149 monitors the operation result of the safety check subcircuit. When the operation result of the safety check subcircuit indicates that an error occurs in the operation of the data scheduler, an interrupt signal is generated in real time and reported to one or more hosts 120. When one or more hosts 120 receive an interrupt signal indicating an error in the operation of the configured data scheduler 140, they can issue an instruction to repair the corresponding error, such as reconfiguring or resetting the subcircuit where the error occurs, or resending the transmission data.

[0066] According to the data scheduling system 100 of the above embodiment, the security check subcircuit determines its circuit structure based on the configuration parameters, and can determine which specific check function is implemented based on the setting of the host 120. The configured data scheduler 140 includes a corresponding security check mechanism according to the needs of the actual communication scenario, which can ensure the security of data transmission. In addition, the host 120 can know in real time whether the configured data scheduler 140 has an error during operation, and perform corresponding processing in a timely manner.

[0067] In some embodiments, the security check subcircuit includes a data check subcircuit 147, which is configured to determine a data check algorithm based on configuration parameters, and to check whether an error occurs during the transmission of the transmitted data based on the determined data check algorithm; the interrupt monitoring subcircuit 149 is also configured to generate an interrupt signal and report it to one or more hosts in response to detecting an error in the transmitted data during the transmission process.

[0068] Figure 61 is a schematic block diagram showing the configuration of the data check subcircuit 147 according to an embodiment of the present application. The data check subcircuit 147 is connected to the data scheduling subcircuit 146, receives the transmission data scheduled by the data scheduling subcircuit 146, and checks the received transmission data.

[0069] The data check subcircuit 147 is, for example, a CRC (Cyclic Redundancy Check) check circuit, which is preset with cores for implementing multiple CRC check algorithms, such as a CRC8 core, a CRC16 core, and a CRC32 core, which are respectively used to execute CRC8, CRC16, and CRC32 algorithms. The configuration parameters determined by the host 120 are applied to the CRC circuit parameter configuration module of the data check subcircuit 147, thereby determining which CRC core inside the data check subcircuit 147 is specifically enabled to execute the corresponding CRC algorithm.

[0070] Furthermore, the CRC circuit parameter configuration module of the data check subcircuit 147 also determines the circuit structure of the actual operation based on the configuration parameters. For example, the data check subcircuit 147 may include a first CRC circuit and a second CRC circuit. In actual operation, the first CRC circuit and the second CRC circuit may implement the same CRC algorithm, that is, each enables the corresponding CRC core and has the same hardware circuit structure. The two receive the same transmission data as input and perform data verification respectively; after the verification is completed, a special comparison circuit is set to compare whether the results of the two outputs are consistent, thereby improving the accuracy of the data check subcircuit 147 in verifying the transmission data. This is called a lockstep mechanism. In this case, the data check subcircuit 147 also determines whether to enable the lockstep mechanism based on the configuration parameters, that is, whether to enable the first CRC circuit and the second CRC circuit at the same time.

[0071] The check result of the data check subcircuit 147 indicates whether an error occurs in the transmission process of the transmission data. The interrupt monitoring subcircuit 149 monitors the data check result of the first safety check subcircuit 147. When an error occurs in the transmission process of the transmission data, an interrupt signal is generated in real time and reported to one or more hosts 120. One or more hosts 120 learn that an error occurs in the transmission process of the transmission data according to the received interrupt signal. In response to this, the host 120 can resend the data that has an error in the transmission process.

[0072] According to the data scheduling system 100 of the above embodiment, the security check subcircuit includes a data check subcircuit 147, and the check algorithm of the data check subcircuit 147 and the circuit structure of the actual operation are determined and solidified based on the configuration parameters determined by the host 120. The configured data scheduler 140 has a corresponding data check mechanism according to the needs of the actual communication scenario, which can ensure the security of data transmission. In addition, the host 120 can know in real time whether the configured data scheduler 140 has a data transmission error during the data scheduling process, and perform corresponding processing in time.

[0073] In some embodiments, the transmission temporary storage subcircuit is further configured to, when the capacity of the transmission data temporarily stored in the transmission temporary storage subcircuit 144 reaches a predetermined threshold value set based on the configuration parameters, close the receiving channel for receiving the transmission data from the data receiving subcircuit 142; the interrupt monitoring subcircuit 149 is further configured to, in response to monitoring that the capacity of the transmission data temporarily stored in the transmission temporary storage subcircuit 144 reaches a predetermined threshold value, generate an interrupt signal and report it to one or more hosts 120.

[0074] One or more hosts 120 may set a predetermined threshold value for the capacity of each transmission storage part in the transmission temporary storage subcircuit 144, so as to apply the predetermined threshold value to the configured data scheduler 140 through configuration parameters. For example, the predetermined threshold value may be 70% of the total capacity of each transmission storage part or 80% of the total capacity of each transmission storage part, which is determined by the host 120 according to the actual communication scenario. If the host 120 continues to input transmission data to the configured data scheduler 140 quickly without control, once the capacity of the transmission temporary storage subcircuit 144 is full, new transmission data will be lost, which may cause erroneous operation or data error of the entire system. In the present application, during the data transmission process, when the capacity of the transmission data temporarily stored in any transmission storage part in the transmission temporary storage subcircuit 144 reaches the predetermined threshold value, the receiving channel for receiving the transmission data from the data receiving subcircuit 142 is closed, so that subsequent transmission data can no longer be transmitted into the transmission temporary storage subcircuit 144. When the capacity of the temporarily stored transmission data in the waiting transmission temporary storage subcircuit 144 drops below a predetermined threshold after the transmission data is scheduled, the receiving channel for receiving transmission data from the data receiving subcircuit 142 is reopened. The opening and closing of the receiving channel controls whether new transmission data is allowed to enter the transmission temporary storage subcircuit 144.

[0075] The interrupt monitoring subcircuit 149 monitors whether the capacity of the transmission data temporarily stored in the transmission temporary storage subcircuit 144 reaches a predetermined threshold value, and when the predetermined threshold value is reached, an interrupt signal is generated in real time and reported to one or more hosts 120. In this regard, the one or more hosts 120 can know that the current data scheduling capacity of the configured data scheduler 140 is limited, so as to reduce the transmission speed of the transmission data, or suspend the transmission of the transmission data, so as to prevent data leakage and loss.

[0076] According to the data scheduling system 100 of the above embodiment, a predetermined threshold value of the capacity of the transmission temporary storage subcircuit 144 can be set according to the needs of the communication scenario, and a back pressure mechanism is provided to close the data receiving channel and notify the host 120 when the capacity reaches the threshold value. Through the back pressure mechanism, a balance can be achieved between the input of data and the internal processing speed of the data scheduling system 100, ensuring the stability of the system and the integrity of the data. Since the back pressure mechanism is based on the configuration parameters determined by the host 120 according to the communication scenario, the host 120 can flexibly control the input and scheduling rhythm of data according to the actual communication scenario, improve the adaptability of the system to different data flows and processing tasks, and thus improve the performance and reliability of the entire system.

[0077] In some embodiments, the transmission data has a host identifier and a slave identifier and a data content portion adapted to the type of the slave 160; the transmission temporary storage subcircuit 144 temporarily stores the transmission data in a transmission storage portion corresponding to the slave identifier based on the slave identifier of the transmission data; the readback temporary storage subcircuit 148 temporarily stores the readback data corresponding to the transmission data in a readback storage portion corresponding to the host identifier based on the host identifier of the transmission data.

[0078] Figure 7 1 is a schematic diagram showing the data format of transmission data according to an embodiment of the present application. The data content portion adapted to the slave type is the valid data content to be sent to the slave 160, which has a data format adapted to the slave 160, and more specifically, has a data format supported by the physical interface connecting the slave 160 and the configured data scheduler 140. For example, when the slave 160 is a device connected via an I2C interface, the data content portion adapted to the slave content has a data format specified by the I2C protocol; when the slave 160 is a device connected via an SPI interface, the data content portion adapted to the slave content has a data format supported by the SPI.

[0079] The data format of the transmission data of the data scheduling system 100 according to the present application adds a host identifier and a slave identifier on the basis of the data content part adapted to the type of the slave 160. The host identifier is an identifier used to identify the host 120 from which the transmission data comes, and the slave identifier is an identifier used to identify the slave 160 (destination) to which the transmission data is to be transmitted.

[0080] The data bit width of the host identifier and the slave identifier is determined by the host 120 according to the actual communication scenario, more specifically, according to the number of hosts and the number of slaves in the data scheduling system 100. Specifically, in the case of N hosts 120, the data bit width of the host identifier can be determined by rounding up log2(N); in the case of M slaves 160, the data bit width of the host identifier can be determined by rounding up log2(M). For example, when the data scheduling system 100 includes three hosts 120 and five slaves 160 for communication, log2(3)≈1.58, but because the number of bits must be an integer, it is rounded up to 2 bits. These 2 bits can represent 4 states, 00, 01, 10, and 11, which are sufficient to distinguish the three hosts 120; log2(5)≈2.32, rounded up to 3 bits. These 3 bits can represent 8 states, 000, 001, 010, 011, and 100, which are sufficient to distinguish the five slaves 160.

[0081] Before starting data transmission, the host 120 organizes the transmission data into the above data format and then sends it to the configured data scheduler 140 .

[0082] After the transmission data enters the configured data scheduler 140, the transmission temporary storage subcircuit 144 temporarily stores the transmission data in the transmission storage part corresponding to the slave identifier based on the slave identifier of the transmission data. As described above, the transmission temporary storage subcircuit 144 includes one or more transmission storage parts corresponding to one or more slaves 160, respectively, and these transmission storage parts are divided according to the slave identifier. The configured data scheduler 140 determines which transmission storage part the transmission data should be temporarily stored in based on the slave identifier in the transmission data.

[0083] The readback data is sent based on the transmission data, so the readback data has a corresponding relationship with the transmission data. As described above, the readback temporary storage subcircuit 148 includes one or more readback storage parts corresponding to one or more hosts 120, and the slave 160 generates readback data according to the received transmission data, and the readback data is temporarily stored in the readback storage part corresponding to the host identifier in the readback temporary storage subcircuit 148 according to the host identifier of the corresponding transmission data.

[0084] In short, the host identifier is used to select the transmission storage part in the transmission temporary storage subcircuit 144 , and the slave identifier is used to select the read-back storage part in the read-back temporary storage subcircuit 148 .

[0085] The data scheduling system 100 according to the above-mentioned embodiment can be easily applied to the communication of transmission data from multiple hosts to multiple slaves, and can be applied to various different types of slave devices. It is only necessary to add a host identifier and a slave identifier before the data content part adapted to the type of the slave, and the transmission data and the read-back data can be correctly and effectively scheduled by the configured data scheduler 140.

[0086] In some embodiments, the transmission data has a fast transmission flag and a priority flag, and the configured data scheduler 140 determines whether to enable the data scheduling sub-circuit 146 to directly obtain the transmission data received by the data receiving sub-circuit 142 based on the fast transmission flag, without transmitting the transmission data through the transmission temporary storage sub-circuit 144; the data scheduling sub-circuit 146 is also configured to determine the priority order of transmitting the transmission data to the slave 160 based on the priority flag.

[0087] The fast transmission identification bit and the priority identification bit can be located in the data content part adapted to the type of the slave. The fast transmission identification bit can have a width of 1 bit, which is used to indicate whether the transmission data belongs to fast transmission data. Fast transmission data is data with the highest priority and needs to be transmitted to the slave 160 as quickly as possible, such as instructions for instructing the slave 160 to reset when an error occurs in the slave 160. If the fast transmission identification bit of the transmission data indicates that the data belongs to fast transmission data, the configured data scheduler 140 enables the data scheduling subcircuit 146 to directly obtain the transmission data received by the data receiving subcircuit 142, and the transmission data is directly scheduled to the slave 160 without passing through the transmission temporary storage subcircuit 144. As a result, the fast transmission data does not need to be temporarily stored by the transmission temporary storage subcircuit 144, and therefore does not need to be arbitrated by the input arbitration subcircuit, so it can be quickly transmitted to the slave 160.

[0088] The priority identification bit may have a width of 2 bits and is used to identify the priority of the transmission data. The data scheduling subcircuit 146 determines the order in which the transmission data is sent based on the priority of the transmission data. Furthermore, the input arbitration subcircuit described above may also determine the priority order in which the transmission data is sent to the transmission temporary storage subcircuit 144 based on the priority of the transmission data.

[0089] Furthermore, the host 120 may set the priority flag in the transmission data based on the communication scenario, that is, the host 120 arranges the priority of sending the transmission data according to the communication scenario to avoid conflicts between the order in which the slave 160 receives the transmission data and the logic of the received transmission data. More specifically, the host 120 sets the priority of the transmission data according to the operating logic of the slave 160. For example, when the operating logic of the slave 160 is to first transmit data A and then transmit data B, the host 120 may set the priority of transmission data A to be higher than the priority of transmission data B. Therefore, the host 120 can solve the problem of data conflict at the software level.

[0090] According to the data scheduling system 100 of the above embodiment, it is possible to schedule transmission data in an efficient manner according to actual needs.

[0091] Another aspect of the present application provides a data scheduling method, for example, applied to a host in the above-mentioned data scheduling system.

[0092] Figure 8 FIG. 1 is a flow chart showing a data scheduling method according to an embodiment of the present application. Figure 8 As shown, the data scheduling method includes:

[0093] S810, determining configuration parameters based on a communication scenario between the master and the slave;

[0094] S830, configuring the internal circuit structure of the programmable data scheduling circuit based on the configuration parameters to obtain a configured data scheduler;

[0095] S850: Send the transmission data to the configured data scheduler, so that the configured data scheduler schedules the transmission data.

[0096] In some embodiments, the data scheduling method further includes: monitoring a predetermined event that occurs during the process of scheduling transmission data by the configured data scheduler; and in response to monitoring the predetermined event, executing processing corresponding to the predetermined event.

[0097] In some embodiments, the data scheduling method further includes: in response to the configured data scheduler completing the scheduling of the transmission data, resetting the configured data scheduler.

[0098] Scheduling completion refers to the effective scheduling of all transmission data, which means that all transmission data are sent into the configured data scheduler, and all transmission data sent into the configured data scheduler are scheduled to the corresponding slaves without remaining inside the configured data scheduler, and the data read back from the slaves are all received, and the data verification of the transmission data is correct. Reset means restoring the configured data scheduler to the default state, that is, removing its fixed configuration parameters and restoring to the state of the programmable data scheduling circuit.

[0099] Specifically, the data scheduling method also includes: monitoring whether all transmission data are sent into the configured data scheduler; in response to all transmission data not being sent into the configured data scheduler, continuing to wait for the transmission data to be sent; in response to all transmission data being sent into the configured data scheduler, monitoring whether there is any residual transmission data in the configured data scheduler; in response to monitoring that there is any residual transmission data in the configured data scheduler, continuing to wait for the transmission of the transmission data; in response to monitoring that there is no residual transmission data in the configured data scheduler, monitoring whether all requested readback data from the slave are received; in response to not all requested readback data from the slave being received, continuing to wait for the reception of readback data from the slave; in response to all requested readback data from the slave being received, resetting the configured data scheduler to restore it to the state of the programmable data scheduling circuit.

[0100] In some embodiments, the configured data scheduler includes: a data receiving subcircuit, which includes one or more data receiving parts corresponding to one or more hosts respectively based on configuration parameters, and each data receiving part receives transmission data from the corresponding host; a transmission temporary storage subcircuit, which includes one or more transmission storage parts corresponding to one or more slaves respectively based on the configuration parameters, and is configured to temporarily store the transmission data received from the data receiving subcircuit in the transmission storage part corresponding to the slave to which the transmission data is to be transmitted, and the size of the one or more transmission storage parts is configured based on the flow rate of transmission data from different hosts to different slaves; and a data scheduling subcircuit, configured to schedule the transmission data temporarily stored in each transmission storage part of the transmission temporary storage subcircuit to the slave corresponding to the transmission storage part according to a predetermined rule set based on the configuration parameters.

[0101] In some embodiments, the configured data scheduler also includes: a read back temporary storage sub-circuit, which includes one or more read back storage parts corresponding to one or more hosts respectively based on configuration parameters, each read back storage part is configured to temporarily store read back data that the slave machine is to send to the host corresponding to the read back storage part in response to receiving transmission data; wherein the size of the one or more read back storage parts is configured based on the flow rate of read back data from different slave machines to different hosts.

[0102] In some embodiments, the configured data scheduler also includes: an interrupt monitoring subcircuit, configured to monitor events in the process of scheduling transmission data by the configured data scheduler, and in response to monitoring a predetermined event, generate an interrupt signal and report it to one or more hosts; and the data scheduling method also includes: monitoring the interrupt signal reported by the interrupt monitoring subcircuit of the configured data scheduler, and when an interrupt signal is monitored, performing processing corresponding to the monitored interrupt signal.

[0103] In some embodiments, the interrupt monitoring subcircuit is further configured to: determine whether the interrupt priority of the generated interrupt signal is higher than a predetermined priority based on configuration parameters; in response to the interrupt priority of the generated interrupt signal being higher than the predetermined priority, report the generated interrupt signal to one or more hosts; and in response to the interrupt priority of the generated interrupt signal being not higher than the predetermined priority, clear the generated interrupt signal without reporting it to one or more hosts.

[0104] In some embodiments, the configured data scheduler also includes: a security check subcircuit, configured to determine its circuit structure based on configuration parameters, and to check whether an error occurs during the operation of the configured data scheduler based on the determined circuit structure; the interrupt monitoring subcircuit is also configured to generate an interrupt signal and report it to one or more hosts in response to monitoring an error occurs during the operation of the configured data scheduler.

[0105] In some embodiments, the security check subcircuit includes a data check subcircuit, which is configured to determine a data check algorithm based on configuration parameters, and to check whether an error occurs during the transmission of the transmitted data based on the determined data check algorithm; the interrupt monitoring subcircuit is also configured to generate an interrupt signal and report it to one or more hosts in response to detecting an error in the transmission of the transmitted data.

[0106] In some embodiments, the transmission temporary storage sub-circuit is further configured to, when the capacity of the transmission data temporarily stored in the transmission temporary storage sub-circuit reaches a predetermined threshold set based on the configuration parameters, close the receiving channel for receiving the transmission data from the data receiving sub-circuit; the interrupt monitoring sub-circuit is further configured to, in response to monitoring that the capacity of the transmission data temporarily stored in the transmission temporary storage sub-circuit reaches a predetermined threshold, generate an interrupt signal and report it to one or more hosts.

[0107] In some embodiments, the data scheduling method also includes: organizing the transmission data into a format having a host identifier and a slave identifier and a data content portion that is adapted to the type of the slave; the transmission temporary storage subcircuit temporarily stores the transmission data in a transmission storage portion corresponding to the slave identifier based on the slave identifier of the transmission data; and the readback temporary storage subcircuit temporarily stores the readback data corresponding to the transmission data in a readback storage portion corresponding to the host identifier based on the host identifier of the transmission data.

[0108] In some embodiments, the transmission data has a fast transmission flag and a priority flag, and the configured data scheduler determines whether to enable the data scheduling sub-circuit to directly obtain the transmission data received by the data receiving sub-circuit without passing through the transmission temporary storage sub-circuit based on the fast transmission flag; the data scheduling sub-circuit is also configured to determine the priority order of transmitting the transmission data to the slave machine based on the priority flag.

[0109] The specific details of the data scheduling method according to the present application can be referred to the above description of the data scheduling system according to the present application, which will not be repeated here.

[0110] Another aspect of the present application provides a non-transitory computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the data scheduling method according to the present application is implemented.

[0111] The specific details of the non-transitory computer-readable storage medium according to the present application can be referred to the above description of the data scheduling system according to the present application, which will not be repeated here.

[0112] Another aspect of the present application provides a computer program product, including a computer program, which implements the data scheduling method according to the present application when executed by a processor.

[0113] The specific details of the computer program product according to the present application can be referred to the above description of the data scheduling system according to the present application, which will not be repeated here.

[0114] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0115] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. Data dispatching system, including: One or more hosts, configured to determine configuration parameters based on a communication scenario, and configured to generate transmission data; A programmable data scheduling circuit is configured to receive the configuration parameters, and configure the internal circuit structure of the programmable data scheduling circuit based on the configuration parameters to obtain a configured data scheduler, and the configured data scheduler receives the transmission data; as well as One or more slaves are configured to receive the transmission data scheduled by the configured data scheduler.

2. The data scheduling system according to claim 1, wherein: The configured data scheduler comprises: a data receiving subcircuit, which comprises one or more data receiving parts corresponding to one or more hosts respectively based on the configuration parameters, each data receiving part receiving the transmission data from the corresponding host; a transmission temporary storage subcircuit, which includes one or more transmission storage parts corresponding to one or more slaves respectively based on the configuration parameters, and is configured to temporarily store the transmission data received from the data receiving subcircuit in the transmission storage parts corresponding to the slaves to which the transmission data is to be transmitted, and the sizes of the one or more transmission storage parts are configured based on the flow rate of transmission data from different hosts to different slaves; and The data scheduling subcircuit is configured to schedule the transmission data temporarily stored in each transmission storage part of the transmission temporary storage subcircuit to the slave corresponding to the transmission storage part according to a predetermined rule set based on the configuration parameters.

3. The data scheduling system according to claim 1 or 2, wherein: The configured data scheduler further comprises: a readback temporary storage subcircuit, which comprises one or more readback storage parts corresponding to the one or more hosts respectively based on the configuration parameters, each readback storage part being configured to temporarily store readback data to be sent by the slave to the host corresponding to the readback storage part in response to receiving the transmission data; The size of the one or more read-back storage parts is configured based on the flow rate of read-back data from different slaves to different hosts.

4. The data scheduling system according to claim 1 or 2, wherein The configured data scheduler further comprises: an interrupt monitoring subcircuit configured to monitor events of the configured data scheduler in the process of scheduling the transmission data, and in response to monitoring a predetermined event, generate an interrupt signal and report it to one or more hosts; and The one or more hosts include a monitoring response module configured to monitor an interrupt signal reported by an interrupt monitoring subcircuit of the configured data scheduler, and when the interrupt signal is monitored, execute a process corresponding to the monitored interrupt signal.

5. The data scheduling system according to claim 4, wherein: The interrupt monitoring subcircuit is further configured as: Based on the configuration parameters, determining whether the interrupt priority of the generated interrupt signal is higher than a predetermined priority; In response to the interrupt priority of the generated interrupt signal being higher than the predetermined priority, reporting the generated interrupt signal to one or more hosts; and In response to the interrupt priority of the generated interrupt signal being not higher than the predetermined priority, the generated interrupt signal is cleared without being reported to one or more hosts.

6. The data scheduling system according to claim 4, wherein The configured data scheduler further comprises: A safety check subcircuit, configured to determine its circuit structure based on the configuration parameters, and to check whether an error occurs in the operation of the configured data scheduler based on the determined circuit structure; The interrupt monitoring subcircuit is further configured to generate an interrupt signal and report it to one or more hosts in response to detecting an error in the operation of the configured data scheduler.

7. The data scheduling system according to claim 6, wherein The security check subcircuit includes a data check subcircuit configured to determine a data check algorithm based on the configuration parameters, and to check whether an error occurs in the transmission data during the transmission process based on the determined data check algorithm; The interrupt monitoring subcircuit is further configured to generate an interrupt signal and report it to one or more hosts in response to detecting an error in the transmission data during the transmission process.

8. The data scheduling system according to claim 4, wherein The transmission temporary storage subcircuit is further configured to close a receiving channel for receiving the transmission data from the data receiving subcircuit when the capacity of the transmission data temporarily stored in the transmission temporary storage subcircuit reaches a predetermined threshold value set based on the configuration parameter; The interrupt monitoring subcircuit is further configured to generate the interrupt signal and report it to the one or more hosts in response to monitoring that the capacity of the transmission data temporarily stored in the transmission temporary storage subcircuit reaches the predetermined threshold.

9. The data scheduling system according to claim 3, wherein: The transmission data has a host identifier and a slave identifier and a data content portion adapted to the type of the slave; The transmission temporary storage subcircuit temporarily stores the transmission data in a transmission storage part corresponding to the slave identifier based on the slave identifier of the transmission data; The read-back temporary storage subcircuit temporarily stores the read-back data corresponding to the transmission data in a read-back storage part corresponding to the host identifier based on the host identifier of the transmission data.

10. The data scheduling system according to claim 2, wherein: The transmission data has a fast transmission identification bit and a priority identification bit, The configured data scheduler determines, based on the fast transmission flag, whether to enable the data scheduling subcircuit to directly obtain the transmission data received by the data receiving subcircuit without passing through the transmission temporary storage subcircuit; The data scheduling sub-circuit is further configured to determine a priority order for transmitting the transmission data to the slave based on the priority identification bit.

11. A data scheduling method, comprising: Determine configuration parameters based on the communication scenario between the master and slave; configuring the internal circuit structure of the programmable data scheduling circuit based on the configuration parameters to obtain a configured data scheduler; The transmission data is sent to the configured data scheduler so that the configured data scheduler schedules the transmission data.

12. A non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the data scheduling method according to claim 11 when executed by a processor.

13. A computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the data scheduling method according to claim 11 is implemented.

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