LED backlight driving chip and data transmission direction adaptive circuit thereof

Abstract

The invention discloses an LED (Light Emitting Diode) backlight driving chip. The LED backlight driving chip comprises a first IO (Input / Output) port, a second IO port and a data transmission direction self-adaptive circuit, the data transmission direction adaptive circuit comprises a first switch unit, a first clamping unit, a second switch unit and a second clamping unit. Self-adaption is realized, so that when data is input from any data input and output port on the LED backlight driving chip, the data can be ensured to be output to the next LED backlight driving chip from another data input and output port in a self-adaption manner, and when the data is input from any data input and output port, the data can be ensured to be output to the next LED backlight driving chip from another data input and output port in a self-adaption manner. And the data needing to be output after the operation of the LED backlight driving chip can be output to the next LED backlight driving chip on the communication link from the other data input / output port.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a data transmission direction adaptive circuit of an LED backlight driving chip. Background Art

[0002] like Figure 1 The schematic diagram of the LED backlight panel structure in the prior art shown in the figure shows that multiple LED driver ICs are arranged in series, and each LED driver IC is provided with a data input terminal and a data output terminal. On the communication link in which the multiple LED driver ICs are connected in series, the data input terminal of the previous LED driver IC is connected to the data input terminal of the next LED driver IC. At the same time, each LED driver IC is provided with an LED driving channel connected to an LED light string, and each LED driving channel is connected to an LED light string. In order to arrange the LED light strings more tightly in the prior art, it is necessary for the LED driver IC to be able to be connected to both the LED light string arranged above and the LED light string arranged below in a series communication link, but for the LED driver IC itself, the arrangement of its pins is fixed and unique. As a result, the following problems appear: Figure 1 The arrangement of LED driver IC and LED light string shown in the figure is that LED driver IC1~IC5 is connected to the LED light string located at the bottom, and IC6~IC9 is connected to the LED light string located at the top. However, this arrangement requires accurate arrangement of IC1~IC9 placement, that is, ensuring that IC6~IC9 is prevented from being placed between IC1~IC5 and is placed upside down. This undoubtedly greatly increases the manufacturing complexity of the entire LED backlight panel, and the wiring is also more complicated.

[0003] It can be seen that a new data transmission direction adaptive circuit for LED backlight driver chip is needed in the prior art. Compared with the traditional method, it can solve the defect of the prior art that the LED driver IC cannot be flexibly placed due to the fixed arrangement of the pins on the LED driver IC. Summary of the invention

[0004] The technical purpose to be achieved by the present invention is to provide a data transmission direction adaptive circuit suitable for an LED backlight driver chip. By setting the adaptive circuit in the LED backlight driver chip, the data input end and the data output end of the LED backlight driver chip can be adaptively configured to ensure that when data is input from any data input / output port on the LED backlight driver chip, the data can be adaptively output from another data input / output port to the next LED backlight driver chip, and further ensure that when data is input from any data input / output port, the data that needs to be output after the LED backlight driver chip calculation can be output from another data input / output port to the next LED backlight driver chip.

[0005] Based on the above technical objectives, the present invention provides an LED backlight driver chip, the LED backlight driver chip includes a first IO port, a second IO port and a data transmission direction adaptive circuit;

[0006] The data transmission direction adaptive circuit comprises: a first switch unit, a first clamp unit, a second switch unit, a second clamp unit and an adaptive control unit; the adaptive control unit comprises a first control unit and a second control unit;

[0007] The first IO port and the second IO port are clamped at a fixed level by the first clamping unit and the second clamping unit respectively when in an idle state;

[0008] The first IO port is connected to the output end of the first switch unit, and a fixed level is input to the input end of the first switch unit; the second IO port is connected to the output end of the second switch unit, and a fixed level is input to the input end of the second switch unit;

[0009] The output end of the first switch unit is connected to the input end of the first control unit in the adaptive control unit, and the output end of the first control unit is connected to the control end of the second switch unit to control the opening and closing of the second switch unit; the input end of the first control unit is simultaneously connected to the input end of the second control unit, and the input end of the second switch unit is connected to the input end of the second control unit; the output end of the second control unit is connected to the input end of the first control unit, and the output end of the second control unit is simultaneously connected to the control end of the first switch unit to control the opening and closing of the first switch unit.

[0010] In one embodiment, the first clamping unit includes a first clamping resistor R1, one end of the first clamping resistor R1 is connected to the first IO port, and the other end is grounded; the first switch unit is a first OD gate circuit, the input end of the first OD gate circuit inputs a high level signal, the first control unit includes a first AND gate and a first NOT gate, and the output end of the first OD gate circuit is connected to the first input end of the first AND gate.

[0011] In one embodiment, the second clamping unit includes a second clamping resistor R2, one end of the second clamping resistor R2 is connected to the first IO port, and the other end is grounded. The second switch unit is a second OD gate circuit, the input end of the second OD gate circuit inputs a high level signal, and the second control unit includes a second AND gate and a second NOT gate, and the output end of the second OD gate circuit is connected to the first input end of the second AND gate.

[0012] In one embodiment, the output end of the second AND gate is input to the second input end of the first AND gate through the first NOT gate, and the output end of the first AND gate is input to the second input end of the second AND gate through the second NOT gate; the output end of the first AND gate is connected to the control end of the second OD gate, and the output end of the second AND gate is connected to the control end of the first OD gate.

[0013] In one embodiment, the first control unit includes a first NOR gate and a first NOT gate, and the second control unit includes a second NOR gate and a second NOT gate; the first switch unit is a first OD gate circuit; the second switch unit is a second OD gate circuit; the output end of the first OD gate circuit is input to the first input end of the first NOR gate through the first NOT gate, and the output end of the first NOR gate is connected to the control end of the second OD gate circuit; the output end of the second OD gate circuit is connected to the first input end of the second NOR gate through the second NOT gate; the output end of the second NOR gate is connected to the control end of the first OD gate circuit; the output end of the first NOR gate is connected to the second output end of the second NOR gate, and the output end of the second NOR gate is connected to the second input end of the first NOR gate.

[0014] In one embodiment, the first control unit includes a first NOR gate, and the second control unit includes a second NOR gate; the output end of the first OD gate circuit is input to the first input end of the first NOR gate, the output end of the first NOR gate is input to the first input end of the second dues gate, and the output end of the second NOR gate is input to the second input end of the first NOR gate; the output end of the second OD gate circuit is input to the second input end of the second NOR gate.

[0015] In one embodiment, the data transmission direction adaptive circuit also includes a first data selector, a first data input port of the first data selector is connected to a fixed signal, and a second data input port is connected to a signal generated by an LED driver IC, and a control end of the first data selector is controlled by a drive signal switching signal to determine whether a fixed level or a signal generated by the LED driver IC is transmitted to the input ends of the first OD gate circuit and the second OD gate circuit.

[0016] Based on the above circuit structure, the LED backlight driver chip of the present invention can realize that as long as one of the first IO port and the second IO port has data input, the input drive signal can be immediately transmitted from the other IO port to the next LED driver chip, thereby enabling the drive signal to be smoothly transmitted over the entire serial communication link.

[0017] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0019] Figure 1 It is a schematic diagram of the structure of an LED backlight panel in the prior art;

[0020] Figure 2 It is a schematic diagram of the structure of the LED backlight panel of the present invention;

[0021] Figure 3 2 is a schematic diagram of a data transmission direction adaptive circuit structure in an LED driver chip according to a first embodiment of the present invention;

[0022] Figure 4 is a circuit structure diagram of a data transmission direction adaptive circuit based on an AND gate logic element according to a first embodiment of the present invention;

[0023] Figure 5 is a circuit structure diagram of a data transmission direction adaptive circuit based on an AND gate logic element according to a second embodiment of the present invention;

[0024] Figure 6 is a circuit structure diagram of a data transmission direction adaptive circuit based on an AND gate logic element according to a third embodiment of the present invention;

[0025] Figure 7is a circuit structure diagram of a data transmission direction adaptive circuit based on an AND gate logic element according to a fourth embodiment of the present invention;

[0026] Figure 8 It is a circuit structure diagram of a data transmission direction adaptive circuit based on AND gate logic elements according to a fifth embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below with reference to the accompanying drawings.

[0028] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present invention necessarily has the first element, component, region, layer or part.

[0029] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0030] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0031] Example 1

[0032] like Figure 2-4 As shown, the LED driver chip of this embodiment includes a first IO port, a second IO port and a data transmission direction adaptive circuit. The data transmission direction adaptive circuit includes: a first switch unit, a first clamp unit, a second switch unit, a second clamp unit and an adaptive control unit. The adaptive control unit includes a first control unit and a second control unit.

[0033] When the first IO port and the second IO port are in an idle state without signal input, the potentials of the first clamping unit and the second clamping unit are clamped at a fixed level respectively, so that the first IO port and the second IO port are in a high impedance state and wait for signal input.

[0034] The first IO port is connected to the output end of the first switch unit, the input end of the first switch unit inputs a fixed level, and the first clamping unit is connected to the output end of the first switch unit to perform voltage clamping on the output end of the first switch unit.

[0035] The second IO port is connected to the output end of the second switch unit, the input end of the second switch unit inputs a fixed voltage level, and the second clamping unit is connected to the output end of the second switch unit to perform voltage clamping on the output end of the second switch unit.

[0036] The output end of the first switch unit is connected to the input end of the first control unit in the adaptive control unit, and the output end of the first control unit is connected to the control end of the second switch unit to control the opening and closing of the second switch unit. The input end of the first control unit is also connected to the input end of the second control unit, and the input end of the second switch unit is connected to the input end of the second control unit. The output end of the second control unit is connected to the input end of the first control unit, and the output end of the second control unit is also connected to the control end of the first switch unit to control the opening and closing of the first switch unit.

[0037] like Figure 4 As shown, the first clamping unit includes a first clamping resistor R1, one end of the first clamping resistor R1 is connected to the first IO port, and the other end is grounded. The first switch unit is a first OD gate circuit, the input end of the first OD gate circuit inputs a high level signal 1, and the first control unit includes a first AND gate and a first NOT gate, and the output end of the first OD gate circuit is connected to the first input end of the first AND gate.

[0038] Meanwhile, the second clamping unit comprises a second clamping resistor R2, one end of the second clamping resistor R2 is connected to the first IO port, and the other end is grounded. The second switch unit is a second OD gate circuit, the input end of the second OD gate circuit inputs a high level signal 1, the second control unit comprises a second AND gate and a second NOT gate, the output end of the second OD gate circuit is connected to the first input end of the second AND gate.

[0039] The output end of the second AND gate is input to the second input end of the first AND gate through the first NOT gate, and the output end of the first AND gate is input to the second input end of the second AND gate through the second NOT gate.

[0040] Meanwhile, the output end of the first AND gate is connected to the control end of the second OD gate, and the output end of the second AND gate is connected to the control end of the first OD gate.

[0041] In this embodiment, when the first IO port and the second IO port are in an idle state with no signal input, the first IO port and the second IO port are clamped to a low level state. At this time, the low level signal is input to the first input end of the first AND gate so that the output end of the first AND gate outputs a low level signal, thereby making the control end of the second OD gate circuit at a low level, and the high level signal at the input end of the second OD gate circuit cannot be transmitted to the output end. Similarly, the control end of the first OD gate circuit is also at a low level, and the high level signal at the input end of the first OD gate circuit cannot be transmitted to the output end.

[0042] Assume that when the first IO port transmits a high-level signal, the output of the first AND gate becomes high-level, so that the second OD gate circuit is closed so that the high-level input of the second OD gate circuit is output to the second IO port, and at this time, the two inputs of the second AND gate are still high-level input and low-level input, so the output of the second AND gate remains low-level, and the first OD gate circuit is still disconnected. When the first IO port transmits a low-level signal, the output of the first AND gate becomes low-level, so that the second OD gate circuit is disconnected so that the level of the second IO port is pulled back to a low level by the second clamping resistor R2.

[0043] When data is inputted from the second IO port, data output can also be realized at the first IO port according to the same process as above.

[0044] According to the above adaptive circuit, as long as one of the first IO port and the second IO port has data input, the input drive signal can be immediately transmitted from the other IO port to the next LED driver chip, so that the drive signal can be smoothly transmitted on the entire serial communication link.

[0045] Example 2

[0046] like Figure 5 As shown, based on the aforementioned embodiment 1, this embodiment is different from the aforementioned embodiment 1 in that the first control unit includes a first NOR gate and a first NOT gate, and the second control unit includes a second NOR gate and a second NOT gate.

[0047] The output end of the first OD gate circuit is input to the first input end of the first NOR gate through the first NOT gate, and the output end of the first NOR gate is connected to the control end of the second OD gate circuit. The output end of the second OD gate circuit is connected to the first input end of the second NOR gate through the second NOT gate. The output end of the second NOR gate is connected to the control end of the first OD gate circuit. At the same time, the output end of the first NOR gate is connected to the second output end of the second NOR gate, and the output end of the second NOR gate is connected to the second input end of the first NOR gate.

[0048] The other circuit structures in this embodiment are consistent with those in Embodiment 1. Based on the above description of the level change in Embodiment 1, this embodiment can also realize that as long as one of the first IO port and the second IO port has data input, the input drive signal can be immediately transmitted from the other IO port to the next LED driver chip, so that the drive signal can be smoothly transmitted on the entire serial communication link.

[0049] Example 3

[0050] like Figure 6 As shown, based on the aforementioned embodiment 1, and different from the aforementioned embodiment 1, the first control unit includes a first AND gate, a first NOT gate and a second NOT gate, and the second control unit includes a second AND gate, a third NOT gate and a fourth NOT gate.

[0051] The first clamping unit includes a first clamping resistor, one end of which is connected to the first IO port, and the other end is connected to the driving voltage VCC. The second clamping unit includes a second clamping resistor, one end of which is connected to the first IO port, and the other end is connected to the driving voltage VCC.

[0052] The output end of the first OD gate circuit is input to the first input end of the first AND gate through the second NOT gate, the output end of the first AND gate is input to the first input end of the second AND gate through the third NOT gate, the output end of the second AND gate is input to the second input end of the first AND gate through the first NOT gate. The output end of the second OD gate circuit is input to the second input end of the second AND gate through the fourth NOT gate.

[0053] The input terminals of the first OD gate circuit and the second OD gate circuit input a low level 0.

[0054] The other circuit structures in this embodiment are consistent with those in Embodiment 1. Based on the above description of the level change in Embodiment 1, this embodiment can also realize that as long as one of the first IO port and the second IO port has data input, the input drive signal can be immediately transmitted from the other IO port to the next LED driver chip, so that the drive signal can be smoothly transmitted on the entire serial communication link.

[0055] Example 4

[0056] like Figure 7 As shown, based on the aforementioned embodiment 3, this embodiment is different from the aforementioned embodiment 3 in that the first control unit includes a first NOR gate, and the second control unit includes a second NOR gate.

[0057] The output end of the first OD gate circuit is input to the first input end of the first NOR gate, the output end of the first NOR gate is input to the first input end of the second dues gate, the output end of the second NOR gate is input to the second input end of the first NOR gate, and the output end of the second OD gate circuit is input to the second input end of the second NOR gate.

[0058] The other circuit structures in this embodiment are consistent with those in Embodiment 3. Based on the above description of the level change in Embodiment 3, this embodiment can also realize that as long as one of the first IO port and the second IO port has data input, the input drive signal can be immediately transmitted from the other IO port to the next LED driver chip, so that the drive signal can be smoothly transmitted on the entire serial communication link.

[0059] Example 5

[0060] like Figure 8As shown, based on the above-mentioned embodiment 4, this embodiment is different from the above-mentioned embodiment 3 in that a first data selector is added to the adaptive circuit, the first data input port of the first data selector is connected to a low level 0, and the second data input port is connected to a signal generated by the LED driver IC, and the signal generated by the LED driver IC needs to be transmitted to the next level LED driver IC. The control end of the first data selector is controlled by a drive signal switching signal. When the signal generated by the LED driver IC needs to be transmitted to the next level LED driver IC, the drive signal switching signal controls the first data selector to select the signal generated by the LED driver IC at the second data input end to be transmitted to the input end of the first OD gate circuit and the second OD gate circuit. In other states, the first data input port is selected to be connected to a low level 0 and transmitted to the input end of the first OD gate circuit and the second OD gate circuit.

[0061] The first data selector in this embodiment can be used in the aforementioned embodiments 1-3 to realize that the LED driver IC takes over the signal content output by the data output terminal.

[0062] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. An LED backlight driver chip, the LED backlight driver chip at least comprising: A first IO port, a second IO port and a data transmission direction adaptive circuit; The data transmission direction adaptive circuit comprises: a first switch unit, a first clamp unit, a second switch unit, a second clamp unit and an adaptive control unit; the adaptive control unit comprises a first control unit and a second control unit; The first IO port and the second IO port are clamped at a fixed level by the first clamping unit and the second clamping unit respectively when in an idle state; The first IO port is connected to the output end of the first switch unit, and a fixed level is input to the input end of the first switch unit; the second IO port is connected to the output end of the second switch unit, and a fixed level is input to the input end of the second switch unit; The output end of the first switch unit is connected to the input end of the first control unit in the adaptive control unit, and the output end of the first control unit is connected to the control end of the second switch unit to control the opening and closing of the second switch unit; the input end of the first control unit is simultaneously connected to the input end of the second control unit, and the input end of the second switch unit is connected to the input end of the second control unit; the output end of the second control unit is connected to the input end of the first control unit, and the output end of the second control unit is simultaneously connected to the control end of the first switch unit to control the opening and closing of the first switch unit.

2. The LED backlight driver chip according to claim 1, characterized in that: The first clamping unit includes a first clamping resistor R1, one end of the first clamping resistor R1 is connected to the first IO port, and the other end is grounded; the first switch unit is a first OD gate circuit, the input end of the first OD gate circuit inputs a high-level signal, the first control unit includes a first AND gate and a first NOT gate, and the output end of the first OD gate circuit is connected to the first input end of the first AND gate.

3. The LED backlight driver chip according to claim 2, characterized in that: The second clamping unit includes a second clamping resistor R2, one end of the second clamping resistor R2 is connected to the first IO port, and the other end is grounded. The second switch unit is a second OD gate circuit, the input end of the second OD gate circuit inputs a high level signal, and the second control unit includes a second AND gate and a second NOT gate, and the output end of the second OD gate circuit is connected to the first input end of the second AND gate.

4. The LED backlight driver chip according to claim 3, characterized in that: The output end of the second AND gate is input to the second input end of the first AND gate through the first NOT gate, and the output end of the first AND gate is input to the second input end of the second AND gate through the second NOT gate; the output end of the first AND gate is connected to the control end of the second OD gate, and the output end of the second AND gate is connected to the control end of the first OD gate.

5. The LED backlight driver chip according to claim 1, characterized in that: The first control unit includes a first NOR gate and a first NOT gate, and the second control unit includes a second NOR gate and a second NOT gate; the first switch unit is a first OD gate circuit; the second switch unit is a second OD gate circuit; the output end of the first OD gate circuit is input to the first input end of the first NOR gate through the first NOT gate, and the output end of the first NOR gate is connected to the control end of the second OD gate circuit; the output end of the second OD gate circuit is connected to the first input end of the second NOR gate through the second NOT gate; the output end of the second NOR gate is connected to the control end of the first OD gate circuit; the output end of the first NOR gate is connected to the second output end of the second NOR gate, and the output end of the second NOR gate is connected to the second input end of the first NOR gate.

6. The LED backlight driver chip according to claim 1, characterized in that: The first control unit includes a first NOR gate, and the second control unit includes a second NOR gate; the output end of the first OD gate circuit is input to the first input end of the first NOR gate, the output end of the first NOR gate is input to the first input end of the second dues gate, and the output end of the second NOR gate is input to the second input end of the first NOR gate; the output end of the second OD gate circuit is input to the second input end of the second NOR gate.

7. The LED backlight driver chip according to claim 1, characterized in that: The data transmission direction adaptive circuit also has a first data selector, the first data input port of the first data selector is connected to a fixed signal, and the second data input port is connected to a signal generated by the LED driver IC. The control end of the first data selector is controlled by a drive signal switching signal to determine whether the fixed level or the signal generated by the LED driver IC is transmitted to the input ends of the first OD gate circuit and the second OD gate circuit.

8. An LED backlight panel, wherein the LED light-emitting elements of the LED backlight panel are driven to emit light using the LED backlight driver chip as described in any one of claims 1 to 7.

9. A display device, characterized in that: The display device uses the LED backlight panel as claimed in claim 9 for backlighting.

Images