Method of generating and allocating identifier information for each router in network on chip to arbitrate data packets
By generating and allocating plane axis coordinates and router link layer coordinates, combined with coordinate shrinking technology, the unique identifiers are automatically generated and allocated to each router in the on-chip network, solving the problem of identifier generation and allocation in the prior art, and achieving efficient and scalable packet arbitration.
Patent Information
- Application Number
- CN202410030591.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-11-01
- Filing Date
- 2024-01-08
- Publication Date
- 2025-05-06
AI Technical Summary
The prior art is difficult to automatically generate and assign unique identifiers to every router in the on-chip network, especially in full mesh and custom mesh on-chip network topology in physical and logical view plan NoC designs, resulting in user errors and non-scalable methods.
By generating plane axis coordinates Z and assigning coordinates including horizontal axis X and vertical axis Y to each router, ascending values are automatically generated and assigned to uniquely identify each router based on distance calculation and coordinate shrinking technology of the router link layer.
It realizes automatic generation of unique identifiers in on-chip networks, reduces user errors, is suitable for multiple topological structures, and improves the scalability of the system and the efficiency of arbitration packets.
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Figure CN119945966A_ABST
Abstract
Description
Technical Field
[0001] The present invention generally relates to arbitration of data packets in a network on chip (NoC). More specifically, the present invention relates to a method of generating and distributing identifier information to each router in a network on chip to arbitrate data packets. Background Art
[0002] The traditional method of generating and assigning identifier information to each router in a network on chip requires the user to specify and draw the network on chip (NoC) topology in a fixed coordinate logical view floor plan, which includes pre-fixed XY (two-dimensional) coordinates of each router. This can be done through a graphical user interface or command line input. The user manually specifies a unique identifier for each router connected in the NoC topology, which is prone to user error.
[0003] Several solutions have been proposed to improve the method of generating and assigning identifier information to each router in a NoC to arbitrate packets, one of which is discussed below:
[0004] Patent EP4036730A1 discloses a method and system for executing an application data flow graph using a computing node network. In a specific example, the computing node network can be an on-chip network of a multi-core processor. A method includes transferring first application data from a first source computing node to an intermediate computing node. The method may also include providing second application data from a computing layer of the computing node network on the intermediate computing node. The method may also include multicasting the first application data and the second application data from the intermediate computing node to at least two target computing nodes. The first source computing node, the intermediate computing node, and the at least two target computing nodes are all in the computing node network.
[0005] The aforementioned references provide methods and systems for executing application data flow graphs using a network of computing nodes. However, it still has many limitations and disadvantages. Therefore, there is still a need to provide a scalable method to automatically generate and assign a unique identifier to each router, which is applicable to full mesh and custom mesh network-on-chip (NoC) topologies in physical and logical view floor plan NoC designs. Summary of the invention
[0006] In order to provide a basic understanding of some aspects of the invention, the following is a brief summary of the invention. This summary is not an extensive overview of the invention, and its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
[0007] The object of the present invention is to provide a scalable method to automatically generate and assign a unique identifier to each router, which can be applied to full mesh and custom mesh Network-on-Chip (NoC) topologies in both physical and logical view floor plan NoC designs.
[0008] Another object of the present invention is to provide a two-dimensional and three-dimensional mesh topology NoC with a source-based routing architecture, which uses a unique identifier of each router to generate a data packet for a transaction, whereby the source node of the data packet determines the entire route followed by the data packet to reach its destination or target node.
[0009] Another object of the present invention is to provide complete routing information into a data packet to specify each router that the data packet should pass through through a unique identifier, wherein the routing information includes the absolute coordinates, relative direction and / or output port number of each router to arbitrate the data packet.
[0010] Therefore, these objects can be achieved by following the teachings of the present invention. The present invention relates to a method for generating and assigning identifier information to each router in an on-chip network to arbitrate data packets, characterized by the following steps: generating a plane axis coordinate Z and assigning the plane axis coordinate Z to each router in each plane; for each link between two routers of the same plane axis coordinate, generating and assigning an ascending value to each router link layer; selecting a router with the smallest router link layer value as a source router; assigning coordinates including a horizontal axis X and a vertical axis Y to the source router; calculating the distance of coordinates X and Y relative to the router link layer for each router link layer; based on the distance calculated for each router link layer, generating and assigning coordinates including a horizontal axis X and a vertical axis Y to each router adjacent to the source router, each router adjacent to the source router is followed by the next connected router of the same plane axis coordinate; applying coordinate contraction to obtain all coordinates with positive integers with optimized ascending order; and for each link between two routers of subsequent plane axis coordinates, repeating the steps of generating and assigning ascending values to each router link layer to complete the generation and assignment of coordinates to all plane axis routers.
[0011] The foregoing and other objects, features, aspects and advantages of the present invention will become better understood by carefully reading the detailed description provided below and referring to the accompanying drawings as appropriate. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] In order to enable a detailed understanding of the above features of the present invention, a more specific description of the present invention briefly outlined above may have been mentioned by way of examples, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings only illustrate typical embodiments of the present invention and are therefore not to be considered as limiting the scope of the present invention, as the present invention may admit of other equally effective embodiments.
[0013] These and other features, benefits and advantages of the present invention will become apparent by reference to the following text and drawings. In all views, the same reference numerals represent the same structure, wherein:
[0014] Figure 1 is a flow chart showing a method for generating and allocating identifier information for each router in a network on chip (NoC) to arbitrate data packets according to an embodiment of the present invention;
[0015] Figure 2 is an example of a NoC topology, where “R” boxes represent routers, including a 3×4 full mesh (upper left), a custom mesh (upper right), and a custom mesh simulating a tree (lower);
[0016] Figure 3A is an example showing a logical view, and Figure 3B shows a physical view of a two-dimensional fully meshed 2×2 NoC topology;
[0017] Figure 4 is a flow chart illustrating a process of generating and allocating unique router identifier information according to an embodiment of the present invention;
[0018] Figure 5 The tree topology structure of generating and distributing router link layers starting from each router is shown (R_3 has the smallest maximum link layer L2);
[0019] Figure 6 is a flow chart showing a router link layer generation and allocation process according to an embodiment of the present invention;
[0020] Figure 7 is an example illustrating a 3×4 full mesh topology, where R_6 is designated as the source router (0, 0);
[0021] Figure 8 is an example showing the first part of the process flow for generating and assigning a unique router (X, Y), including resolving coordinate misalignment for a custom mesh topology;
[0022] Fig. 9 It is shown Figure 8 Example of the second part of the process flow in;
[0023] Fig.10 It is shown Fig. 9 An example of the third part of the process flow in ; and
[0024] Fig.11 Shown is applied to Fig.10 Coordinate (X, Y) shrinking technique for the same custom mesh topology shown. DETAILED DESCRIPTION
[0025] As required, detailed embodiments of the present invention are disclosed herein; however, it should be understood that the disclosed embodiments are merely examples of the present invention, and the present invention can be implemented in various forms. Therefore, the specific structural and functional details disclosed herein should not be interpreted as limiting, but only as the basis of the claims. It should be understood that the drawings and their detailed description are not intended to limit the present invention to the specific forms disclosed, but on the contrary, the present invention will cover all modifications, equivalents and substitutes falling within the scope of the present invention defined by the appended claims. As used throughout the application, the word "may" is used in a permissive sense (i.e., meaning that it is possible), rather than in a mandatory sense (i.e., meaning that it must be). Similarly, the words "include", "include" and "included" mean including, but not limited to. In addition, unless otherwise specified, the word "a", "an" means "at least one", and the word "multiple" means one or more. When abbreviations or technical terms are used, they represent the generally accepted meanings known in the technical field.
[0026] Hereinafter, with reference to the accompanying drawings, the present invention is described by various embodiments, wherein the reference numerals used in the accompanying drawings correspond to similar elements throughout the specification. However, the present invention can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, this embodiment is provided to make this disclosure thorough and complete, and to fully convey the scope of the present invention to those skilled in the art. In the following detailed description, numerical values and ranges are provided for various aspects of the described embodiments. These values and ranges are considered only as examples and are not intended to limit the scope of the claims. In addition, many materials are determined to be applicable to various aspects of the embodiments, and these materials are considered as exemplary and are not intended to limit the scope of the present invention.
[0027] The present invention will now be described in more detail with reference to the accompanying drawings.
[0028] The present invention relates to a computer-implemented method 100 for generating and assigning identifier information to each router in a network on chip to arbitrate data packets, characterized by the following steps: Step 101: Generate a plane axis coordinate Z and assign the plane axis coordinate Z to each router in each plane; Step 102: For each link between two routers of the same plane axis coordinate, generate and assign an ascending value to each router link layer; Step 103: Select a router with the smallest router link layer value as the source router;
[0029] Step 104: assigning coordinates including a horizontal axis X and a vertical axis Y to the source router; Step 105: calculating the distance of the coordinates X and Y relative to the link layer of the router for each router link layer; Step 106: generating and assigning coordinates including a horizontal axis X and a vertical axis Y to each router adjacent to the source router based on the distance calculated for each router link layer, each router adjacent to the source router being followed by the next connected router of the same plane axis coordinate; Step 107: applying coordinate contraction to obtain all coordinates of positive integers with an optimized ascending order; and Step 108: for each link between two routers of the subsequent plane axis coordinates, repeating the steps of generating and assigning ascending values for each router link layer to complete the generation and assignment of coordinates for all plane axis routers, such as Figure 1 Shown
[0030] According to an embodiment of the present invention, if the on-chip network is a two-dimensional mesh topology with a single plane, the plane axis coordinate Z is generated and assigned 0 or ignored.
[0031] According to an embodiment of the present invention, if the on-chip network is a three-dimensional mesh topology with multiple planes, 0 is generated and assigned as the plane axis coordinate Z for the bottom plane, and integers are incremented or decremented by +1 or -1 for subsequent planes.
[0032] According to an embodiment of the present invention, the coordinates assigned to the source router include a horizontal axis X and a vertical axis Y equal to zero.
[0033] According to an embodiment of the present invention, coordinates including a horizontal axis X and a vertical axis Y are generated and assigned to each router adjacent to the source router, and each router adjacent to the source router is followed by the next connected router of the same plane axis coordinates, and also includes the following steps: detecting misalignment of the router assigned with the coordinates; calculating the distance of each router link layer; and generating new coordinates based on the router link layer value and the direction from the previously assigned router.
[0034] According to an embodiment of the present invention, detecting the misalignment of the routers assigned with the coordinates comprises the following steps: comparing the horizontal axis X coordinates, the vertical axis Y coordinates, or the X and Y coordinates of two connected routers; wherein, when the vertical axis Y coordinates of the two routers are different for the east port direction or the west port direction, and when the horizontal axis X coordinates of the two routers are different for the north port direction or the south port direction, the misalignment is identified.
[0035] According to an embodiment of the present invention, after the misalignment is identified, the misalignment is resolved by changing the horizontal axis X coordinate and the vertical axis Y coordinate of the newly assigned router to match the horizontal axis X coordinate and the vertical axis Y coordinate of the connected router.
[0036] According to an embodiment of the present invention, the method further includes a step of embedding identifier information of each router into the data packet after the generation and distribution.
[0037] According to an embodiment of the present invention, the identifier information includes absolute coordinates, relative directions, output port numbers or any combination thereof for each router to arbitrate the data packet.
[0038] According to an embodiment of the present invention, the application of coordinate contraction to obtain all coordinates of positive integers with optimized ascending order includes the following steps: sorting the horizontal axis X coordinates and the vertical axis Y coordinates in ascending or descending order; mapping the horizontal axis X coordinates and the vertical axis Y coordinates to positive integers, increasing by +1 to indicate ascending order and decreasing by -1 to indicate descending order; and updating the horizontal axis X coordinates and the vertical axis Y coordinates of each router with the mapped values.
[0039] Hereinafter, examples of the present invention will be provided to explain in more detail. From these embodiments, advantages of the present invention can be more easily understood and put into practice. However, it should be understood that the following examples are not intended to limit the scope of the present invention in any way.
[0040] Example
[0041] Figure 2 is an example showing NoC topology, where “R” boxes represent routers, including a 3×4 full mesh (upper left), a custom mesh (upper right), and a custom mesh simulating a tree (lower).
[0042] Figure 3A is an example showing a logical view, and Figure 3B The physical view of a two-dimensional fully meshed 2×2 NoC topology is shown, where each router is represented by a unique coordinate (X, Y), where (0, 0) represents the logical view. Figure 2dimensional (2D) coordinates. The logical view shows the routers arranged in a grid-like pattern, while the physical view shows that the routers can be freely arranged based on the physical floor plan of the computer-aided design tool. For actual implementations, each router can be represented by a unique identifier (ID) to indicate the direction of the horizontal axis or X axis, the direction of the vertical axis or Y axis, and the direction of the different plane axes or Z axes in any order. For example, (X, Y, Z), (X, Z, Y), (Y, X, Z), (Y, Z, X), (Z, X, Y), and (Z, Y, X). In addition, the coordinate (0, 0, 0) can represent any starting position.
[0043] Figure 4 1 is a flowchart showing a process for generating and distributing unique router identifier information according to an embodiment of the present invention. Figure 4 A detailed description of each process is shown in .
[0044] 1. Generate coordinate Z and assign it to each router:
[0045] For 3D NoC, where each router coordinate is represented by (X, Y, Z), different coordinates Z are generated and assigned to all routers located at different plane points, while coordinates X and Y are kept unassigned.
[0046] For 3D NoC, Z=0 for the bottom plane and then increases by a positive integer +1 for each plane above.
[0047] For a 2D NoC with a single plane, Z=0 or can be ignored, where each router is represented by coordinates (X, Y) only.
[0048] 2. Select plane Z=0:
[0049] Starting from Z=0, start generating and assigning coordinates (X, Y) to each router in each plane.
[0050] 3. Generate and distribute router link layer:
[0051] Generate and assign router link layers for each NoC link (between two routers), and treat each router as a source router to determine the source router with the smallest maximum link layer.
[0052] The router link layer is a positive integer, which is used to indicate how many NoC links a transaction needs to pass through to reach the next connected router from the source router, such as Figure 5 shown.
[0053] It is important (although not required) to assign the minimum maximum link layer to the source router so that the router ID with coordinates (X, Y) using this approach can be represented in the logical view plane for the balanced NoC topology (e.g. Figure 5 tree topology as shown).
[0054] 4. Assign source router (X, Y) = (0, 0):
[0055] The coordinates of a source router having the smallest maximum link layer are assigned as (X, Y) = (0, 0). If two or more routers have the smallest maximum link layer, one of them can be designated as the source router.
[0056] 5. Calculate the link layer distance of each router:
[0057] Calculate X Ln and Y Ln , the X Ln and Y Ln are the distances of the coordinates X and Y of the link layer value “n” of each router, respectively. For example, X L3 is the coordinate X link distance of the router link layer L3.
[0058] X Ln and Y Ln The formula is as follows, where LOR is the number of remaining routers connected only to the maximum router link layer, and MAX is the maximum router link layer value.
[0059]
[0060]
[0061] Figure 7 A 3×4 full mesh topology is shown with a maximum router link layer value (MAX) of L3, or an integer value of 3. In addition, routers R_4 and R_12 are both connected only to MAX L3, so the number of remaining routers (LOR) is 2.
[0062] In this 3×4 full mesh topology, the distance between the coordinates X and Y of each router link layer can be calculated using the following formula:
[0063] X L3 and Y L3 =LOR=2
[0064] X L2 and Y L2 =(2*LOR)+1=5
[0065] X L1 and Y L1=3*5=15
[0066] For each router link layer value "n", by choosing a different X Ln and Y Ln The values are used to represent the distances of the coordinates X and Y respectively, and the actual implementation scheme may be different.
[0067] 6. Generate (X, Y) and assign it to each router:
[0068] Coordinates (X, Y) are generated and distributed to adjacent routers connected to the previously distributed router (the adjacent routers not yet distributed coordinates), starting from the source router (0, 0) until all routers are distributed coordinates (X, Y).
[0069] For a newly assigned neighboring router, any misalignment with all previously assigned routers (if any) is resolved. Misalignment can be detected by comparing the X and / or Y coordinates of two adjacent routers. A misalignment is identified when the Y coordinate values of two routers are different for the east or west port directions, and when the X coordinate values of two routers are different for the north or south port directions. Figure 8 , Fig. 9 and Fig.10 An example of resolving coordinate misalignment is shown. This example applies process 5 to calculate the distance of each router link layer, where:
[0070] X L3 and Y L3 =LOR=1
[0071] X L2 and Y L2 =(2*LOR)+1=3
[0072] X L1 and Y L1 =3*5=9
[0073] The new coordinates (X, Y) of the neighboring router are generated based on the router link layer value and the direction from the previously assigned router.
[0074] Adjacent router coordinates (X, Y) = (X previous +X Ln , Y previous +Y Ln ),in:
[0075] ·X previous and Y previous are the coordinates (X, Y) of the previously assigned router.
[0076] ·X Lnand Y Ln It is the distance in coordinate X or coordinate Y of the link layer value of a specific router between the neighboring router and the previously assigned router.
[0077] If the neighboring router is connected to the east port of the previously assigned router, then
[0078] X Ln =positive integer
[0079] Y Ln =0
[0080] Adjacent router coordinates (X, Y) = (X previous +X Ln , Y previous )
[0081] If the neighboring router is connected to the west port of the previously assigned router, then
[0082] X Ln = negative integer
[0083] Y Ln =0
[0084] Adjacent router coordinates (X, Y) = (X previous -X Ln , Y previous )
[0085] If the neighboring router is connected to the north port of the previously assigned router, then
[0086] X Ln =0
[0087] Y Ln =positive integer
[0088] Adjacent router coordinates (X, Y) = (X previous , Y previous +Y Ln )
[0089] If the neighboring router is connected to the south port of the previously assigned router, then
[0090] X Ln =0
[0091] Y Ln = negative integer
[0092] Adjacent router coordinates (X, Y) = (X previous , Y previous -Y Ln )
[0093] Swapping the direction of the east-west ports or north-south ports will result in X Lnand Y Ln The signed value of the router may be different, but it does not affect the method by which a unique ID is automatically generated and assigned to each router.
[0094] 7. Apply coordinate (X, Y) shrinking technology:
[0095] All assigned routers are traversed and the coordinate (X, Y) contraction technique is applied to obtain all (X, Y) coordinates of positive integers in an optimized ascending order.
[0096] Fig.11 Shows the application Fig.10 Coordinate (X,Y) shrinking technique for the same custom mesh topology shown (steps 1-3). Fig.11 Step 1 in sorts the coordinates X and Y in ascending order, but the actual implementation may be independent of the coordinates X and Y and sort them in any order.
[0097] 8&9. Complete the router (X, Y) assignment for all planes:
[0098] Go to the new plane by incrementing by Z+1 and repeat steps 3 to 7 until all plane router coordinates (X, Y, Z) are fully generated and assigned.
[0099] Various modifications to these embodiments will be apparent to those skilled in the art from the description and drawings. The principles associated with the various embodiments described herein may be applied to other embodiments. Therefore, the description is not intended to be limited to the embodiments described in conjunction with the attached drawings. Figure 1 The embodiments shown are intended to provide the broadest scope consistent with the principles and novel and creative features disclosed or suggested herein. Therefore, the present invention will retain all other such substitutions, modifications and variations that fall within the scope of the present invention and the appended claims.
[0100] In the claims and in the foregoing description of the invention, except where the context requires due to explicit language or necessary implication, the word "comprise" or variations such as "include" or "comprising" are used in an inclusive sense, i.e. specifying the presence of stated features but not excluding the presence or addition of further features in various embodiments of the invention.
Claims
1. A computer-implemented method (100) for generating and assigning identifier information to each router in a network-on-chip for arbitrating data packets, It is characterized by the following steps: Step (101): Generate a plane axis coordinate Z, and assign the plane axis coordinate Z to each router of each plane; Step (102): for each link between two routers with the same plane axis coordinates, generate and assign ascending values to each router link layer; Step (103): Select a router with the minimum router link layer value as the source router; Step (104): assigning coordinates including a horizontal axis X and a vertical axis Y to the source router; Step (105): Calculate the distance of coordinates X and Y relative to the router link layer for each router link layer; Step (106): based on the distance calculated for each router link layer, generating and assigning coordinates including a horizontal axis X and a vertical axis Y for each router adjacent to the source router, each router adjacent to the source router is followed by a next connected router of the same plane axis coordinates; Step (107): Apply coordinate contraction to obtain all coordinates of positive integers with optimal ascending order; and Step (108): For each link between two routers of the subsequent plane axis coordinates, repeat the steps of generating and assigning ascending values for each router link layer to complete the generation and assignment of coordinates for all plane axis routers.
2. The computer-implemented method (100) of claim 1, wherein: If the on-chip network is a two-dimensional mesh topology with a single plane, the plane axis coordinate Z is generated and assigned 0 or ignored.
3. The computer-implemented method (100) of claim 1, wherein: If the network on chip is a three-dimensional mesh topology with multiple planes, a plane axis coordinate Z is generated and assigned 0 for the bottom plane, and integers are incremented or decremented by +1 or -1 for subsequent planes.
4. The computer-implemented method (100) of claim 1, wherein: Assigning coordinates to the source router includes a horizontal axis X and a vertical axis Y equal to zero.
5. The computer-implemented method (100) of claim 1, wherein: Generate and assign coordinates including a horizontal axis X and a vertical axis Y for each router adjacent to the source router, each router adjacent to the source router is followed by a next connected router of the same plane axis coordinates, and further comprising the following steps: detecting a misalignment of a router assigned with the coordinates; Calculate the link layer distance for each router; and Based on the router link layer value and the direction from the previously assigned router, new coordinates are generated.
6. The computer-implemented method (100) of claim 5, wherein: The detecting of misalignment of a router assigned with the coordinates comprises the following steps: Compare the horizontal axis X coordinates, vertical axis Y coordinates, or X and Y coordinates of two connected routers; Wherein, the misalignment is identified when the vertical axis Y coordinates of the two routers are different for the east port direction or the west port direction, and when the horizontal axis X coordinates of the two routers are different for the north port direction or the south port direction.
7. The computer-implemented method (100) of claim 6, wherein: After identifying the misalignment, the misalignment is resolved by changing the horizontal axis X coordinate and the vertical axis Y coordinate of the newly assigned router to match the horizontal axis X coordinate and the vertical axis Y coordinate of the connected router.
8. The computer implemented method (100) of claim 1, further comprising the step of embedding identifier information for each router into the data packet after generation and distribution.
9. The computer-implemented method (100) of claim 8, wherein: The identifier information includes absolute coordinates, relative directions, output port numbers, or any combination thereof for each router to arbitrate the data packet.
10. The computer-implemented method (100) of claim 1, wherein: The application of coordinate contraction to obtain all coordinates of positive integers with optimized ascending order comprises the following steps: sorting the horizontal axis X coordinate and the vertical axis Y coordinate in ascending or descending order; Mapping the horizontal axis X coordinate and the vertical axis Y coordinate to positive integers, increasing by +1 to indicate ascending order and decreasing by -1 to indicate descending order; and The horizontal axis X coordinate and the vertical axis Y coordinate of each router are updated with the mapping values.
Citation Information
Patent Citations
Application data flow graph execution using network-on-chip overlay
EP4036730A1