Differential sampling error measuring and calculating method and system, terminal equipment and storage medium

Abstract

The invention discloses a differential sampling error measuring and calculating method and system, terminal equipment and a storage medium. The method comprises the steps that first sampling data obtained by sampling a current source through a standard electronic transformer, second sampling data obtained by sampling the current source through tested equipment and the resistance value of a four-terminal resistor are obtained; expanding the first sampling data into processing data with the same dimension as the second sampling data through an interpolation algorithm; performing discrete Fourier transform on the processing data to obtain first frequency domain data; performing discrete Fourier transform on the second sampling data to obtain second frequency domain data; and calculating a differential sampling amplitude error and a differential sampling phase error of the tested equipment according to the first frequency domain data, the second frequency domain data and the resistance value. The differential sampling amplitude error and the differential sampling phase error can be measured and calculated, and the technical problem that the differential sampling error cannot be directly tested in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the field of differential sampling technology, and in particular to a differential sampling error measurement method, system, terminal device and storage medium. Background Art

[0002] The precise measurement scheme of AC power based on AC quantum voltage differential sampling has been a hot topic in the field of AC power in recent years. The basic principle of differential sampling method is as follows: Figure 1 As shown, the method uses a differential sampling module to sample the difference between the sinusoidal voltage generated by the AC source and the AC quantum voltage, and specifically adjusts the phase of the two voltage signals to make the differential voltage input to the differential sampling module as small as possible. When the effective value of the measured voltage is 1V, the so-called difference signal can usually be adjusted to within tens of millivolts. By using the integral sampling measurement results of the difference signal and the known AC quantum voltage waveform, the amplitude and phase information of the measured sinusoidal voltage signal can be reconstructed, thereby obtaining a high-precision electric energy value. The advantage of this differential sampling scheme is that the differential sampling module only samples the difference voltage between the sinusoidal voltage generated by the AC source and the AC quantum voltage, so that the influence of the digital voltmeter's own noise, range error, and reading error on the measured voltage signal is generally reduced by 2 to 3 orders of magnitude.

[0003] In the prior art, when calibrating the accuracy of a differential circuit, it is usually necessary to refer to Figure 1 The voltage ratio, current ratio of the power conversion module and the overall accuracy of the differential sampling circuit of the differential sampling module. If the differential voltage accounts for about 1 / 100, to verify that the accuracy of differential sampling is 0.02%, the overall accuracy must be at least 0.0002%. Similarly, if the existing technology wants to measure the error of differential sampling, it also needs to refer to the overall accuracy to indirectly calculate, and the calculation result is not accurate. At present, there is no relevant instrument or related test method that can directly test the error of the differential sampling circuit. Summary of the invention

[0004] The present invention provides a differential sampling error measurement method, system, terminal device and storage medium to solve the technical problem that the prior art cannot directly test the differential sampling error.

[0005] In order to solve the above technical problems, an embodiment of the present invention provides a differential sampling error measurement method, including:

[0006] Obtaining first sampling data obtained by sampling a current source with a standard electronic transformer, second sampling data obtained by sampling the current source with a device under test, and a resistance value of a four-terminal resistor; wherein the device under test comprises a differential sampling circuit; the standard electronic transformer, the current source, and the four-terminal resistor are connected in series; the first current terminal of the four-terminal resistor is connected to the current source, and the second current terminal is connected to the standard electronic transformer; the device under test is connected to two voltage terminals of the four-terminal resistor; the sampling periods of the first sampling data and the second sampling data are the same; the first sampling data is current data; the second sampling data is voltage data;

[0007] Expanding the first sampled data into processed data having the same dimension as the second sampled data by an interpolation algorithm;

[0008] Performing a discrete Fourier transform on the processed data to obtain first frequency domain data; performing a discrete Fourier transform on the second sampled data to obtain second frequency domain data;

[0009] A differential sampling amplitude error and a differential sampling phase error of the device under test are calculated according to the first frequency domain data, the second frequency domain data and the resistance value.

[0010] As a preferred solution, the first sampled data and the second sampled data are message data conforming to the IEC61850-9-2 protocol;

[0011] The message data includes a packet number and a sampling value;

[0012] The sampling value is a double-precision sampling value.

[0013] As a preferred solution, the interpolation algorithm is the Spline cubic spline interpolation method.

[0014] As a preferred solution, the step of calculating the differential sampling amplitude error and the differential sampling phase error of the device under test according to the first frequency domain data, the second frequency domain data and the resistance value includes:

[0015] Calculating a measurement ratio between the device under test and the standard electronic transformer according to the first frequency domain data, the second frequency domain data and the resistance value;

[0016] The differential sampling amplitude error and the differential sampling phase error are calculated according to the measurement ratio.

[0017] As a preferred solution, the calculation formula of the measurement ratio is:

[0018]

[0019] Where V represents the measurement ratio of the device under test to the standard electronic transformer; DFT_U S Represents the first frequency domain data; DFT_I S represents the second frequency domain data; R1 represents the resistance value of the four-terminal resistor;

[0020] The measurement ratio is a complex vector, including amplitude and phase.

[0021] As a preferred solution, the calculation formula of the differential sampling amplitude error is:

[0022] f err =(abs(V)-1)×100%;

[0023] In the formula, f err represents the differential sampling amplitude error; abs(·) represents the vector amplitude

[0024] The calculation formula of the differential sampling phase error is:

[0025] φ err =atan2(V.im,V.re)×180 / π;

[0026] In the formula, φ err represents the differential sampling phase error; atan2(·) represents the angle of the devector; V.im represents the imaginary part of V; V.re represents the real part of V.

[0027] As a preferred solution, the accuracy level requirement of the standard electronic transformer is 0.015%, and the sampling rate is 4 kHz;

[0028] The resistance value of the four-terminal resistor is 0.08 ohms, and the accuracy requirement is 0.005%;

[0029] The output frequency of the current source is 50 Hz, and the output accuracy requirement is 0.005%.

[0030] On the basis of the above embodiment, another embodiment of the present invention provides a differential sampling error measurement system, comprising: a standard electronic transformer, a current source, a device under test, a four-terminal resistor and a host computer; the device under test comprises a differential sampling circuit; the standard electronic transformer, the current source and the four-terminal resistor are connected in series; the first current terminal of the four-terminal resistor is connected to the current source, and the second current terminal is connected to the standard electronic transformer; the device under test is connected to two voltage terminals of the four-terminal resistor;

[0031] The standard electronic mutual inductor is used to sample the current source to obtain first sampling data; wherein the first sampling data is current data;

[0032] The device under test is used to sample the current source to obtain second sampling data; wherein the second sampling data is voltage data; and the sampling periods of the first sampling data and the second sampling data are the same;

[0033] The host computer is used to obtain the first sampling data, the second sampling data and the resistance value of the four-terminal resistor; expand the first sampling data into processed data with the same dimension as the second sampling data through an interpolation algorithm; perform a discrete Fourier transform on the processed data to obtain first frequency domain data; perform a discrete Fourier transform on the second sampling data to obtain second frequency domain data; and calculate the differential sampling amplitude error and the differential sampling phase error of the device under test based on the first frequency domain data, the second frequency domain data and the resistance value.

[0034] Based on the above embodiments, another embodiment of the present invention provides a terminal device, which includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, and when the processor executes the computer program, the differential sampling error measurement method described in the above embodiments of the invention is implemented.

[0035] Based on the above embodiments, another embodiment of the present invention provides a storage medium, wherein the storage medium includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the differential sampling error estimation method described in the above invention embodiment.

[0036] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0037] The present invention obtains the first sampling data obtained by sampling the current source by a standard electronic transformer, the second sampling data obtained by sampling the current source by the device under test, and the resistance value of the four-terminal resistor; the first sampling data is expanded into processed data with the same dimension as the second sampling data through an interpolation algorithm; the processed data is discrete Fourier transformed to obtain first frequency domain data; the second sampling data is discrete Fourier transformed to obtain second frequency domain data; the differential sampling amplitude error and differential sampling phase error of the device under test are calculated based on the first frequency domain data, the second frequency domain data and the resistance value. The present invention provides a method for directly measuring the error of a differential sampling circuit, which can measure the amplitude error and the phase error, and solves the technical problem that the prior art cannot directly test the differential sampling error. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 It is a schematic diagram of the basic principle of differential sampling method;

[0039] Figure 2It is a flowchart of a differential sampling error measurement method provided by an embodiment of the present invention;

[0040] Figure 3 It is a structural schematic diagram of a differential sampling error measurement system provided by an embodiment of the present invention;

[0041] Description of reference numerals: standard electronic transformer 1, current source 2, device under test 3, four-terminal resistor 4, host computer 5 and differential sampling circuit 31. DETAILED DESCRIPTION

[0042] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0043] Embodiment 1

[0044] Please refer to Figure 2 , a differential sampling error measurement method provided by an embodiment of the present invention, comprising:

[0045] S1. Obtain the first sampling data obtained by sampling the current source 2 by the standard electronic transformer 1, the second sampling data obtained by sampling the current source 2 by the device under test 3, and the resistance value of the four-terminal resistor 4; wherein the device under test 3 comprises a differential sampling circuit 31; the standard electronic transformer 1, the current source 2 and the four-terminal resistor 4 are connected in series; the first current terminal of the four-terminal resistor 4 is connected to the current source 2, and the second current terminal is connected to the standard electronic transformer 1; the device under test 3 is connected to the two voltage terminals of the four-terminal resistor 4; the sampling time periods of the first sampling data and the second sampling data are the same; the first sampling data is current data; and the second sampling data is voltage data.

[0046] It should be noted that the standard electronic transformer 1 outputs a synchronous pulse PPS to the differential sampling circuit 31 of the device under test 3, ensuring that the standard electronic transformer 1 and the differential sampling circuit 31 perform sampling at the same starting time. On this basis, the sampling duration of the standard electronic transformer 1 and the differential sampling circuit 31 is the same, so the sampling period of the first sampling data and the second sampling data can be the same period. The differential sampling circuit 31 performs sampling at a sampling rate under the control of the PPS pulse, and the sampling rate is the sampling rate of the actual differential measurement, but does not exceed 10MHz.

[0047] In a preferred embodiment, the first sampled data and the second sampled data are message data conforming to the IEC61850-9-2 protocol;

[0048] The message data includes a packet number and a sampling value;

[0049] The sampling value is a double-precision sampling value.

[0050] In a preferred embodiment, the accuracy level requirement of the standard electronic transformer 1 is 0.015%, and the sampling rate is 4 kHz;

[0051] The resistance value of the four-terminal resistor 4 is 0.08 ohms, and the accuracy requirement is 0.005%;

[0052] The output frequency of the current source 2 is 50 Hz, and the output accuracy requirement is 0.005%.

[0053] It should be noted that the sampling rate of the standard electronic transformer is 4kHz, the packet number of the message data is 0 to 3999, and the time interval between sampling points is 250us. The sampling data complies with the IEC61850-9-2 protocol. In the IEC61850-9-2 protocol, the current 1 represents 1mA current. In order to ensure the accuracy of the measured value, the standard transformation ratio is set to 100,000 times, and the sampled value is converted to a double-precision sampled value.

[0054] Then, the time value of the first sampling data is:

[0055] T ref =[T0,T1,...,T n ,...,T 3999 ];

[0056] T n =250μs×n;

[0057] Where, T n Indicates the time value of the sampling point numbered n in the first sampled data.

[0058] The sampling value of the first sampling data is:

[0059] I s =[I s,0 ,I s,1 ,...,I s,n ,...,I s,3999 ];

[0060] In the formula, I s,n represents the sampling value of the sampling point numbered n in the first sampling data;

[0061] Convert the sample value to a double precision sample value:

[0062] I s _d=double(I s,n / 100000 / 1000)[I s _d0,I s _d1,...,I s _d n ,...,I s _d 3999 ];

[0063] In the formula, I s _d n I s,n The corresponding double-precision sample value.

[0064] S2. Expand the first sampled data into processed data with the same dimension as the second sampled data through an interpolation algorithm.

[0065] It should be noted that the sampling rate of the differential sampling circuit 31 is F s SPS, package number is 0~(F s -1).

[0066] Then, the time value of the second sampling data is:

[0067] T x =[t0,t1,...,t n ,...,t Fs-1 ];

[0068] t n =1 / F s ×n;

[0069] In the formula, t n represents the time value of the sampling point numbered n in the second sampling data;

[0070] The sampling value of the second sampling data is:

[0071] U s =[U s,0 ,U s,1 ,...,U s,n ,...,U s,Fs -1];

[0072] Where U s,n Represents the sampling value of the sampling point labeled n in the second sampling data.

[0073] In a preferred embodiment, the interpolation algorithm is a Spline cubic spline interpolation method.

[0074] It should be noted that the sampling points of the standard electronic transformer 1 and the differential sampling circuit 31 are different, but the length of the sampling time is the same. Generally, the differential sampling eDonkey uses a successive approximation type or flash type ADC for sampling; the standard electronic transformer 1 uses a sigma-delta ADC (analog-to-digital converter based on oversampling technology) for sampling. In order to ensure the integrity of the detected signal, the first sampling data is interpolated so that the "sampling time" of the processed first sampling data is exactly the same as the sampling time of the second sampling data.

[0075] The present invention adopts Spline cubic spline interpolation, which fits a smooth continuous function curve through a given set of scattered data. The amplitude error under 4kHz expansion of 1000 times sampling points does not exceed 6×10 -8 The angle difference does not exceed 2×10 -12 The accuracy of the present invention can be ignored.

[0076] The interpolation function is:

[0077] I s _inter=interp1(T ref ,I s _d,T x ,′Spline′);

[0078] The above operation can be used to s _d is expanded to and U by interpolation algorithm s Same dimensions.

[0079] S3. Performing a discrete Fourier transform on the processed data to obtain first frequency domain data; performing a discrete Fourier transform on the second sampled data to obtain second frequency domain data.

[0080] It should be noted that the discrete Fourier transform function is:

[0081] DFT_I S =dft(I s _d,F s );

[0082] DFT_U S =dft(U s ,F s ).

[0083] S4. Calculate a differential sampling amplitude error and a differential sampling phase error of the device under test 3 according to the first frequency domain data, the second frequency domain data and the resistance value.

[0084] In a preferred embodiment, the step of calculating the differential sampling amplitude error and the differential sampling phase error of the device under test 3 according to the first frequency domain data, the second frequency domain data and the resistance value includes:

[0085] Calculating a measurement ratio between the device under test 3 and the standard electronic transformer 1 according to the first frequency domain data, the second frequency domain data and the resistance value;

[0086] The differential sampling amplitude error and the differential sampling phase error are calculated according to the measurement ratio.

[0087] In a preferred embodiment, the calculation formula of the measurement ratio is:

[0088]

[0089] Where V represents the measurement ratio of the device under test 3 to the standard electronic transformer 1; DFT_U S Represents the first frequency domain data; DFT_I S represents the second frequency domain data; R1 represents the resistance value of the four-terminal resistor 4;

[0090] The measurement ratio is a complex vector, including amplitude and phase.

[0091] It should be noted that if the power frequency test frequency is set to 50Hz, 1 second includes 50 cycles of periodic signals, then the 50Hz frequency of DFT is at the 50th position, 0 is the DC component, and 50th is the fundamental component. At this time, the calculation formula for the measurement ratio is:

[0092]

[0093] Where DFT_U S

[50] represents the complex vector corresponding to the 50Hz signal of the differential sampling circuit 31, including amplitude and phase; DFT_I S

[50] represents the complex vector corresponding to the standard electronic transformer 1, including amplitude and phase.

[0094] In a preferred embodiment, the calculation formula of the differential sampling amplitude error is:

[0095] f err =(abs(V)-1)×100%;

[0096] In the formula, f err represents the differential sampling amplitude error; abs(·) represents the vector amplitude;

[0097] The calculation formula of the differential sampling phase error is:

[0098] φerr =atan2(V.im,V.re)×180 / π;

[0099] In the formula, φ err represents the differential sampling phase error; atan2(·) represents the angle of the devector; V.im represents the imaginary part of V; V.re represents the real part of V.

[0100] Embodiment 2

[0101] Please refer to Figure 3 , a differential sampling error measurement system provided by an embodiment of the present invention, comprising: a standard electronic transformer 1, a current source 2, a device under test 3, a four-terminal resistor 4 and a host computer 5; the device under test 3 comprises a differential sampling circuit 31; the standard electronic transformer 1, the current source 2 and the four-terminal resistor 4 are connected in series; the first current terminal of the four-terminal resistor 4 is connected to the current source 2, and the second current terminal is connected to the standard electronic transformer 1; the device under test 3 is connected to the two voltage terminals of the four-terminal resistor 4;

[0102] The standard electronic mutual inductor is used to sample the current source 2 to obtain first sampling data; wherein the first sampling data is current data;

[0103] The device under test 3 is used to sample the current source 2 to obtain second sampling data; wherein the second sampling data is voltage data; and the sampling periods of the first sampling data and the second sampling data are the same;

[0104] The host computer 5 is used to obtain the first sampling data, the second sampling data and the resistance value of the four-terminal resistor 4; expand the first sampling data into processed data with the same dimension as the second sampling data through an interpolation algorithm; perform a discrete Fourier transform on the processed data to obtain first frequency domain data; perform a discrete Fourier transform on the second sampling data to obtain second frequency domain data; and calculate the differential sampling amplitude error and differential sampling phase error of the device under test 3 based on the first frequency domain data, the second frequency domain data and the resistance value.

[0105] Embodiment 3

[0106] Accordingly, an embodiment of the present invention provides a terminal device, which includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, and when the processor executes the computer program, the differential sampling error measurement method described in the above-mentioned embodiment of the invention is implemented.

[0107] Embodiment 4

[0108] Accordingly, an embodiment of the present invention provides a storage medium, which includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the differential sampling error estimation method described in the above-mentioned embodiment of the invention.

[0109] Those skilled in the art can clearly understand that for the sake of convenience and brevity, the specific working process of the device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0110] The terminal device may be a computing device such as a desktop computer, a notebook, a PDA, a cloud server, etc. The terminal device may include, but is not limited to, a processor and a memory.

[0111] The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. The processor is the control center of the device, and various interfaces and lines are used to connect various parts of the entire device.

[0112] The memory can be used to store the computer program, and the processor realizes various functions of the device by running or executing the computer program stored in the memory and calling the data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application required for a function, etc.; the data storage area can store data created according to the use of the mobile phone, etc. In addition, the memory can include a high-speed random access memory, and can also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (FlashCard), at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0113] The storage medium is a storage medium, and the computer program is stored in the storage medium. When the computer program is executed by the processor, the steps of each method embodiment described above can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form, etc. The computer readable medium may include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electric carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the content contained in the computer readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer readable media do not include electric carrier signals and telecommunication signals.

[0114] The above is a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A differential sampling error measurement method, characterized in that: include: Obtaining first sampling data obtained by sampling a current source with a standard electronic transformer, second sampling data obtained by sampling the current source with a device under test, and a resistance value of a four-terminal resistor; wherein the device under test comprises a differential sampling circuit; the standard electronic transformer, the current source, and the four-terminal resistor are connected in series; the first current terminal of the four-terminal resistor is connected to the current source, and the second current terminal is connected to the standard electronic transformer; the device under test is connected to two voltage terminals of the four-terminal resistor; the sampling periods of the first sampling data and the second sampling data are the same; the first sampling data is current data; the second sampling data is voltage data; Expanding the first sampled data into processed data having the same dimension as the second sampled data by an interpolation algorithm; Performing a discrete Fourier transform on the processed data to obtain first frequency domain data; performing a discrete Fourier transform on the second sampled data to obtain second frequency domain data; A differential sampling amplitude error and a differential sampling phase error of the device under test are calculated according to the first frequency domain data, the second frequency domain data and the resistance value.

2. The differential sampling error calculation method according to claim 1, characterized in that: The first sampling data and the second sampling data are message data conforming to the IEC61850-9-2 protocol; The message data includes a packet number and a sampling value; The sampling value is a double-precision sampling value.

3. The differential sampling error calculation method according to claim 1, characterized in that: The interpolation algorithm is the Spline cubic spline interpolation method.

4. The differential sampling error calculation method according to claim 1, characterized in that: The step of calculating the differential sampling amplitude error and the differential sampling phase error of the device under test according to the first frequency domain data, the second frequency domain data and the resistance value comprises: Calculating a measurement ratio between the device under test and the standard electronic transformer according to the first frequency domain data, the second frequency domain data and the resistance value; The differential sampling amplitude error and the differential sampling phase error are calculated according to the measurement ratio.

5. The differential sampling error calculation method according to claim 4, characterized in that: The calculation formula of the measurement ratio is: Where V represents the measurement ratio of the device under test to the standard electronic transformer; DFT_U S Represents the first frequency domain data; DFT_I S represents the second frequency domain data; R1 represents the resistance value of the four-terminal resistor; The measurement ratio is a complex vector, including amplitude and phase.

6. The differential sampling error calculation method according to claim 5, characterized in that: The calculation formula of the differential sampling amplitude error is: f err =(abs(V)-1)×100%; In the formula, f err represents the differential sampling amplitude error; abs(·) represents the vector amplitude The calculation formula of the differential sampling phase error is: φ err = atan2(V.im,V.re)×180 / π; In the formula, φ err represents the differential sampling phase error; atan2(·) represents the angle of the devector; V.im represents the imaginary part of V; V.re represents the real part of V.

7. The differential sampling error calculation method according to claim 1, characterized in that: The accuracy level requirement of the standard electronic transformer is 0.015%, and the sampling rate is 4 kHz; The resistance value of the four-terminal resistor is 0.08 ohms, and the accuracy requirement is 0.005%; The output frequency of the current source is 50 Hz, and the output accuracy requirement is 0.005%.

8. A differential sampling error measurement system, comprising: A standard electronic transformer, a current source, a device under test, a four-terminal resistor and a host computer; the device under test includes a differential sampling circuit; The standard electronic transformer, the current source and the four-terminal resistor are connected in series; the first current terminal of the four-terminal resistor is connected to the current source, and the second current terminal is connected to the standard electronic transformer; the device under test is connected to the two voltage terminals of the four-terminal resistor; The standard electronic mutual inductor is used to sample the current source to obtain first sampling data; wherein the first sampling data is current data; The device under test is used to sample the current source to obtain second sampling data; wherein the second sampling data is voltage data; and the sampling periods of the first sampling data and the second sampling data are the same; The host computer is used to obtain the first sampling data, the second sampling data and the resistance value of the four-terminal resistor; expand the first sampling data into processed data with the same dimension as the second sampling data through an interpolation algorithm; perform a discrete Fourier transform on the processed data to obtain first frequency domain data; perform a discrete Fourier transform on the second sampling data to obtain second frequency domain data; and calculate the differential sampling amplitude error and the differential sampling phase error of the device under test based on the first frequency domain data, the second frequency domain data and the resistance value.

9. A terminal device, characterized in that: The method comprises a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein when the processor executes the computer program, the differential sampling error estimation method according to any one of claims 1 to 7 is implemented.

10. A storage medium, characterized in that: The storage medium includes a stored computer program, wherein when the computer program is executed, the device where the storage medium is located is controlled to execute the differential sampling error estimation method according to any one of claims 1 to 7.

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