Driving Method of SAM Card Device, SAM Card Device and Storage Medium

Abstract

The present invention discloses a driving method for a SAM card device, a SAM card device, and a storage medium. The method includes: the CPU selects the SAM card channel to be operated through an analog switch switching module; determines the reading time of each bit of data according to the baud rate set by the SAM card, and sets a timing value in the internal timing register of the CPU; the CPU obtains each bit of data of the character sent by the SAM card according to the reading time through a read-write control chip; the reading time is configured as multiple sampling times, and the CPU samples each bit of data multiple times at multiple sampling time points, and determines the value of each bit of data according to the sampling result; performs parity check on the character through a look-up table method to verify the accuracy of the character. The present invention can achieve precise operation of the SAM card under the Linux operating system, achieve precise delay, ensure timing accuracy, and can adjust the communication rate, with wide applicability and compatibility with SAM cards of most manufacturers.

Description

Technical Field

[0001] The present invention relates to the field of SAM card programming, and particularly to a driving method for a SAM card device, a SAM card device, and a storage medium. Background Art

[0002] A SAM card is a SAM card with special performance, used to store keys and encryption algorithms, and can complete mutual authentication, password verification, and encryption and decryption operations in transactions. It is generally used as an identity marker to complete various deduction transactions, and its appearance is similar to a mobile phone SIM card. It is mainly applied to various charging systems, such as bus on-vehicle chargers, subway turnstiles, and shopping mall POS machines, and basically involves all charging terminals.

[0003] If multiple bank applications are involved, multiple SAM cards may be required. Currently, general POS machines are equipped with four SAM card slots, and some have up to eight, which are determined according to the application scenario. In the early design of MCU single-chip microcomputers, SAM cards communicated based on serial ports. For example, the MCU_UARTRX and MCU_UARTTX ports were connected together, and the SAM card was read and written by setting the transceiver switch, as Figure 1 shown. The advantage is that the read-write control is simple, and the transceiver data can be completed only by controlling the serial port. The disadvantage is that the baud rate is basically not adjustable after being set, and the compatibility is poor. SAM cards of many manufacturers cannot communicate or have a high communication error rate, and cannot handle communication problems completely according to the ISO7816 protocol. Some are also designed in the hardware environment of a single-chip microcomputer and simulated through IO ports, taking data points as the values of data input and output. Due to the lack of sufficient sampling points, the accuracy of the collected values is poor. There is also a method in which the CPU itself integrates the hardware interface and software control register of SMARTCARD, but generally there is only one interface. Such CPUs include the Zhixin Micro RK3568 chip, etc. This method designs the hardware circuit for reading and writing SAM cards, card control, and data read and write registers into the CPU internally, and the software can directly operate the registers to complete the control and data read and write of the card. However, since there are few CPU chips with this interface, it is not an essential interface for chips, and the control methods of each chip are different, so the versatility is very poor. In addition, due to the limited information provided by manufacturers, it brings great difficulties to program design, it is difficult to adapt to the applications of SAM cards of many manufacturers, the compatibility is not strong, and the baud rate adjustment is also limited, so it is difficult to promote and use.

[0004] With the application of embedded systems, linux driver design, and android application interface development, it is particularly important to develop a SAM card software driver program with high fault tolerance and an operating system, as well as a stable and practical multi-channel SAM card design. Summary of the Invention

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a driving method for a SAM card device, which can achieve precise operation of the SAM card under the Linux operating system, achieve precise delay, ensure timing accuracy, and can adjust the communication rate, with wide applicability and compatibility with SAM cards of most manufacturers.

[0006] The present invention also proposes a SAM card device applying the driving method for the SAM card device;

[0007] The present invention also proposes a computer-readable storage medium applying the driving method for the SAM card device.

[0008] According to an embodiment of the first aspect of the present invention, in the driving method for a SAM card device, the SAM card device is used for reading and writing a SAM card, the SAM card device is provided with a CPU, a read-write control chip, an analog switch switching module, and a plurality of SAM card channels, the SAM card channels are used for connecting SAM cards, the CPU is electrically connected to the read-write control chip through analog IO, and the read-write control chip is electrically connected to the plurality of SAM card channels through the analog switch switching module; the method includes:

[0009] The CPU selects a SAM card channel to be operated through the analog switch switching module;

[0010] According to the baud rate set by the SAM card, determine the reading time of each bit of data, and set a timing value in the internal timing register of the CPU;

[0011] The CPU obtains each bit of data of the character sent by the SAM card through the read-write control chip according to the reading time; wherein, the reading time is configured as a plurality of sampling times, the CPU samples each bit of data multiple times at a plurality of the sampling time points, and determines the value of each bit of data according to the sampling result;

[0012] Verify the accuracy of the character by performing parity check on the character through a look-up table method.

[0013] According to some embodiments of the present invention, the analog switch switching module includes a plurality of independent low-conduction-resistance analog switches, and the low-conduction-resistance analog switches correspond to the SAM card channels one by one.

[0014] According to some embodiments of the present invention, the step of according to the baud rate set by the SAM card, determining the reading time of each bit of data, and setting a timing value in the internal timing register of the CPU includes:

[0015] Take the reciprocal of the baud rate to obtain the reading time of each bit of data;

[0016] Divide the reading time of each bit of data by the time counting unit of the timing register to obtain the timing value;

[0017] Set the timing value in the timing register through the CPU.

[0018] According to some embodiments of the present invention, the CPU obtains each bit of data of the characters sent by the SAM card according to the reading time through the read-write control chip, including:

[0019] Configure the reading time as 8 sampling times, and the CPU samples each bit of data 8 times respectively at the 8 sampling times through the read-write control chip to obtain 8 sampled bit levels; take the average value of the second to sixth sampled bit levels of each bit of data to obtain the sampling result;

[0020] Determine the value of each bit of data according to the sampling result.

[0021] According to some embodiments of the present invention, the baud rate can be set to any value.

[0022] According to some embodiments of the present invention, after the CPU selects the SAM card channel to be operated through the analog switch switching module, it further includes:

[0023] Save the current interrupt status of the CPU;

[0024] Disable the local interrupt of the CPU.

[0025] According to some embodiments of the present invention, before the CPU obtains each bit of data of the characters sent by the SAM card according to the reading time through the read-write control chip, it further includes the step of sending an operation command to the SAM card, specifically including:

[0026] Determine several byte data to be sent according to the operation command;

[0027] Set the corresponding value of each bit according to each byte data through the analog IO;

[0028] The CPU sends the value of each bit corresponding to the byte data to the SAM card through the read-write control chip and the corresponding SAM card channel;

[0029] When the value of the response bit of the analog IO is 1, end the sending of the current byte data and start the sending of the next byte data until all the byte data of the operation command are sent.

[0030] The SAM card device according to the embodiment of the second aspect of the present invention is used to implement the driving method of the SAM card device described in any of the above embodiments. The SAM card device includes: a CPU, a read / write control chip, an analog switch switching module, and a plurality of SAM card channels. The CPU is electrically connected to the read / write control chip, the read / write control chip is electrically connected to the analog switch switching module, and the analog switch switching module is electrically connected to the SAM card channels.

[0031] According to some embodiments of the present invention, the CPU includes:

[0032] One or more processors;

[0033] A memory;

[0034] One or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors. When the program is executed by the processor, the steps of the driving method of the SAM card device described in any of the above embodiments are implemented.

[0035] The computer-readable storage medium according to the embodiment of the third aspect of the present invention has a computer program stored thereon. When the computer program is executed by a processor, the steps of the driving method of the SAM card device described in any of the above embodiments are implemented.

[0036] The driving method of the SAM card device according to the embodiment of the present invention has at least the following technical effects: By setting the analog switch switching module and independent SAM card channels, the present invention prevents interference between SAM cards; By using the look-up table method to replace the calculation of the parity bit of bytes, the present invention saves the time for processing data and ensures the timing requirements during the operation of the SAM card; When reading the data of the SAM card, the present invention configures the reading time as multiple sampling times and performs multiple samplings, and determines the value of each bit of data according to the sampling results, thereby improving the accuracy of sampling; By directly setting the timing value in the internal timing register of the CPU, the present invention improves the time resolution and accuracy, ensuring the precision and accuracy of timing; The present invention allows each SAM card to set independent operation control parameters and communication baud rates with arbitrary values and stores them separately in the system. Combining with a timer with a higher resolution, the baud rate can be accurately set and adjusted.

[0037] The additional aspects and advantages of the present invention will be partially given in the following description, partially become obvious from the following description, or be understood through the practice of the present invention. Description of the Drawings

[0038] The following further describes the present invention in conjunction with the drawings and embodiments, wherein:

[0039] Figure 1 It is a design example diagram of the driving circuit for an existing SAM card device;

[0040] Figure 2 It is a flowchart of the driving method for the SAM card device according to an embodiment of the present invention;

[0041] Figure 3 It is a complete operation flowchart of the driving method for the SAM card device according to an embodiment of the present invention;

[0042] Figure 4 It is a data byte transmission diagram of the driving method for the SAM card device according to an embodiment of the present invention;

[0043] Figure 5 It is a 1 ETU bit sampling diagram of the driving method for the SAM card device according to an embodiment of the present invention;

[0044] Figure 6 It is a complete delay cycle of the timer in the driving method for the SAM card device according to an embodiment of the present invention;

[0045] Figure 7 It is a flowchart of sending one byte to the SAM card in the driving method for the SAM card device according to an embodiment of the present invention;

[0046] Figure 8 It is a flowchart of receiving one byte from the SAM card in the driving method for the SAM card device according to an embodiment of the present invention;

[0047] Figure 9 It is a circuit diagram of the SAM card device according to an embodiment of the present invention. Detailed implementation manners

[0048] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present invention and should not be construed as a limitation to the present invention.

[0049] In the description of the present invention, it should be understood that for the orientation description, such as up, down, front, back, left, right, etc., the orientation or positional relationship indicated is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention.

[0050] In the description of the present invention, "several" means more than one, "multiple" means more than two, "greater than", "less than", "exceeding", etc. are understood not to include the recited number, and "above", "below", "within", etc. are understood to include the recited number. If there is a description of "first" and "second", it is only for the purpose of distinguishing technical features and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features or implicitly indicating the sequence relationship of the indicated technical features.

[0051] In the description of the present invention, unless otherwise clearly defined, terms such as "set", "installed", "connected", etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific content of the technical solution.

[0052] In the description of the present invention, the description with reference to terms such as "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0053] The following combines the attached Figure 2-9 to describe in detail the driving method of the SAM card device and the SAM card device according to the embodiments of the present invention.

[0054] Refer to Figure 2 The present invention provides a driving method for a SAM card device. The SAM card device is used to read and write a SAM card. The SAM card device is provided with a CPU, a read / write control chip, an analog switch switching module, and several SAM card channels. The SAM card channels are used to connect the SAM card. The CPU is electrically connected to the read / write control chip through an analog IO, and the read / write control chip is electrically connected to several SAM card channels through the analog switch switching module. The method includes the following steps:

[0055] S100: The CPU selects the SAM card channel to be operated through the analog switch switching module;

[0056] S200: Determine the reading time of each bit of data according to the baud rate set by the SAM card, and set the timing value in the internal timing register of the CPU;

[0057] S300: The CPU obtains each bit of data of the character sent by the SAM card through the read / write control chip; wherein, the reading time is configured as multiple sampling times, and the CPU samples each bit of data at multiple sampling time points, and determines the value of each bit of data according to the sampling result;

[0058] S400: Verify the accuracy of the character by performing parity check on the character through a look-up table method.

[0059] Specifically, in this embodiment, the present invention prevents interference between SAM cards by setting up an analog switch switching module and independent SAM card channels; the present invention replaces the calculation of the parity bit of a byte with a look-up table method, thereby saving the time for processing data and ensuring the timing requirements during the operation of the SAM card; when the present invention reads data from the SAM card, it configures the reading time as multiple sampling times and performs multiple samplings, and determines the value of each bit of data according to the sampling results, thereby improving the accuracy of sampling; the present invention directly sets the timing value in the internal timing register of the CPU, thereby improving the time resolution and accuracy, and ensuring the precision and accuracy of timing; the present invention enables each SAM card to set independent operation control parameters and communication baud rates with arbitrary values and separately stores them in the system, combined with a timer with a higher resolution, thereby enabling the baud rate to be accurately set and adjusted.

[0060] The method steps of this embodiment are based on Figure 9 the circuit shown, stored in the main control chip MCU (i.e., CPU), and this method is implemented by manipulating the terminals, internal storage space, and timer of the MCU.

[0061] The program of the method of this embodiment is designed in combination with the characteristics of the linux device driver to ensure accurate timing under linux and correct simulation of IO to read data.

[0062] For step S100, the CPU selects the SAM card channel to be operated through the analog switch switching module, referring to Figure 9 , U75 and U76 constitute the analog switch switching module, both using CD4066. CD4066 is a four-way bilateral analog switch, mainly used for multiplexing analog or digital signals. The on-resistance of CD4066 is very small, only dozens of ohms. Each package of CD4066 contains 4 independent low on-resistance analog switches, and each low on-resistance analog switch has three terminals: input A, output B, and control C. Among them, the input terminal and the output terminal can be interchanged, so as to select the SAM card channel to be operated through the independent low on-resistance analog switch.

[0063] The read-write control chip U70 uses LTC4555, which is a standard one-way SMARTCARD interface control chip and is the hardware interface circuit for solving the read-write of SAM cards. Using this chip can eliminate the cumbersome card reading control circuit, conform to the ISO / IEC 7816 international standard, and the settings are relatively simple, compatible with the operation of both 1.8V and 3.3V cards.

[0064] In addition, in some other embodiments, discrete components can also be used to implement the functions of the LTC4555 chip.

[0065] The analog IO refers to Figure 9 Pin 15 of the read / write control chip U70, the I / O data pin. By controlling the IO port through software, the I / O data transmission between the CPU and the SAM card is simulated to complete the data reading and writing of the SAM card.

[0066] For step S200, according to the baud rate set by the SAM card, determine the reading time of each bit of data, and set the timing value in the internal timing register of the CPU. The method of the present invention allows flexible setting of the baud rate. Currently, the common baud rates for SAM card reading and writing are 9600bps and 38400bps. Taking the commonly used 38400bps baud rate in the bus fare collection system as an example, 1s / 38400≈0.00002604s, that is, the time occupied by one bit of communication ETU = 26.04us. The time counting unit of the timer is 0.04us, that is, 26.04us / 0.04us = 651, which is the timing value that needs to be written into the timer. When the counter starts working, when it increases from 0 to this value, or decreases from this value to 0, the delay is exactly 26.04us. It can be seen that this baud rate can be easily set and modified.

[0067] For step S300, the CPU obtains each bit of data of the character sent by the SAM card through the read / write control chip; wherein, the reading time is configured as multiple sampling times, and the CPU samples each bit of data at multiple sampling time points, and determines the value of each bit of data according to the sampling results. When using analog IO for data transmission between the CPU and the read / write control chip, the byte transmission of the Smart Card adopts an asynchronous half-duplex mode. When transmitting a byte, in addition to the 8Bits of data, the following two bits are added:

[0068] Start bit: Used for the synchronization of the character frame;

[0069] Parity bit: Used for parity detection.

[0070] Before byte transmission, the I / O setting is at a high level. The SAM card read / write control chip and the CPU transmit bytes in an asynchronous manner, and it has a unified byte transmission format. One byte is sent by 10 consecutive ETUs, during which 1 start bit, 8 data bits and 1 parity check bit are transmitted. Its data frame transmission format: 10bit, such as Figure 4As shown in the figure, when collecting a character, 10 S-0-1-2-3-4-5-6-7-P point values need to be sampled. To improve the sampling accuracy, each ETU time is divided into 8 equal parts, that is, a total of 80 points are collected as data sampling values.

[0071] The specific sampling of 1 ETU is as Figure 5 shown. For the 8 points P[0] to P[7] sampled for each bit, 5 of P[1] to P[5] are taken as the points for calculation. Three or more are high level, and two or less are low level. p is used to store the calculation result and is rounded, that is:

[0072] P (bit level) = (p[1] + p[2] + p[3] + p[4] + p[5]) / 5;

[0073] In this way, the level of each bit sampled is more accurate, excluding the signal interference of the level on the IO port. P[0], P[6], and P[7] are not calculated, mainly to exclude the influence of the boundary level.

[0074] When writing data bits to the SAM card, as long as the IO level is maintained at the bit time of each bit reaching the baud rate, that is, the ETU time in the figure.

[0075] For step S400, the parity check of the character is performed by the look-up table method to verify the accuracy of the character. The data parity check bit is obtained by the look-up table method, that is, according to the data to be sent, the parity check is not obtained by calculation, but directly by reading the table to obtain the parity check bit. Because the parity check bits of a byte from 0x00 to 0xff are determined, a table can be formed as follows and directly read to obtain, saving the time for further calculation and also saving the time occupied by the program execution to ensure the timing accuracy of reading and writing the IO port.

[0076] The parity check bit table of byte values is as follows. By looking up the table instead of calculation, time is saved.

[0077] static u8 rcc_data_parity[] =

[0078] {

[0079] 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,

[0080] 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,

[0081] 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,

[0082] 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,

[0083] 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,

[0084] 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,

[0085] 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,

[0086] 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,

[0087] 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,

[0088] 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,

[0089] 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,

[0090] 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,

[0091] 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,

[0092] 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,

[0093] 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,

[0094] 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,

[0095] }。

[0096] In addition, in Linux, mdelay(), udelay(), and ndelay() are functions provided by the system for delaying execution. Due to the fact that Linux itself is not a real-time operating system and partly due to the implementation mechanism of the Linux system scheduling, the delays of these functions are not very accurate. They are suitable for occasions with low precision requirements. However, for occasions with high precision requirements such as the read and write precision control of SAM cards reaching a resolution of 0.04 us, the precision cannot meet the requirements.

[0097] The present invention adopts a method of directly operating on the timing register to achieve timing. By directly operating on the timing register, the timing accuracy is ensured. Specifically, as Figure 6 shown, Figure 6 shows a timing method for a complete delay cycle. Figure 6 All the operations in the steps are achieved by directly operating on the control register of the timer, that is, accessing the specific register through virtual memory address mapping.

[0098] The present invention also adopts an error retransmission mechanism in data transmission. Specifically, as Figure 7 shown, the CPU is made to send an operation command to the SAM card through simulated IO, including:

[0099] Preparing the byte data to be sent, where the byte data includes a start bit, byte bits, and a parity bit;

[0100] Judging the number of transmission times of the currently sent byte data;

[0101] If the number of transmission times is greater than three, end the transmission and return an error message;

[0102] If the number of transmission times is less than or equal to three, set the value of each bit of the byte data through simulated IO and delay for an ETU time, waiting for all bits of the byte data to be sent;

[0103] Judging whether the response bit of the current simulated IO port is 1;

[0104] If the response bit is not 1, return to the step: judging the number of transmission times of the currently sent byte data;

[0105] If the response bit is 1, end the transmission and return a correct message.

[0106] The data transmission adopts an error retransmission mechanism and is set to retransmit three times, thereby ensuring the accuracy and integrity of the data transmission.

[0107] Figure 3 shows a complete general command operation of the SAM card, fromFigure 3 It can be seen that before operating the analog IO and starting the timer, the Linux interrupt needs to be closed first to prevent interference with the timing accuracy. After the command ends, the Linux interrupt is restored to ensure the normal operation of the Linux system.

[0108] The method of the present invention allows flexible setting of the baud rate. The commonly used baud rates for SAM card reading and writing are currently 9600bps and 38400bps. Taking the commonly used 38400bps baud rate in the bus fare collection system as an example, 1s / 38400 ≈ 0.00002604s, that is, the time ETU occupied by one bit of communication is 26.04us. The time counting unit of the timer is 0.04us, that is, 26.04us / 0.04us = 651, which is the timing value that needs to be written into the timer. When the counter starts working, when it increases from 0 to this value, or decreases from this value to 0, the delay is exactly 26.04us. It can be seen that this baud rate can be set and modified very conveniently.

[0109] At the same time, it can be seen that since the count value of each bit is 651, it is very easy to be divided into 8 equal parts, and the state of the IO port can be read more accurately according to the method of calculating the sampling result described above. The calculation method of the 9600bps baud rate is the same as above.

[0110] Many designs of early POS machines and in-vehicle fare collection machines were based on single-chip microcomputers, and the SAM card communication design was realized through a simple serial communication interface. They failed to be designed completely in accordance with the ISO / IEC 7816 standard. It was basically impossible to adjust the baud rate frequency, the functions were simple, and they could not be compatible with SAM cards of various different manufacturers.

[0111] When making system calls such as udelay() and ndelay() under Linux, affected by the system, it is not very accurate. By directly accessing the timer using the design of the present invention, very accurate delay can be achieved, ensuring the timing accuracy of SAM card operations. As long as there is a CPU with a timer, the method of the present invention can be adopted, and the communication rate can be adjusted to be compatible with SAM cards of most manufacturers.

[0112] By adopting this design, precise operation of SAM cards can also be achieved under the Linux operating system. Since Android is based on Linux device drivers, by implementing JNI calls to the driver through the NDK or integrating it into the Android internal API method, various POS machine products with powerful charging functions based on the Android platform can be developed.

[0113] The present invention uses the method of IO simulation to break through the limitations of the main control chip. It can select a CPU without an integrated SMARTCARD hardware interface and software controller for design, especially for POS machines and in-vehicle toll collectors, etc.

[0114] The internal timer of the chip is used as the reference time for card reading for timing control, which improves the accuracy of the baud rate during communication with the SAM. The design is carried out in accordance with the communication standard ISO / IEC 7816 of the smartcard. Due to differences in the SAM cards of different manufacturers, sometimes some timings need to be fine-tuned. The design of the present invention can perform fine-tuning processing of timings, enabling the toll collector to adapt to SAM cards from different manufacturers.

[0115] In many existing SAM card designs, especially in single-chip microcomputer designs, only one point of data is collected as the received data bit, which is very prone to errors. This design uses eight collection points for each bit, selects the first five, and only considers three high levels as high level, strengthening the fault tolerance rate of the collection, and the device runs stably and reliably.

[0116] This design is for a solution using the linux system. The single-chip microcomputer design can also refer to some processing methods of this design to improve the accuracy of SAM card operations and be compatible with SAM cards launched by various manufacturers, with good compatibility.

[0117] This driver program can also be applied as a toll collector device for the Android system. As long as relevant Android driver interfaces are added and integrated into the Android general API, real-time simulation debugging can be carried out, shortening the development cycle.

[0118] Refer to Figure 9 Furthermore, in some embodiments of the present invention, the analog switch switching module includes a plurality of independent low-on-resistance analog switches, and the low-on-resistance analog switches correspond one-to-one with the SAM card channels.

[0119] Specifically, in this embodiment, the low-on-resistance independent analog switch is used to select the SAM card channel to be operated. Each path has an independent control switch and channel, and the crosstalk between the switches is very small, preventing interference between SAM cards.

[0120] Furthermore, in some embodiments of the present invention, step S200: According to the baud rate set by the SAM card, determine the reading time of each bit of data, and set the timing value in the internal timing register of the CPU, including:

[0121] 2.1 Take the reciprocal of the baud rate to obtain the reading time of each bit of data;

[0122] 2.2 Divide the read time of each bit of data by the time counting unit of the timing register to obtain the timing value;

[0123] 2.3 Set the timing value in the timing register through the CPU.

[0124] Specifically, in this embodiment, the method of the present invention also allows flexible setting of the baud rate. The commonly used baud rates for SAM card reading and writing are currently 9600bps and 38400bps. Taking the commonly used 38400bps baud rate in the bus fare collection system as an example, 1s / 38400≈0.00002604s, that is, the time occupied by one bit of communication ETU = 26.04us, and the time counting unit of the timer is 0.04us, that is, 26.04us / 0.04us = 651, which is the timing value that needs to be written into the timer. When the counter starts working, when it increases from 0 to this value, or decreases from this value to 0, the delay is exactly 26.04us. It can be seen that this baud rate can be set and modified very conveniently.

[0125] At the same time, it can be seen that since the count value of each bit is 651, it is very easy to be divided into 8 equal parts, and the state of the IO port can be read more accurately according to the above method of calculating the sampling result. The calculation method of the 9600bps baud rate is the same as above.

[0126] Refer to Figure 4 and Figure 5 , further, in some embodiments of the present invention, step S300: The CPU obtains each bit of data of the character sent by the SAM card according to the read time through the read-write control chip, including:

[0127] 3.1 Configure the read time as 8 sampling times. The CPU samples each bit of data 8 times at 8 sampling times through the read-write control chip to obtain 8 sampled bit levels; take the average value of the second to sixth sampled bit levels of each bit of data to obtain the sampling result;

[0128] 3.2 Determine the value of each bit of data according to the sampling result.

[0129] Specifically, in this embodiment, when using analog IO for data transmission, the byte transmission of the Smart Card adopts an asynchronous half-duplex mode. When transmitting one byte, in addition to 8Bits of data, the following two bits are added:

[0130] Start bit: Used for synchronization of the character frame;

[0131] Parity bit: Used for parity detection.

[0132] Before byte transmission, the I / O setting is at a high level. The byte is transmitted between the SAM card read / write control chip and the CPU in an asynchronous manner, which has a unified byte transmission format. One byte is sent by 10 consecutive ETUs, during which 1 start bit, 8 data bits, and 1 parity bit are transmitted. Its data frame transmission format: 10bit, as Figure 4 shown, when collecting one character, 10 S-0-1-2-3-4-5-6-7-P point values need to be sampled. To improve the sampling accuracy, each ETU time is divided into 8 equal parts, that is, a total of 80 points are collected as data sampling values.

[0133] The specific sampling of 1 ETU is as Figure 5 shown. For the 8 points P[0] to P[7] of each bit sampling, 5 of P[1] to P[5] are taken as the points for calculation. If three or more are high level and two or less are low level, p is used to store the calculation result and take the integer, that is:

[0134] P (bit level) = (p[1] + p[2] + p[3] + p[4] + p[5]) / 5;

[0135] In this way, the level of each bit (i.e., the value of each bit of data) is more accurate, excluding the signal interference of the level on the IO port. P[0], P[6], and P[7] are not included in the calculation, mainly to exclude the influence of the boundary level.

[0136] When writing data bits to the SAM card, as long as the IO level is maintained at the bit time of each bit reaching the baud rate, that is, the time of ETU in the figure.

[0137] When reading data, by increasing the sampling points of each bit and taking the average value as the sampling value of this bit, the sampling accuracy is improved by a combination of software and hardware.

[0138] Referring to Figure 4 , further, in some embodiments of the present invention, the baud rate can be set to any value.

[0139] Specifically, in this embodiment, the method of the present invention also allows flexible setting of the baud rate. Currently, the common baud rates for SAM card reading and writing are 9600 bps and 38400 bps. Taking the commonly used 38400 bps baud rate in the bus fare collection system as an example, 1 s / 38400 ≈ 0.00002604 s, that is, the time ETU occupied by one bit of communication is 26.04 us. The time counting unit of the timer is 0.04 us, that is, 26.04 us / 0.04 us = 651, which is the timing value that needs to be written into the timer. When the counter starts to work, when it increases from 0 to this value, or decreases from this value to 0, the delay is exactly 26.04 us. It can be seen that this baud rate can be set and modified very conveniently.

[0140] Referring to Figure 3 , further, in some embodiments of the present invention, after step S100: the CPU selects the SAM card channel to be operated through the analog switch switching module, it further includes:

[0141] Save the current interrupt status of the CPU;

[0142] Disable the local interrupt of the CPU.

[0143] Specifically, in this embodiment, this step is mainly used to eliminate the influence of CPU interrupt on timing. By saving the interrupt status of the CPU and disabling the local interrupt of the CPU before the timing operation, it can prevent the CPU interrupt from affecting the timing, protect the critical section code, prevent interrupt interference, and ensure that the code execution is not affected by interrupts during the period, ensuring the stability and reliability of the system. When the timer is working, the minimum counting unit is 0.04 us, that is, when the timer count accumulates and increases, one counting time unit is 0.04 us. If the counting device receives an interrupt from the linux system, it will first execute the interrupt program, and when it returns again, there will be a delay phenomenon, resulting in inaccurate time. Therefore, when precise timing is required, the local_irq_save function needs to be executed first:

[0144] local_irq_save(iflags);

[0145] The main function is to save the interrupt status of the current CPU and disable the local interrupt to ensure that a certain section of code is not interfered by interrupts during execution.

[0146] Therefore, in Linux kernel programming, the local_irq_save function is very important because it can protect the critical section code, prevent interrupt interference, and ensure the stability and reliability of the system.

[0147] After a SAM card read / write command cycle is completed, the local_irq_restore function can be used to restore the previously saved value of the CPSR register, thereby restoring the interrupt status.

[0148] local_irq_restore(iflags);

[0149] This can ensure the accuracy of the timer timing, and thus ensure the correct timing of the IO simulation when reading and writing the SAM card, and ensure the accuracy of the read and write data.

[0150] Refer to Figure 3 and Figure 7 , further, in some embodiments of the present invention, before step S300: the CPU obtains each bit of data of the characters sent by the SAM card according to the read time through the read / write control chip, it further includes the step of sending an operation command to the SAM card, specifically including:

[0151] Determine several byte data to be sent according to the operation command;

[0152] Set the corresponding value of each bit through the analog IO according to each byte of data;

[0153] The CPU sends the value of each bit corresponding to the byte data to the SAM card through the read / write control chip and the corresponding SAM card channel;

[0154] When the value of the response bit of the analog IO is 1, end the sending of the current byte data, start the sending of the next byte data, and continue until all the byte data of the operation command are sent.

[0155] Specifically, in this embodiment, specifically as Figure 7 shown, let the CPU send an operation command to the SAM card through the analog IO, including:

[0156] Prepare the byte data to be sent, and the byte data includes a start bit, byte bits, and a parity bit;

[0157] Judge the number of times of sending the current byte data;

[0158] If the number of sending times is greater than three, end the sending and return an error message;

[0159] If the number of sending times is less than or equal to three, set the value of each bit of the byte data through the analog IO and delay for an ETU time, and wait for all the bits of the byte data to be sent;

[0160] Judge whether the response bit of the current analog IO port is 1;

[0161] If the response bit is not 1, return to the step: judge the number of times of sending the current byte data;

[0162] If the response bit is 1, the transmission ends and the correct information is returned, and the transmission of the next byte of data starts until the transmission of all byte data of the operation command is completed.

[0163] The data transmission adopts an error retransmission mechanism and is set to retransmit three times to ensure the accuracy and integrity of the data transmission.

[0164] Refer to Figure 3 , which shows a complete communication operation process of the CPU for the SAM card, specifically including: selecting the SAM card channel to be communicated; saving the interrupt status of the CPU and turning off the local interrupt of the CPU; setting the timer parameters for SAM card initialization; making the CPU send an operation command to the SAM card through the analog IO; making the CPU receive the return data from the SAM card through the analog IO; restoring the local interrupt of the CPU.

[0165] Refer to Figure 8 , which shows a complete process of the CPU receiving the return data from the SAM card through the analog IO. By adopting the method of repeating the reception according to the current reception times, it is ensured that the data can be received completely. If it exceeds three times, it is determined that an error occurs in receiving the data. Making the CPU receive the return data from the SAM card through the analog IO includes:

[0166] Set the analog IO to the input state;

[0167] Judge the current reception times of the CPU receiving the return data;

[0168] If the reception times are greater than three, end the reception and return an error message;

[0169] If the reception times are less than or equal to three, judge whether the level of the analog IO becomes low within the specified time;

[0170] If the level of the analog IO does not become low within the specified time, it is determined that the SAM card has not sent data and the reception ends;

[0171] If the level of the analog IO becomes low within the specified time, receive the value of each bit of the return data through the analog IO and read all bits of the return data within one ETU time;

[0172] Calculate the byte value of the return data received by the CPU and perform parity check through the look-up table method;

[0173] If the parity check result is correct, end the reception.

[0174] If the parity check result is incorrect, set the analog IO to: output a low level and hold it for 1.5 ETU times, and then restore to the high level;

[0175] Inform the SAM card of a reception error;

[0176] Return to the step: Determine the number of receptions for the current CPU to receive the returned data.

[0177] After completing the above operations, finally restore the local interrupt of the CPU, including:

[0178] Execute the local interrupt restoration function, which is used to restore the value of the CPSR register saved in the local interrupt saving function.

[0179] Enable the local interrupt of the CPU.

[0180] Specifically, after a SAM card read / write command cycle is completed, the local_irq_restore function can be used to restore the previously saved CPSR register value, thereby restoring the interrupt state:

[0181] local_irq_restore(iflags);

[0182] This can ensure the accuracy of the timer timing, and thus ensure the correct timing of the IO simulation when reading and writing the SAM card, and ensure the accuracy of the read and write data.

[0183] Refer to Figure 9 , the present invention also proposes a SAM card device for implementing the driving method of the SAM card device in any one of the above embodiments. The SAM card device includes: a CPU, a read / write control chip, an analog switch switching module, and a plurality of SAM card channels. The CPU is electrically connected to the read / write control chip, the read / write control chip is electrically connected to the analog switch switching module, and the analog switch switching module is electrically connected to the SAM card channels.

[0184] Specifically, in this embodiment, refer to Figure 9 , U75 and U76 constitute the analog switch switching module, both of which use CD4066. CD4066 is a four-way bilateral analog switch, mainly used for multiplexing analog or digital signals. The on-resistance of CD4066 is very small, only dozens of ohms. Each package of CD4066 contains 4 independent low on-resistance analog switches, and each low on-resistance analog switch has three terminals: input A, output B, and control C, where the input terminal and the output terminal can be interchanged.

[0185] The read / write control chip U70 uses LTC4555, which is a standard one-way SMARTCARD interface control chip and is the hardware interface circuit for solving the read and write of the SAM card. Using this chip can eliminate the cumbersome card reading control circuit, conform to the ISO / IEC 7816 international standard, the settings and controls are relatively simple, and it is compatible with the operations of both 1.8V and 3.3V cards.

[0186] In addition, in some other embodiments, discrete components can also be used to implement the functions of the LTC4555 chip.

[0187] The analog IO refers to Figure 9 the 15th pin of the read / write control chip U70 in [], the I / O data pin. By controlling the IO port through software and simulating the I / O data transmission between the CPU and the SAM card, the data reading and writing of the SAM card can be completed.

[0188] Figure 9 In [], when the control terminal C is at a high level, switches A and B are turned on; when the control terminal is at a low level, the switches are turned off. When the analog switch is turned on, the on-resistance is several tens of ohms; when the analog switch is turned off, it presents a very high impedance and can be regarded as an open circuit. The analog switch can transmit digital signals and analog signals, and the upper limit frequency of the analog signals that can be transmitted is 40 MHz. The crosstalk between each switch is very small, and the typical value is -50 dB.

[0189] Furthermore, in some embodiments of the present invention, the CPU includes:

[0190] one or more processors;

[0191] a memory;

[0192] one or more programs, where one or more programs are stored in the memory and are configured to be executed by one or more processors. When the programs are executed by the processors, the steps of the driving method of the SAM card device in any one of the above embodiments are implemented.

[0193] The present invention also proposes a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the driving method of the SAM card device in any one of the above embodiments are implemented.

[0194] Those of ordinary skill in the art will understand that all or part of the steps of implementing the above embodiments can be completed by hardware or by a program instructing relevant hardware. The program can be stored in a computer-readable storage medium. In the context of the present invention, the computer-readable medium can be considered tangible and non-transitory. Non-limiting examples of non-transitory tangible computer-readable media include non-volatile memory circuits (such as flash memory circuits, erasable programmable read-only memory circuits, or mask read-only memory circuits), volatile memory circuits (such as static random access memory circuits or dynamic random access memory circuits), magnetic storage media (such as analog or digital magnetic tapes or hard disk drives), and optical storage media (such as CDs, DVDs, or Blu-ray discs), etc. The program code for implementing the method of the present invention can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing devices, such that when the program codes are executed by the processor or controller, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The program codes can be executed entirely on the machine, partially on the machine, executed partially on the machine and partially on a remote machine as an independent software package, or executed entirely on a remote machine or server.

[0195] In addition, although the operations are depicted in a particular order, this should be understood to require that the operations be performed in the particular order shown or in sequential order, or that all of the illustrated operations be performed to achieve the desired result. In certain environments, multitasking and parallel processing may be advantageous. Similarly, although a number of specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the present invention. Certain features described in the context of separate embodiments can also be implemented in combination in a single implementation. Conversely, the various features described in the context of a single implementation can also be implemented separately or in any suitable sub-combination in multiple implementations.

[0196] The embodiments of the present invention have been described in detail above in conjunction with the accompanying drawings. However, the present invention is not limited to the above embodiments. Various changes can be made without departing from the spirit of the present invention within the knowledge of those of ordinary skill in the art. In addition, the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

Claims

1. A driving method for a SAM card device, characterized in that: The SAM card device is used to read and write SAM cards. The SAM card device is provided with a CPU, a read-write control chip, an analog switch switching module and a plurality of SAM card channels. The SAM card channels are used to connect SAM cards. The CPU is electrically connected to the read-write control chip through analog IO, and the read-write control chip is electrically connected to the plurality of SAM card channels through the analog switch switching module. The method comprises: The CPU selects the SAM card channel to be operated through the analog switch switching module; According to the baud rate set by the SAM card, the reading time of each bit of data is determined, and the timing value is set in the internal timing register by the CPU; The CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip; wherein the reading time is configured as a plurality of sampling times, and the CPU samples each bit of data multiple times at the plurality of sampling times, and determines the value of each bit of data according to the sampling results; Performing parity check on the characters by table lookup to verify the accuracy of the characters; The CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip, including: The read time is configured as 8 sampling times, and the CPU samples each bit of data 8 times at the 8 sampling times through the read-write control chip to obtain 8 sampling bit levels; the second sampling bit level to the sixth sampling bit level of each bit of data are averaged to obtain a sampling result; The value of each bit of data is determined according to the sampling result.

2. The driving method of the SAM card device according to claim 1, characterized in that: The analog switch switching module includes a plurality of independent low on-resistance analog switches, and the low on-resistance analog switches correspond to the SAM card channels one by one.

3. The driving method of the SAM card device according to claim 1, characterized in that: The baud rate set by the SAM card is used to determine the reading time of each bit of data, and the CPU sets the timing value in the internal timing register, including: Taking the reciprocal of the baud rate, obtaining the reading time of each bit of data; Divide the reading time of each bit of data by the time counting unit of the timing register to obtain the timing value; The timing value is set in the timing register by the CPU.

4. The driving method of the SAM card device according to claim 1, characterized in that: After the CPU selects the SAM card channel to be operated through the analog switch switching module, the method further includes: Save the current interrupt status of the CPU; Disable local interrupts for the CPU.

5. The driving method of the SAM card device according to claim 1, characterized in that: Before the CPU obtains each bit of data of the character sent by the SAM card according to the read time through the read-write control chip, the step of sending an operation command to the SAM card is further included, which specifically includes: According to the operation command, determining a number of byte data to be sent; According to each of the byte data, the value of each corresponding bit is set through the analog IO; The CPU sends the value of each bit corresponding to the byte data to the SAM card through the read-write control chip and the corresponding SAM card channel; When the value of the response bit of the simulated IO is 1, the sending of the current byte data ends, and the sending of the next byte data starts, until the sending of all byte data of the operation command is completed.

6. A SAM card device, characterized in that: Used to implement the driving method of the SAM card device as described in any one of claims 1-5, the SAM card device includes: a CPU, a read-write control chip, an analog switch switching module, and several SAM card channels, the CPU is electrically connected to the read-write control chip, the read-write control chip is electrically connected to the analog switch switching module, and the analog switch switching module is electrically connected to the SAM card channel.

7. The SAM card device according to claim 6, characterized in that: The CPU comprises: one or more processors; Memory; One or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and when the programs are executed by the processors, the steps of the driving method of the SAM card device as described in any one of claims 1-5 are implemented.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the driving method of the SAM card device as described in any one of claims 1-5 are implemented.

Images