Frequency converter, driving signal processing method thereof and computer readable storage medium

Abstract

The invention discloses a frequency converter, a driving signal processing method thereof and a computer readable storage medium. The method comprises the following steps: receiving a modulation wave, a first triangular carrier corresponding to a left upper tube in an H bridge, and a second triangular carrier corresponding to a right upper tube in the H bridge; obtaining a first driving signal corresponding to a left upper tube and a second driving signal corresponding to a right upper tube according to the modulated wave, the first triangular carrier and the second triangular carrier; encoding the first driving signal and the second driving signal to obtain an encoded signal; and sending the coded signal to a driving board according to an interval point of the interruption frequency, so that the driving board decodes the coded signal to obtain a first driving signal and a second driving signal. In this way, it is guaranteed that the driving signals are depicted without difference, and therefore the motor is driven to operate.

Description

Technical Field

[0001] The present application relates to the technical field of frequency converters, and in particular to frequency converters and drive signal processing methods thereof, and computer-readable storage media. Background Art

[0002] In the inverter system, the driving signal needs to be sent to multiple units synchronously through the main control board, and the wave analysis is performed by the units to drive the driving module in the power circuit board to perform wave processing. When the time when each cascade unit receives the driving instruction is inconsistent and exceeds the tolerance range, it will cause damage to the power unit, and even worse, the machine will explode.

[0003] In order to ensure the synchronization of the driving signal, in the usual solution, the left and right upper tubes in the H-bridge are driven and directly connected to the optical fiber that generates the driving signal in the main control board through two optical fibers, so as to control the power board driving signal to generate a wave, thereby driving the motor to run. Summary of the invention

[0004] The frequency converter and its drive signal processing method and computer-readable storage medium provided in the present application can ensure that the drive signal is characterized without distinction, thereby driving the motor to operate.

[0005] In a first aspect, the present application provides a drive signal processing method for a frequency converter, the drive signal processing method comprising: receiving a modulation wave, a first triangular carrier corresponding to an upper left tube in an H-bridge, and a second triangular carrier corresponding to an upper right tube in the H-bridge; obtaining a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube according to the modulation wave, the first triangular carrier, and the second triangular carrier; encoding the first drive signal and the second drive signal to obtain a coded signal; sending the coded signal to a drive board according to an interval point of an interrupt frequency, so that the drive board decodes the coded signal to obtain the first drive signal and the second drive signal.

[0006] Among them, according to the modulation wave, the first triangular carrier and the second triangular carrier, a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube are obtained, including: within each interrupt frequency, according to the modulation wave, the first triangular carrier and the second triangular carrier, the first drive signal corresponding to the upper left tube, the second drive signal corresponding to the upper right tube, and the first signal switching duration corresponding to the first drive signal and the second signal switching duration corresponding to the second drive signal are obtained.

[0007] Among them, sending the coded signal to the driving board according to the interval points of the interruption frequency so that the driving board decodes the coded signal to obtain the first driving signal and the second driving signal, including: sending the coded signal, the first signal switching duration, and the second signal switching duration to the driving board according to the interval points of the interruption frequency, so that the driving board decodes the coded signal according to the first signal switching duration and the second signal switching duration to obtain the first driving signal and the second driving signal.

[0008] The first drive signal and the second drive signal are encoded to obtain a coded signal, including: using the first signal value in the first drive signal as the first bit in the coded signal; using the first signal value in the second drive signal as the second bit in the coded signal; using the second signal value in the first drive signal as the third bit in the coded signal; using the second signal value in the second drive signal as the fourth bit in the coded signal, thereby obtaining a 4-bit coded signal.

[0009] Among them, the driving board decodes the coded signal, including: using the first bit in the coded signal as the first signal value in the first drive signal; using the third bit in the coded signal as the second signal value in the first drive signal to obtain the first drive signal; using the second bit in the coded signal as the first signal value in the second drive signal; using the fourth bit in the coded signal as the second signal value in the second drive signal to obtain the second drive signal.

[0010] After receiving the modulated wave, the method includes: latching the modulated wave.

[0011] In a second aspect, the present application provides a frequency converter, which includes: a signal processing chip, which generates a modulation wave; a main control chip, coupled to the signal processing chip, which receives the modulation wave, and generates a first triangular carrier corresponding to the upper left tube in the H-bridge and a second triangular carrier corresponding to the upper right tube in the H-bridge; and according to the modulation wave, the first triangular carrier and the second triangular carrier, a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube are obtained; and the first drive signal and the second drive signal are encoded to obtain a coded signal; the coded signal is sent to a drive board according to the interval point of the interrupt frequency; the drive board is coupled to the main control chip, receives the coded signal, and decodes the coded signal to obtain the first drive signal and the second drive signal.

[0012] The driver board and the main control chip are connected via optical fiber.

[0013] Among them, the main control chip obtains the first drive signal corresponding to the upper left tube, the second drive signal corresponding to the upper right tube, the first signal switching duration corresponding to the first drive signal, and the second signal switching duration corresponding to the second drive signal according to the modulation wave, the first triangular carrier and the second triangular carrier within each interrupt frequency.

[0014] In a third aspect, the present application provides a computer-readable storage medium, which is used to store a computer program. When the computer program is executed by a processor, it is used to implement the drive signal processing method provided in the first aspect.

[0015] The beneficial effects of the present application are as follows: different from the prior art, the frequency converter and its drive signal processing method, and computer-readable storage medium provided by the present application receive a modulation wave, a first triangular carrier corresponding to the upper left tube in the H-bridge, and a second triangular carrier corresponding to the upper right tube in the H-bridge; obtain a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube according to the modulation wave, the first triangular carrier, and the second triangular carrier; encode the first drive signal and the second drive signal to obtain an encoded signal; send the encoded signal to the drive board according to the interval point of the interruption frequency, so that the drive board decodes the encoded signal to obtain the first drive signal and the second drive signal, and encode the drive signal cycle by cycle, which can not only ensure the protection of the frequency converter in a short time, but also accurately send the drive signal, so as to ensure the use on a low-speed optical fiber, and ensure the realization of synchronous wave transmission, so as to ensure that the drive signal is characterized without distinction, thereby driving the motor to operate. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them: Figure 1 It is a flow chart of an embodiment of a method for processing a drive signal of a frequency converter provided by the present application; Figure 2 is a waveform diagram of a drive signal of the frequency converter provided by the present application; Figure 3 is a waveform diagram of an embodiment of a driving signal provided by the present application; Figure 4 is a waveform diagram of another embodiment of the driving signal provided by the present application; Figure 5 is a waveform diagram of another embodiment of the driving signal provided by the present application; Figure 6 is a waveform diagram of another embodiment of the driving signal provided by the present application; Figure 7 is a waveform diagram of another embodiment of the driving signal provided by the present application; Figure 8 It is a structural schematic diagram of an embodiment of a frequency converter provided by the present application; Fig. 9 It is a structural schematic diagram of an embodiment of a computer-readable storage medium provided by the present application. DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It will be understood that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only some but not all structures related to the present application are shown in the drawings. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0018] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0019] In the inverter system, the driving signal needs to be sent to multiple units synchronously through the main control board, and the wave analysis is performed by the units to drive the driving module in the power circuit board to perform wave processing. When the time when each cascade unit receives the driving instruction is inconsistent and exceeds the tolerance range, it will cause damage to the power unit, and even worse, the machine will explode.

[0020] In order to ensure the synchronization of the driving signal, in the usual solution, the left and right upper tubes in the H-bridge are driven and directly connected to the optical fiber that generates the driving signal in the main control board through two optical fibers, so as to control the power board driving signal to generate a wave, thereby driving the motor to run.

[0021] Based on this, the present application proposes receiving a modulation wave, a first triangular carrier wave corresponding to the upper left tube in the H-bridge, and a second triangular carrier wave corresponding to the upper right tube in the H-bridge; obtaining a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube according to the modulation wave, the first triangular carrier wave and the second triangular carrier wave; encoding the first drive signal and the second drive signal to obtain a coded signal; sending the coded signal to the driver board according to the interval point of the interruption frequency so that the driver board decodes the coded signal to obtain the first drive signal and the second drive signal. The cycle-by-cycle encoding of the drive signal can not only ensure the protection of the frequency converter in a short time, but also accurately send the drive signal, thereby ensuring the use on low-speed optical fiber, and ensuring the realization of synchronous wave transmission, so as to ensure that the drive signal is characterized without difference, thereby driving the motor to operate. Please refer to the technical solution of any of the following embodiments for details.

[0022] See also Figure 1 , Figure 1 1 is a flow chart of an embodiment of a method for processing a drive signal of a frequency converter provided by the present application. The method for processing a drive signal comprises: Step 11: Receive the modulated wave, the first triangular carrier wave corresponding to the upper left tube in the H-bridge, and the second triangular carrier wave corresponding to the upper right tube in the H-bridge.

[0023] In some embodiments, after receiving the modulated wave, the modulated wave is latched to facilitate execution of step 12.

[0024] Step 12: According to the modulation wave, the first triangular carrier wave and the second triangular carrier wave, a first driving signal corresponding to the upper left tube and a second driving signal corresponding to the upper right tube are obtained.

[0025] In some embodiments, within each interrupt frequency, a first drive signal corresponding to the upper left tube, a second drive signal corresponding to the upper right tube, a first signal switching duration corresponding to the first drive signal, and a second signal switching duration corresponding to the second drive signal are obtained based on the modulation wave, the first triangular carrier and the second triangular carrier.

[0026] In some embodiments, in combination Figure 2 To explain: like Figure 2 As described, the part of the triangular carrier wave corresponding to the upper left tube in the H-bridge above the modulation wave is a low level 0, and the part of the triangular carrier wave corresponding to the upper left tube in the H-bridge below the modulation wave is a high level 1. The triangular carrier wave corresponding to the upper left tube in the H-bridge is at the intersection of the modulation wave and the signal switching moment. The part of the triangular carrier wave corresponding to the upper right tube in the H-bridge above the modulation wave is a low level 0, and the part of the triangular carrier wave corresponding to the upper left tube in the H-bridge below the modulation wave is a high level 1. The triangular carrier wave corresponding to the upper left tube in the H-bridge is at the intersection of the modulation wave and the signal switching moment.

[0027] Step 13: Encode the first drive signal and the second drive signal to obtain a coded signal.

[0028] In some embodiments, the first signal value in the first drive signal is used as the first bit in the encoded signal; the first signal value in the second drive signal is used as the second bit in the encoded signal; the second signal value in the first drive signal is used as the third bit in the encoded signal; and the second signal value in the second drive signal is used as the fourth bit in the encoded signal, thereby obtaining a 4-bit encoded signal.

[0029] For example, in the interruption period, in response to the first drive signal being 10 and the second drive signal being 10, the first drive signal and the second drive signal are encoded, and the obtained encoded signal is 1100. The first 1 in the first drive signal represented by the first 1 in the encoded signal 1100, the first 1 in the second drive signal represented by the second 1 in the encoded signal 1100, the second 0 in the first drive signal represented by the third 0 in the encoded signal 1100, and the second 0 in the second drive signal represented by the fourth 0 in the encoded signal 1100, such as Figure 3 As shown, Figure 3 AH and BH represent the driving signals of the left and right upper tubes in the H-bridge circuit respectively. Subsequent decoding can be performed according to this logic.

[0030] like Figure 3 As shown in the figure, there are two driving signals that are changing. The driving signal needs to be sent once at a fixed interruption time T. By using two time scale standards to characterize the switching moment, the driving signal can be accurately characterized. The driving instruction can be represented by 4-bit data, such as Figure 3 In the left figure, CMD=1100, time1, and time2 need to be sent to accurately characterize the drive signal. Figure 3 In the figure on the right, only the command is modified to CMD=1100, where time1 and time2 represent the drive AH and BH signals respectively. After the signal is sent to the unit control board, the drive signal is analyzed to ensure synchronization and accurately depict the drive waveform.

[0031] In the interruption period, in response to the first drive signal being 1 and the second drive signal being 1, it means that in the interruption period, the first drive signal and the second drive signal are both at high level 1. In order to ensure the logical consistency of the encoding, the first drive signal and the second drive signal are encoded, and the obtained encoding signal is 1111. Among them, the first drive signal represented by the first 1 in the encoding signal 1111 is 1, the second drive signal represented by the second 1 in the encoding signal 1111 is 1, the first drive signal represented by the third 1 in the encoding signal 1111 is 1, and the second drive signal represented by the fourth 1 in the encoding signal 1111 is 1, as shown in FIG. Figure 4 The subsequent decoding can be done according to this logic.

[0032] In the interruption period, in response to the first drive signal being 0 and the second drive signal being 0, it means that in the interruption period, the first drive signal and the second drive signal are both low level 0. In order to ensure the logical consistency of the encoding, the first drive signal and the second drive signal are encoded, and the obtained encoding signal is 0000. Among them, the first drive signal represented by the first 0 in the encoding signal 0000 is 0, the second drive signal represented by the second 0 in the encoding signal 0000 is 0, the first drive signal represented by the third 0 in the encoding signal 0000 is 0, and the second drive signal represented by the fourth 0 in the encoding signal 0000 is 0, as shown in FIG. Figure 5 The subsequent decoding can be done according to this logic.

[0033] like Figure 4 and Figure 5 As shown, for the case of sending the same level, it is only necessary to Figure 4 Send CMD = 4'b1111, time1 = time2 = T or 0, and according to Figure 5 Send CMD = 4'b0000, time1 = time2 = T or 0. Figure 4 and Figure 5 The driving signal in can be accurately characterized.

[0034] In the interruption period, in response to the first drive signal being 01 and the second drive signal being 10, the first drive signal and the second drive signal are encoded, and the obtained encoded signal is 0110. The first 0 in the first drive signal represented by the first 0 in the encoded signal 0110, the first 1 in the second drive signal represented by the second 1 in the encoded signal 0110, the second 1 in the first drive signal represented by the third 1 in the encoded signal 0110, and the second 0 in the second drive signal represented by the fourth 0 in the encoded signal 0110, as shown in FIG. Figure 6 As shown. Subsequent decoding can be done according to this logic. Figure 6As shown, for the inconsistent transmission level, Figure 6 , encode the driving signal as follows, CMD=4'b0110, time1, time2, and then send it to the unit for driving analysis and wave transmission.

[0035] In the interruption period, in response to the first drive signal being 10 and the second drive signal being 01, the first drive signal and the second drive signal are encoded, and the obtained encoded signal is 1001. The first 1 in the first drive signal represented by the first 1 in the encoded signal 1001, the first 0 in the second drive signal represented by the second 0 in the encoded signal 1001, the second 0 in the first drive signal represented by the third 0 in the encoded signal 1001, and the second 1 in the second drive signal represented by the fourth 1 in the encoded signal 1001, as shown in FIG. Figure 7 As shown. Subsequent decoding can be done according to this logic. Figure 7 As shown, for the inconsistent transmission level, Figure 7 , encode the driving signal as follows, CMD=4'b1001, time1, time2, and then send it to the unit for driving analysis and wave transmission.

[0036] In the interruption period, in response to the first drive signal being 1 and the second drive signal being 01, it indicates that in the interruption period, the first drive signal is at a high level 1. The first drive signal and the second drive signal are encoded, and the obtained encoded signal is 1011. Among them, the first 1 in the encoded signal 1011 represents the 1 of the first drive signal, the second 0 in the encoded signal 1011 represents the first 0 in the second drive signal, the third 1 in the encoded signal 1011 represents the 1 of the first drive signal, and the fourth 1 in the encoded signal 1011 represents the second 1 in the second drive signal. Subsequent decoding can be performed according to this logic.

[0037] In the interruption period, in response to the first drive signal being 01 and the second drive signal being 01, the first drive signal and the second drive signal are encoded, and the obtained encoded signal is 0011. The first 0 in the first drive signal represented by the first 0 in the encoded signal 0011, the first 0 in the second drive signal represented by the second 0 in the encoded signal 0011, the second 1 in the first drive signal represented by the third 1 in the encoded signal 0011, and the second 1 in the second drive signal represented by the fourth 1 in the encoded signal 0011. Subsequent decoding can be performed according to this logic.

[0038] In the interruption period, in response to the first drive signal being 01 and the second drive signal being 11, it means that in the interruption period, the second drive signal is at a high level 1. The first drive signal and the second drive signal are encoded, and the obtained encoded signal is 0111. Among them, the first 0 in the first drive signal represented by the first 0 in the encoded signal 0111, the 1 in the second drive signal represented by the second 1 in the encoded signal 0111, the second 1 in the first drive signal represented by the third 1 in the encoded signal 0111, and the 1 in the second drive signal represented by the fourth 1 in the encoded signal 0111. Subsequent decoding can be performed according to this logic.

[0039] In the interruption period, in response to the first drive signal being 11 and the second drive signal being 10, it means that in the interruption period, the first drive signal is at a high level 1. The first drive signal and the second drive signal are encoded, and the obtained encoded signal is 1110. Among them, the first 1 in the first drive signal represented by the first 1 in the encoded signal 1110, the first 1 in the second drive signal represented by the second 1 in the encoded signal 1110, the 1 in the first drive signal represented by the third 1 in the encoded signal 1110, and the second 0 in the second drive signal represented by the fourth 0 in the encoded signal 1110. Subsequent decoding can be performed according to this logic.

[0040] Step 14: Send the coded signal to the driving board according to the interval points of the interruption frequency, so that the driving board decodes the coded signal to obtain the first driving signal and the second driving signal.

[0041] The coded signal, the first signal switching duration (the above-mentioned time1), and the second signal switching duration (the above-mentioned time2) are sent to the driving board according to the interval points of the interruption frequency, so that the driving board decodes the coded signal according to the first signal switching duration and the second signal switching duration to obtain the first driving signal and the second driving signal.

[0042] Among them, the driving board uses the first bit in the coding signal as the first signal value in the first driving signal; uses the third bit in the coding signal as the second signal value in the first driving signal to obtain the first driving signal; uses the second bit in the coding signal as the first signal value in the second driving signal; uses the fourth bit in the coding signal as the second signal value in the second driving signal to obtain the second driving signal.

[0043] For example, the driver board responds to the coding signal of 1100, the first drive signal is 10, the second drive signal is 10, and the signal duration of 1 in the first drive signal is determined according to the first signal switching duration, and the signal duration of 1 in the second drive signal is determined according to the second signal switching duration. That is, when the duration of 1 of the first drive signal reaches the first signal switching duration, it switches to 0 at the next moment. When the duration of 1 of the second drive signal reaches the second signal switching duration, it switches to 0 at the next moment.

[0044] Among them, the driver board responds to the coding signal of 1111, the first drive signal is 1, and the second drive signal is 1. That is, the first drive signal is high level 1 during the first signal switching time. The second drive signal is high level 1 during the second signal switching time. At this time, the first signal switching time and the second signal switching time are equal to the duration of the interruption period.

[0045] Among them, the driver board responds to the coding signal of 0000, the first drive signal is 0, and the second drive signal is 0. That is, the first drive signal is low level 0 during the first signal switching time. The second drive signal is high level 0 during the second signal switching time. At this time, the first signal switching time and the second signal switching time are equal to the duration of the interruption period.

[0046] The driver board responds to the coding signal of 0110, the first drive signal is 01, and the second drive signal is 10, and determines the signal duration of 0 in the first drive signal according to the first signal switching duration, and determines the signal duration of 1 in the second drive signal according to the second signal switching duration. That is, when the duration of 0 of the first drive signal reaches the first signal switching duration, it switches to 1 at the next moment. When the duration of 1 of the second drive signal reaches the second signal switching duration, it switches to 0 at the next moment.

[0047] The driver board responds to the coding signal of 1001, the first drive signal is 10, and the second drive signal is 01, and determines the signal duration of 1 in the first drive signal according to the switching duration of the first signal, and determines the signal duration of 0 in the second drive signal according to the switching duration of the second signal. That is, when the duration of 1 of the first drive signal reaches the switching duration of the first signal, it switches to 0 at the next moment. When the duration of 0 of the second drive signal reaches the switching duration of the second signal, it switches to 1 at the next moment.

[0048] Among them, the driver board responds to the coding signal of 1011, the first drive signal is 1, and the second drive signal is 01, and determines the signal duration of 0 in the second drive signal according to the second signal switching duration. That is, the first drive signal is a high level 1 during the first signal switching duration. When the duration of 0 of the second drive signal reaches the second signal switching duration, it switches to 1 at the next moment. At this time, the first signal switching duration is equal to the duration of the interruption period.

[0049] The driver board responds to the coding signal of 0011, the first drive signal is 01, and the second drive signal is 01, and determines the signal duration of 0 in the first drive signal according to the first signal switching duration, and determines the signal duration of 0 in the second drive signal according to the second signal switching duration. That is, when the duration of 0 of the first drive signal reaches the first signal switching duration, it switches to 1 at the next moment. When the duration of 0 of the second drive signal reaches the second signal switching duration, it switches to 1 at the next moment.

[0050] The driver board responds to the coding signal of 0111, the first drive signal is 01, and the second drive signal is 11, and determines the signal duration of 0 in the first drive signal according to the switching duration of the first signal. That is, when the duration of 0 of the first drive signal reaches the switching duration of the first signal, it switches to 1 at the next moment. The second drive signal is high level 1 within the switching duration of the first signal. At this time, the switching duration of the second signal is equal to the duration of the interruption period.

[0051] Among them, the driver board responds to the coding signal of 1110, the first drive signal is 11, and the second drive signal is 10, and determines the signal duration of 1 in the second drive signal according to the second signal switching duration. That is, the first drive signal is a high level 1 during the first signal switching duration. When the duration of 1 of the second drive signal reaches the second signal switching duration, it switches to 0 at the next moment. At this time, the first signal switching duration is equal to the duration of the interruption period.

[0052] In this embodiment, a modulation wave, a first triangular carrier wave corresponding to the upper left tube in the H-bridge, and a second triangular carrier wave corresponding to the upper right tube in the H-bridge are received; a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube are obtained according to the modulation wave, the first triangular carrier wave, and the second triangular carrier wave; the first drive signal and the second drive signal are encoded to obtain a coded signal; the coded signal is sent to the driver board according to the interval point of the interruption frequency, so that the driver board decodes the coded signal to obtain the first drive signal and the second drive signal. The cycle-by-cycle encoding of the drive signal can not only ensure the protection of the frequency converter in a short time, but also accurately send the drive signal, thereby ensuring the use on the low-speed optical fiber, and ensuring the realization of synchronous wave transmission, so as to ensure that the drive signal is characterized without difference, thereby driving the motor to operate.

[0053] See also Figure 8 , Figure 8 1 is a schematic diagram of the structure of an inverter according to an embodiment of the present application. The inverter 100 comprises: a signal processing chip 10 , a main control chip 20 and a driving board 30 .

[0054] The signal processing chip 10 generates a modulated wave. In some embodiments, the signal processing chip 10 may be a DSP chip and a related chip based on FPGA.

[0055] The main control chip 20 is coupled to the signal processing chip 10, receives the modulation wave, and generates a first triangular carrier corresponding to the upper left tube in the H-bridge and a second triangular carrier corresponding to the upper right tube in the H-bridge; and obtains a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube according to the modulation wave, the first triangular carrier and the second triangular carrier; and encodes the first drive signal and the second drive signal to obtain a coded signal; and sends the coded signal to the driving board 30 according to the interval point of the interrupt frequency.

[0056] The driving board 30 is coupled to the main control chip 20 , receives the coded signal, decodes the coded signal, and obtains a first driving signal and a second driving signal.

[0057] In some embodiments, the driving board 30 and the main control chip 20 are connected via an optical fiber.

[0058] In some embodiments, the main control chip 20 obtains a first drive signal corresponding to the upper left tube, a second drive signal corresponding to the upper right tube, a first signal switching duration corresponding to the first drive signal, and a second signal switching duration corresponding to the second drive signal according to the modulation wave, the first triangular carrier and the second triangular carrier within each interrupt frequency.

[0059] In some embodiments, the signal processing chip 10, the main control chip 20 and the driving board 30 cooperate with each other to implement the method of any of the above embodiments. That is, the main control chip 20 can implement the above encoding-related technology, and the driving board 30 can implement the above decoding-related technology.

[0060] The frequency converter mentioned above can be a high frequency transformer or a low frequency transformer or any other known type of transformer.

[0061] In one application scenario, the three-way modulated wave signals processed by the algorithm are sent to the main control FPGA (main control chip 20) through the main control board DSP (signal processing chip 10). After receiving the modulated wave data, the main control FPGA performs subsequent processing.

[0062] In the main controller, the modulation wave sent by the DSP is latched and compared with the triangular carrier in the main controller, the switching state of the drive signal is encoded, the drive opening time is depicted by two time scales TIME1 and TIME2, and then sent down through synchronous communication.

[0063] The encoded driving signal is sent to the unit through a synchronous communication mechanism, and then latched and analyzed in time, and the driving signal is sent to the power driving board (driving board 30) for wave processing.

[0064] In this process, a relatively low-speed optical fiber can be used to connect the driving board 30 and the main control chip 20 to reduce hardware costs.

[0065] In summary, after the main control chip 20 receives the modulated wave and compares it with the doubled triangular carrier, it is calculated by the internal fixed algorithm, and then the drive signal is encoded and sent down according to the interval point of the interrupt frequency. This is also the key to the synchronization idea, which is equivalent to the drive being synchronized once in each interrupt cycle, which greatly eliminates the error caused by clock drift. At the same time, after the drive signal is sampled and encoded with 4 bits of data, it reaches the drive analysis module (drive board 30), which can theoretically restore the drive signal without error. In addition, with the expansion of the number of encoding bits, it can be easily expanded to the sending of three-level drive. This strategy has strong universality.

[0066] See also Fig. 9 , Fig. 9 1 is a schematic diagram of a computer readable storage medium according to an embodiment of the present application. The computer readable storage medium 90 is used to store a computer program 91. When the computer program 91 is executed by a processor, it is used to implement the following method: Receive a modulation wave, a first triangular carrier wave corresponding to the upper left tube in the H-bridge, and a second triangular carrier wave corresponding to the upper right tube in the H-bridge; obtain a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube according to the modulation wave, the first triangular carrier wave, and the second triangular carrier wave; encode the first drive signal and the second drive signal to obtain a coded signal; send the coded signal to the driving board according to the interval point of the interruption frequency, so that the driving board decodes the coded signal to obtain the first drive signal and the second drive signal.

[0067] In some embodiments, when the computer program 91 is executed by a processor, it is also used to implement the method of any of the above embodiments.

[0068] The processor of this embodiment is equivalent to the main control chip 20 mentioned above.

[0069] In summary, the frequency converter 100 and its drive signal processing method, and computer-readable storage medium 90 provided by the present application receive a modulation wave, a first triangular carrier corresponding to the upper left tube in the H-bridge, and a second triangular carrier corresponding to the upper right tube in the H-bridge; according to the modulation wave, the first triangular carrier and the second triangular carrier, a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube are obtained; the first drive signal and the second drive signal are encoded to obtain a coded signal; the coded signal is sent to the drive board 30 according to the interval point of the interruption frequency, so that the drive board 30 decodes the coded signal to obtain the first drive signal and the second drive signal. The cycle-by-cycle encoding of the drive signal can not only ensure the protection of the frequency converter in a short time, but also accurately send the drive signal, thereby ensuring its use on a low-speed optical fiber, and ensuring the realization of synchronous wave transmission, so as to ensure that the drive signal is characterized without distinction, thereby driving the motor to operate.

[0070] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device implementation described above is only illustrative, for example, the division of the modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0071] If the integrated units in the above other embodiments are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art, or all or part of the technical solution. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) or a processing circuit component (processor) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0072] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A method for processing a drive signal of a frequency converter, characterized in that: The driving signal processing method comprises: Receive the modulated wave, the first triangular carrier wave corresponding to the upper left tube in the H-bridge, and the second triangular carrier wave corresponding to the upper right tube in the H-bridge; Obtaining a first driving signal corresponding to the upper left tube and a second driving signal corresponding to the upper right tube according to the modulated wave, the first triangular carrier and the second triangular carrier; Encoding the first drive signal and the second drive signal to obtain a coded signal; The coded signal is sent to the driving board at intervals of the interruption frequency, so that the driving board decodes the coded signal to obtain the first driving signal and the second driving signal.

2. The driving signal processing method according to claim 1, characterized in that: The method of obtaining a first driving signal corresponding to the upper left tube and a second driving signal corresponding to the upper right tube according to the modulated wave, the first triangular carrier and the second triangular carrier includes: Within each of the interruption frequencies, a first drive signal corresponding to the upper left tube, a second drive signal corresponding to the upper right tube, a first signal switching duration corresponding to the first drive signal, and a second signal switching duration corresponding to the second drive signal are obtained according to the modulation wave, the first triangular carrier and the second triangular carrier.

3. The driving signal processing method according to claim 2, characterized in that: The method of sending the coded signal to the driving board at intervals of the interruption frequency so that the driving board decodes the coded signal to obtain the first driving signal and the second driving signal comprises: The coded signal, the first signal switching duration, and the second signal switching duration are sent to the driving board according to the interval points of the interruption frequency, so that the driving board decodes the coded signal according to the first signal switching duration and the second signal switching duration to obtain the first driving signal and the second driving signal.

4. The driving signal processing method according to claim 2, characterized in that: The encoding of the first drive signal and the second drive signal to obtain a coded signal includes: Using the first signal value in the first driving signal as the first bit in the coded signal; using a first signal value in the second drive signal as a second bit in the coded signal; using a second signal value in the first drive signal as a third bit in the coded signal; The second signal value in the second driving signal is used as the fourth bit in the coded signal, thereby obtaining a 4-bit coded signal.

5. The driving signal processing method according to claim 4, characterized in that: The driving board decodes the coded signal, including: Using the first bit in the coded signal as the first signal value in the first drive signal; using the third bit in the coded signal as the second signal value in the first drive signal, to obtain the first drive signal; The second bit in the coded signal is used as the first signal value in the second drive signal; the fourth bit in the coded signal is used as the second signal value in the second drive signal, to obtain the second drive signal.

6. The driving signal processing method according to claim 1, characterized in that: After receiving the modulated wave, the method includes: latching the modulated wave.

7. A frequency converter, characterized in that: The frequency converter comprises: A signal processing chip generates a modulated wave; A main control chip is coupled to the signal processing chip, receives the modulation wave, and generates a first triangular carrier wave corresponding to the upper left tube in the H-bridge and a second triangular carrier wave corresponding to the upper right tube in the H-bridge; and obtains a first drive signal corresponding to the upper left tube and a second drive signal corresponding to the upper right tube according to the modulation wave, the first triangular carrier wave and the second triangular carrier wave; and encodes the first drive signal and the second drive signal to obtain a coded signal; and sends the coded signal to the driving board according to the interval point of the interruption frequency; The driving board is coupled to the main control chip, receives the coded signal, and decodes the coded signal to obtain the first driving signal and the second driving signal.

8. The frequency converter according to claim 7, characterized in that: The driving board and the main control chip are connected via optical fiber.

9. The frequency converter according to claim 7, characterized in that: The main control chip obtains, within each interrupt frequency, a first drive signal corresponding to the upper left tube, a second drive signal corresponding to the upper right tube, a first signal switching duration corresponding to the first drive signal, and a second signal switching duration corresponding to the second drive signal according to the modulation wave, the first triangular carrier and the second triangular carrier.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store a computer program, and when the computer program is executed by a processor, it is used to implement the method according to any one of claims 1 to 6.

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