FC (Fiber Channel) equipment-based SRIO (Serial Radio Input / Output) multichannel communication method and system

Abstract

The invention provides an SRIO (Serial Radio Input / Output) multichannel communication method and system based on FC (Fiber Channel) equipment, provides an SRIO multichannel communication method and system based on the FC equipment by utilizing a programmable and parallel data processing superior platform provided by an FPGA (Field Programmable Gate Array) for protocol conversion, and realizes efficient protocol conversion based on SRIO multichannel communication of the FC equipment by virtue of an FPGA technology. According to the SRIO multi-channel communication method and system based on the FC device, through application of multi-channel sorting, the communication efficiency is further optimized, a communication solution with higher performance and low delay is provided, the method and system are suitable for various high-performance communication systems, and the increasing data exchange and communication requirements are met.

Description

Technical Field

[0001] The present invention relates to the technical field of FC network communication, and in particular to an SRIO multi-channel communication method and system based on FC equipment. Background Art

[0002] Currently, the demand for high performance, multi-channel, and low latency in communication systems continues to grow, and Serial Rapid IO (SRIO) and Fibre Channel (FC) communication protocols play important roles in different fields.

[0003] The SRIO communication protocol is a high-performance serial bus protocol designed to achieve fast and reliable data communication between multiple processors, DSPs (digital signal processors), FPGAs (field programmable gate arrays) and other devices. The SRIO protocol supports multi-channel communication, and the bandwidth of each channel can reach more than 10Gbps, meeting the needs of high-speed data transmission. It is often used in high-performance computing and embedded systems. The FC communication protocol is widely used in storage networks, data centers and high-performance storage. It has the dual advantages of channels and networks, and has high bandwidth, high reliability, high stability, and resistance to electromagnetic interference. It uses optical fiber media as the main connection device to meet the needs of long-distance transmission and protection from electromagnetic interference.

[0004] The conversion method of traditional protocols usually requires dedicated hardware or multiple processing units, which increases the complexity and cost of the system. Taking the conversion between FC protocol and SRIO protocol as an example, the protocol conversion system that relies on dedicated hardware is usually difficult to maintain and upgrade. When it is necessary to add new protocol support or improve the performance of existing protocols, the entire hardware unit needs to be upgraded and replaced. At the same time, multiple processing units used for protocol conversion may lead to waste of resources. Different processing units may be activated at different time points, resulting in uneven utilization of overall system resources, which in turn affects the performance and efficiency of the system. Although the data format and signal conversion between FC and SRIO protocols can be directly processed by hardware conversion (such as dedicated hardware conversion equipment or conversion chips) to achieve high-performance and low-latency conversion, there are also the above-mentioned disadvantages of maintenance and upgrade and resource utilization, and it involves complex hardware design and implementation. Summary of the invention

[0005] In view of the defects and shortcomings of the prior art, according to a first aspect of the present invention, a SRIO multi-channel communication system based on FC equipment is proposed, comprising:

[0006] SRIO_IP core, used to receive SRIO frame data input and convert it into AXIS interface data output;

[0007] SRIO_CTRL control module, used for conversion control between SRIO protocol frames and AXIS interface data, including parsing AXIS interface data and framing data frames based on data of different FC types, and splitting and assembling data based on the parsing results of received FC data packets, and converting them into AXIS interface data and sending them to SRIO_IP core;

[0008] The arbitration module includes a sending arbitration module and a receiving arbitration module, which are used for request arbitration in the sending direction and the receiving direction respectively;

[0009] FLOW_CTRL send / receive control module, used for sending control of data frames after framing, and parsing and buffering of received FC data packets;

[0010] The SRIO_CTRL control module includes a T port as a sending side module, an I port as a receiving side, a sorting module and a framing module; the FLOW_CTRL sending / receiving control module includes a plurality of sending modules corresponding to different FC types;

[0011] In the data transmission direction, the T port is used to parse the AXIS interface data output data and extract the frame header information of the SRIO frame data as a descriptor, and the descriptor includes TID, type, address and data length;

[0012] The sorting module is used to map addresses and channels according to the descriptor, sort according to the TID fields under different channels, send the parsed data to the specified RAM for buffering, determine the FC type of the protocol frame, and add the FC type to the descriptor;

[0013] A framing module, used to frame the data according to the protocol frame format corresponding to the FC type by pre-reading the FC type in the descriptor, and the framed data is sent to the arbitration module, and after arbitration by the sending arbitration module, it is sent out from the sending module corresponding to the FC type;

[0014] In the data receiving direction, the FLOW_CTRL sending / receiving control module receives FC data packets from the FC switching network and obtains data and descriptors after parsing;

[0015] After the receiving arbitration module arbitrates the receiving module, the framing module pre-reads the parsed descriptor, finds the address according to the relationship between the channel and the address, and divides and packages the data according to the length of the data to obtain multiple data packets corresponding to the SRIO frame header, and finally obtains the data frame that complies with the AXIS protocol through I port conversion and sends it to the SRIO_IP core;

[0016] The SRIO_IP core, SRIO_CTRL control module, arbitration module and FLOW_CTRL sending / receiving control module are all configured inside the FPGA of the FC device.

[0017] As an optional implementation, the sorting module is configured to obtain the channel number based on the mapping relationship between the address and the channel number, thereby determining a channel number corresponding to each frame of data. The mapping relationship is configured through a blueprint, and the FPGA of the FC device reads the blueprint flash information for configuration after powering on.

[0018] As an optional implementation, the sorting module is configured to perform sorting and data caching in the following manner:

[0019] Define TID to represent the description field of the unfinished transaction in each source ID / destination ID pair in the SRIO HELLO frame, and sort the HELLO frames according to this field, TID∈[0,255];

[0020] Set up three pointers, namely p_wr, p_rd, and p_rd_next, where p_wr is the write pointer, p_rd is the read pointer, and p_rd_next is the pre-read pointer;

[0021] The TID is used as the data RAM address, and the HELLO frame payload is used as the content of the data RAM, which are stored in the data RAM in sequence;

[0022] Use TID as the address of the tag RAM, 1 or 0 as the content of the tag RAM, the initial tag is 0, when the HELLO frame corresponding to the TID is received, the corresponding content is marked as 1, and when the data is sent to the lower level, the content tag corresponding to the TID is cleared;

[0023] Among them, when it is determined that the corresponding mark contents of the positions pointed to by p_rd and p_rd_next are both 1, the data RAM content at the p_rd position is sent to the lower level, p_rd and p_rd_next are both increased by 1, and the mark contents are cleared at the same time;

[0024] When the tag content corresponding to p_rd is 1 and the tag content corresponding to p_rd_next is 0, stop sending until the write pointer p_wr is about to catch up with p_rd, send the remaining data content at the p_rd position to the lower level, and then add 2 to the p_rd and p_rd_next pointers at the same time to pass the pointer position where no data has been received for a long time; after passing, continue to judge the data reception status according to the previous process to complete the circular sorting operation.

[0025] As an optional implementation, after the sorting module completes the sorting of the data, the data is sent to the Payload fifo of the FLOW_CTRL sending / receiving control module according to different channels for caching, wherein:

[0026] The FC ASM framing module and the FC 818 framing module in the framing module pre-read the descriptors in the Payload fifo respectively to determine whether the cached data corresponds to FC ASM protocol data, FC 818 protocol data, or data sent by both paths;

[0027] After the framing module reads the data, the FC ASM framing module and the FC 818 framing module framing the data according to their respective protocol frame formats. After framing is completed, the data is sent to the sending arbitration module for arbitration. After the data is arbitrated, it is sent out through the corresponding sending modules.

[0028] The FC ASM protocol frames under all channels are arbitrated together, and the FC 818 protocol frames under all channels are arbitrated together.

[0029] According to a second aspect of the present invention, a SRIO multi-channel communication method based on FC equipment is also proposed, comprising the following steps:

[0030] In the data sending direction, after the SRIO_IP core receives the SRIO frame data input, it converts it into AXIS interface data output;

[0031] The T port parses the AXIS interface data output data and extracts the frame header information of the SRIO frame data as a descriptor, wherein the descriptor includes TID, type, address and data length;

[0032] The sorting module maps addresses and channels according to the descriptor, sorts according to the TID fields under different channels, sends the parsed data to the specified RAM for cache, determines the FC type of the protocol frame, and adds the FC type to the descriptor;

[0033] The FC ASM framing module and the FC 818 framing module in the framing module pre-read the descriptors respectively to determine whether the cached data corresponds to FC ASM protocol data, FC 818 protocol data, or data sent by both channels; then the FC ASM framing module and the FC 818 framing module framing the data according to their respective protocol frame formats, and after framing is completed, the data is sent to the sending arbitration module for arbitration. After the data is arbitrated, it is sent out through the corresponding sending modules respectively; among them, the FCASM protocol frames under all channels are arbitrated together, and the FC 818 protocol frames under all channels are arbitrated together;

[0034] In the data receiving direction, the first sending module based on the FC ASM protocol and the second sending module based on the FC 818 protocol in the FLOW_CTRL sending / receiving control module receive FC data packets from the FC switching network and obtain data and descriptors after parsing;

[0035] After the receiving arbitration module arbitrates the receiving module, the framing module pre-reads the parsed descriptor, finds the address according to the relationship between the channel and the address, and divides and packages the data according to the length of the data to obtain multiple data packets corresponding to the SRIO frame header. Finally, the data frame that complies with the AXIS protocol is obtained through I port conversion and sent to the SRIO_IP core.

[0036] As an optional implementation, the sorting module obtains the channel number based on the mapping relationship between the address and the channel number, thereby determining a channel number corresponding to each frame of data, wherein the mapping relationship is configured through a blueprint, and the FPGA of the FC device reads the blueprint flash information for configuration after power-on.

[0037] As an optional implementation, the sorting module is configured to perform sorting and data caching in the following manner:

[0038] Define TID to represent the description field of the unfinished transaction in each source ID / destination ID pair in the SRIO HELLO frame, and sort the HELLO frames according to this field, TID∈[0,255];

[0039] Set up three pointers, namely p_wr, p_rd, and p_rd_next, where p_wr is the write pointer, p_rd is the read pointer, and p_rd_next is the pre-read pointer;

[0040] The TID is used as the data RAM address, and the HELLO frame payload is used as the content of the data RAM, which are stored in the data RAM in sequence;

[0041] Use TID as the address of the tag RAM, 1 or 0 as the content of the tag RAM, the initial tag is 0, when the HELLO frame corresponding to the TID is received, the corresponding content is marked as 1, and when the data is sent to the lower level, the content tag corresponding to the TID is cleared;

[0042] Among them, when it is determined that the corresponding mark contents of the positions pointed to by p_rd and p_rd_next are both 1, the data RAM content at the p_rd position is sent to the lower level, p_rd and p_rd_next are both increased by 1, and the mark contents are cleared at the same time;

[0043] When the tag content corresponding to p_rd is 1 and the tag content corresponding to p_rd_next is 0, stop sending until the write pointer p_wr is about to catch up with p_rd, send the remaining data content at the p_rd position to the lower level, and then add 2 to the p_rd and p_rd_next pointers at the same time to pass the pointer position where no data has been received for a long time; after passing, continue to judge the data reception status according to the previous process to complete the circular sorting operation.

[0044] In combination with the SRIO multi-channel communication method and system based on FC equipment in the above embodiments, the present invention aims to use the superior platform for programmable and parallel data processing provided by FPGA for protocol conversion, and provide a SRIO multi-channel communication method and system based on FC equipment, and realize efficient protocol conversion by means of FPGA technology based on SRIO multi-channel communication of FC equipment. In the SRIO multi-channel communication method and system based on FC equipment proposed by the present invention, the communication efficiency is further optimized through the application of multi-channel sorting, and a communication solution with higher performance and low latency is provided, which is applicable to various high-performance communication systems to meet the growing data exchange and communication needs.

[0045] It should be understood that all combinations of the aforementioned concepts and the additional concepts described in more detail below can be considered as part of the inventive subject matter of the present disclosure as long as such concepts are not mutually inconsistent. In addition, all combinations of the claimed subject matter are considered as part of the inventive subject matter of the present disclosure.

[0046] The foregoing and other aspects, embodiments and features of the present invention can be more fully understood from the following description in conjunction with the accompanying drawings. Other additional aspects of the present invention, such as the features and / or beneficial effects of the exemplary embodiments, will be apparent from the following description or learned from the practice of the specific embodiments according to the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The accompanying drawings are not intended to be drawn to scale. In the accompanying drawings, each identical or nearly identical component shown in each figure may be represented by the same reference numeral. For clarity, not every component is labeled in each figure. Embodiments of various aspects of the present invention will now be described by way of example and with reference to the accompanying drawings.

[0048] Figure 1 is a schematic diagram of a SRIO multi-channel communication system based on FC devices according to an embodiment of the present invention.

[0049] Figure 2 4 is a schematic diagram of a sorting process under a single channel according to an embodiment of the present invention.

[0050] Figure 3The figure is a schematic diagram of a data framing and arbitration process under multiple channels according to an embodiment of the present invention.

[0051] Figure 4 It is a schematic diagram of the data processing flow in the sending direction according to an embodiment of the present invention.

[0052] Figure 5 It is a schematic diagram of the data processing flow in the receiving direction according to an embodiment of the present invention. DETAILED DESCRIPTION

[0053] In order to better understand the technical content of the present invention, specific embodiments are given and described as follows in conjunction with the accompanying drawings.

[0054] Various aspects of the present invention are described in this disclosure with reference to the accompanying drawings, in which many illustrative embodiments are shown. The embodiments of the present disclosure are not necessarily intended to include all aspects of the present invention. It should be understood that the various concepts and embodiments introduced above, as well as those described in more detail below, can be implemented in any of many ways, because the concepts and embodiments disclosed by the present invention are not limited to any implementation. In addition, some aspects disclosed by the present invention can be used alone or in any appropriate combination with other aspects disclosed by the present invention.

[0055] SRIO multi-channel communication system based on FC equipment

[0056] Combination Figure 1 The exemplary FC device-based SRIO multi-channel communication system shown includes a SRIO_IP core, a SRIO_CTRL control module, an arbitration module, and a FLOW_CTRL sending / receiving control module.

[0057] like Figure 1 As shown, the SRIO_IP core is used to receive SRIO frame data input and convert it into AXIS interface data output.

[0058] The SRIO_CTRL control module is used for the conversion control between the SRIO protocol frame and the AXIS interface data, including parsing the AXIS interface data and framing the data frames based on data of different FC types, as well as splitting and assembling the data based on the parsing results of the received FC data packets, and converting them into AXIS interface data and sending them to the SRIO_IP core.

[0059] The arbitration module includes a sending arbitration module and a receiving arbitration module, which are respectively used for request arbitration in the sending direction and the receiving direction.

[0060] The FLOW_CTRL sending / receiving control module is used to control the sending of data frames after framing, and to parse and buffer received FC data packets.

[0061] Combination Figure 1 As shown, the SRIO_CTRL control module includes a T port as a sending side module, an I port as a receiving side, a sorting module and a framing module.

[0062] The FLOW_CTRL transmission / reception control module includes multiple transmission modules corresponding to different FC types.

[0063] In the data transmission direction, the T port is used to parse the AXIS interface data output data and extract the frame header information of the SRIO frame data as a descriptor, wherein the descriptor includes TID, type, address and data length.

[0064] The sorting module is used to map addresses and channels according to the descriptor, and sort according to the TID field under different channels, send the parsed data to the specified RAM for cache, and determine the FC type of the protocol frame and add the FC type to the descriptor.

[0065] The framing module is used to frame the data according to the protocol frame format corresponding to the FC type by pre-reading the FC type in the descriptor. The framed data is sent to the arbitration module, arbitrated by the sending arbitration module, and then sent out from the sending module corresponding to the FC type.

[0066] In the data receiving direction, the FLOW_CTRL sending / receiving control module receives FC data packets from the FC switching network and obtains data and descriptors after parsing.

[0067] After the receiving arbitration module arbitrates the receiving module, the framing module pre-reads the parsed descriptor, finds the address based on the relationship between the channel and the address, and divides and packages the data according to the length of the data to obtain multiple data packets corresponding to the SRIO frame header. Finally, the data frame that complies with the AXIS protocol is obtained through I port conversion and sent to the SRIO_IP core.

[0068] like Figure 1 In the example shown, the SRIO_IP core, the SRIO_CTRL control module, the arbitration module, and the FLOW_CTRL sending / receiving control module are all configured inside the FPGA of the FC device.

[0069] As a preferred embodiment, the sorting module is configured to obtain the channel number based on the mapping relationship between the address and the channel number, thereby determining a channel number corresponding to each frame of data. The mapping relationship is configured through a blueprint, and the FPGA of the FC device reads the blueprint flash information for configuration after powering on.

[0070] As an optional implementation, the framing module includes an FC ASM framing module and an FC 818 framing module;

[0071] FC ASM framing module, used for framing the input data into FC ASM protocol frames according to the FC ASM protocol;

[0072] The FC 818 framing module is used to perform FC 818 protocol frame framing on the input data according to the FC 818 protocol.

[0073] Combination Figure 1 , Figure 3 As shown, taking FC 818 ip and FC ASM ip as examples, the sending modules of different FC types include a first sending module based on the FC ASM protocol and a second sending module based on the FC 818 protocol.

[0074] Combination Figure 2 As shown, the sorting module is configured to perform sorting and data caching in the following manner:

[0075] Define TID to represent the description field of the unfinished transaction in each source ID / destination ID pair in the SRIO HELLO frame, and sort the HELLO frames according to this field, TID∈[0,255];

[0076] Set three pointers, namely p_wr, p_rd, and p_rd_next, where p_wr is the write pointer, p_rd is the read pointer, and p_rd_next is the pre-read pointer;

[0077] The TID is used as the data RAM address, and the HELLO frame payload is used as the content of the data RAM, which are stored in the data RAM in sequence;

[0078] Use TID as the address of the tag RAM, 1 or 0 as the content of the tag RAM, the initial tag is 0, when the HELLO frame corresponding to the TID is received, the corresponding content is marked as 1, and when the data is sent to the lower level, the content tag corresponding to the TID is cleared;

[0079] Among them, when it is determined that the corresponding mark contents of the positions pointed to by p_rd and p_rd_next are both 1, the data RAM content at the p_rd position is sent to the lower level, p_rd and p_rd_next are both increased by 1, and the mark contents are cleared at the same time;

[0080] When the tag content corresponding to p_rd is 1 and the tag content corresponding to p_rd_next is 0, stop sending until the write pointer p_wr is about to catch up with p_rd, send the remaining data content at the p_rd position to the lower level, and then add 2 to the p_rd and p_rd_next pointers at the same time to pass the pointer position where no data has been received for a long time; after passing, continue to judge the data reception status according to the previous process to complete the circular sorting operation.

[0081] Combination Figure 1 , 3 As shown, after the sorting module completes the data sorting, it is sent to the Payload fifo of the FLOW_CTRL send / receive control module for caching according to different channels, where:

[0082] The FC ASM framing module and the FC 818 framing module in the framing module pre-read the descriptors in the Payload fifo respectively to determine whether the cached data corresponds to FC ASM protocol data, FC 818 protocol data, or data sent by both paths;

[0083] After the framing module reads the data, the FC ASM framing module and the FC 818 framing module framing the data according to their respective protocol frame formats. After framing is completed, the data is sent to the sending arbitration module for arbitration. After the data is arbitrated, it is sent out through the corresponding sending modules.

[0084] The FC ASM protocol frames under all channels are arbitrated together, and the FC 818 protocol frames under all channels are arbitrated together.

[0085] Among them, combined Figure 4 As shown, the T module is also configured to decide whether to return the packet to the SRIO_IP core according to whether the received data packet is a non-write type or a write type return packet.

[0086] SRIO multi-channel communication method based on FC equipment

[0087] Combination Figure 1 , 2 , 3, 4, and 5, the SRIO multi-channel communication method based on FC devices disclosed in the present invention includes the following steps:

[0088] In the data sending direction, after the SRIO_IP core receives the SRIO frame data input, it converts it into AXIS interface data output;

[0089] The T port parses the AXIS interface data output data and extracts the frame header information of the SRIO frame data as a descriptor, wherein the descriptor includes TID, type, address and data length;

[0090] The sorting module maps addresses and channels according to the descriptor, sorts according to the TID fields under different channels, sends the parsed data to the specified RAM for cache, determines the FC type of the protocol frame, and adds the FC type to the descriptor;

[0091] The FC ASM framing module and the FC 818 framing module in the framing module pre-read the descriptors respectively to determine whether the cached data corresponds to FC ASM protocol data, FC 818 protocol data, or data sent by both channels; then the FC ASM framing module and the FC 818 framing module framing the data according to their respective protocol frame formats, and after framing is completed, the data is sent to the sending arbitration module for arbitration. After the data is arbitrated, it is sent out through the corresponding sending modules respectively; among them, the FCASM protocol frames under all channels are arbitrated together, and the FC 818 protocol frames under all channels are arbitrated together;

[0092] In the data receiving direction, the first sending module based on the FC ASM protocol and the second sending module based on the FC 818 protocol in the FLOW_CTRL sending / receiving control module receive FC data packets from the FC switching network and obtain data and descriptors after parsing;

[0093] After the receiving arbitration module arbitrates the receiving module, the framing module pre-reads the parsed descriptor, finds the address according to the relationship between the channel and the address, and divides and packages the data according to the length of the data to obtain multiple data packets corresponding to the SRIO frame header. Finally, the data frame that complies with the AXIS protocol is obtained through I port conversion and sent to the SRIO_IP core.

[0094] As an optional implementation, the sorting module obtains the channel number based on the mapping relationship between the address and the channel number, thereby determining a channel number corresponding to each frame of data, wherein the mapping relationship is configured through a blueprint, and the FPGA of the FC device reads the blueprint flash information for configuration after power-on.

[0095] As an optional implementation, combining Figure 2 As shown, the sorting module is configured to perform sorting and data caching in the following manner:

[0096] Define TID to represent the description field of the unfinished transaction in each source ID / destination ID pair in the SRIO HELLO frame, and sort the HELLO frames according to this field, TID∈[0,255];

[0097] Set up three pointers, namely p_wr, p_rd, and p_rd_next, where p_wr is the write pointer, p_rd is the read pointer, and p_rd_next is the pre-read pointer;

[0098] The TID is used as the data RAM address, and the HELLO frame payload is used as the content of the data RAM, which are stored in the data RAM in sequence;

[0099] Use TID as the address of the tag RAM, 1 or 0 as the content of the tag RAM, the initial tag is 0, when the HELLO frame corresponding to the TID is received, the corresponding content is marked as 1, and when the data is sent to the lower level, the content tag corresponding to the TID is cleared;

[0100] Among them, when it is determined that the corresponding mark contents of the positions pointed to by p_rd and p_rd_next are both 1, the data RAM content at the p_rd position is sent to the lower level, p_rd and p_rd_next are both increased by 1, and the mark contents are cleared at the same time;

[0101] When the tag content corresponding to p_rd is 1 and the tag content corresponding to p_rd_next is 0, stop sending until the write pointer p_wr is about to catch up with p_rd, send the remaining data content at the p_rd position to the lower level, and then add 2 to the p_rd and p_rd_next pointers at the same time to pass the pointer position where no data has been received for a long time; after passing, continue to judge the data reception status according to the previous process to complete the circular sorting operation.

[0102] Example 1

[0103] In this example, the overall logic of the SRIO multi-channel communication system based on FC devices is as follows: Figure 1 shown.

[0104] Data transmission

[0105] Combination Figure 1 As shown, the direction from SRIO IP to FLOW CTRL is the data sending direction, that is, the direction from left to right in the figure is the data sending direction.

[0106] Data flows into the FPGA through the SRIO protocol frame, is converted into a data stream through the SRIO_IP core, and is sent to the T port for frame parsing. The descriptor information in the frame header is extracted, and the address information in the frame header is used to map the channel number (it should be understood that the mapping relationship is configured through the blueprint, and the FPGA reads the blueprint flash information for configuration after power-on) to obtain the channel number. Therefore, each frame of data corresponds to a channel number.

[0107] The parsed data is sorted by TID according to different channel numbers in the sorting module (TID is the descriptor in the frame header, which is incremented for each channel). After sorting, it enters the arbitration module for arbitration, and distributes one copy of the data to two channels for different FC protocol framing (FC ASM and FC 818 protocols are used as examples for description, and other FC protocol frames can also be used), and finally sent to the opposite device through the sending module to complete the data transmission in the sending direction.

[0108] Data Reception

[0109] Combination Figure 1 As shown, the direction from FLOW CTRL to SRIO_IP core, that is, from right to left in the diagram, is the data receiving direction.

[0110] After the data from the FC switching network is received by the receiving module, the protocol frame is parsed. After the parsing is completed, the arbitration module arbitrates the two data paths. After the arbitration is completed, it is sent to the framing module. According to different FC types, the data packets are split and assembled respectively, and the data length is divided into payloads that conform to the SRIO data length. Each payload corresponds to a frame header. The data is converted into a data frame that conforms to the AXIS protocol through the I port and sent to the SRIO_IP core. Finally, the SRIO_IP core sends it out to complete the data transmission in the receiving direction.

[0111] Sorting

[0112] Combination Figure 1 , 2 In an embodiment of the present invention, TID is a description field of unfinished transactions in each pair of source ID / tag ID in the SRIO HELLO frame, and the HELLO frames are sorted according to this field.

[0113] Set three pointers, p_wr, p_rd, and p_rd_next, where p_wr is the write pointer, p_rd is the read pointer, and p_rd_next is the pre-read pointer.

[0114] exist Figure 2 In the example shown, TID∈[0,255] is used for description, TID is used as the data RAM address, and the HELLO frame payload is stored in the data RAM in sequence as the content of the data RAM.

[0115] Similarly, TID is used as the address of the tag RAM, and 1 or 0 is used as the content of the tag RAM. The initial tag is 0. When the HELLO frame corresponding to the TID is received, the corresponding content is marked as 1. When the data is sent to the lower level, the content tag corresponding to the TID is cleared.

[0116] When it is determined that the corresponding mark contents of the positions pointed to by p_rd and p_rd_next are both 1, the data RAM content at the p_rd position is sent to the downstream, p_rd and p_rd_next are both increased by 1, and the mark content is cleared at the same time; when the mark content corresponding to p_rd is 1 and the mark content corresponding to p_rd_next is 0, the sending is stopped until the write pointer p_wr is about to catch up with p_rd (indicating timeout / fifo is almost full, the difference can be set), the remaining data content at the p_rd position is sent to the downstream, and then the p_rd and p_rd_next pointers are increased by 2 at the same time, passing the pointer position where no data has been received for a long time.

[0117] After crossing, continue to judge the data reception status according to the previous process to complete the cycle.

[0118] In combination with the embodiment of the present invention, the advantage of using this sorting method is that due to hardware design defects, the TIDs under a single channel may not be continuous and may jump, such as Figure 2 As shown in c, when TID is 254, it is not received (the blue mark indicates that the TID is received, and the white mark indicates that it is not received). At this time, if the counting timeout is used, the time deviation of the counting timeout will be relatively large after the reference clock used changes. By using the write pointer and the read pointer difference calculation method, excessive time deviation can be avoided, while leaving a buffer margin to wait for the missing TID to be received.

[0119] Data Framing and Arbitration

[0120] The data framing and arbitration process under multiple channels is as follows Figure 3 As shown, after the data is sorted, it is sent to the Payload fifo for caching according to different channels.

[0121] The FC ASM framing module and the FC 818 framing module will pre-read the descriptors in the Payload fifo to determine whether the data is FC ASM data, FC 818 data, or data sent on both routes (data sent on both routes requires one copy of the data to be sent to the ASM and 818 respectively).

[0122] After reading the data, the framing module frames it according to the respective protocol frame formats. After framing is completed, a completion signal is sent to the arbitration module. The ASM protocol frames under all channels are arbitrated together, and the 818 protocol frames under all channels are arbitrated together. After the data is arbitrated, the data frame is sent out through the ASM IP and 818 IP.

[0123] In the example of the present invention, arbitration can be implemented by using an existing algorithm. For example, a balancing algorithm is used, and the weight in the algorithm can be configured (the higher the weight, the more times it is read), or an adaptive method of port traffic is used (the weight in the next time T is determined based on the traffic in time T. When the weights of each channel are the same during initialization, polling is used to read).

[0124] Data transmission

[0125] The data processing flow in the sending direction is as follows Figure 4 shown.

[0126] In the sending direction, there is a 256B SRIO frame data flowing in, then it enters the SRIO_IP core and is converted into AXIS interface data output. The data enters the T module, which converts the AXIS interface data into a normal data stream and extracts the information in the SRIO frame header as a subsequent descriptor, which includes TID, type, address, and data length information.

[0127] The data and descriptors are placed in the cache respectively. At the same time, the T module also determines whether to return the packet to the SRIO_IP core according to the type.

[0128] The lower-level sorting module will pre-read the descriptor, map the address and channel of the descriptor, and send the 256B data to the specified RAM for cache according to the TID field under different channels.

[0129] After the sorting is completed, the 256B data and the new descriptor are stored in the cache respectively, and the FC type is added to the descriptor based on the data content.

[0130] Flow ctrl pre-reads the descriptor and writes the data into different framing modules according to the type of FC. When the framing module reads n 256 and completes a data packet of the length of an FC frame, it will write the completed data frame into the cache and wait for arbitration.

[0131] When arbitration is hit, the corresponding data frame is read out and sent out through FC ASM ip and FC818 ip.

[0132] The special case is that in the sorting module, two pointers are used to determine whether to send data. The way to send the data of the last frame is based on the eop field in the data descriptor. Since the SRIO protocol frame does not contain sop and eop, the start and end of the frame definition are added to the data. 4B is used to represent sop and 4B represents eop. In addition, the data also defines the format, type, length, number of rows and other information of the FC 818 image.

[0133] Data Reception

[0134] The data processing flow in the receiving direction is as follows: Figure 5 shown.

[0135] In the receiving direction, there is an FC ASM data packet with a payload length of 2096B. After being parsed by the FC ASM IP, the SID, DID, MSG ID, frame length and other information are obtained through the frame header. The MSG ID here is used as the channel number, and the descriptor and data are stored in different caches respectively.

[0136] After being selected by the arbitration module, the descriptor is pre-read by the framing module, and the address is found according to the relationship between the channel number and the SRIO address. According to the length of the data payload, the data is divided into 8 256B and 1 48B data packets that comply with the SRIO protocol. It should be understood that these 9 data packets correspond to 9 SRIO frame headers, and the TID field is managed according to the channel number. Finally, they are read by the I port and converted into data frames that comply with the AXIS protocol and sent to the SRIO_IP core. Finally, the SRIO_IP core sends it out to complete the data transmission in the receiving direction.

[0137] Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. A person with ordinary knowledge in the technical field to which the present invention belongs may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the definition of the claims.

Claims

1. An SRIO multi-channel communication system based on FC equipment, characterized in that: include: SRIO_IP core, used to receive SRIO frame data input and convert it into AXIS interface data output; SRIO_CTRL control module, used for conversion control between SRIO protocol frames and AXIS interface data, including parsing AXIS interface data and framing data frames based on data of different FC types, and splitting and assembling data based on the parsing results of received FC data packets, and converting them into AXIS interface data and sending them to SRIO_IP core; An arbitration module, including a sending arbitration module and a receiving arbitration module, which are used for request arbitration in the sending direction and the receiving direction respectively; FLOW_CTRL send / receive control module, used for sending control of data frames after framing, and parsing and buffering of received FC data packets; The SRIO_CTRL control module includes a T port as a sending side module, an I port as a receiving side, a sorting module and a framing module; the FLOW_CTRL sending / receiving control module includes a plurality of sending modules corresponding to different FC types; In the data transmission direction, the T port is used to parse the AXIS interface data output data and extract the frame header information of the SRIO frame data as a descriptor, and the descriptor includes TID, type, address and data length; The sorting module is used to map addresses and channels according to the descriptor, sort according to the TID fields under different channels, send the parsed data to the specified RAM for buffering, determine the FC type of the protocol frame, and add the FC type to the descriptor; A framing module, used to frame the data according to the protocol frame format corresponding to the FC type by pre-reading the FC type in the descriptor, and the framed data is sent to the arbitration module, and after arbitration by the sending arbitration module, it is sent out from the sending module corresponding to the FC type; In the data receiving direction, the FLOW_CTRL sending / receiving control module receives FC data packets from the FC switching network and obtains data and descriptors after parsing; After the receiving arbitration module arbitrates the receiving module, the framing module pre-reads the parsed descriptor, finds the address according to the relationship between the channel and the address, and divides and packages the data according to the length of the data to obtain multiple data packets corresponding to the SRIO frame header, and finally obtains the data frame that complies with the AXIS protocol through I port conversion and sends it to the SRIO_IP core; The SRIO_IP core, SRIO_CTRL control module, arbitration module and FLOW_CTRL sending / receiving control module are all configured inside the FPGA of the FC device.

2. The SRIO multi-channel communication system based on FC equipment according to claim 1, characterized in that: The sorting module is configured to obtain the channel number based on a mapping relationship between the address and the channel number, thereby determining a channel number corresponding to each frame of data.

3. The SRIO multi-channel communication system based on FC equipment according to claim 2, characterized in that: The mapping relationship is configured through a blueprint, and the FPGA of the FC device reads the blueprint flash information for configuration after being powered on.

4. The SRIO multi-channel communication system based on FC equipment according to claim 1, characterized in that: The framing module includes an FC ASM framing module and an FC 818 framing module; FC ASM framing module, used for framing the input data into FC ASM protocol frames according to the FC ASM protocol; The FC 818 framing module is used to perform FC 818 protocol frame framing on the input data according to the FC 818 protocol.

5. The SRIO multi-channel communication system based on FC equipment according to claim 1, characterized in that: The sending modules of different FC types include a first sending module based on the FC ASM protocol and a second sending module based on the FC 818 protocol.

6. The SRIO multi-channel communication system based on FC equipment according to claim 1, characterized in that: The sorting module is configured to perform sorting and data caching in the following manner: Define TID to represent the description field of the unfinished transaction in each source ID / destination ID pair in the SRIO HELLO frame, and sort the HELLO frames according to this field, TID∈[0,255]; Set up three pointers, namely p_wr, p_rd, and p_rd_next, where p_wr is the write pointer, p_rd is the read pointer, and p_rd_next is the pre-read pointer; The TID is used as the data RAM address, and the HELLO frame payload is used as the content of the data RAM, which are stored in the data RAM in sequence; Use TID as the address of the tag RAM, 1 or 0 as the content of the tag RAM, the initial tag is 0, when the HELLO frame corresponding to the TID is received, the corresponding content is marked as 1, and when the data is sent to the lower level, the content tag corresponding to the TID is cleared; Among them, when it is determined that the corresponding mark contents of the positions pointed to by p_rd and p_rd_next are both 1, the data RAM content at the p_rd position is sent to the lower level, p_rd and p_rd_next are both increased by 1, and the mark contents are cleared at the same time; When the tag content corresponding to p_rd is 1 and the tag content corresponding to p_rd_next is 0, stop sending until the write pointer p_wr is about to catch up with p_rd, send the remaining data content at the p_rd position to the lower level, and then add 2 to the p_rd and p_rd_next pointers at the same time to pass the pointer position where no data has been received for a long time; after passing, continue to judge the data reception status according to the previous process to complete the circular sorting operation.

7. The SRIO multi-channel communication system based on FC equipment according to claim 1, characterized in that: After the sorting module completes the sorting of the data, it is sent to the Payloadfifo of the FLOW_CTRL send / receive control module for caching according to different channels, where: The FC ASM framing module and the FC 818 framing module in the framing module pre-read the descriptors in the Payload fifo respectively to determine whether the cached data corresponds to FC ASM protocol data, FC 818 protocol data, or data sent by both paths; After the framing module reads the data, the FC ASM framing module and the FC 818 framing module framing the data according to their respective protocol frame formats. After framing is completed, the data is sent to the sending arbitration module for arbitration. After the data is arbitrated, it is sent out through the corresponding sending modules. The FC ASM protocol frames under all channels are arbitrated together, and the FC 818 protocol frames under all channels are arbitrated together.

8. The SRIO multi-channel communication system based on FC equipment according to claim 7, characterized in that: The T module is also configured to decide whether to return a packet to the SRIO_IP core according to whether the received data packet is a non-write type or a write type return packet.

9. A SRIO multi-channel communication method based on FC devices based on the SRIO multi-channel communication system based on FC devices according to any one of claims 1 to 8, characterized in that: The following steps are involved: In the data sending direction, after the SRIO_IP core receives the SRIO frame data input, it converts it into AXIS interface data output; The T port parses the AXIS interface data output data and extracts the frame header information of the SRIO frame data as a descriptor, wherein the descriptor includes TID, type, address and data length; The sorting module maps addresses and channels according to the descriptor, sorts according to the TID fields under different channels, sends the parsed data to the specified RAM for cache, determines the FC type of the protocol frame, and adds the FC type to the descriptor; The FC ASM framing module and the FC 818 framing module in the framing module pre-read the descriptors respectively to determine whether the cached data corresponds to FC ASM protocol data, FC 818 protocol data, or data sent by both channels; then the FC ASM framing module and the FC 818 framing module framing the data according to their respective protocol frame formats, and after framing is completed, the data is sent to the sending arbitration module for arbitration. After the data is arbitrated, it is sent out through the corresponding sending modules respectively; among them, the FC ASM protocol frames under all channels are arbitrated together, and the FC 818 protocol frames under all channels are arbitrated together; In the data receiving direction, the first sending module based on the FC ASM protocol and the second sending module based on the FC 818 protocol in the FLOW_CTRL sending / receiving control module receive FC data packets from the FC switching network and obtain data and descriptors after parsing; After the receiving arbitration module arbitrates the receiving module, the framing module pre-reads the parsed descriptor, finds the address according to the relationship between the channel and the address, and divides and packages the data according to the length of the data to obtain multiple data packets corresponding to the SRIO frame header. Finally, the data frame that complies with the AXIS protocol is obtained through I port conversion and sent to the SRIO_IP core.

10. The SRIO multi-channel communication method based on FC equipment according to claim 9, characterized in that: The sorting module obtains the channel number based on the mapping relationship between the address and the channel number, thereby determining a channel number corresponding to each frame of data, wherein the mapping relationship is configured through a blueprint, and the FPGA of the FC device reads the blueprint flash information for configuration after power-on.

11. The SRIO multi-channel communication method based on FC equipment according to claim 9 or 10, characterized in that: The sorting module is configured to perform sorting and data caching in the following manner: Define TID to represent the description field of the unfinished transaction in each source ID / destination ID pair in the SRIO HELLO frame, and sort the HELLO frames according to this field, TID∈[0,255]; Set up three pointers, namely p_wr, p_rd, and p_rd_next, where p_wr is the write pointer, p_rd is the read pointer, and p_rd_next is the pre-read pointer; The TID is used as the data RAM address, and the HELLO frame payload is used as the content of the data RAM, which are stored in the data RAM in sequence; Use TID as the address of the tag RAM, 1 or 0 as the content of the tag RAM, the initial tag is 0, when the HELLO frame corresponding to the TID is received, the corresponding content is marked as 1, and when the data is sent to the lower level, the content tag corresponding to the TID is cleared; Among them, when it is determined that the corresponding mark contents of the positions pointed to by p_rd and p_rd_next are both 1, the data RAM content at the p_rd position is sent to the lower level, p_rd and p_rd_next are both increased by 1, and the mark contents are cleared at the same time; When the tag content corresponding to p_rd is 1 and the tag content corresponding to p_rd_next is 0, stop sending until the write pointer p_wr is about to catch up with p_rd, send the remaining data content at the p_rd position to the lower level, and then add 2 to the p_rd and p_rd_next pointers at the same time to pass the pointer position where no data has been received for a long time; after passing, continue to judge the data reception status according to the previous process to complete the circular sorting operation.

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