Hollow antenna substrate applied to antenna packaging and manufacturing method thereof

Abstract

The invention discloses a hollow antenna substrate and a manufacturing method thereof. The hollow antenna substrate at least comprises three layers of substrate structures. The first layer substrate is provided with a first patterned metal layer and a first dielectric layer, the first patterned metal layer is embedded in the first dielectric layer, and a first upper surface and a first lower surface of the first patterned metal layer are exposed out of the first dielectric layer. The second layer substrate is stacked on the first layer substrate and is provided with a second dielectric layer, and a second patterned hollow part is arranged in the second dielectric layer. The third layer substrate is stacked on the second layer substrate and is provided with a third patterned metal layer and a third dielectric layer, the third patterned metal layer is embedded in the third dielectric layer, and a third upper surface and a third lower surface of the third patterned metal layer are exposed. In the hollow antenna substrate, the second patterned hollow part forms a hollow structure.

Description

Technical Field

[0001] The present invention relates to an antenna structure and a manufacturing method thereof, and particularly to a hollow antenna substrate applied to high-frequency antenna packaging and a manufacturing method thereof. Background Art

[0002] Antenna-in-Package (AiP) integrates a radio frequency chip (transceiver) and an antenna in a single package. Its main advantages include shorter interconnection between the antenna and the radio frequency chip, reduced system design difficulty, and reduced form factor, and its electrical performance is superior to that of traditional discrete antenna devices.

[0003] Please refer to Figure 1 As shown, in an existing antenna package 90, an upper substrate 92 is disposed on a lower substrate 91, and a first metal layer 93 and a second metal layer 94 are respectively disposed on an upper surface 911 of the lower substrate 91 and an upper surface 921 of the upper substrate 92. In the design of the antenna, both the upper substrate 91 and the lower substrate 92 must use expensive high-frequency dielectric materials. However, for this high-frequency dielectric material, its dielectric constant (Dk) is greater than "1" and its loss factor (Df) is greater than "0", so there will be antenna signal loss phenomena, making it difficult to achieve the best performance of the antenna, and the cost of dielectric materials applied to higher frequencies is higher.

[0004] In addition, please refer to Figure 2 As shown, in another existing antenna package 80, a first metal layer 82 is disposed on an upper surface 811 of a lower substrate 81, a second metal layer 84 is disposed on an upper surface 831 of an upper substrate 83, and the lower substrate 81 and the upper substrate 83 are bonded through solder balls 85. The solder balls 85 can form an air gap between the lower substrate 81 and the upper substrate 83. In this architecture, although the best effect with a loss factor of "0" can be obtained by using air as the air dielectric layer, there is still a part of the upper substrate 83 between the first metal layer 82 and the second metal layer 84 in addition to the air dielectric layer, so the loss factor can only be partially improved; furthermore, since the second metal layer 84 is disposed on the upper substrate 83, the upper substrate 83 still has to use expensive high-frequency dielectric materials, and the height of the air gap depends on the height of the solder balls 85, so position deviation is likely to occur in the process of processing, thus still reducing the antenna performance. In addition, this kind of antenna package usually can only fabricate one layer of antenna. If more layers are to be added, they must be assembled layer by layer, resulting in disadvantages such as complicated assembly processes, high cost, large space occupation, and signal interference.

[0005] Therefore, how to provide a hollow antenna substrate applied to antenna packaging and a manufacturing method thereof, so that it is easy to design an antenna with better performance and is not affected by process factors and quality, is one of the important current topics. Summary of the Invention

[0006] In view of the above, an object of the present invention is to provide a hollow antenna substrate applied to antenna packaging and a manufacturing method thereof, which can fabricate a hollow antenna substrate through semiconductor process technology to improve process and product precision. The hollow antenna substrate can form an antenna package containing an antenna after being connected to a ready-made packaging carrier, thereby simplifying the process and saving costs.

[0007] To achieve the above object, a manufacturing method of a hollow antenna substrate of the present invention includes the following steps. (A) Provide a carrier plate. (B) Provide a patterned metal layer on the carrier plate. (C) Provide a dielectric layer on the carrier plate to cover the patterned metal, and expose an upper surface of the patterned metal layer. (D) Provide a patterned protective layer on a partial surface of the upper surface of the patterned metal layer to form a semi-finished substrate. (E) Repeat the above steps (B) to (D) multiple times, wherein the carrier plate in step (B) is replaced by the semi-finished substrate formed after the previous step (D), and multiple layers of stacked semi-finished substrates are formed. (F) Remove the carrier plate. (G) Cover the partial surfaces of the patterned metal layers on both outer sides of the multiple layers of stacked semi-finished substrates with a patterned protective layer. (H) Remove the metal material of the partial patterned metal layer that is not covered and protected by the patterned protective layer to form a hollow antenna substrate with a hollow structure.

[0008] In addition, to achieve the above object, another manufacturing method of a hollow antenna substrate of the present invention includes the following steps. (A) Provide a carrier plate. (B) Provide a patterned metal layer on the carrier plate, and the patterned metal layer has an upper surface and a corresponding lower surface. (C) Provide a dielectric layer on the carrier plate to cover the patterned metal, and expose an upper surface of the patterned metal layer. (D) Remove the carrier plate and expose the lower surface of the patterned metal layer. (E) Form a patterned protective layer on a partial upper surface and a partial lower surface of the patterned metal layer. (F) Remove the metal material of the patterned metal layer that is not covered by the patterned protective layer to form a semi-finished product with a hollow portion. (G) Repeat the above steps (A) to (F) multiple times to form multiple semi-finished products. (H) Stack and bond multiple semi-finished products together to form a hollow antenna substrate with a hollow structure.

[0009] Furthermore, multiple semi-finished products are connected to each other through a thin adhesive.

[0010] Furthermore, to achieve the above object, the present invention further provides a hollow antenna substrate, which includes a first layer substrate, a second layer substrate, and a third layer substrate stacked on top of each other. The first layer substrate has a first patterned metal layer and a first dielectric layer, wherein the first patterned metal layer is embedded in the first dielectric layer, and a first upper surface and a first lower surface of the first patterned metal layer are exposed on the upper surface and the lower surface of the first dielectric layer, and the first dielectric layer has a first patterned hollow portion penetrating through its upper surface and lower surface. The second layer substrate is stacked on the first layer substrate and has a second patterned metal layer and a second dielectric layer, wherein the second patterned metal layer is embedded in the second dielectric layer, and a second upper surface and a second lower surface of the second patterned metal layer are exposed on the upper surface and the lower surface of the second dielectric layer, and the second dielectric layer has a second patterned hollow portion penetrating through its upper surface and lower surface. The third layer substrate is stacked on the second layer substrate and has a third patterned metal layer and a third dielectric layer, wherein the third patterned metal layer is embedded in the third dielectric layer, and a third upper surface and a third lower surface of the third patterned metal layer are exposed on the upper surface and the lower surface of the third dielectric layer, and the third dielectric layer has a third patterned hollow portion penetrating through its upper surface and lower surface. In the aforementioned hollow antenna substrate, the first patterned hollow portion, the second patterned hollow portion, and the third patterned hollow portion communicate to form a hollow structure.

[0011] Further, a patterned protective layer is provided on each of the first upper surface and the first lower surface of the first patterned metal layer and the third upper surface and the third lower surface of the third patterned metal layer.

[0012] Further, a part of the first patterned metal layer overlapping with the third patterned metal layer forms an antenna unit, and there is a second patterned hollow portion with a space and hollow between the first patterned metal layer and the third patterned metal layer.

[0013] Further, the first dielectric layer of the first layer substrate has a first patterned hollow portion that penetrates through the upper surface and the lower surface of the first layer substrate, the third dielectric layer of the third layer substrate has a third patterned hollow portion that penetrates through the upper surface and the lower surface of the third dielectric layer, and the second layer substrate further has a second patterned metal layer, the second patterned metal layer is embedded in the second dielectric layer, and a second upper surface and a second lower surface of the second patterned metal layer are exposed on an upper surface and a lower surface of the second dielectric layer.

[0014] Further, it further includes: a fourth layer substrate stacked on the third layer substrate, having a fourth dielectric layer, and the fourth dielectric layer has a fourth patterned hollow portion that penetrates through the upper surface and the lower surface of the fourth dielectric layer.

[0015] Further, it further includes: a fifth-layer substrate, stacked on the fourth-layer substrate, having a fifth patterned metal layer and a fifth dielectric layer, wherein the fifth patterned metal layer is embedded in the fifth dielectric layer, and a fifth upper surface and a fifth lower surface of the fifth patterned metal layer are exposed on the upper surface and the lower surface of the fifth dielectric layer, and the fifth dielectric layer has a fifth patterned hollow portion that penetrates the upper surface and the lower surface of the fifth dielectric layer.

[0016] Further, a portion where the first patterned metal layer overlaps with the fifth patterned metal layer forms an antenna unit, and second patterned hollow portions, third patterned hollow portions, and fourth patterned hollow portions are spaced apart and hollowed between the first patterned metal layer and the fifth patterned metal layer.

[0017] Further, a patterned protective layer is disposed on each of the fifth upper surface and the fifth lower surface of the fifth patterned metal layer.

[0018] As described above, the hollow antenna substrate and its manufacturing method of the present invention form an antenna in a semiconductor package structure, and utilize the characteristics that the dielectric constant (Dk) of the air in the hollow structure is "1" and the loss factor (Df) is "0", so that it is easy to design an antenna with excellent electrical performance and high efficiency, and the formed hollow antenna substrate can be easily combined with a semiconductor package carrier, thus simplifying the process of the package carrier containing the antenna. In addition, the hollow antenna substrate and its manufacturing method of the present invention can easily fabricate a multi-layer hollow antenna. Description of the Drawings

[0019] The present invention will be further described in detail below with reference to the drawings and specific embodiments.

[0020] Figure 1 It is a schematic diagram of an existing antenna package; Figure 2 It is a schematic diagram of another existing antenna package; Figure 3 A cross-sectional schematic diagram of an antenna package including a hollow antenna substrate according to a preferred embodiment of the present invention; Figures 4A through 4U A schematic structural diagram corresponding to the manufacturing process of the hollow antenna substrate according to the first embodiment of the present invention; Figures 5A through 5E The manufacturing method of the hollow antenna substrate according to the second embodiment of the present invention, wherein it is a schematic structural diagram corresponding to the manufacturing process of the first semi-finished product; Figures 6A through 6E The manufacturing method of the hollow antenna substrate according to the second embodiment of the present invention, wherein it is a schematic structural diagram corresponding to the manufacturing process of the second semi-finished product; Figures 7A through 7EMethod for manufacturing a hollow antenna substrate according to the second embodiment of the present invention, where the structural schematic diagram corresponding to the manufacturing process of the third semi-finished product; Figures 8A through 8E Method for manufacturing a hollow antenna substrate according to the second embodiment of the present invention, where the structural schematic diagram corresponding to the manufacturing process of the fourth semi-finished product; Figures 9A through 9E Method for manufacturing a hollow antenna substrate according to the second embodiment of the present invention, where the structural schematic diagram corresponding to the manufacturing process of the fifth semi-finished product; Figure 10 Method for manufacturing a hollow antenna substrate according to the second embodiment of the present invention, the structural schematic diagram of the hollow antenna substrate formed by combining all semi-finished products.

[0021] Description of reference numerals 80, 90: Antenna package; 39: Carrier plate; 81, 91: Lower substrate; 83, 92: Upper substrate; 811, 831, 911, 921: Upper surface; 82, 93: First metal; 84, 94: Second metal; 85: Solder ball; 491: First carrier plate; 492: Second carrier plate; 493: Third carrier plate; 494: Fourth carrier plate; 495: Fifth carrier plate; 20, 30, 40: Hollow antenna substrate; 21: First layer substrate; 211, 311, 411: First patterned metal layer; 3111, 4111: First upper surface; 3112, 4112: First lower surface; 212, 312, 412: First dielectric layer; 213, 413: First patterned hollow part; 214, 314, 414: First patterned protective layer; 22: Second layer substrate; 221, 321, 421: Second patterned metal layer; 3211, 4211: Second upper surface; 4212: Second lower surface; 222, 322, 422: Second dielectric layer; 223,423: The second patterned hollow portion; 224,324,424: The second patterned protective layer; 23: The third substrate layer; 231,331,431: The third patterned metal layer; 3311,4311: The third upper surface; 4312: The third lower surface; 232,432: The third dielectric layer; 233,433: The third patterned hollow portion; 234,334,434: The third patterned protective layer; 24: The fourth substrate layer; 341,441: The fourth patterned metal layer; 3411,4411: The fourth upper surface; 4412: The fourth lower surface; 242,342,442: The fourth dielectric layer; 243,443: The fourth patterned hollow portion; 25: The fifth substrate layer; 251,351,451: The fifth patterned metal layer; 3511,4511: The fifth upper surface; 4512: The fifth lower surface; 252,352,452: The fifth dielectric layer; 253,453: The fifth patterned hollow portion; 254,354,454: The fifth patterned protective layer; 26: The wafer; 27: The package substrate; 271: The electrical connection pad; 28: The conductive bump; 29: The conductive connection element; 47: The thin adhesive; AN1: The first antenna; AN2: The second antenna; AN3: The third antenna. Detailed implementation

[0022] In order to enable those skilled in the art to understand the content of the present invention and implement it accordingly, the following is described in conjunction with the preferred embodiments and the accompanying drawings.

[0023] Please refer to Figure 3, a hollow antenna substrate 20 according to a preferred embodiment of the present invention includes a first layer substrate 21, a second layer substrate 22, a third layer substrate 23, a fourth layer substrate 24, and a fifth layer substrate 25 stacked on top of each other.

[0024] The first layer substrate 21 has a first patterned metal layer 211, a first dielectric layer 212, a first patterned hollow portion 213, and a first patterned protective layer 214. The first patterned metal layer 211 is embedded in the first dielectric layer 212, and the first upper surface and the first lower surface of the first patterned metal layer 211 are respectively exposed on the upper surface and the lower surface of the first dielectric layer 212. In addition, a first patterned protective layer 214 also covers a part of the upper surface and a part of the lower surface of the first layer substrate 21. Furthermore, the first patterned hollow portion 213 is provided in the first dielectric layer 212, and it can be provided at a distance from the first patterned metal layer 211.

[0025] The second layer substrate 22 is stacked on the first layer substrate 21 and has a second patterned metal layer 221, a second dielectric layer 222, a second patterned hollow portion 223, and a second patterned protective layer 224. The second patterned metal layer 221 is embedded in the second dielectric layer 222, and the second upper surface and the second lower surface of the second patterned metal layer 221 are respectively exposed on the upper surface and the lower surface of the second dielectric layer 222. In addition, a second patterned protective layer 224 also covers a part of the upper surface and a part of the lower surface of the second layer substrate 22. Furthermore, the second patterned hollow portion 223 is provided in the second dielectric layer 222, and it can be provided at a distance from the second patterned metal layer 221 and is in communication with the first patterned hollow portion 213.

[0026] The third layer substrate 23 is stacked on the second layer substrate 22 and has a third patterned metal layer 231, a third dielectric layer 232, a third patterned hollow portion 233, and a third patterned protective layer 234. The third patterned metal layer 231 is embedded in the third dielectric layer 232, and the third upper surface and the third lower surface of the third patterned metal layer 231 are respectively exposed on the upper surface and the lower surface of the third dielectric material 232. In addition, a third patterned protective layer 234 also covers a part of the upper surface and a part of the lower surface of the third layer substrate 23. Furthermore, the third patterned hollow portion 233 is provided in the third dielectric layer 232, and it can be provided at a distance from the third patterned metal layer 231 and is in communication with the second patterned hollow portion 223. Among them, an electrical coupling is formed between a part of the third patterned metal layer 231 and a part of the first patterned metal layer 211, and accordingly, an antenna structure can be formed, for example Figure 3 as shown, the hollow antenna substrate 20 has a first antenna AN1 and a second antenna AN2.

[0027] The fourth - layer substrate 24 is stacked on the third - layer substrate 23 and has a fourth dielectric layer 242 and a fourth patterned hollow portion 243. The fourth patterned hollow portion 243 is disposed in the fourth dielectric layer 242, that is, the fourth - layer substrate 24 has the fourth patterned hollow portion 243 only on the fourth dielectric layer 242, and the fourth patterned hollow portion 243 communicates with the third patterned hollow portion 233.

[0028] The fifth - layer substrate 25 is stacked on the fourth - layer substrate 24 and has a fifth patterned metal layer 251, a fifth dielectric layer 252, a fifth patterned hollow portion 253, and a fifth patterned protective layer 254. The fifth patterned metal layer 251 is embedded in the fifth dielectric layer 252, and the upper surface and the lower surface of the fifth patterned metal layer 251 are respectively exposed on the upper surface and the lower surface of the fifth dielectric material 252. In addition, a fifth patterned protective layer 254 also covers a part of the upper surface and a part of the lower surface of the fifth - layer substrate 25. Furthermore, the fifth patterned hollow portion 253 is disposed in the fifth dielectric layer 252, which can be disposed at a distance from the fifth patterned metal layer 251 and communicates with the fourth patterned hollow portion 243. Among them, an electrical coupling is formed between a part of the fifth patterned metal layer 251 and a part of the first patterned metal layer 211, and thus an antenna structure can be formed, for example Figure 3 As shown, a third antenna AN3 is provided in the hollow antenna substrate 20.

[0029] It is worth mentioning that the above - stacked first patterned hollow portion 213, second patterned hollow portion 223, third patterned hollow portion 233, fourth patterned hollow portion 243, and fifth patterned hollow portion 253 form a hollow structure. Since there is no dielectric layer barrier above and below the first patterned metal layer 211, second patterned metal layer 221, third patterned metal layer 231, fourth patterned metal layer 241, and fifth patterned metal layer 251, and since the loss factor of air is "0", an antenna design with high performance can be easily achieved through the design structure in cooperation with the hollow structure and the first patterned metal layer 211, second patterned metal layer 221, third patterned metal layer 231, fourth patterned metal layer 241, and fifth patterned metal layer 251. In this embodiment, as Figure 3 As shown, a first antenna AN1, a second antenna AN2, and a third antenna AN3 are provided in the hollow antenna substrate 20.

[0030] In addition, in this embodiment, the materials of the above-mentioned first patterned metal layer 211, second patterned metal layer 221, third patterned metal layer 231, fourth patterned metal layer 241, and fifth patterned metal layer 251 are, for example, copper, and their shapes can be sheet-like, block-like, columnar, etc.; the materials of the above-mentioned first dielectric layer 212, second dielectric layer 222, third dielectric layer 232, fourth dielectric layer 242, and fifth dielectric layer 252 include, for example, but are not limited to epoxy resin (Prepreg, ABF) or molding compound; the materials of the above-mentioned first patterned protective layer 214, second patterned protective layer 224, third patterned protective layer 234, fourth patterned protective layer 244, and fifth patterned protective layer 254 include, but are not limited to, nickel, gold, and their combinations or alloys, and the materials selected for each layer can be the same or different, depending on the design requirements.

[0031] Furthermore, the partial upper surfaces of the aforementioned substrate layers are not limited to the surfaces of solid components. Since the hollow portions also belong to a part of the substrate, the surface can also be located at the positions of the hollow portions.

[0032] Please refer again to Figure 3 As shown, the above-mentioned hollow antenna substrate 20 can be conveniently integrated with a wafer 26 to form an antenna package. For example, the hollow antenna substrate 20 and the wafer 26 can be respectively disposed on the upper surface and the lower surface of a packaging carrier 27. Among them, the hollow antenna substrate 20 is disposed on the upper surface of the packaging carrier 27, and the wafer 26 is disposed on the lower surface of the packaging carrier 27. A plurality of electrical connection pads 271 can be respectively disposed on the upper surface and the lower surface of the packaging carrier 27. The electrical connection pads 271 located on the upper surface are connected to the hollow antenna substrate 20 through a conductive connection element 29, and the electrical connection pads 271 located on the lower surface can be connected to other electronic devices through conductive bumps 28. In addition, the hollow antenna substrate 20 and the wafer 26 can be joined to the lower surface of the packaging carrier 27 through any bonding technology, such as soldering, conductive bumps, or conductive adhesives.

[0033] Next, two embodiments are provided below to illustrate the manufacturing method of the hollow antenna substrate. First, please refer to Figures 4A through 4U The manufacturing method of the hollow antenna substrate in the first embodiment includes steps S01 to S22.

[0034] As Figure 4A shown, step S01 provides a carrier plate 39. Step S02 forms a first patterned metal layer 311 on the carrier plate 39. Among them, the material of the first patterned metal layer 311 is, for example, copper, and it is formed on the carrier plate 39 by means of photolithography etching combined with electroplating technology.

[0035] As Figure 4BAs shown, in step S03, a first dielectric layer 312 is formed on the carrier plate 39 to cover the first patterned metal layer 311. Among them, the first dielectric layer 312 is formed by molding and covers the first patterned metal layer 311.

[0036] As Figure 4C shown, in step S04, the surface of the first dielectric layer 312 is polished to expose a first upper surface 3111 of the first patterned metal layer 311.

[0037] As Figure 4D shown, in step S05, a first patterned protective layer 314 is formed on the first upper surface 3111 of the first patterned metal layer 311 that is partially exposed to the first dielectric layer 312. In this embodiment, the first patterned protective layer 314 is, for example, a nickel-gold layer, which can be formed on the first upper surface 3111 of a part of the first patterned metal layer 311 through photolithography etching combined with electroplating process. Up to this point in the manufacturing method of the hollow antenna substrate, a first semi-finished product is formed.

[0038] As Figure 4E shown, in step S06, a second patterned metal layer 321 is formed on the first semi-finished product by photolithography etching combined with electroplating technology. As Figure 4F shown, in step S07, a second dielectric layer 322 is formed on the first semi-finished product by molding to cover the second patterned metal layer 321. As Figure 4G shown, in step S08, the surface of the second dielectric layer 322 is polished to expose a second upper surface 3211 of the second patterned metal layer 321. As Figure 4H shown, in step S09, a second patterned protective layer 324 can be formed on the second upper surface 3211 of the second patterned metal layer 321 that is partially exposed to the second dielectric layer 322 through photolithography etching combined with electroplating process. Up to this point in the manufacturing method of the hollow antenna substrate, a second semi-finished product is formed.

[0039] As Figure 4I shown, in step S10, a third patterned metal layer 331 is formed on the second semi-finished product by photolithography etching combined with electroplating technology. As Figure 4J shown, in step S11, a third dielectric layer 332 is formed on the second semi-finished product by molding to cover the third patterned metal layer 331. As Figure 4K shown, in step S12, the surface of the third dielectric layer 332 is polished to expose a third upper surface 3311 of the third patterned metal layer 331. As Figure 4L shown, in step S13, a third patterned protective layer 334 can be formed on the third upper surface 3311 of the third patterned metal layer 331 that is partially exposed to the third dielectric layer 332 through photolithography etching combined with electroplating process. Up to this point in the manufacturing method of the hollow antenna substrate, a third semi-finished product is formed.

[0040] As shown Figure 4M in FIG. 1, in step S14, a fourth patterned metal layer 341 is formed on the third semi-finished product by using photolithography etching combined with electroplating technology. As shown Figure 4N in FIG. 2, in step S15, a fourth dielectric layer 342 is formed on the third semi-finished product by molding to cover the fourth patterned metal layer 341. As shown Figure 4O in FIG. 3, in step S16, the surface of the fourth dielectric layer 342 is polished to expose a fourth upper surface 3411 of the fourth patterned metal layer 341. Then, a fifth patterned protective layer 354 is formed on the fourth upper surface 3411 of the fourth patterned metal layer 341 partially exposed to the fourth dielectric layer 342 by using photolithography etching combined with electroplating process. Up to this point in the manufacturing method of the hollow antenna substrate, a fourth semi-finished product is formed.

[0041] As shown Figure 4P in FIG. 4, in step S17, a fifth patterned metal layer 351 is formed on the fourth semi-finished product by using photolithography etching combined with electroplating technology. As shown Figure 4Q in FIG. 5, in step S18, a fifth dielectric layer 352 is formed on the fourth semi-finished product by molding to cover the fifth patterned metal layer 351. As shown Figure 4R in FIG. 6, in step S19, the surface of the fifth dielectric layer 352 is polished to expose a fifth upper surface 3511 of the fifth patterned metal layer 351. As shown Figure 4S in FIG. 7, in step S20, the carrier plate 39 is removed. As shown Figure 4T in FIG. 8, in step S21, a fifth patterned protective layer 354 can be formed on the fifth upper surface 3511 of the fifth patterned metal layer 351 partially exposed to the fifth dielectric layer 352 and the first lower surface 3112 of the first patterned metal layer 311 by using photolithography etching combined with electroplating process. As shown Figure 4U in FIG. 9, in step S22, the partial metal materials of the first patterned metal layer 311, the second patterned metal layer 321, the third patterned metal layer 331, the fourth patterned metal layer 341, and the fifth patterned metal layer 351 that are not covered and protected by the patterned protective layer are removed to form a hollow antenna substrate 30 with a hollow structure, and some corresponding first patterned metal layer 311 and third patterned metal layer 331, some corresponding first patterned metal layer 311 and fifth patterned metal layer 351 can be electrically coupled to each other to form an antenna structure.

[0042] Next, the manufacturing method of the hollow antenna substrate in the second embodiment includes steps S30 to S64. In the second embodiment, five semi-finished products are respectively produced for the hollow antenna substrate and then stacked. For the first semi-finished product, please refer to Figures 5A through 5E , for the second semi-finished product, please refer to Figures 6A through 6E , for the third semi-finished product, please refer to Figures 7A through 7E , for the fourth semi-finished product, please refer to Figures 8A through 8E, please refer to the fifth semi-finished product Figures 9A through 9E .

[0043] As Figure 5A shown, step S30 provides a first carrier plate 491. In step S31, a first patterned metal layer 411 is formed on the first carrier plate 491 by lithographic etching combined with electroplating technology. Similar to the previous embodiment, the material of the first patterned metal layer 411 is, for example, copper. As Figure 5B shown, in step S32, a first dielectric layer 412 is formed on the first carrier plate 491 by molding to cover the first patterned metal layer 411. As Figure 5C shown, in step S33, the surface of the first dielectric layer 412 is polished to expose a first upper surface 4111 of the first patterned metal layer 411. It should be noted that when polishing the surface of the first dielectric layer 412, the first patterned metal layer 411 will also be polished. As Figure 5D shown, in step S34, the first carrier plate 491 is removed, and a first lower surface 4112 of the first patterned metal layer 411 is further exposed. In step S35, a first patterned protective layer 414 is formed on the first upper surface 4111 and the first lower surface 4112 of the first patterned metal layer 411 that is partially exposed to the first dielectric layer 412 through lithographic etching combined with electroplating process. As Figure 5E shown, in step S36, the metal material of the first patterned metal layer 411 that is not covered and protected by the first patterned protective layer 414 is removed to form a first patterned hollow portion 413, and a first semi-finished product is formed.

[0044] As Figure 6A shown, step S37 provides a second carrier plate 492. In step S38, a second patterned metal layer 421 is formed on the second carrier plate 492 by lithographic etching combined with electroplating technology. Similar to the previous embodiment, the material of the second patterned metal layer 421 is, for example, copper. As Figure 6B shown, in step S39, a second dielectric layer 422 is formed on the second carrier plate 492 by molding to cover the second patterned metal layer 421. As Figure 6C shown, in step S40, the surface of the second dielectric layer 422 is polished to expose a second upper surface 4211 of the second patterned metal layer 421. It should be noted that when polishing the surface of the second dielectric layer 422, the second patterned metal layer 421 will also be polished. As Figure 6D shown, in step S41, the second carrier plate 492 is removed, and a second lower surface 4212 of the second patterned metal layer 421 is further exposed. In step S42, a second patterned protective layer 424 is formed on the second upper surface 4211 and the second lower surface 4212 of the second patterned metal layer 421 that is partially exposed to the second dielectric layer 422 through lithographic etching combined with electroplating process. As Figure 6EAs shown, in step S43, the metal material of the second patterned metal layer 421 that is not covered and protected by the second patterned protective layer 424 is removed to form a second patterned hollow portion 423 and a second semi-finished product.

[0045] As Figure 7A shown, in step S44, a third carrier plate 493 is provided. In step S45, a third patterned metal layer 431 is formed on the third carrier plate 493 by lithography etching combined with electroplating technology. Similar to the foregoing embodiments, the material of the third patterned metal layer 431 is, for example, copper. As Figure 7B shown, in step S46, a third dielectric layer 432 is formed on the third carrier plate 493 by molding to cover the third patterned metal layer 431. Figure 7C As shown, in step S47, the surface of the third dielectric layer 432 is polished to expose a third upper surface 4311 of the third patterned metal layer 431. It is worth mentioning that when polishing the surface of the third dielectric layer 432, the third patterned metal layer 431 will also be polished. As Figure 7D shown, in step S48, the third carrier plate 493 is removed, and a third lower surface 4312 of the third patterned metal layer 431 is further exposed. In step S49, a third patterned protective layer 434 is formed on the third upper surface 4311 and the third lower surface 4312 of the third patterned metal layer 431 that are partially exposed to the third dielectric layer 432 by lithography etching combined with electroplating process. Figure 7E As shown, in step S50, the metal material of the third patterned metal layer 431 that is not covered and protected by the third patterned protective layer 434 is removed to form a third patterned hollow portion 433 and a third semi-finished product.

[0046] As Figure 8A shown, in step S51, a fourth carrier plate 494 is provided. In step S52, a fourth patterned metal layer 441 is formed on the fourth carrier plate 494 by lithography etching combined with electroplating technology. Similar to the foregoing embodiments, the material of the fourth patterned metal layer 441 is, for example, copper. As Figure 8B shown, in step S53, a fourth dielectric layer 442 is formed on the fourth carrier plate 494 by molding to cover the fourth patterned metal layer 441. Figure 8C As shown, in step S54, the surface of the fourth dielectric layer 442 is polished to expose a fourth upper surface 4411 of the fourth patterned metal layer 441, thereby forming a pattern in which the fourth dielectric layer 442 surrounds the fourth patterned metal layer 441. It is worth mentioning that when polishing the surface of the fourth dielectric layer 442, the fourth patterned metal layer 441 will also be polished. As Figure 8D shown, in step S55, the fourth carrier plate 494 is removed, and a fourth lower surface 4412 of the fourth patterned metal layer 441 is further exposed. Figure 8EAs shown, in step S56, the fourth patterned metal layer 441 is removed to form a fourth patterned hollow portion 443 and a fourth semi-finished product is formed.

[0047] As Figure 9A shown, in step S57, a fifth carrier plate 495 is provided. In step S58, a fifth patterned metal layer 451 is formed on the fifth carrier plate 495 by lithography etching combined with electroplating technology. Similar to the foregoing embodiments, the material of the fifth patterned metal layer 451 is, for example, copper. As Figure 9B shown, in step S59, a fifth dielectric layer 452 is formed on the fifth carrier plate 495 by molding to cover the fifth patterned metal layer 451. Figure 9C As shown, in step S60, the surface of the fifth dielectric layer 452 is polished to expose a fifth upper surface 4511 of the fifth patterned metal layer 451. It is worth mentioning that when polishing the surface of the fifth dielectric layer 452, the fifth patterned metal 451 will also be polished. As Figure 9D shown, in step S61, the fifth carrier plate 495 is removed, and a fifth lower surface 4512 of the fifth patterned metal layer 451 is further exposed. In step S62, a fifth patterned protective layer 454 is formed on the fifth upper surface 4511 and the fifth lower surface 4512 of the fifth patterned metal layer 451 partially exposed to the fifth dielectric layer 452 by lithography etching combined with electroplating process. Figure 9E As shown, in step S63, the metal material of the part of the fifth patterned metal layer 451 that is not covered and protected by the fifth patterned protective layer 454 is removed to form a fifth patterned hollow portion 453 and a fifth semi-finished product is formed.

[0048] Finally, as Figure 10 shown, in step S64, the first semi-finished product, the second semi-finished product, the third semi-finished product, the fourth semi-finished product and the fifth semi-finished product are stacked and combined with each other, and the first patterned hollow portion 413, the second patterned hollow portion 423, the third patterned hollow portion 433, the fourth patterned hollow portion 443 and the fifth patterned hollow portion 453 are formed into a hollow structure of the hollow antenna substrate 40. In this embodiment, the first semi-finished product, the second semi-finished product, the third semi-finished product, the fourth semi-finished product and the fifth semi-finished product layers are combined with each other through a thinner adhesive 47, and the thinner adhesive 47 can be conductive or non-conductive. Among them, the conductive thinner adhesive 47 can be used to bond the patterned metal, and the non-conductive thinner adhesive 47 can be used to bond the dielectric material.

[0049] In summary, the hollow antenna substrate and its manufacturing method of the present invention form an antenna in a semiconductor package structure by using semiconductor processes. The precision control of semiconductor processes in all aspects is significantly better than the assembly method using solder balls. Therefore, it can ensure that the performance of the antenna meets the design requirements. In addition, by utilizing the characteristics that the dielectric constant of the air in the hollow structure is "1" and the loss factor is "0", it is easy to design a high-performance antenna. Moreover, the formed hollow antenna substrate can be easily combined with a semiconductor carrier, thus simplifying the process of the carrier containing the antenna.

[0050] The present invention meets the requirements of invention patents and submits a patent application in accordance with the law. However, the above description is only a preferred embodiment of the present invention and cannot limit the scope of the patent application of the present invention. Any equivalent modifications or changes made by those skilled in the art according to the spirit of the present invention should be included within the scope of the claims.

Claims

1. A manufacturing method of a hollow antenna substrate, characterized in that, comprising: A. Providing a carrier plate; B. Providing a patterned metal layer on the carrier plate; C. Providing a dielectric layer on the carrier plate to cover the patterned metal layer, and then exposing an upper surface of the patterned metal layer; D. Providing a patterned protective layer on a partial surface of the upper surface of the patterned metal layer to form a semi-finished substrate; E. Repeating the above steps B to D multiple times, wherein the carrier plate in step B is replaced with the semi-finished substrate formed after the previous step D, and stacked layer by layer to form a multi-layer stacked semi-finished substrate; F. Removing the carrier plate; G. Also covering the partial surfaces of the patterned metal layers on both outer sides of the multi-layer stacked semi-finished substrate with the patterned protective layer; and H. Removing the metal material of the partial patterned metal layer that is not covered and protected by the patterned protective layer to form a hollow antenna substrate with a hollow structure.

2. A manufacturing method of a hollow antenna substrate, characterized in that, comprising: A. Providing a carrier plate; B. Providing a patterned metal layer on the carrier plate, and the patterned metal layer has an upper surface and a corresponding lower surface; C. Providing a dielectric layer on the carrier plate to cover the patterned metal layer, and then exposing the upper surface of the patterned metal layer; D. Removing the carrier plate and exposing the lower surface of the patterned metal layer; E. Forming a patterned protective layer on a partial upper surface and a partial lower surface of the patterned metal layer; F. Removing the metal material of the patterned metal layer that is not covered by the patterned protective layer to form a semi-finished product with a hollow portion; G. Repeating the above steps A to F multiple times to form multiple semi-finished products; and H. Stacking and mutually combining multiple semi-finished products to form a hollow antenna substrate with a hollow structure.

3. The manufacturing method of the hollow antenna substrate as claimed in claim 2, characterized in that, multiple semi-finished products are mutually connected by a thin adhesive.

4. A hollow antenna substrate, characterized in that, comprising: A first-layer substrate having a first patterned metal layer and a first dielectric layer, wherein the first patterned metal layer is embedded in the first dielectric layer, and a first upper surface and a first lower surface of the first patterned metal layer are exposed on an upper surface and a lower surface of the first dielectric layer; A second-layer substrate stacked on the first-layer substrate, having a second dielectric layer, and the second dielectric layer has a second patterned hollow portion that penetrates through an upper surface and a lower surface of the second dielectric layer; and A third-layer substrate stacked on the second-layer substrate, having a third patterned metal layer and a third dielectric layer, wherein the third patterned metal layer is embedded in the third dielectric layer, and a third upper surface and a third lower surface of the third patterned metal layer are exposed on an upper surface and a lower surface of the third dielectric layer; wherein, a partial first patterned metal layer and a corresponding overlapping partial third patterned metal layer form an antenna unit, and the second patterned hollow portion is spaced and hollowed therebetween.

5. The hollow antenna substrate as claimed in claim 4, characterized in that, A patterned protective layer is provided on each of the first upper surface and the first lower surface of the first patterned metal layer and the third upper surface and the third lower surface of the third patterned metal layer.

6. The hollow antenna substrate according to claim 4, wherein, the first dielectric layer of the first layer substrate has a first patterned hollow portion that penetrates the upper surface and the lower surface of the first layer substrate, the third dielectric layer of the third layer substrate has a third patterned hollow portion that penetrates the upper surface and the lower surface of the third dielectric layer, and the second layer substrate further has a second patterned metal layer embedded in the second dielectric layer, and a second upper surface of a part of the second patterned metal layer is in contact with a third lower surface of a part of the third patterned metal layer, and a second lower surface of a part of the second patterned metal layer is in contact with a first upper surface of a part of the first patterned metal layer.

7. The hollow antenna substrate according to claim 6, wherein, it further includes: a fourth layer substrate stacked on the third layer substrate, having a fourth dielectric layer, and the fourth dielectric layer has a fourth patterned hollow portion that penetrates the upper surface and the lower surface of the fourth dielectric layer.

8. The hollow antenna substrate according to claim 7, wherein, it further includes: a fifth layer substrate stacked on the fourth layer substrate, having a fifth patterned metal layer and a fifth dielectric layer, wherein the fifth patterned metal layer is embedded in the fifth dielectric layer, and a fifth upper surface and a fifth lower surface of the fifth patterned metal layer are exposed on the upper surface and the lower surface of the fifth dielectric layer, and the fifth dielectric layer has a fifth patterned hollow portion that penetrates the upper surface and the lower surface of the fifth dielectric layer.

9. The hollow antenna substrate according to claim 8, wherein, a part of the first patterned metal layer overlapping with the fifth patterned metal layer forms an antenna unit, and there are second patterned hollow portions, third patterned hollow portions, and fourth patterned hollow portions that are spaced apart and hollowed out between the first patterned metal layer and the fifth patterned metal layer.

10. The hollow antenna substrate according to claim 8, wherein, a patterned protective layer is provided on each of the fifth upper surface and the fifth lower surface of the fifth patterned metal layer.

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