Method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch

Abstract

The invention provides a method for accelerating the cyclic redundancy check calculation of a 5G wireless access network based on a programmable switch, and the method comprises the steps: a server side transmits TB / CB, a data packet is divided into a plurality of segments, and the length of the plurality of segments meets the requirements of the switch; the switch receives the plurality of segments and continuously calculates the CRC of the received segments until the last segment in the TB / CB is received; if the switch does not receive the last segment, the switch calculates the CRC of the last segment and executes XOR operation with the CRC of the previous segment temporarily stored in the register, and the result obtained through operation is used for updating the register; if the switch receives the last segment, the switch reads the temporary storage value in the register, and after complete CRC calculation of TB / CB is completed, the register module is reset; according to the invention, the CRC calculation is directly unloaded to the programmable switch, and the inherent parallelism and processing capability of the switch are utilized to accelerate the CRC calculation, so that the problem that the CRC calculation demand of the 5G physical layer is large is solved.

Description

Technical Field

[0001] The present invention belongs to the field of communication technologies, and particularly relates to a method for accelerating cyclic redundancy check calculation in a 5G radio access network based on a programmable switch. Background Art

[0002] The technological progress of 5G NR RAN has promoted the development of ultra-high-speed transmission, but the inherent noise characteristics of the wireless channel have posed significant challenges to this progress. The wireless channel is vulnerable to various influences, including signal attenuation, multiple access interference, Doppler effect, and inter-symbol interference. These factors may have an adverse impact on data integrity and introduce errors during transmission. To address these challenges and ensure data integrity, 5G networks add redundant bits to each transmitted message so that the receiving end can detect unexpected changes in the data. The most widely adopted error detection technology is cyclic redundancy check (CRC).

[0003] In 5G RAN, the cyclic redundancy check (CRC) algorithm is crucial for detecting possible errors during data transmission. In high-throughput scenarios such as massive MIMO and carrier aggregation, even lightweight processes can become bottlenecks. Accelerating these functions is crucial for ensuring the efficient expansion of the network as data rates and processing requirements increase. CRC calculation is a computationally intensive task that may form a bottleneck in the physical layer (PHY) processing pipeline. Therefore, it is particularly important to develop more efficient CRC calculations, such as parallel processing, optimized lookup tables, and hardware acceleration. Generally, CRC calculation uses iterative algorithms involving exclusive OR operations and arithmetic shifts. Hardware accelerators can perform these operations more efficiently than software.

[0004] In summary, it is very meaningful to propose a method for accelerating CRC calculation based on a programmable switch for 5G NR. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a method for accelerating cyclic redundancy check calculation in a 5G radio access network based on a programmable switch to solve the problem of large CRC calculation requirements in the 5G physical layer.

[0006] The technical solution of the present invention is: A method for accelerating cyclic redundancy check calculation in a 5G radio access network based on a programmable switch, including:

[0007] The server side sends TB / CB, and divides the data packet into multiple segments, where the lengths of the multiple segments meet the requirements of the switch;

[0008] The switch receives the multiple segments and continuously calculates the CRC of the received segments until the last segment in the TB / CB is received;

[0009] If the switch does not receive the last segment, the switch will calculate the CRC of the last segment and perform an XOR operation with the CRC of the previous segment temporarily stored in the register, and use the result of the operation to update the register; if the switch receives the last segment, the switch reads the temporarily stored value in the register, completes the complete CRC calculation of TB / CB, and then resets the register module;

[0010] If the current segment only needs to generate a CRC, the switch will append the final CRC value to the data packet; if the segment also needs to perform CRC verification, the switch will compare the final CRC value with the input P in for CRC value comparison and append the pass or fail result obtained from the verification to the segment header;

[0011] The switch applies L2 / L3 routing to forward the segment to the destination MAC / IPv4 address; otherwise, the segment will be sent back to the same ingress port.

[0012] Specifically, the server side sends TB / CB and splits the data packet into multiple segments:

[0013] In a 5G radio access network, the MAC layer organizes the data into transport blocks with CRC check codes and transmits them to the PHY layer. The transport block TB is the basic payload unit transmitted between the MAC layer and the physical layer; the PHY layer adopts an LDPC coding scheme, and the maximum size of its code blocks is K cb , and its specific value depends on the coding structure adopted by LDPC;

[0014] The maximum size of the transport block TB is 1,277,992 bits. When the transport block exceeds the specified maximum size, the transport block will be split into multiple equal-sized code blocks CB, and a CRC check bit will be appended to each code block:

[0015] Let A = {b 0 ′, b 1 ′,..., b′ N+L-1} be the input sequence of the transport block with an L-bit CRC check code, where |A| = N + L represents the bit length of the input sequence. The transport block TB is split into multiple equal-sized code blocks, and a μ-bit CRC check code is appended to each code block. The number of split code blocks M is as follows, where μ = 24;

[0016]

[0017] Let Φ r represent the r-th code block, where 0 ≤ r ≤ M - 1, and the size of each code block is K cb ;

[0018] Append each code block ψ rSplit into k segments, denoted as λ (r,i) , a code block can be represented as a set of segments of equal size: ψ r ={λ (r,0) ,λ (r,1) ,…,λ (r,i)}, where λ (r,i) represents the i-th segment in the r-th code block, 0 ≤ i ≤ k.

[0019] Specifically, the switch receives the multiple segments and continuously calculates the CRC of the received segments:

[0020] Utilize the linear property of the CRC function to perform CRC calculation on the r-th code block ψ r . Let Φ(·) be a general CRC function, apply Φ(·) to the code block ψ r , and obtain the following expression:

[0021]

[0022] Specifically, when the data packet is transmitted through Ethernet, specify EtherType as ABCD 16 ; when NetCRC-NR is embedded in the L3 payload, it adopts the IPv4 packet format and specifies the protocol type number as 33 10 ; when NetCRC-NR is carried by UDP, reserve the source port as 55433 10 .

[0023] Specifically, the segment header is used to carry the key information required for CRC generation and verification, and it includes the following header fields:

[0024] Type: A field with a length of 4 bits, used to represent the CRC polynomial type. Its values can be 0, 1, 2, 3, 4, and 5, corresponding to the 6 CRC algorithms CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6 specified in 5G NR TS 38.212 respectively. Its specific value depends on the channel type or the transport block size;

[0025] Last: A header field with a length of 1 bit, used to indicate whether the incoming data packet is the last transport block or code block segment;

[0026] Check: A field with a length of 1 bit, used to distinguish between the two functions of generation and verification. When its value is 1, NetCRC-NR generates the CRC value of the segment and compares it with the CRC value attached to the end of the data packet; when the value is 0, it only generates the CRC value of the segment;

[0027] Pass: A field with a length of 1 bit, used to indicate the result of the CRC verification function, which is 0 when the verification fails and 1 otherwise;

[0028] TBSize: A field with a length of 16 bits, representing the size of the transport block or code block;

[0029] SeqID: A field with a length of 16 bits, representing the sequence number of the code block or transport block.

[0030] Specifically, the transport block TB or code block CB is segmented using a packet generation algorithm:

[0031] Step 1: Initialize an empty queue Q to store the generated NetCRC-NR packets;

[0032] Step 2: Traverse i from 0 to k - 1, and for each segment λ i Execute the following sub-steps:

[0033] Sub-step 2.1: Create a new NetCRC-NR packet Pkt;

[0034] Sub-step 2.2: Set the current segment λ i = Ω[iβ:(i + 1)β] as the payload of Pkt;

[0035] Sub-step 2.3: If it is the last segment (i.e., i = k - 1), set the Last flag bit to 1;

[0036] Sub-step 2.4: Add Pkt to the queue Q;

[0037] The input is the transport block TB or code block CB, denoted as Ω; the output is the queue containing all the generated packets, denoted as Q; where k: the number of segments of each Ω; β: the number of bits of each segment; λ i : The i-th segment in Ω.

[0038] Specifically, the CRC generation and verification include:

[0039] Step 1: Check and process the NetCRC-NR packet

[0040] If P in is a NetCRC-NR packet, then continue:

[0041] Extract the NetCRC-NR header P in from P crc ;

[0042] Use the CRC calculation module to calculate the CRC value of λ (r,i) and set it as value;

[0043] Step 2: Process non - last segment

[0044] If P crc has its last field equal to 0 (indicating it is not the last segment), then:

[0045] Read the current value from the register and set it as value′;

[0046] Perform the XOR operation: value′ = value ⊕ value′;

[0047] Update the register with the updated value′.

[0048] Step 3: Process the last segment

[0049] If P crc has its last field equal to 1 (indicating it is the last segment), then:

[0050] Read the current value from the register and set it as value′.

[0051] Perform the XOR operation: value′ = value ⊕ value′;

[0052] Reset the register module.

[0053] If P crc has its check field equal to 0 (indicating no CRC check is performed), then append value′ to P in ;

[0054] If P crc has its check field equal to 1 (indicating CRC check is performed), then compare the calculated value′ with the CRC value in the P in header and set the comparison result as the pass field of P crc

[0055] Update the header information of P in

[0056] Step 4: Apply L2 / L3 routing module

[0057] Step 5: Forward P in to the matching egress port;

[0058] Algorithm input: (1) P in : Input packet from the parser; (2) λ (r,i) : The i - th segment in the r - th transport block (TB) or code block (CB);

[0059] Algorithm output: Updated P in packet and its header information; ​​

[0060] value: represents the input CRC value calculated in the computing module; value': represents the previously stored value, with a default value of zero; RST: used to reset the registers within the module; EN: used to enable the register module; RW: used to enable read / write operations.

[0061] The present invention provides a method for accelerating cyclic redundancy check calculation in a 5G radio access network based on a programmable switch. This method directly offloads CRC calculation to a programmable switch (such as Intel Tofino) and utilizes the inherent parallelism and processing power of the switch to accelerate CRC calculation. The objective of the present invention is to provide high-throughput CRC calculation capabilities and reduce the computational burden on general-purpose processors (GPPs). It realizes the generation and verification of CRC algorithms compliant with the 3GPP TS 38.212 standard, including CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6. Description of the Drawings

[0062] The drawings herein are incorporated into and constitute a part of this specification, showing embodiments in accordance with the present invention, and are used together with the specification to explain the principles of the present invention.

[0063] Figure 1 (a) High-level view of the radio access network deployment; (b) NetCRC-NR architecture, consisting of a programmable switch, general-purpose servers (distributed units DUs), and a control plane

[0064] Figure 2 (a) Ethernet-based NetCRC-NR packet format; (b) IPv4 / UDP-based NetCRC-NR packet format; (c) NetCRC-NR common header; (d) NetCRC-NR payload header;

[0065] Figure 3 Schematic diagram of the NetCRC-NR method flow provided by the present invention;

[0066] Figure 4 Schematic diagram of the NetCRC-NR ingress parser state machine provided by the present invention. Detailed Description of the Embodiments

[0067] Here, exemplary embodiments will be described in detail, and their examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. On the contrary, they are merely examples of systems consistent with some aspects of the present invention as detailed in the appended claims.

[0068] To solve the problem of high demand for CRC calculation in the 5G physical layer, the present invention accelerates CRC calculation by directly offloading CRC calculation to a programmable switch (such as Intel Tofino), taking advantage of the inherent parallelism and processing power of the switch.

[0069] The objective of the present invention is to provide high-throughput CRC calculation capabilities and reduce the computational burden on general-purpose processors (GPPs). It implements the generation and verification of CRC algorithms compliant with the 3GPP TS 38.212 standard, including CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6.

[0070] The present invention provides a method for accelerating cyclic redundancy check calculation in a 5G radio access network based on a programmable switch (hereinafter simply referred to as NetCRC-NR), including:

[0071] The server side sends TB / CB, and the data packet is segmented into multiple segments, where the lengths of the multiple segments meet the requirements of the switch;

[0072] The switch receives the multiple segments and continuously calculates the CRC of the received segments until the last segment in the TB / CB is received;

[0073] If the switch does not receive the last segment, the switch will calculate the CRC of the last segment and perform an XOR operation with the CRC of the previous segment temporarily stored in the register, and use the result of the operation to update the register; if the switch receives the last segment, the switch reads the temporarily stored value in the register, completes the complete CRC calculation of the TB / CB, and then resets the register module;

[0074] If the current segment only needs to generate a CRC, the switch appends the final CRC value to the data packet; if the segment also needs to perform CRC verification, the switch compares the final CRC value with the input P in for CRC value comparison and appends the pass or fail result obtained from the verification to the segment header;

[0075] The switch applies L2 / L3 routing to forward the segment to the target MAC / IPv4 address; otherwise, the segment will be sent back to the same ingress port.

[0076] In the 5G NR radio access network (RAN), the transport block (TB) is the basic payload unit transmitted between the MAC layer and the physical layer, and its maximum size is 1,277,992 bits. The media access control (MAC) layer organizes data into transport blocks with CRC check codes and transmits them to the physical layer (PHY). The physical layer adopts the low-density parity-check (LDPC) coding scheme, and the maximum size of its code blocks is K cb , and its specific value depends on the coding structure adopted by LDPC. In the 3GPP standard, for the LDPC scheme using the base Figure 1 (Base Graph 1, BG1), K cb = 8448 bits; while for the LDPC scheme using the base Figure 2 (Base Graph 2, BG2), K cb = 3840 bits. When the transport block exceeds the specified maximum size, the transport block will be divided into multiple equal-sized code blocks (CBs), and CRC check bits will be appended to each code block.

[0077] Let A = {b 0 ′, b 1 ′,..., b′ N+L-1} be the input sequence of the transport block with an L-bit CRC check code, where |A| = N + L represents the bit length of the input sequence. The transport block is divided into multiple equal-sized code blocks, and each code block will be appended with a μ-bit CRC check code. The number M of the divided code blocks is as follows, where μ = 24.

[0078]

[0079] Let Φ r represent the r-th code block, where 0 ≤ r ≤ M - 1, and the size of each code block is K cb . In a programmable switch, due to the size limitation of the packet header vector (PHV), the switch cannot complete the CRC calculation for the entire code block at one time. Therefore, in the present invention, we divide each code block ψ r into k segments, denoted as λ (r,i) . Therefore, a code block can be represented as a set of equal-sized segments: ψ r = {λ (r,0) , λ (r,1) ,..., λ (r,i)}, where λ (r,i) represents the i-th segment in the r-th code block, 0 ≤ i ≤ k.

[0080] The present invention utilizes the linear property of the CRC function to perform CRC calculation on the r-th code block ψ r Let Φ(·) be a general CRC function. Applying Φ(·) to the code block ψ r , the following expression can be obtained:

[0081]

[0082] As can be seen from the above formula, the CRC of the entire code block can be obtained by separately calculating the CRC of each segment in ψ r and then performing an exclusive OR operation on these CRC values. Similarly, the CRC of the transport block can also be obtained by exclusive ORing the CRCs of each segment.

[0083] NetCRC-NR is a multi-layer protocol that can be embedded in the payloads of the MAC layer (L2), network layer (L3), and transport layer (L4). Figure 2 defines the formats of various data segments involved in the present invention. NetCRC-NR has a dedicated identifier at each layer. When a NetCRC-NR data packet is transmitted over Ethernet, the EtherType is specified as ABCD 16 to distinguish it from other protocols carried over Ethernet; when NetCRC-NR is embedded in the L3 payload, it adopts the IPv4 packet format and specifies the protocol type number as 33 10 to distinguish it from other protocols carried over IPv4; when NetCRC-NR is carried over UDP, it can be distinguished from other protocols carried over UDP by reserving the source port as 55433 10

[0084] The NetCRC-NR header is used to carry the key information required for performing CRC generation and verification, and it includes the following header fields:

[0085] Type: This is a 4-bit field used to indicate the CRC polynomial type. Its values can be 0, 1, 2, 3, 4, and 5, corresponding to the 6 CRC algorithms CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6 specified in 5G NR TS 38.212 respectively. Its specific value depends on the channel type or transport block size.

[0086] Last: This is a 1-bit header field used to indicate whether the incoming data packet is the last transport block or code block segment.

[0087] ​Check: This is a field with a length of 1 bit, used to distinguish between the generation and verification functions. When its value is 1, NetCRC-NR generates the CRC value of the segment and compares it with the CRC value attached to the end of the data packet; when the value is 0, it only generates the CRC value of the segment.

[0088] Pass: This is a field with a length of 1 bit, used to indicate the result of the CRC verification function, which is 0 when the verification fails and 1 otherwise.

[0089] TBSize: This is a field with a length of 16 bits, used to represent the size of the transport block or code block.

[0090] SeqID: This is a field with a length of 16 bits, used to represent the sequence number of the code block or transport block.

[0091] Figure 2 (d) shows the payload header format of NetCRC-NR. This payload header is the data sequence passed to the switch to perform CRC generation or verification. The present invention supports two single payload sizes of 768 bits (96 bytes) and 1536 bits (192 bytes). The payload size is selected in such a way that it can be divisible by the maximum block size of the LDPC base Figure 1 and Figure 2 to avoid data padding.

[0092] Based on the above principle, the present invention uses a packet generation algorithm to segment the transport block or code block to adapt to the payload size. The input of this algorithm is the transport block (TB) or code block (CB), denoted as Ω; the output is a queue containing all the generated packets, denoted as Q. The parameters required by the algorithm are as follows:

[0093] -k: The number of segments of each Ω

[0094] -β: The number of bits of each segment

[0095] -λ i : The i-th segment in Ω

[0096] The algorithm steps are as follows:

[0097] Step 1: Initialize an empty queue Q to store the generated NetCRC-NR packets.

[0098] Step 2: Traverse i from 0 to k - 1, and for each segment λ i Execute the following sub-steps:

[0099] Sub-step 2.1: Create a new NetCRC-NR packet Pkt.

[0100] Sub-step 2.2: Set the current segment λi = … [iβ:(i + 1)β] as the payload of Pki.

[0101] Sub-step 2.3: If it is the last segment (i.e., i = k - 1), set the Last flag bit to 1.

[0102] Sub-step 2.4: Add Pkt to queue Q.

[0103] The present invention also adopts the following algorithm to realize CRC generation and verification for segments in a programmable switch (such as Intel Tofino);

[0104] Algorithm input:

[0105] (1) P in : The input packet from the parser.

[0106] (2) λ (r,i) : The i-th segment in the r-th transport block (TB) or code block (CB).

[0107] Algorithm output:

[0108] (1) The updated P in packet and its header information.

[0109] Algorithm steps:

[0110] Step 1: Check and process NetCRC-NR packets

[0111] · If P in is a NetCRC-NR packet, then continue:

[0112] a. Extract the NetCRC-NR header P in from P crc

[0113] b. Use the CRC calculation module to calculate the CRC value of λ (r,i) and set it as value.

[0114] Step 2: Process non-last segments

[0115] · If the last field of P crc is 0 (indicating it is not the last segment), then:

[0116] c. Read the current value from the register and set it as value′.

[0117] d. Perform an XOR operation: value′ = value ⊕ value′.

[0118] e. Update the register with the updated value′.

[0119] Step 3: Process the last segment

[0120] · If the last field of P crc is 1 (indicating it is the last segment), then:

[0121] f. Read the current value from the register and set it as value′.

[0122] g. Perform an XOR operation: value′ = value ⊕ value′.

[0123] h. Reset the register module.

[0124] i. If the check field of Pcrc is 0 (indicating no CRC check), then append value′ to P in .

[0125] j. If the check field of P crc is 1 (indicating CRC check is performed), then compare the calculated value′ with the CRC value in the P in header and set the comparison result as the pass field of P crc .

[0126] · Update the header information of P in .

[0127] Step 4: Apply the L2 / L3 routing module

[0128] Step 5: Forward P in to the matching egress port.

[0129] The CRC calculation module used in the above algorithm is the core module in NetCRC-NR. The CRC calculation module receives the payload of NetCRC-NR and calculates its CRC value using a deterministic hash function. The Intel Tofino programmable switch architecture allows designers to use Hash extern to implement custom hash functions and provides the CRCPolynomial extern function to facilitate custom CRC polynomials. The present invention utilizes the above characteristics to define the CRC polynomial of 5G NR and calculate the CRC of the payload. The present invention defines six Hash externs corresponding to the CRC polynomials of the 6 CRC algorithms specified in the 5G NR standard. The output of Hash extern is the input payload λ (r,i)The CRC value, whose length varies according to different CRC polynomials and may be 24 bits, 16 bits, 11 bits or 6 bits. When initializing the CRC calculation, all CRC values are initialized to zero, except for CRC24C which is initialized to all ones according to the provisions of 3GPP TS 38.212.

[0130] A register module is also used in the above algorithm to save the previously calculated values. In the present invention, a status memory, i.e., a register array, is used in the register module, allowing the data plane program to read and write values during the packet forwarding process. The register array can contain data types of 8-bit, 16-bit, 32-bit values and their combinations. Developers can perform calculation operations on the registers through RegisterAction extern to update and access these register arrays. Given that the registers in the switch can store 8-bit, 16-bit, 32-bit values, while the sizes of the CRC polynomials are 24 bits, 16 bits, 11 bits and 6 bits respectively, the present invention makes the following arrangements: for the 24-bit polynomial, 32-bit registers are used; for the 16-bit and 11-bit polynomials, 16-bit registers are used; for the 6-bit CRC, 8-bit registers are used. The present invention defines the following input / output fields:

[0131] - value: Represents the input CRC value calculated in the calculation module.

[0132] - value': Represents the previously stored value, with a default value of zero.

[0133] - RST: Used to reset the registers within the module.

[0134] - EN: Used to enable the register module.

[0135] - RW: Used to enable read / write operations.

[0136] Figure 4 The parser state machine of NetCRC-NR is shown. The parser is a programmable state machine responsible for extracting user-defined headers and metadata from inbound packets. In P4, the parser has an explicit start state from which it starts to extract data. The parser has two final states: Accept or Reject. If the state is Reject, the inbound packet will be discarded; otherwise, the packet will be passed to the ingress control where the actual algorithm logic is implemented.

[0137] The NetCRC-NR of the present invention significantly speeds up the CRC calculation by offloading the CRC calculation to a programmable switch. It fully complies with the 5G NR standard and can be seamlessly integrated into the existing network infrastructure without major modifications.

[0138] NetCRC-NR performs excellently, as shown in Table 1 and Table 2. In the case of using the UDP transport protocol on a single switch port, for a 768-bit payload, NetCRC-NR can achieve a CRC throughput of 56 Gbps; while for a 1536-bit payload, this figure increases to 73 Gbps. The corresponding packet processing rates are 73.67 million packets per second and 47 million packets per second respectively.

[0139] With the support of a 100 Gbps network card, NetCRC-NR achieves a total network throughput of up to 88 Gbps, demonstrating its efficient data processing ability. Regarding protocol efficiency, when the payload size is 1536 bits and UDP is used for carrying, the efficiency reaches 73%; while in the IPv4 and Ethernet environments, this value increases to 75.3% and 81.7% respectively. For smaller payloads, such as 96 bytes, the protocol efficiencies when carried by UDP, IPv4, and Ethernet are 57.4%, 60.37%, and 69.04% respectively.

[0140] NetCRC-NR also shows excellent scalability. When 62 baseband units are connected to an Intel Tofino programmable switch, the throughput supported by the system can reach 5.065 Tbps. In addition, NetCRC-NR effectively manages the on-chip memory resources of the switch, ensuring that there is sufficient space for both traditional network processing and CRC acceleration tasks, as shown in Table 3.

[0141] Table 1 Receiver system performance when using UDP as the transport protocol and the payload size is 768 bits

[0142]

[0143] Table 2 Receiver system performance when using UDP as the transport protocol and the payload size is 1536 bits

[0144]

[0145] Table 3 NetCRC-NR Intel Tofino switch resource usage

[0146] Resource Name Used Available Usage Rate Action Data Bus 34 1536 2.2％ Exact Match Input Xbar 409 1536 26.6％ Hash Dis tunit 9 72 12.5％ Logical Table ID 13 192 6.8％ Hash bit 233 4992 4.7％ SRAM 20 960 2.1％ VLIM Instruction 16 384 4.2％ Pipes 1 4 25％ Stages within a single pipe 5 12 41.6％

[0147] Applying the method provided by the present invention, in the actual system construction, the present invention uses an Intel Tofino programmable switch that supports a maximum throughput of 6.4 Tbps as the core network device, and is equipped with two servers with Intel Xeon Silver 4310 CPUs (2.10 GHz, 48 cores) to meet the computing requirements. These two servers are connected to the Intel Tofino switch through 100 Gbps direct attach copper (DAC) cables, and each server is equipped with a Mellanox ConnectX-5 100G network interface card (NIC). In terms of software, the data plane programs the switch through the P4 language and Intel P4 Studio, the control plane uses Python to write application programs, and the server-side application is developed based on the C language and DPDK v19.

[0148] In the experiment, the application program at the sending end is responsible for constructing Ethernet, IP, UDP, and NetCRC-NR headers, and generating payloads with random data. To collect the experimental results, first start the DPDK application on the receiving server, and then start the corresponding application on the sending server. The receiving server only records the results in a file when there are arriving packets in the Rx queue. During each experiment, the two servers are configured to continuously transmit and receive packets for a total of 120 seconds.

[0149] The performance metrics of the present invention include the CRC calculation throughput T crc , the packet rate P rate , the code block rate R cb , the total network throughput T net , and the protocol efficiency η.

[0150] Among them, the CRC throughput T crc represents the total throughput of NetCRC-NR performing CRC generation / verification per second.

[0151] P size = P overhead + P header + L size

[0152] T crc = L size × P rate

[0153] Among them, L size is the payload size of NetCRC-NR, P size is the packet size, P header is the protocol header length, and P overhead represents the protocol overhead. For NetCRC-NR, the total protocol overhead Poverhead It includes 38 bytes of Ethernet overhead, 20 bytes of IPv4 overhead, 8 bytes of UDP overhead, and 5 bytes of the NetCRC-NR general header.

[0154] Packet rate P rate Refers to the number of data packets sent or received per second (pps), which is a key indicator for evaluating network performance. Let the bandwidth of the switch port or network card be B nic , in Gbps, and the data packet size be P size , in bytes. Then the packet rate is:

[0155]

[0156] Code block rate R cb Refers to the number of code blocks (CBs) that have been calculated by NetCRC-NR:

[0157]

[0158] where k cb is the number of bits in each code block.

[0159] Total network throughput T net Is calculated as follows:

[0160] T net = P size × P rate

[0161] The protocol efficiency η is defined as the ratio of the payload size L size to the data packet size P size .

[0162]

[0163] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principles of the present invention, several improvements and deformations can still be made, and these changes and deformations should also be regarded as the protection scope of the present invention.

Claims

1. A method for accelerating cyclic redundancy check calculation in 5G wireless access network based on a programmable switch, characterized in that: include: The server sends TB / CB and divides the data packet into multiple segments, where the length of multiple segments meets the switch requirements; The switch receives the multiple segments and continues to calculate the CRC of the received segments until the last segment in the TB / CB is received; If the switch has not received the last segment, the switch will calculate the CRC of the last segment and perform an XOR operation with the CRC of the previous segment temporarily stored in the register, and use the result of the operation to update the register; if the switch receives the last segment, the switch reads the temporarily stored value in the register, completes the complete CRC calculation of TB / CB, and then resets the register module; If only CRC generation is required for the current segment, the switch appends the final CRC value to the data packet; If the segment also needs CRC verification, the switch will compare the final CRC value with the input P in Compare the CRC values ​​and append the pass or fail result to the segment header. The switch applies L2 / L3 routing to forward the segment to the destination MAC / IPv4 address, otherwise, the segment will be sent back to the same ingress port.

2. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that: The server sends TB / CB and divides the data packet into multiple segments: In the 5G wireless access network, the MAC layer organizes data into transport blocks with CRC check codes and transmits them to the PHY layer. The transport block TB is the basic load unit transmitted between the MAC layer and the physical layer. The PHY layer adopts the LDPC coding scheme, and the maximum size of its code block is K. cb , its specific value depends on the coding structure adopted by LDPC; The maximum size of a transport block TB is 1,277,992 bits. When a transport block exceeds the maximum size, it is split into multiple code blocks CB of equal size, and a CRC check bit is added to each code block: Let A = {b0′, b1′, …, b′ N+L-1 } is a transport block input sequence with an L-bit CRC check code, where |A|=N+L represents the bit length of the input sequence. The transport block TB is divided into multiple code blocks of equal size, each of which is attached with a μ-bit CRC check code. The number of code blocks after division M is as follows, where μ=24; Assume Φ r represents the rth code block, where 0≤r≤M-1, and the size of each code block is K cb ; Each code block ψ r Split into k segments, denoted as λ (r,i) , a code block can be represented as a set of equal-sized fragments: ψ r ={λ (r，0) ,λ (r，1) , …, λ (r，i) }, where λ (r,i) represents the i-th fragment in the r-th code block, 0≤i≤k.

3. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that: The switch receives the plurality of segments and continuously calculates the CRC of the received segments: Using the linear characteristics of the CRC function, the rth code block ψ r To perform CRC calculation, let Φ(·) be a general CRC function and apply Φ(·) to the code block ψ r , and the following expression is obtained:

4. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that: When the data packet is transmitted via Ethernet, specify EtherType as ABCD 16 ; When NetCRC-NR is embedded in the L3 payload, it uses the IPv4 packet format and specifies the protocol type number as 33 10 ; When NetCRC-NR is carried via UDP, the reserved source port is 55433 10 .

5. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that: The segment header is used to carry the key information required to perform CRC generation and verification, and includes the following header fields: Type: A 4-bit field indicating the CRC polynomial type. Its value can be 0, 1, 2, 3, 4, and 5, corresponding to the six CRC algorithms CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6 specified in 5GNR TS 38.

212. Its specific value depends on the channel type or transport block size. Last: A 1-bit header field that indicates whether the incoming packet is the last transport block or code block fragment. Check: A 1-bit field used to distinguish between generation and verification. When it is 1, NetCRC-NR generates a segmented CRC value and compares it with the CRC value appended to the end of the packet. When the value is 0, only the segmented CRC value is generated; Pass: A 1-bit field that indicates the result of the CRC verification function. It is 0 if the verification fails, otherwise it is 1. TBSize: A 16-bit field indicating the size of a transport block or code block. SeqID: A 16-bit field indicating the sequence number of a code block or transport block.

6. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that: The transport block TB or code block CB is segmented using a packet generation algorithm: Step 1: Initialize an empty queue Q to store the generated NetCRC-NR packets; Step 2: Traverse i from 0 to k-1, for each segment λ i Perform the following substeps: Sub-step 2.1: Create a new NetCRC-NR packet Pkt; Sub-step 2.2: Set the current segment λ i =Ω[iβ:(i+1)β] as the effective load of Pkt; Sub-step 2.3: If it is the last segment (i.e., i=k-1), set the Last flag to 1; Sub-step 2.4: Add Pkt to queue Q; The input is a transport block TB or a code block CB, denoted as Ω; the output is a queue containing all generated packets, denoted as Q; where k is the number of segments per Ω; β: the number of bits per segment; λ i : The i-th segment in Ω.

7. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that: The CRC generation and verification includes: Step 1: Check and process NetCRC-NR packets If P in If it is a NetCRC-NR packet, continue: From P in Extract NetCRC-NR header P crc ; Calculate λ using the CRC calculation module (r，i) The CRC value is set as value; Step 2: Processing non-last segments If P crc The last field of is 0 (indicating that it is not the last segment), then: Read the current value from the register and set it to value'; Performing an XOR operation: Update the register with the updated value′; Step 3: Process the last segment If P crc The last field of is 1 (indicating that it is the last segment), then: Read the current value from the register and set it to value'. To perform an XOR operation: Reset register module. If P crc If the check field of P is 0 (indicating no CRC check), then value′ is appended to P in ; If P crc If the check field is 1 (indicating a CRC check), the calculated value′ is compared with P in The CRC value in the header and the comparison result is set to P crc The pass field Update P in Header information. Step 4: Apply L2 / L3 routing module Step 5: Place P in Forward to the matching egress port; Algorithm input: (1) P in : Input packet from the parser; (2) λ (r,i) : the i-th segment in the r-th transport block (TB) or code block (CB); Algorithm output: Updated P in Packets and their header information; value: represents the input CRC value calculated in the calculation module; value': represents the previously stored value, the default value is zero; RST: used to reset the registers within the module; EN: used to enable the register module; RW: used to enable read / write operations.

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