Micro-LED display chip and preparation method thereof

Abstract

The invention relates to the technical field of semiconductor devices, and discloses a Micro-LED display chip and a preparation method thereof. The Micro-LED display chip comprises a substrate, at least two layers of LED unit layers and a conductive column. The substrate includes a plurality of first contacts. The at least two LED unit layers are arranged on the substrate in a stacked mode, and each LED unit layer comprises a plurality of LED units arranged at intervals and a plurality of conductive reflection cups in one-to-one correspondence with the LED units. And the vertical projections of the plurality of LED units and the plurality of first contacts on the substrate are not overlapped. The conductive reflection cups are electrically connected with the first doped semiconductor layers of the corresponding LED units. Each conductive reflection cup comprises an extending part extending to the outer portion of the side face of the corresponding LED unit. And the conductive columns are used for electrically connecting the extending parts with the corresponding first contacts, so that each LED unit can be independently driven. According to the invention, the alignment precision requirement during processing can be reduced, so that the processing technology difficulty is reduced, and the yield of the device is improved.

Description

Technical Field

[0001] This application belongs to the technical field of semiconductor devices, and particularly relates to a Micro-LED display chip and a method for manufacturing the same. Background Art

[0002] Micro-LED (Micro Light Emitting Diode) display chips can be applied to wearable devices, virtual reality (VR) / augmented reality (AR) devices, etc. to achieve self-luminescence.

[0003] In related technologies, the LED units of the Micro-LED display chip are located directly above the corresponding contacts and are vertically connected to the corresponding contacts. For example, vertical connection is achieved through hybrid bonding, which requires extremely high alignment accuracy during processing, resulting in high processing difficulty and reduced yield. Summary of the Invention

[0004] This application aims to solve at least one of the technical problems existing in the related technologies.

[0005] Therefore, in the first aspect of this application, a Micro-LED display chip is provided.

[0006] In the second aspect of this application, a method for manufacturing a Micro-LED display chip is provided.

[0007] In view of this, according to the first aspect of the embodiments of this application, a Micro-LED display chip is proposed, including: a substrate including a plurality of first contacts; at least two layers of LED unit layers stacked above the substrate, each layer of the LED unit layers including a plurality of LED units arranged at intervals and a plurality of conductive reflective cups corresponding to the plurality of LED units one by one, the vertical projections of the plurality of LED units and the plurality of first contacts on the substrate do not overlap, the LED unit includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked, the conductive reflective cup is electrically connected to the first doped semiconductor layer of the corresponding LED unit, and the conductive reflective cup includes an extending portion extending to the outside of the side surface of the corresponding LED unit; a conductive column for electrically connecting the extending portion to the corresponding first contact so that each LED unit can be individually driven.

[0008] In a possible implementation, at least two layers of LED unit layers include: a first LED unit layer including a plurality of first LED units arranged at intervals and a first filling layer located between adjacent first LED units, the first filling layer is melt-bonded above the substrate and forms a gap between the first LED unit and the substrate; a second LED unit layer disposed above the first LED unit layer and including a plurality of second LED units arranged at intervals.

[0009] In a possible implementation, the display chip further includes: a first planarization layer formed above the first LED unit layer; the second LED unit layer further includes a second filling layer located between adjacent second LED units, and the second filling layer is melt-bonded above the first planarization layer to form a gap between the second LED unit and the first planarization layer.

[0010] In a possible implementation, the display chip further includes: a second planarization layer formed above the second LED unit layer; a third LED unit layer including a plurality of third LED units arranged at intervals and a third filling layer located between adjacent third LED units, and the third filling layer is melt-bonded above the second planarization layer to form a gap between the third LED unit and the second planarization layer; wherein at least one of the first LED units, at least one of the adjacent second LED units, and at least one of the adjacent third LED units form a full-color pixel.

[0011] In a possible implementation, the vertical projections of the plurality of LED units located in different LED unit layers on the substrate do not overlap.

[0012] In a possible implementation, the conductive reflective cup surrounds the side and / or bottom surface of the corresponding LED unit.

[0013] In a possible implementation, the display chip further includes: a transparent conductive layer disposed on the upper surface of each LED unit and electrically connected to the second doped semiconductor layer of the LED unit, and the transparent conductive layer includes an extension region located on the upper side of the LED unit; a common conductive column electrically connected to a plurality of adjacent extension regions, and the plurality of extension regions are located in different LED unit layers so that the common conductive column is electrically connected to the second doped semiconductor layers of the adjacent plurality of LED units.

[0014] In a possible implementation, each LED unit layer further includes: a passivation layer disposed between the LED unit and the corresponding conductive reflective cup, and the passivation layer at least covers the side surface of the LED unit and extends to the outside of the LED unit, so that the upper surface of the passivation layer is flush with the upper surface of the LED unit.

[0015] According to the second aspect of the embodiments of the present application, a method for manufacturing a Micro-LED display chip is provided, including the following steps: Provide a substrate, the substrate including a plurality of first contacts; Prepare an LED unit layer, where the LED unit layer includes a plurality of LED units arranged at intervals and a plurality of conductive reflective cups corresponding to the plurality of LED units one by one. The LED unit includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked. The conductive reflective cup is electrically connected to the first doped semiconductor layer of the corresponding LED unit, and the conductive reflective cup includes an extending portion extending to the outside of the side surface of the corresponding LED unit; Stack at least two layers of the LED unit layers above the substrate. Among them, the vertical projections of the plurality of LED units and the plurality of first contacts on the substrate do not overlap, and the extending portion of the conductive reflective cup is electrically connected to the corresponding first contact through a conductive column, so that each LED unit can be independently driven.

[0016] In a possible implementation manner, the steps of preparing the LED unit layer include: Provide a substrate, and an LED epitaxial layer is provided on one side of the substrate; Etch the side of the LED epitaxial layer facing away from the substrate to form a plurality of LED units; Form a passivation layer, and the passivation layer covers at least the side surfaces of the LED units and the LED epitaxial layer between adjacent LED units; Form a plurality of the conductive reflective cups, and the plurality of conductive reflective cups correspond to the plurality of LED units one by one and are electrically connected to the first doped semiconductor layers of the plurality of LED units correspondingly; Form a filling layer, and the filling layer covers the passivation layer and the plurality of conductive reflective cups.

[0017] In a possible implementation manner, at least two layers of LED unit layers include a first LED unit layer and a second LED unit layer. The steps of stacking at least two layers of the LED unit layers above the substrate include: Fusion bond the first LED unit layer above the substrate, and form a gap between the LED units of the first LED unit layer and the substrate; Remove the substrate and part of the LED epitaxial layer of the first LED unit layer to expose the upper surface of the corresponding passivation layer and the upper surface of the LED unit.

[0018] In a possible implementation manner, the steps of stacking at least two layers of the LED unit layers above the substrate further include: A transparent conductive layer is formed, which covers at least the upper surface of each LED unit of the first LED unit layer and is electrically connected to the second doped semiconductor layer of each corresponding LED unit; the transparent conductive layer also covers the upper surface of at least part of the passivation layer of the first LED unit layer to form an extended area; A first planarization layer is formed, and the first planarization layer covers the first LED unit layer and the transparent conductive layer formed on the first LED unit layer; The second LED unit layer is melt-bonded above the first planarization layer.

[0019] In a possible implementation manner, the step of forming the first planarization layer includes: A first transition layer is formed, and the first transition layer covers the passivation layer of the first LED unit layer and the transparent conductive layer formed on the first LED unit layer; The first transition layer and the first LED unit layer are etched to form a plurality of first through holes exposing a plurality of the first contacts, and part of the first through holes penetrate through the protruding portions of the conductive reflective cups of the first LED unit layer; A plurality of conductive columns are formed in the plurality of first through holes, wherein part of the conductive columns are electrically connected to the first contacts and the protruding portions of the conductive reflective cups of the corresponding first LED unit layer respectively; Part of the first transition layer is removed to form the first planarization layer.

[0020] In a possible implementation manner, the step of melt-bonding the second LED unit layer above the first planarization layer includes: The filling layer of the second LED unit layer is melt-bonded above the first planarization layer, and a gap is formed between the LED units of the second LED unit layer and the first planarization layer; The substrate and part of the LED epitaxial layer of the second LED unit layer are removed to expose the upper surface of the corresponding passivation layer and the upper surface of the LED unit.

[0021] In a possible implementation manner, after the step of melt-bonding the second LED unit layer above the first planarization layer, the manufacturing method further includes: A transparent conductive layer is formed, which covers at least the upper surface of each LED unit of the second LED unit layer and is electrically connected to the second doped semiconductor layer of each corresponding LED unit; the transparent conductive layer also covers the upper surface of at least part of the passivation layer of the second LED unit layer to form an extended area; A second transition layer is formed, and the second transition layer covers the passivation layer of the second LED unit layer and the transparent conductive layer formed on the second LED unit layer; Part of the second transition layer is removed to form a second planarization layer.

[0022] In a possible implementation manner, before the step of removing part of the second transition layer, the preparation method further includes: The second transition layer and the second LED unit layer are etched to form a second through hole, and the second through hole penetrates through the protruding portion of the conductive reflective cup of the second LED unit layer and exposes part of the conductive column formed in the first through hole; The second through hole is filled, and a conductive column is formed in the second through hole. The conductive column formed in the second through hole is electrically connected to the corresponding conductive column formed in the first through hole, and is used to electrically connect the protruding portion of the conductive reflective cup of the second LED unit layer and the corresponding first contact.

[0023] In a possible implementation manner, while etching the second transition layer and the second LED unit layer to form the second through hole, a third through hole is formed, and the third through hole penetrates through the extension region of the transparent conductive layer formed on the first LED unit layer and the extension region of the transparent conductive layer formed on the second LED unit layer; A common conductive column is formed in the third through hole, wherein the common conductive column is electrically connected to the extension region formed on the transparent conductive layer of the first LED unit layer and the extension region formed on the transparent conductive layer of the second LED unit layer respectively.

[0024] The Micro-LED display chip and its preparation method provided by the present application can at least achieve the following technical effects: The vertical projections of multiple LED units and multiple first contacts on the substrate do not overlap, so that the LED units and the corresponding first contacts are not in the same vertical direction, and vertical connection is not required. For example, the first contact is located on the side below the corresponding connected LED unit, increasing the operating space for connection processing, avoiding or reducing damage to the LED units during processing, and reducing the alignment accuracy requirements during processing.

[0025] A plurality of conductive reflective cups correspond to a plurality of LED units one by one. The conductive reflective cups are electrically connected to the first doped semiconductor layer of the corresponding LED units, realizing the electrical connection between the conductive reflective cups and the corresponding LED units. The conductive reflective cups include protruding portions extending to the outside of the sides of the corresponding LED units, and the protruding portions are electrically connected to the corresponding first contacts through conductive columns, realizing the electrical connection between the first doped semiconductor layer of the LED units and the corresponding first contacts, so that each LED unit can be individually driven, and the alignment accuracy requirements during processing can be reduced, thereby reducing the processing difficulty of the process and improving the yield of the device. It can also extend the current path, disperse thermal stress and mechanical stress, and further improve the performance of the device.

[0026] The above general description and the following description are only exemplary and explanatory, and are not used to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] One or more embodiments are exemplarily illustrated by corresponding drawings. These exemplary illustrations and the drawings do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements. The drawings do not constitute a scale limitation, and in which: Figure 1 is a schematic structural diagram of a display chip provided by an embodiment of the present disclosure; Figure 2 is a schematic diagram of the structure during the process of preparing the first LED unit layer provided by an embodiment of the present disclosure Figure 1 ; Figure 3 is a schematic diagram of the structure during the process of preparing the first LED unit layer provided by an embodiment of the present disclosure Figure 2 ; Figure 4 is a schematic diagram of the structure during the process of preparing the first LED unit layer provided by an embodiment of the present disclosure Figure 3 ; Figure 5 is a schematic diagram of the structure during the process of preparing the first LED unit layer provided by an embodiment of the present disclosure Figure 4 ; Figure 6 is a schematic diagram of the structure during the process of preparing the first LED unit layer provided by an embodiment of the present disclosure Figure 5 ; Figure 7 is a schematic diagram of the structure during the process of preparing the second LED unit layer provided by an embodiment of the present disclosure Figure 1 ; Figure 8 is a schematic diagram of the structure during the process of preparing the second LED unit layer provided by an embodiment of the present disclosure Figure 2 ; Figure 9 is a schematic diagram of the structure during the process of preparing the second LED unit layer provided by an embodiment of the present disclosureFigure 3 ; Figure 10 Schematic diagram of the structure during the preparation of the second LED unit layer provided by the present disclosure Figure 4 ; Figure 11 Schematic diagram of the structure during the preparation of the display chip provided by the present disclosure Figure 1 ; Figure 12 Schematic diagram of the structure during the preparation of the display chip provided by the present disclosure Figure 2 ; Figure 13 Schematic diagram of the structure during the preparation of the display chip provided by the present disclosure Figure 3 ; Figure 14 Schematic diagram of the structure during the preparation of the display chip provided by the present disclosure Figure 4 ; Figure 15 Schematic diagram of the structure during the preparation of the display chip provided by the present disclosure Figure 5 ; Figure 16 Schematic diagram of the structure during the preparation of the display chip provided by the present disclosure Figure 6 ; Figure 17 Schematic diagram of the structure during the preparation of the display chip provided by the present disclosure Figure 7 ; Figure 18 Flowchart of the method for preparing a display chip provided by an embodiment of the present disclosure; Figure 19 Flowchart of the preparation of the LED unit layer provided by the embodiment of the present disclosure; Figure 20 Flowchart of the method for preparing a display chip provided by another embodiment of the present disclosure; Figure 21 Flowchart of the method for preparing a display chip provided by still another embodiment of the present disclosure; Figure 22 Flowchart of the method for preparing a display chip provided by yet another embodiment of the present disclosure.

[0028] The reference numerals are shown as: 1: Display chip; 10: Substrate; 11: First contact; 20: First LED unit layer; 21: First LED unit; 22: First conductive reflective cup; 221: First protruding portion; 23: First filling layer; 24: First passivation layer; 25: First LED epitaxial layer; 26: First substrate; 27: First through hole; 30: Second LED unit layer; 31: Second LED unit; 32: Second conductive reflective cup; 321: Second protruding portion; 33: Second filling layer; 34: Second passivation layer; 35: Second LED epitaxial layer; 36: Second substrate; 37: Second through hole; 38: Third through hole; 40: Conductive column; 50: First planarization layer; 51: First transition layer; 60: Second planarization layer; 61: Second transition layer; 70: Transparent conductive layer; 71: Extension area; 80: Common conductive column. Detailed implementation manners

[0029] In order to understand the features and technical content of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. The accompanying drawings are only for reference and illustration purposes and are not intended to limit the embodiments of the present disclosure. In the following technical description, for the sake of explanation, numerous details are provided to give a full understanding of the disclosed embodiments. However, one or more embodiments can still be implemented without these details. In other cases, well-known structures and devices may be shown in a simplified manner to simplify the drawings.

[0030] In the embodiments of the present disclosure, the terms "first", "second", etc. in the specification and claims of the present disclosure and the above accompanying drawings are used to distinguish similar objects and do not have to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so as to implement the embodiments of the present disclosure described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion.

[0031] In the embodiments of the present disclosure, the orientation or positional relationship indicated by the terms "upper", "lower", "inner", "middle", "outer", "front", "rear", etc. is based on the orientation or positional relationship shown in the accompanying drawings. These terms are mainly used to better describe the embodiments of the present disclosure and their embodiments and are not intended to limit that the indicated devices, elements or components must have a specific orientation or be constructed and operated in a specific orientation. And, in addition to being able to represent an orientation or positional relationship, some of the above terms may also be used to represent other meanings. For example, the term "upper" may also be used to represent a certain attachment relationship or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in the embodiments of the present disclosure can be understood according to specific circumstances.

[0032] In addition, the terms "arranged", "connected", and "fixed" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, or there can be internal communication between two devices, components, or parts. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present disclosure can be understood according to specific circumstances.

[0033] Unless otherwise specified, the term "plurality" means two or more.

[0034] In the embodiments of the present disclosure, the character " / " indicates that the objects before and after are in an "or" relationship. For example, A / B means: A or B.

[0035] The term "and / or" is a description of the association relationship of objects, indicating that there can be three relationships. For example, A and / or B means: A or B, or, A and B these three relationships.

[0036] It should be noted that, without conflict, the embodiments in the embodiments of the present disclosure and the features in the embodiments can be combined with each other.

[0037] The term "layer" used in the embodiments of the present disclosure refers to a part of a material including a region having a certain thickness. The layer can extend over the entire underlying or overlying structure, or can have an extent less than the scope of the underlying or overlying structure. The layer can extend horizontally, vertically, and / or along a conical surface.

[0038] The term "Micro" LED used in the embodiments of the present disclosure refers to the descriptive size of certain devices or structures according to the embodiments of the present application. The term "Micro" device or structure used herein is intended to represent a scale of 0.1 μm to 100 μm. However, it should be understood that the embodiments of the present application are not necessarily limited thereto, and certain aspects of the embodiments can be applied to larger and possibly smaller size scales.

[0039] The term "substrate" used in the embodiments of the present disclosure refers to the material on which subsequent material layers are added. The substrate itself can be patterned. The material added on top of the substrate can be patterned or can remain unpatterned. In addition, the substrate can include various semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide. Alternatively, the substrate can be made of a non-conductive material, such as glass, plastic, or a sapphire wafer. Further alternatively, the substrate can have semiconductor devices or circuits formed therein.

[0040] Combined with Figures 1 to 17As shown, according to the first aspect of the embodiments of the present application, a Micro-LED display chip 1 is proposed, which includes a substrate 10 and at least two layers of LED unit layers. The substrate 10 includes a plurality of first contacts 11. At least two layers of LED unit layers are stacked above the substrate 10. Each layer of LED unit layer respectively includes a plurality of LED units arranged at intervals and a plurality of conductive reflective cups corresponding to the plurality of LED units one by one. The vertical projections of the plurality of LED units and the plurality of first contacts 11 on the substrate 10 do not overlap. The LED unit includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked. The conductive reflective cup is electrically connected to the first doped semiconductor layer of the corresponding LED unit. The conductive reflective cup includes an extending portion extending to the outside of the side surface of the corresponding LED unit. The conductive column 40 is used to electrically connect the extending portion to the corresponding first contact 11 so that each LED unit can be individually driven.

[0041] At least two layers of LED unit layers are stacked above the substrate 10, and each layer of LED unit layer respectively includes a plurality of LED units arranged at intervals to achieve multi-color or full-color display of the display chip 1. In the description of the embodiments of the present disclosure, the terms "upper" and "lower" indicating the orientation or positional relationship are based on the attached Figure 1 orientation or positional relationship shown, which will not be elaborated below.

[0042] The plurality of conductive reflective cups correspond to the plurality of LED units one by one. The conductive reflective cup is electrically connected to the first doped semiconductor layer of the corresponding LED unit to achieve electrical connection between the conductive reflective cup and the corresponding LED unit. The conductive reflective cup includes an extending portion extending to the outside of the side surface of the corresponding LED unit. Through the extending portion, the LED unit and the corresponding first contact 11 do not need to be vertically connected. The extending portion is electrically connected to the corresponding first contact 11 through the conductive column 40, so as to achieve electrical connection between the first doped semiconductor layer of the LED unit and the corresponding first contact 11, so that each LED unit can be individually driven, and the alignment accuracy requirement during processing can be reduced, thereby reducing the processing difficulty of the process and improving the yield of the device. It can also extend the current path, disperse thermal stress and mechanical stress, and further improve the performance of the device. Among them, the material of the conductive reflective cup is not limited. For example, it can be aluminum or silver, etc. The material of the conductive column 40 is not limited. For example, it can be copper or tungsten, etc. In the description of the embodiments of the present disclosure, "corresponding" refers to the relationship between two structures that need to be connected to each other or are positionally related, which will not be elaborated below.

[0043] The vertical projections of the plurality of LED units and the plurality of first contacts 11 on the substrate 10 do not overlap, so that the LED unit and the corresponding first contact 11 are not in the same vertical direction and do not need to be vertically connected. For example, as Figure 1As shown, the first contact 11 is located on the side below the corresponding connected LED unit, which can increase the operating space for connection processing, avoid or reduce damage to the LED unit during processing, and reduce the requirement for alignment accuracy during processing. In the description of the disclosed embodiments, the vertical projection on the substrate 10 refers to the projection in the direction perpendicular to the upper surface of the substrate 10 (i.e., along Figure 1 the up and down direction in

[0044] The substrate 10 may be provided with a circuit layer including complementary metal oxide semiconductor (CMOS) devices or thin film transistor (TFT) devices, etc. These CMOS devices or TFT devices can constitute a driving circuit.

[0045] The substrate 10 includes a plurality of first contacts 11, and the first contacts 11 may be anode metal contacts. The substrate 10 further includes at least one second contact (not shown in the figure), and the second contact may be a cathode metal contact. The LED unit includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked, and the first doped semiconductor layer is close to the substrate 10 side. Among them, the first doped semiconductor layer may be a p-type semiconductor layer. For example, specifically, it may be p-type gallium nitride (GaN) or p-type aluminum indium gallium nitride (AlInGaN). The second doped semiconductor layer may be an n-type semiconductor layer. For example, specifically, it may be n-type gallium nitride (GaN) or n-type aluminum indium gallium nitride (AlInGaN). The first doped semiconductor layer of each LED unit is electrically connected to a corresponding first contact 11, and the second doped semiconductor layers of multiple LED units may be commonly electrically connected to the second contact to form a common cathode structure, so that each LED unit can be individually driven. To achieve driving the active layer of each LED unit to emit light (for example, it can emit green light, blue light or red light).

[0046] In a possible implementation manner, the size of the LED unit is 0.1 μm to 10 μm. The size in this embodiment may refer to the planar size such as the length, width or diameter of the LED unit.

[0047] In some embodiments, in combination with Figure 1As shown, at least two LED unit layers include a first LED unit layer 20 and a second LED unit layer 30. The first LED unit layer 20 includes a plurality of first LED units 21 arranged at intervals and a first filling layer 23 located between adjacent first LED units 21. The first filling layer 23 is fusion-bonded above the substrate 10 and forms a gap between the first LED units 21 and the substrate 10. The second LED unit layer 30 is disposed above the first LED unit layer 20, and the second LED unit layer 30 includes a plurality of second LED units 31 arranged at intervals.

[0048] Specifically, the first LED unit layer 20 and the second LED unit layer 30 are stacked above the substrate 10.

[0049] Among them, the first LED unit layer 20 includes a plurality of first LED units 21 arranged at intervals and a first filling layer 23 located between adjacent first LED units 21. By fusion-bonding the first filling layer 23 with the substrate 10 (Fusion Bond), the first LED unit layer 20 is disposed above the substrate 10, and further, a plurality of first LED units 21 are disposed above the substrate 10. The processing technology is simple and the processing difficulty is reduced. A gap is formed between the first LED units 21 and the substrate 10 through the first filling layer 23, improving the reliability of the fusion bonding, and further improving the reliability and performance of the device. The material of the first filling layer 23 is not limited. For example, it can be silicon dioxide.

[0050] By fusion-bonding the first filling layer 23 with the substrate 10 and electrically connecting the LED unit and the corresponding first contact 11 through the conductive reflective cup and the conductive column, the requirement for alignment accuracy is reduced and the processing difficulty is reduced.

[0051] The vertical projections of the plurality of first LED units 21 and the plurality of first contacts 11 on the substrate 10 do not overlap, which can increase the operating space when the first LED units 21 are connected to the corresponding first contacts 11, avoid or reduce the damage to the first LED units 21 during processing, and reduce the requirement for alignment accuracy during processing, improving the yield of the device.

[0052] The first LED unit layer 20 further includes a plurality of first conductive reflective cups 22 corresponding to the plurality of first LED units 21 one by one, and each first conductive reflective cup 22 is electrically connected to the first doped semiconductor layer of the corresponding first LED unit 21.

[0053] Furthermore, by disposing the second LED unit layer 30 above the first LED unit layer 20, the first LED unit layer 20 and the second LED unit layer 30 are stacked above the substrate 10. The second LED unit layer 30 includes a plurality of second LED units 31 arranged at intervals. The vertical projections of the plurality of second LED units 31 and the plurality of first contacts 11 on the substrate 10 do not overlap, which can increase the operating space when the second LED unit 31 is connected to the corresponding first contact 11, avoid or reduce the damage to the second LED unit 31 during processing, and reduce the alignment accuracy requirements during processing, thereby improving the device yield.

[0054] The second LED unit layer 30 further includes a plurality of second conductive reflective cups 32 corresponding to the plurality of second LED units 31 one by one. Each second conductive reflective cup 32 is electrically connected to the first doped semiconductor layer of the corresponding second LED unit 31.

[0055] During actual processing, the first planarizing layer 23 can be directly fusion-bonded to the substrate 10. Among them, the surface material of the substrate 10 on the side where it is fusion-bonded to the first planarizing layer 23 can include silicon dioxide. Alternatively, a material layer (such as a silicon dioxide layer) can be provided on the upper surface of the substrate 10, and the first planarizing layer 23 is fusion-bonded to the silicon dioxide layer to realize the arrangement of the plurality of second LED units 31 above the substrate 10.

[0056] In the embodiments of the present disclosure, the first LED unit 21 refers to the LED unit of the first LED unit layer 20, the first passivation layer 24 refers to the passivation layer of the first LED unit layer 20, the first conductive reflective cup 22 refers to the conductive reflective cup of the first LED unit layer 20, the first conductive reflective cup 22 includes a first protruding portion 221, and the first planarizing layer 23 refers to the planarizing layer of the first LED unit layer 20, which will not be elaborated hereinafter.

[0057] In the embodiments of the present disclosure, the second LED unit 31 refers to the LED unit of the second LED unit layer 30, the second passivation layer 34 refers to the passivation layer of the second LED unit layer 30, the second conductive reflective cup 32 refers to the conductive reflective cup of the second LED unit layer 30, the second conductive reflective cup 32 includes a second protruding portion 321, and the second planarizing layer 33 refers to the planarizing layer of the second LED unit layer 30, which will not be elaborated hereinafter.

[0058] In some embodiments, in combination with Figure 1 and Figures 14 to 17As shown, the display chip 1 further includes a first planarization layer 50. The first planarization layer 50 is formed above the first LED unit layer 20. The second LED unit layer 30 further includes a second filling layer 33 located between adjacent second LED units 31. The second filling layer 33 is fusion bonded above the first planarization layer 50 and forms a gap between the second LED unit 31 and the first planarization layer 50.

[0059] The first planarization layer 50 is formed above the first LED unit layer 20, for protecting the first LED unit 21 and preparing for the fusion bonding process of the second LED unit layer 30. Among them, the material of the first planarization layer 50 is not limited. For example, it can be silicon dioxide.

[0060] The second LED unit layer 30 further includes a second filling layer 33 located between adjacent second LED units 31. By fusion bonding the second filling layer 33 with the first planarization layer 50, the second LED unit layer 30 is disposed above the first LED unit layer 20, and further, a plurality of second LED units 31 are disposed above the substrate 10. The processing process is simple and the processing difficulty is reduced. A gap is formed between the second LED unit 31 and the first planarization layer 50 through the second filling layer 33, improving the reliability of the fusion bonding, and further improving the reliability and performance of the device. The material of the second filling layer 33 is not limited. For example, it can be silicon dioxide.

[0061] By fusion bonding the second filling layer 33 with the first planarization layer 50, and by electrically connecting the LED unit and the corresponding first contact 11 through the conductive reflective cup and the conductive column, the requirement for alignment accuracy is reduced and the processing difficulty is reduced. That is to say, the LED unit layer of the embodiment of the present disclosure is stacked above the substrate 10 by means of fusion bonding, and the LED units of the LED unit layer are electrically connected to the corresponding first contacts 11 through the conductive columns. Compared with the hybrid bonding method, the alignment accuracy requirement during processing is reduced in this embodiment, the processing difficulty is reduced, and the yield of the device is improved.

[0062] In some embodiments, the display chip 1 further includes a second planarization layer 60 and a third LED unit layer. The second planarization layer 60 is formed above the second LED unit layer 30. The third LED unit layer includes a plurality of third LED units arranged at intervals and a third filling layer located between adjacent third LED units. The third filling layer is fusion bonded above the second planarization layer 60 and forms a gap between the third LED unit and the second planarization layer 60. Among them, at least one first LED unit 21, at least one adjacent second LED unit 31, and at least one adjacent third LED unit form a full-color pixel.

[0063] The second planarization layer 60 is formed above the second LED unit layer 30, and is used to protect the second LED units 31 and prepare for the fusion bonding process of the third LED unit layer. The material of the second planarization layer 60 is not limited. For example, it can be silicon dioxide.

[0064] The third LED unit layer includes a plurality of third LED units arranged at intervals and a third filling layer located between adjacent third LED units. Through the fusion bonding of the third filling layer and the second planarization layer 60, the third LED unit layer is disposed above the second LED unit layer 30, so that a plurality of third LED units are disposed above the substrate 10. The processing process is simple and the processing difficulty is reduced. An interval is formed between the third LED units and the second planarization layer 60 through the third filling layer, which improves the reliability of the fusion bonding, and further improves the reliability and performance of the device. The material of the third filling layer is not limited. For example, it can be silicon dioxide.

[0065] The first LED unit 21 emits first color light (for example, it can emit blue light), the second LED unit 31 emits second color light (for example, it can emit green light), and the third LED unit emits third color light (for example, it can emit red light). The first color light, the second color light, and the third color light are different. At least one first LED unit 21, at least one adjacent second LED unit 31, and at least one adjacent third LED unit form a full-color pixel to achieve full-color display.

[0066] The vertical projections of the plurality of third LED units and the plurality of first contacts 11 on the substrate 10 do not overlap, which can increase the operating space when the third LED unit is connected to the corresponding first contact 11, avoid or reduce the damage to the first LED unit 21 during processing, and reduce the alignment accuracy requirements during processing, thereby improving the device yield.

[0067] The third LED unit layer further includes a plurality of third conductive reflective cups corresponding to the plurality of third LED units one by one, and each third conductive reflective cup is electrically connected to the first doped semiconductor layer of the corresponding third LED unit.

[0068] In the embodiments of the present disclosure, the third LED unit refers to the LED unit of the third LED unit layer, the third conductive reflective cup refers to the conductive reflective cup of the third LED unit layer, the third conductive reflective cup includes a third protruding portion, and the third filling layer refers to the filling layer of the third LED unit layer, which will not be elaborated below.

[0069] In some embodiments, the vertical projections of the plurality of LED units located in different LED unit layers on the substrate 10 do not overlap.

[0070] Specifically, as Figure 1As shown, the vertical projections of multiple first LED units 21 and multiple second LED units 31 on the substrate 10 do not overlap, reducing optical crosstalk and improving the display effect. It can also be that the vertical projections of multiple first LED units 21, multiple second LED units 31, and multiple third LED units on the substrate 10 do not overlap.

[0071] Of course, the vertical projections of the first LED unit 21 and the second LED unit 31 on the substrate 10 can also overlap to improve brightness and color uniformity.

[0072] In some embodiments, the conductive reflective cup surrounds the side and / or the bottom of the corresponding LED unit.

[0073] By surrounding the side or the bottom of the corresponding LED unit with the conductive reflective cup, the light emitted by the corresponding LED unit can be reflected, improving the light extraction efficiency and preventing or reducing optical crosstalk.

[0074] As Figure 1 and Figures 11 to 17 shown, by surrounding the side and the bottom of the corresponding LED unit with the conductive reflective cup, the light emitted by the corresponding LED unit can be effectively reflected, reducing the light hitting the adjacent pixels, improving the light extraction efficiency, preventing or reducing optical crosstalk, making the light spot more concentrated, the pixel points more compact, and improving the resolution and display effect of the device.

[0075] In some embodiments, as Figure 1 shown, the display chip 1 further includes a transparent conductive layer 70 and a common conductive column 80. The transparent conductive layer 70 is disposed on the upper surface of each LED unit and is electrically connected to the second doped semiconductor layer of the LED unit. The transparent conductive layer 70 includes an extended area 71 located on the upper side of the LED unit. The common conductive column 80 is electrically connected to a plurality of adjacent extended areas 71, and the plurality of extended areas 71 are located on different LED unit layers, so that the common conductive column 80 is electrically connected to the second doped semiconductor layers of a plurality of adjacent LED units.

[0076] The transparent conductive layer 70 is disposed on the upper surface of each LED unit and is electrically connected to the corresponding second doped semiconductor layer of the LED unit to commonly electrically connect the second doped semiconductor layers of a plurality of LED units to the common conductive column 80. Subsequently, the common conductive column 80 can be connected to the second contact to realize commonly electrically connecting the second doped semiconductor layers of a plurality of LED units to the second contact, so that each LED is individually driven. The material of the transparent conductive layer 70 is not limited. For example, indium tin oxide (ITO). The material of the common conductive column 80 is not limited. For example, copper or tungsten.

[0077] The transparent conductive layer 70 includes an extended area 71 located on the upper side surface of the LED unit. That is, the transparent conductive layer 70 extends out of the corresponding LED unit to form the extended area 71, enabling the second doped semiconductor layer of the LED unit to be connected to the common conductive post 80 through the transparent conductive layer 70, increasing the processing space and reducing the processing difficulty.

[0078] The common conductive post 80 is electrically connected to the extended areas 71 of a plurality of adjacent transparent conductive layers 70, so that the second doped semiconductor layers of the plurality of adjacent LED units are commonly electrically connected to the common conductive post 80. The extended areas 71 of the plurality of transparent conductive layers 70 are located in different LED unit layers. For example, a common conductive post 80 is electrically connected to at least one extended area 71 formed on the first LED unit layer 20, and at the same time, is electrically connected to at least one extended area 71 formed on the second LED unit layer 30, which is convenient for processing and makes the device structure more compact.

[0079] In some embodiments, as Figure 1 shown, each LED unit layer further includes a passivation layer. The passivation layer is disposed between the LED unit and the corresponding conductive reflective cup. The passivation layer at least covers the side surface of the LED unit and extends to the outside of the LED unit, so that the upper surface of the passivation layer is flush with the upper surface of the LED unit.

[0080] As Figure 1 shown, the passivation layer is disposed between the LED unit and the corresponding conductive reflective cup. The passivation layer at least covers the side surface of the LED unit to protect the LED unit and prevent or reduce leakage. The passivation layer extends to the outside of the LED unit, so that the upper surface of the passivation layer is flush with the upper surface of the LED unit. Furthermore, the passivation layer can be used as a position reference during processing, reducing the processing difficulty of the process, avoiding or reducing device damage caused by overprocessing, and realizing the protection of the LED unit during the processing. For example, when etching the LED epitaxial layer, stop etching when reaching the passivation layer to protect the LED unit and obtain a complete LED unit, improving the processing efficiency and accuracy. The material of the passivation layer is not limited. For example, it can be silicon dioxide (SiO 2 ), or aluminum oxide (Al 2 O 3 ).

[0081] Combined with Figure 18 shown, according to the second aspect of the embodiments of the present application, a method for manufacturing a Micro-LED display chip is provided, including the following steps: S181. Provide a substrate, and the substrate includes a plurality of first contacts.

[0082] The plurality of first contacts 11 can be electrically connected to the first doped semiconductor layers of the plurality of LED units, so that each LED unit can be individually driven.

[0083] S182. Prepare an LED unit layer, which includes a plurality of LED units arranged at intervals and a plurality of conductive reflective cups corresponding to the plurality of LED units one by one. The LED unit includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked, and the conductive reflective cup is electrically connected to the first doped semiconductor layer of the corresponding LED unit. The conductive reflective cup includes a protruding portion extending outside the side surface of the corresponding LED unit.

[0084] By preparing the LED unit layer, it is prepared for stacking at least two LED unit layers above the substrate 10. For the technical effects of each structure in the LED unit layer, refer to the foregoing embodiments of the present disclosure and will not be elaborated herein.

[0085] S183. Stack at least two LED unit layers above the substrate. Among them, the vertical projections of the plurality of LED units and the plurality of first contacts on the substrate do not overlap, and the protruding portion of the conductive reflective cup is electrically connected to the corresponding first contact through a conductive column, so that each LED unit can be individually driven.

[0086] Combined with Figure 1 As shown, stack at least two LED unit layers above the substrate 10. The vertical projections of the plurality of LED units and the plurality of first contacts 11 on the substrate 10 do not overlap, reducing the alignment accuracy requirements during processing, thereby reducing the processing difficulty of the process and improving the yield of the device. It can also extend the current path, disperse thermal stress and mechanical stress, and further improve the performance of the device.

[0087] Combined with Figure 19 As shown, in some embodiments, the steps of preparing the LED unit layer include: S191. Provide a substrate, and an LED epitaxial layer is provided on one side of the substrate.

[0088] Combined with Figures 2 to 10 As shown, the substrate can be used to provide support. An LED epitaxial layer can be grown on one side of the substrate, and the substrate provides stable support for the growth of the LED epitaxial layer and the processing of the LED unit. The material of the substrate is not limited. For example, it can be silicon. The material of the LED epitaxial layer is not limited. For example, it can be gallium nitride (GaN).

[0089] In the embodiments of the present disclosure, combined with Figures 2 to 10 As shown, the first substrate 26 refers to the substrate of the first LED unit layer 20, the first LED epitaxial layer 25 refers to the LED epitaxial layer of the first LED unit layer 20, the second substrate 36 is the substrate of the second LED unit layer 30, and the second LED epitaxial layer 35 refers to the LED epitaxial layer of the second LED unit layer 30, which will not be elaborated hereinafter.

[0090] S192. Etch the side of the LED epitaxial layer facing away from the substrate to form a plurality of LED units.

[0091] By etching the side of the LED epitaxial layer facing away from the substrate, a plurality of LED units arranged at intervals are formed. Specifically, a mesa etching process can be used to etch the LED epitaxial layer to form a plurality of LED units. For example, in combination with Figure 2 and Figure 3 as shown, etch the side of the first LED epitaxial layer 25 facing away from the first substrate 26 to form a plurality of first LED units 21. For another example, in combination with Figure 7 as shown, etch the side of the second LED epitaxial layer 35 facing away from the second substrate 36 to form a plurality of second LED units 31.

[0092] S193. Form a passivation layer that at least covers the side surfaces of the LED units and the LED epitaxial layer between adjacent LED units.

[0093] The passivation layer can be formed by depositing a material (such as alumina or silica) so that the passivation layer at least covers the side surfaces of the LED units and the LED epitaxial layer between adjacent LED units. Specifically, in combination with Figure 4 and Figure 8 as shown, a material can be deposited on the surface of the etched LED epitaxial layer and the surface of the LED units to form a passivation material layer. The passivation material layer is etched to form a window, and the window exposes a part of the surface of the side of the LED unit facing away from the substrate, preparing for the electrical connection between the first doped semiconductor layer of the LED unit and the conductive reflective cup.

[0094] In a specific example, in combination with Figure 4 as shown, when preparing the first LED unit layer 20, a first passivation layer 24 is formed, and the first passivation layer 24 at least covers the side surfaces of the first LED units 21 and the first LED epitaxial layer 25 between adjacent first LED units 21.

[0095] In another specific example, in combination with Figure 8 as shown, when preparing the second LED unit layer 30, a second passivation layer 34 is formed, and the second passivation layer 34 at least covers the side surfaces of the second LED units 31 and the second LED epitaxial layer 35 between adjacent second LED units 31.

[0096] S194. Form a plurality of conductive reflective cups, which correspond to the plurality of LED units one by one and are correspondingly electrically connected to the first doped semiconductor layers of the plurality of LED units.

[0097] Prepare for the electrical connection between the first doped semiconductor layer of the LED unit and the corresponding first contact 11 through the plurality of conductive reflective cups. For the technical effects of the conductive reflective cups, refer to the foregoing embodiments of the present disclosure, and details are not described herein again.

[0098] Specifically, a metal material can be deposited on the side of the passivation layer facing away from the substrate to form a reflective metal layer. The reflective metal layer can also cover a part of the surface of the LED unit facing away from the substrate, and electrically connect the reflective metal layer to the first doped semiconductor layer of the corresponding LED unit. The reflective metal layer is processed by a photolithography patterning process to form a conductive reflective cup, and the conductive reflective cup surrounds the side surface of the LED unit and the side of the LED unit facing away from the substrate.

[0099] A specific example is as Figure 5 shown. When preparing the first LED unit layer 20, a plurality of first conductive reflective cups 22 are formed. The plurality of first conductive reflective cups 22 correspond one-to-one with the plurality of first LED units 21 and are correspondingly electrically connected to the first doped semiconductor layers of the plurality of first LED units 21.

[0100] Another specific example is as Figure 9 shown. When preparing the second LED unit layer 30, a plurality of second conductive reflective cups 32 are formed. The plurality of second conductive reflective cups 32 correspond one-to-one with the plurality of second LED units 31 and are correspondingly electrically connected to the first doped semiconductor layers of the plurality of second LED units 31.

[0101] S195. Form a planarizing layer, and the planarizing layer covers the passivation layer and the plurality of conductive reflective cups.

[0102] Covering the passivation layer and the plurality of conductive reflective cups with the planarizing layer prepares for fusion bonding. Specifically, a material (such as silicon dioxide) can be deposited on the surface of the side of the passivation layer facing away from the substrate and the surface of the side of the conductive reflective cup facing away from the substrate to form a planarizing material layer. Then, part of the planarizing material layer is removed by chemical mechanical polishing (CMP) to form a planarizing layer, which facilitates fusion bonding processing and makes there be a gap between the surface of the side of the planarizing layer facing away from the substrate and the conductive reflective cup.

[0103] A specific example is as Figure 6 shown. When preparing the first LED unit layer 20, a first planarizing layer 23 is formed. The first planarizing layer 23 covers the first passivation layer 24 and the plurality of first conductive reflective cups 22. There is a gap between the surface of the side of the first planarizing layer 23 facing away from the first substrate 26 and the first conductive reflective cups 22, so that after the first planarizing layer 23 is fusion-bonded to the substrate 10, a gap is formed between the first conductive reflective cups 22 and the substrate 10.

[0104] Another specific example is as Figure 10As shown, when preparing the second LED unit layer 30, a second planarizing layer 33 is formed, and the second planarizing layer 33 covers the second passivation layer 34 and a plurality of second conductive reflective cups 32. There is a gap between the surface of the second planarizing layer 33 on the side facing away from the second substrate 36 and the second conductive reflective cups 32, so that after the second planarizing layer 33 is melt-bonded to the first planarizing layer 50, a gap is formed between the second conductive reflective cups 32 and the first planarizing layer 50.

[0105] Combined with Figure 11 and Figure 12 As shown, in some embodiments, at least two LED unit layers include a first LED unit layer 20 and a second LED unit layer 30. The step of stacking at least two LED unit layers above the substrate 10 includes: melt-bonding the first LED unit layer 20 above the substrate 10, and forming a gap between the LED units of the first LED unit layer 20 and the substrate 10. Remove the substrate and part of the LED epitaxial layer of the first LED unit layer 20 to expose the upper surface of the corresponding passivation layer and the upper surface of the LED units.

[0106] Specifically, by melt-bonding the first planarizing layer 23 to the substrate 10, the first LED unit layer 20 is melt-bonded above the substrate 10, and a gap is formed between the LED units of the first LED unit layer 20 and the substrate 10, simplifying the processing process and achieving a reliable connection between the first LED unit layer 20 and the substrate 10.

[0107] In this embodiment, the first substrate 26 and part of the first LED epitaxial layer 25 are removed to expose the upper surface of the first passivation layer 24 and the upper surface of the first LED units 21. By using the first passivation layer 24 as the processing position reference, the processing difficulty is reduced, the device yield is improved, and preparations are made for forming the transparent conductive layer 70. Specifically, the first substrate 26 and part of the first LED epitaxial layer 25 can be removed by chemical mechanical polishing (CMP).

[0108] Combined with Figure 20 As shown, in some embodiments, a method for preparing a Micro-LED display chip is provided, including the following steps: S201. Provide a substrate, and the substrate includes a plurality of first contacts.

[0109] S202. Prepare an LED unit layer, the LED unit layer includes a plurality of LED units arranged at intervals and a plurality of conductive reflective cups corresponding to the plurality of LED units one by one. The LED units include a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked, and the conductive reflective cups are electrically connected to the first doped semiconductor layer of the corresponding LED units. The conductive reflective cups include protruding portions extending to the outside of the sides of the corresponding LED units.

[0110] S203. Bond the first LED unit layer to the upper side of the substrate by thermal fusion, and form a gap between the LED units of the first LED unit layer and the substrate.

[0111] S204. Remove the substrate and part of the LED epitaxial layer of the first LED unit layer, exposing the upper surface of the corresponding passivation layer and the upper surface of the LED units.

[0112] S205. Form a transparent conductive layer that covers at least the upper surface of each LED unit of the first LED unit layer and is electrically connected to the second doped semiconductor layer of the corresponding each LED unit; the transparent conductive layer also covers the upper surface of at least part of the passivation layer of the first LED unit layer to form an extension area.

[0113] Combined Figure 13 As shown, the transparent conductive layer 70 covers at least the upper surface of each first LED unit 21 and is electrically connected to the second doped semiconductor layer of the corresponding each first LED unit 21, preparing for electrically connecting the second doped semiconductor layer of each first LED unit 21 to the common conductive column 80.

[0114] The transparent conductive layer 70 also covers the upper surface of at least part of the first passivation layer 24 to form an extension area 71. Through the extension area 71, the second doped semiconductor layer of the first LED unit 21 can be smoothly connected to the common conductive column 80, reducing the processing difficulty and improving the yield.

[0115] Specifically, a material (such as indium tin oxide) can be deposited on the upper surfaces of the first passivation layer 24 and the first LED unit 21 to form a conductive material layer, and the conductive material layer is electrically connected to the second doped semiconductor layer of the corresponding first LED unit 21. The conductive material layer can be processed by a photolithography patterning process to form the transparent conductive layer 70.

[0116] S206. Form a first planarization layer that covers the first LED unit layer and the transparent conductive layer formed on the first LED unit layer.

[0117] Combined Figure 14 and Figure 15 As shown, the first LED unit layer 20 and the transparent conductive layer 70 formed on the first LED unit layer 20 are covered by the first planarization layer 50, protecting the LED units of the first LED unit layer 20 and preparing for thermal fusion bonding with the second LED unit layer 30.

[0118] In some embodiments, combined Figure 14 and Figure 15As shown, the steps of forming the first planarization layer 50 include: forming a first transition layer 51, the first transition layer 51 covering the passivation layer of the first LED unit layer 20 and the transparent conductive layer 70 formed on the first LED unit layer 20. Etching the first transition layer 51 and the first LED unit layer 20 to form a plurality of first through-holes 27 exposing a plurality of first contacts 11, and a part of the first through-holes 27 penetrate the protruding part of the conductive reflective cup of the first LED unit layer 20. Forming a plurality of conductive posts 40 in the plurality of first through-holes 27, wherein a part of the conductive posts 40 are respectively electrically connected to the first contacts 11 and the protruding parts of the corresponding conductive reflective cups of the first LED unit layer 20. Removing a part of the first transition layer 51 to form the first planarization layer 50.

[0119] Specifically, as shown in Figure 14 it is possible to deposit a material (such as silicon dioxide) on the upper surface of the first passivation layer 24 and the upper surface of the transparent conductive layer 70 formed on the first LED unit layer 20 to form the first transition layer 51. The first transition layer 51 prepares a material layer for forming the first planarization layer 50.

[0120] As shown in Figure 14 by etching the first transition layer 51 and the first LED unit layer 20, first through-holes 27 are formed, and a plurality of first through-holes 27 expose a plurality of first contacts 11 one by one. Among them, a part of the first through-holes 27 among the plurality of first through-holes 27 penetrate the first protruding part 221 of the first conductive reflective cup 22 to prepare for electrically connecting the first protruding part 221 with the corresponding first contact 11. Another part of the first through-holes 27 among the plurality of first through-holes 27 do not penetrate the first protruding part 221 to prepare for electrically connecting the second protruding part 321 of the second conductive reflective cup 32 with the corresponding first contact 11.

[0121] As shown in Figure 15 a plurality of conductive posts 40 are formed in the plurality of first through-holes 27, and a part of the conductive posts 40 among the plurality of conductive posts 40 are respectively electrically connected to the first contacts 11 and the corresponding first protruding parts 221. That is to say, the conductive posts 40 penetrating the first protruding part 221 are respectively electrically connected to the first contacts 11 and the corresponding first protruding parts 221 to realize electrically connecting the first LED unit 21 with the corresponding first contacts 11. At the same time, another part of the conductive posts 40 among the plurality of conductive posts 40 are only electrically connected to the corresponding first contacts 11 to prepare for electrically connecting the second protruding part 321 with the corresponding first contacts 11.

[0122] Removing a part of the first transition layer 51 to form the first planarization layer 50. Specifically, a part of the first transition layer 51 can be removed by chemical mechanical polishing (CMP) to form the first planarization layer 50.

[0123] S207. Bond the second LED unit layer to the upper side of the first planarization layer, wherein the vertical projections of the multiple LED units and the multiple first contacts on the substrate do not overlap, and the protruding part of the conductive reflective cup is electrically connected to the corresponding first contact through a conductive post, so that each LED unit can be individually driven.

[0124] Bond Figure 16 As shown, by melting and bonding the second LED unit layer 30 to the first planarization layer 50, the processing technology is simplified, the processing difficulty is reduced, and the yield of the device is improved. Since the vertical projections of the multiple LED units and the multiple first contacts 11 on the substrate 10 do not overlap, and the protruding part of the conductive reflective cup is electrically connected to the corresponding first contact 11 through a conductive post 40, each LED unit can be individually driven, and the alignment accuracy requirement during processing can be reduced, thereby reducing the processing technology difficulty and improving the yield of the device. It can also extend the current path, disperse the thermal stress and mechanical stress, and further improve the performance of the device.

[0125] In some embodiments, the step of bonding the second LED unit layer 30 to the upper side of the first planarization layer 50 includes: melting and bonding the filling layer of the second LED unit layer 30 to the upper side of the first planarization layer 50, and forming a gap between the LED units of the second LED unit layer 30 and the first planarization layer 50. Remove the substrate and part of the LED epitaxial layer of the second LED unit layer 30, and expose the upper surface of the corresponding passivation layer and the upper surface of the LED unit.

[0126] By melting and bonding the second filling layer 33 to the upper side of the first planarization layer 50 and forming a gap between the second LED unit 31 and the first planarization layer 50, the process is simple and a reliable connection between the second LED unit layer 30 and the first planarization layer 50 is achieved.

[0127] Remove the second substrate 36 and part of the second LED epitaxial layer 35, and expose the upper surface of the corresponding second passivation layer 34 and the upper surface of the second LED unit 31. By using the second passivation layer 34 as the processing position reference, the processing difficulty is reduced, the yield of the device is improved, and it is prepared for forming the transparent conductive layer 70. Specifically, the second substrate 36 and part of the second LED epitaxial layer 35 can be removed by chemical mechanical polishing (CMP).

[0128] Bond Figure 21 As shown, in some embodiments, a method for manufacturing a Micro-LED display chip is provided, including the following steps: S2101. Provide a substrate, and the substrate includes multiple first contacts.

[0129] S2102. Prepare an LED unit layer. The LED unit layer includes a plurality of LED units arranged at intervals and a plurality of conductive reflective cups corresponding to the plurality of LED units one by one. The LED unit includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked. The conductive reflective cup is electrically connected to the first doped semiconductor layer of the corresponding LED unit. The conductive reflective cup includes an extending portion extending to the outside of the side surface of the corresponding LED unit.

[0130] S2103. Melt-bond the first LED unit layer above the substrate and form a gap between the LED units of the first LED unit layer and the substrate.

[0131] S2104. Remove the substrate and part of the LED epitaxial layer of the first LED unit layer to expose the upper surface of the corresponding passivation layer and the upper surface of the LED unit.

[0132] S2105. Form a transparent conductive layer. The transparent conductive layer covers at least the upper surface of each LED unit of the first LED unit layer and is electrically connected to the second doped semiconductor layer of the corresponding LED unit. The transparent conductive layer also covers the upper surface of at least part of the passivation layer of the first LED unit layer to form an extending area.

[0133] S2106. Form a first planarization layer. The first planarization layer covers the first LED unit layer and the transparent conductive layer formed on the first LED unit layer.

[0134] S2107. Melt-bond the second LED unit layer above the first planarization layer.

[0135] Among them, the vertical projections of the plurality of LED units and the plurality of first contacts on the substrate do not overlap. The extending portion of the conductive reflective cup is electrically connected to the corresponding first contact through a conductive column so that each LED unit can be driven independently.

[0136] S2108. Form a transparent conductive layer. The transparent conductive layer covers at least the upper surface of each LED unit of the second LED unit layer and is electrically connected to the second doped semiconductor layer of the corresponding LED unit. The transparent conductive layer also covers the upper surface of at least part of the passivation layer of the second LED unit layer to form an extending area.

[0137] Combined Figure 17 As shown, the transparent conductive layer 70 covers at least the upper surface of each second LED unit 31 and is electrically connected to the second doped semiconductor layer of the corresponding second LED unit 31, preparing for electrically connecting the second doped semiconductor layer of each second LED unit 31 to the common conductive column 80.

[0138] The transparent conductive layer 70 also covers at least a part of the upper surface of the second passivation layer 34 to form an extension region 71. Through the extension region 71, the second doped semiconductor layer of the second LED unit 31 can be smoothly connected to the common conductive column 80, reducing the processing difficulty and improving the yield.

[0139] Specifically, a material (such as indium tin oxide) can be deposited on the upper surfaces of the second passivation layer 34 and the second LED unit 31 to form a conductive material layer, and the conductive material layer is electrically connected to the second doped semiconductor layer of the corresponding second LED unit 31. The conductive material layer can be processed by a photolithography patterning process to form the transparent conductive layer 70.

[0140] S2109. Form a second transition layer, and the second transition layer covers the passivation layer of the second LED unit layer and the transparent conductive layer formed on the second LED unit layer.

[0141] Combined with Figure 17 As shown, a material (such as silicon dioxide) can be deposited on the upper surface of the second passivation layer 34 and the upper surface of the transparent conductive layer 70 formed on the second LED unit layer 30 to form the second transition layer 61. The second transition layer 61 prepares a material layer for forming the second planarization layer 60.

[0142] S2110. Remove a part of the second transition layer to form a second planarization layer.

[0143] Combined with Figure 1 and Figure 17 As shown, remove a part of the second transition layer 61 to form the second planarization layer 60, which protects the second LED unit 31 and prepares for the fusion bonding of the third LED unit layer. A part of the second transition layer 61 can be removed by chemical mechanical polishing (CMP) to form the second planarization layer 60.

[0144] Combined with Figure 22 As shown, in some embodiments, a method for manufacturing a Micro-LED display chip is provided, including the following steps: S2201. Provide a substrate, and the substrate includes a plurality of first contacts.

[0145] S2202. Prepare an LED unit layer, and the LED unit layer includes a plurality of LED units arranged at intervals and a plurality of conductive reflection cups corresponding to the plurality of LED units one by one. The LED unit includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer stacked, the conductive reflection cup is electrically connected to the first doped semiconductor layer of the corresponding LED unit, and the conductive reflection cup includes an extending portion extending to the outside of the side surface of the corresponding LED unit.

[0146] S2203. Bond the first LED unit layer to the upper side of the substrate by fusion bonding, and form a gap between the first LED unit 21 and the substrate 10.

[0147] S2204. Remove the substrate and part of the LED epitaxial layer of the first LED unit layer, exposing the upper surface of the corresponding passivation layer and the upper surface of the LED unit.

[0148] S2205. Form a transparent conductive layer, which covers at least the upper surface of each LED unit of the first LED unit layer and is electrically connected to the second doped semiconductor layer of the corresponding each LED unit; the transparent conductive layer also covers the upper surface of at least part of the passivation layer of the first LED unit layer to form an extended area.

[0149] S2206. Form a first planarization layer, which covers the first LED unit layer and the transparent conductive layer formed on the first LED unit layer.

[0150] S2207. Bond the second LED unit layer to the upper side of the first planarization layer by fusion bonding.

[0151] S2208. Form a transparent conductive layer, which covers at least the upper surface of each LED unit of the second LED unit layer and is electrically connected to the second doped semiconductor layer of the corresponding each LED unit; the transparent conductive layer also covers the upper surface of at least part of the passivation layer of the second LED unit layer to form an extended area.

[0152] S2209. Form a second transition layer, which covers the passivation layer of the second LED unit layer and the transparent conductive layer formed on the second LED unit layer.

[0153] S2210. Etch the second transition layer and the second LED unit layer to form a second through hole, which penetrates the protruding part of the conductive reflective cup of the second LED unit layer and exposes part of the conductive column formed in the first through hole; while etching the second transition layer and the second LED unit layer to form the second through hole, a third through hole is formed, which penetrates the extended area of the transparent conductive layer formed in the first LED unit layer and the extended area of the transparent conductive layer formed in the second LED unit layer.

[0154] Combine Figure 17As shown, the second through holes 37 and the third through holes 38 are formed by etching the second transition layer 61 and the second LED unit layer 30. Among them, the second through holes 37 penetrate through the second protruding portions 321 and expose the conductive posts 40 formed in the first through holes 27, preparing for the electrical connection between the second protruding portions 321 and the conductive posts 40 formed in part of the first through holes 27. The third through holes 38 penetrate through the extension region 71 of the transparent conductive layer 70 above the first LED unit 21 and the extension region 71 of the transparent conductive layer 70 above the second LED unit 31, preparing for the electrical connection between the transparent conductive layer 70 above the first LED unit 21 and the transparent conductive layer 70 above the second LED unit 31.

[0155] S2211. Fill the second through holes, form conductive posts in the second through holes, and the conductive posts formed in the second through holes are electrically connected to the corresponding conductive posts formed in the first through holes, which is used to electrically connect the protruding portions of the conductive reflecting cups of the second LED unit layer and the corresponding first contacts; form common conductive posts in the third through holes, where the common conductive posts are electrically connected to the extension region of the transparent conductive layer formed in the first LED unit layer and the extension region of the transparent conductive layer formed in the second LED unit layer respectively.

[0156] Combined with Figure 1 As shown, conductive posts 40 are formed in the second through holes 37, and the conductive posts 40 are electrically connected to the conductive posts 40 corresponding to the first through holes 27, so that the second protruding portions 321 are electrically connected to the corresponding first contacts 11, and further the first doped semiconductor layer of the second LED unit 31 is electrically connected to the corresponding first contacts 11.

[0157] Combined with Figure 1 As shown, common conductive posts 80 are formed in the third through holes 38, and the common conductive posts 80 are electrically connected to the transparent conductive layer 70 above the first LED unit 21 and the transparent conductive layer 70 above the second LED unit 31 respectively, realizing the common electrical connection of the second doped semiconductor layer of the first LED unit 21 and the second doped semiconductor layer of the second LED unit 31 to the common conductive posts 80, which helps to commonly electrically connect the second doped semiconductor layer of the first LED unit 21 and the second doped semiconductor layer of the second LED unit 31 to the second contacts, realizing that the first LED unit 21 and the second LED unit 31 can be independently driven.

[0158] S2212. Combined with Figure 1 and Figure 17 As shown, part of the second transition layer is removed to form a second planarization layer.

[0159] In this embodiment, the vertical projections of the multiple LED units and the multiple first contacts 11 on the substrate 10 do not overlap, and the protruding part of the conductive reflective cup is electrically connected to the corresponding first contact 11 through the conductive column 40, so that each LED unit can be independently driven.

[0160] It should be noted that the steps involved in the preparation method of the embodiments of the present disclosure are not limited to the order of actual operation execution. For example, some steps can be executed substantially in parallel. For another example, some steps described later can be executed in advance.

[0161] The embodiments of the present disclosure also provide a display device. The display device includes the Micro-LED display chip 1 as in any previous embodiment. Therefore, the display device has the beneficial effects of the Micro-LED display chip 1 as in any previous embodiment, which will not be elaborated here.

[0162] It should be noted that the Micro-LED display chip 1 or the display device can be applied to devices such as augmented reality (AR) display devices, virtual reality (VR) display devices, near-eye display (NED) devices, and head-up display (HUD) devices.

[0163] The above are only the preferred embodiments of the present application, and are not intended to limit the present application. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present application shall be included in the protection scope of the present application. The above is only the preferred implementation manner of the present application. It should be pointed out that for those of ordinary skill in the art, without departing from the technical principle of the present application, several improvements and modifications can still be made, and these improvements and modifications should also be regarded as the protection scope of the present application.

Claims

1. A Micro-LED display chip, characterized in that: include: a substrate including a plurality of first contacts; At least two LED unit layers are stacked on the substrate, each of the LED unit layers comprises a plurality of LED units arranged at intervals and a plurality of conductive reflective cups corresponding to the plurality of LED units one by one, the vertical projections of the plurality of LED units and the plurality of first contacts on the substrate do not overlap, the LED unit comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer stacked, the conductive reflective cup is electrically connected to the first doped semiconductor layer of the corresponding LED unit, and the conductive reflective cup comprises a protruding portion extending to the outside of the side surface of the corresponding LED unit; The conductive column is used to electrically connect the protruding portion and the corresponding first contact point, so that each of the LED units can be driven individually.

2. The display chip according to claim 1, characterized in that: At least two layers of LED units include: The first LED unit layer includes a plurality of first LED units arranged at intervals and a first filling layer located between adjacent first LED units, wherein the first filling layer is melt-bonded above the substrate and forms an interval between the first LED units and the substrate; The second LED unit layer is arranged above the first LED unit layer, and includes a plurality of second LED units arranged at intervals.

3. The display chip according to claim 2, characterized in that: Also includes: A first planarization layer formed above the first LED unit layer; The second LED unit layer further includes a second filling layer located between adjacent second LED units. The second filling layer is melt-bonded on the first planarization layer and forms a gap between the second LED units and the first planarization layer.

4. The display chip according to claim 2, characterized in that: Also includes: A second planarization layer, formed above the second LED unit layer; A third LED unit layer, comprising a plurality of third LED units arranged at intervals and a third filling layer located between adjacent third LED units, wherein the third filling layer is melt-bonded on the second planarization layer to form an interval between the third LED units and the second planarization layer; At least one of the first LED units, at least one of the adjacent second LED units, and at least one of the adjacent third LED units form a full-color pixel.

5. The display chip according to claim 1, characterized in that: Vertical projections of the plurality of LED units located in different LED unit layers on the substrate do not overlap.

6. The display chip according to claim 1, characterized in that: The conductive reflective cup is disposed around the side and / or bottom of the corresponding LED unit.

7. The display chip according to claim 1, characterized in that: Also includes: A transparent conductive layer, disposed on the upper surface of each LED unit and electrically connected to the second doped semiconductor layer of the LED unit, wherein the transparent conductive layer includes an extended area located on the upper side of the LED unit; The common conductive column is electrically connected to the adjacent multiple extension regions, and the multiple extension regions are located in different LED unit layers, so that the common conductive column is electrically connected to the second doped semiconductor layers of the adjacent multiple LED units.

8. The display chip according to claim 1, characterized in that: Each layer of LED units further comprises: The passivation layer is disposed between the LED unit and the corresponding conductive reflector cup, and the passivation layer at least covers the side surface of the LED unit and extends to the outside of the LED unit, so that the upper surface of the passivation layer is flush with the upper surface of the LED unit.

9. A method for preparing a Micro-LED display chip, characterized in that: The steps include: providing a substrate, the substrate comprising a plurality of first contacts; Prepare an LED unit layer, the LED unit layer comprising a plurality of LED units arranged at intervals and a plurality of conductive reflective cups corresponding to the plurality of LED units one by one, the LED unit comprising a first doped semiconductor layer, an active layer and a second doped semiconductor layer arranged in a stacked manner, the conductive reflective cup being electrically connected to the first doped semiconductor layer of the corresponding LED unit, and the conductive reflective cup comprising a protruding portion extending to the outside of a side surface of the corresponding LED unit; At least two layers of the LED units are stacked on top of the substrate, wherein vertical projections of the plurality of LED units and the plurality of the first contacts on the substrate do not overlap, and the protruding portion of the conductive reflective cup is electrically connected to the corresponding first contact through a conductive column, so that each of the LED units can be driven individually.

10. The preparation method according to claim 9, characterized in that: The steps of preparing the LED unit layer include: Providing a substrate, wherein one side of the substrate is provided with an LED epitaxial layer; Etching a side of the LED epitaxial layer away from the substrate to form a plurality of LED units; forming a passivation layer, wherein the passivation layer at least covers the side surfaces of the LED units and the LED epitaxial layers between adjacent LED units; forming a plurality of the conductive reflective cups, wherein the plurality of the conductive reflective cups correspond to the plurality of the LED units one by one and are electrically connected to the first doped semiconductor layers of the plurality of the LED units; A filling layer is formed, wherein the filling layer covers the passivation layer and the plurality of conductive reflective cups.

11. The preparation method according to claim 10, characterized in that: The at least two LED unit layers include a first LED unit layer and a second LED unit layer, and the step of stacking the at least two LED unit layers on the substrate includes: Melt-bond the first LED unit layer on top of the substrate, and form a gap between the LED units of the first LED unit layer and the substrate; The substrate and part of the LED epitaxial layer of the first LED unit layer are removed to expose the upper surface of the corresponding passivation layer and the upper surface of the LED unit.

12. The preparation method according to claim 11, characterized in that: The step of stacking at least two layers of the LED units on the substrate further includes: Forming a transparent conductive layer, the transparent conductive layer at least covers the upper surface of each LED unit of the first LED unit layer and is electrically connected to the second doped semiconductor layer of each corresponding LED unit; the transparent conductive layer also covers the upper surface of at least part of the passivation layer of the first LED unit layer to form an extended area; forming a first planarization layer, wherein the first planarization layer covers the first LED unit layer and the transparent conductive layer formed on the first LED unit layer; The second LED unit layer is melt-bonded on top of the first planarization layer.

13. The preparation method according to claim 12, characterized in that: The step of forming a first planarization layer comprises: forming a first transition layer, wherein the first transition layer covers the passivation layer of the first LED unit layer and the transparent conductive layer formed on the first LED unit layer; Etching the first transition layer and the first LED unit layer to form a plurality of first through holes exposing a plurality of the first contacts, wherein some of the first through holes penetrate the extended portion of the conductive reflector cup of the first LED unit layer; forming a plurality of conductive columns in the plurality of the first through holes, wherein some of the conductive columns are electrically connected to the first contacts and the corresponding extended portions of the conductive reflective cups of the first LED unit layers respectively; A portion of the first transition layer is removed to form a first planarization layer.

14. The preparation method according to claim 13, characterized in that: The step of melt-bonding the second LED unit layer on top of the first planarization layer comprises: Melting and bonding the filling layer of the second LED unit layer on the first planarization layer, and forming a gap between the LED units of the second LED unit layer and the first planarization layer; The substrate and part of the LED epitaxial layer of the second LED unit layer are removed to expose the upper surface of the corresponding passivation layer and the upper surface of the LED unit.

15. The preparation method according to claim 14, characterized in that: After the step of melt-bonding the second LED unit layer on top of the first planarization layer, the preparation method further comprises: forming a transparent conductive layer, the transparent conductive layer at least covering the upper surface of each LED unit of the second LED unit layer and being electrically connected to the second doped semiconductor layer of each corresponding LED unit; the transparent conductive layer also covers the upper surface of at least part of the passivation layer of the second LED unit layer to form an extended region; forming a second transition layer, wherein the second transition layer covers the passivation layer of the second LED unit layer and the transparent conductive layer formed on the second LED unit layer; A portion of the second transition layer is removed to form a second planarization layer.

16. The preparation method according to claim 15, characterized in that: Before the step of removing part of the second transition layer, the preparation method further comprises: Etching the second transition layer and the second LED unit layer to form a second through hole, wherein the second through hole penetrates the extended portion of the conductive reflector cup of the second LED unit layer and exposes a portion of the conductive column formed in the first through hole; The second through hole is filled to form a conductive column in the second through hole, and the conductive column formed in the second through hole is electrically connected to the corresponding conductive column formed in the first through hole, so as to electrically connect the extended portion of the conductive reflector cup of the second LED unit layer and the corresponding first contact.

17. The preparation method according to claim 16, characterized in that: The second transition layer and the second LED unit layer are etched to form a third through hole while the second through hole is formed, wherein the third through hole penetrates an extended region of the transparent conductive layer formed on the first LED unit layer and an extended region of the transparent conductive layer formed on the second LED unit layer; A common conductive column is formed in the third through hole, wherein the common conductive column is electrically connected to an extended region of the transparent conductive layer formed on the first LED unit layer and an extended region of the transparent conductive layer formed on the second LED unit layer, respectively.

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