LED display driving control method and system

Abstract

The invention provides an LED display drive control method and system. The LED display drive control method provided by the invention comprises the following steps: calculating time configuration of a plurality of stages of a scanning display period of each drive port according to an external control signal, and dividing one scanning display period into a high-resistance stage, a first discharge stage, a delay stage, a row scanning enabling stage, a drive lighting stage and a second discharge stage; and then the driving modes of the switching ports are configured according to the corresponding time, and the display effect is improved through different driving modes.

Description

Technical Field

[0001] The present invention relates to the technical field of LED display control, and particularly relates to an LED display driving control method and system. Background Art

[0002] Dot matrix display is a technology that displays images or texts through units such as LEDs and LCDs arranged on a plane. The dot matrix is composed of many small display units (pixels), and these pixels are arranged in a regular grid and can independently control the brightness or color of each pixel to form images or texts. Digital tube display is a technology that uses seven-segment digital tubes or other multi-segment display devices to display numbers, letters, and some special symbols. Digital tubes usually consist of seven independent LED segments, representing the numbers 0-9 in decimal digits as well as some letters and symbols. By controlling the on / off states of these LED segments, the required numbers or characters can be displayed.

[0003] For dot matrix display and digital tube display, LEDs are currently commonly used as display elements. With the increasingly widespread application of dot matrix display and digital tube display, gradually people have shifted from the need to drive more LED points to seeking better LED display effects. However, most current LED display drivers can only configure display grayscale and line scan frequency and cannot optimize and adjust the display effect.

[0004] Based on this, a new solution is needed. Summary of the Invention

[0005] The purpose of the present invention is to provide an LED display driving control method and system to achieve optimization and adjustment of the display effect without affecting the display state.

[0006] An embodiment of the present invention provides an LED display driving control method, including the following steps:

[0007] Receiving an externally input control signal;

[0008] According to the control signal, calculating the time configuration of multiple stages of the scanning display cycle of each driving port; and

[0009] Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display cycle.

[0010] In the LED display driving control method provided by the present invention, the multiple stages of the scanning display cycle include multiple ones of a high-impedance stage, a first discharge stage, a delay stage, a line scan enable stage, a driving lighting stage, and a second discharge stage.

[0011] In the LED display driving and controlling method provided by the present invention, when a time-division multiplexing driving scheme is adopted at the driving ports, including n driving ports, calculating the time configuration of multiple stages of the scanning display period of each driving port according to the control signal includes:

[0012] In the i-th line scanning period, the i-th driving port sequentially experiences a high-impedance stage, a line scanning enabling stage, a high-impedance stage, and a second discharging stage, where the duration of the high-impedance stage is t1, the duration of the line scanning enabling stage is t4, and the duration of the second discharging stage is t5.

[0013] When the i-th driving port is in the high-impedance stage and the second discharging stage, the remaining driving ports are respectively in the high-impedance stage and the second discharging stage.

[0014] When the i-th driving port is in the line scanning enabling stage, when j < i, the j-th driving port sequentially experiences a first discharging stage, (j - 1) delay stages, a driving lighting stage, (n - j - 1) delay stages, and a first discharging stage; when i < j, the j-th driving port sequentially experiences a first discharging stage, (j - 2) delay stages, a driving lighting stage, (n - j) delay stages, and a first discharging stage, where the duration of the first discharging stage is t2, the duration of the delay stage is t3, the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

[0015] In the LED display driving and controlling method provided by the present invention, the driving module of each driving port includes a PMOS transistor, an NMOS transistor, a first inverter, and a second inverter. The source of the PMOS transistor is connected to the power supply, the source of the NMOS transistor is connected to the ground, the drain of the PMOS transistor and the drain of the MOS transistor are commonly connected, the gate of the PMOS transistor is connected to the first inverter, the gate of the NMOS transistor is connected to the second inverter. Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display period includes:

[0016] In the high-impedance stage, the PMOS transistors and NMOS transistors of all driving ports are turned off. In the second discharging stage, the PMOS transistors of all driving ports are turned off and the NMOS transistors are turned on.

[0017] When the i-th driving port is in the line scanning enabling stage, the PMOS transistor of the i-th driving port is turned off and the NMOS transistor is turned on. When in the first discharging stage, the PMOS transistor and the NMOS transistor of the corresponding driving port are both turned off. When in the driving lighting stage, the PMOS transistor of the corresponding driving port is turned on and the NMOS transistor is turned off. When in the delay stage, the PMOS transistor and the NMOS transistor of the corresponding driving port are both turned off.

[0018] In the LED display driving and controlling method provided by the present invention, when a segment LED driving scheme or an external MOS type driving scheme is adopted at the driving port, the driving port includes x segment selection ports and y digit selection ports. Calculating the time configuration of multiple stages of the scanning display period for each driving port according to the control signal includes:

[0019] In the i-th row scanning period, the i-th segment selection port is valid, and the other segment selection ports are invalid. And the i-th segment selection port sequentially experiences a high impedance stage and a row scanning enabling stage, where the duration of the high impedance stage is t1, and the duration of the row scanning enabling stage is t4.

[0020] When the i-th segment selection port is in the high impedance stage, all digit selection ports are respectively in the high impedance stage.

[0021] When the i-th segment selection port is in the row scanning enabling stage, the j-th digit selection port sequentially experiences a first discharge stage, (j - 1) delay stages, a driving lighting stage, (y - j - 1) delay stages, and a first discharge stage, where the duration of the first discharge stage is t2, the duration of the delay stage is t3, and the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

[0022] In the LED display driving and controlling method provided by the present invention, each segment selection port includes a third inverter and an NMOS transistor, and each digit selection port includes a fourth inverter and a PMOS transistor. Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display period includes:

[0023] In the high impedance stage, the NMOS transistors of each segment selection port and the PMOS transistors of each digit selection port are all turned off.

[0024] When the i-th segment selection port is in the row scanning enabling stage, the NMOS transistor of the i-th segment selection port is turned on, and the NMOS transistors of the other segment selection ports are turned off. When in the first discharge stage, the PMOS transistors of the corresponding digit selection ports are all turned off. When in the driving lighting stage, the PMOS transistors of the corresponding digit selection ports are all turned on. When in the delay stage, the PMOS transistors of the corresponding digit selection ports are all turned off.

[0025] In the LED display driving and controlling method provided by the present invention, in the step of calculating the time configuration of multiple stages of the scanning display period for each driving port according to the control signal, the number of row scans is configurable within the scanning display period.

[0026] In the LED display driving and controlling method provided by the present invention, in the step of calculating the time configuration of multiple stages of the scanning display period for each driving port, within one row scanning period, a delay stage is set for every m driving ports at intervals.

[0027] According to another aspect of the present invention, there is also provided an LED display driving and control system, which adopts the LED display driving and control method as described above, and includes:

[0028] An external communication interface for receiving a control signal input externally;

[0029] A time configuration module for calculating the time configuration of multiple stages of the scan display period of each driving port according to the control signal; and

[0030] A mode switching module for controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scan display period.

[0031] The present invention also provides an LED display system, and the LED display system includes the LED display driving and control system as described above.

[0032] Implementing the embodiments of the present invention has the following beneficial effects: The LED display driving and control method provided by the present invention calculates the time configuration of multiple stages of the scan display period of each driving port according to a control signal from the outside, and divides a scan display period into a high-impedance stage, a first discharge stage, a delay stage, a line scan enable stage, a driving lighting stage, and a second discharge stage; then switches the driving mode of the port according to the corresponding time configuration, and improves the display effect through different driving modes. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention, and for those of ordinary skill in the art, other drawings can be obtained according to these drawings without creative efforts.

[0034] Figure 1 Shown is a schematic diagram of an application scenario of an LED display driving and control system provided by an embodiment of the present invention;

[0035] Figure 2 Shown is a schematic diagram of the principle of an LED display system adopting a time-division multiplexing driving scheme;

[0036] Figure 3 Shown is Figure 2 A schematic structural diagram of a driving module of a driving port of the LED display system shown;

[0037] Figure 4 Is for Figure 2 An overall scan diagram of display driving and control adopting a time-division multiplexing driving scheme shown;

[0038] Figure 5 The figure shows a time configuration diagram of multiple stages within a scanning display cycle with three driving ports as an example;

[0039] Figure 6 The figure shows a time configuration diagram with the number of line scans configured as 1;

[0040] Figure 7 The figure shows a time configuration diagram with a delay stage set for every n driving ports;

[0041] Figure 8 The figure shows a schematic diagram of an LED display system using a segment - type LED driving scheme;

[0042] Figure 9 It is about Figure 8 The overall scanning diagram of display driving control using the segment - type LED driving scheme shown;

[0043] Figure 10 The figure shows a time configuration diagram of multiple stages within a scanning display cycle with one segment - selection port and two digit - selection ports as an example. Specific Embodiments

[0044] To facilitate the understanding of the present invention, the present invention will be described more comprehensively below with reference to the relevant drawings. Typical embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present invention more thorough and comprehensive.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present invention belongs. The terms used in the description of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0046] The general idea of the present invention is: aiming at the problem in the prior art that LED display driving can only configure display gray level and line scanning frequency and cannot optimize and adjust the display effect, a method for LED display driving control is provided. Calculate the time configuration of multiple stages of the scanning display cycle for each driving port according to the control signal from the outside. Divide a scanning display cycle into a high - impedance stage, a first discharge stage, a delay stage, a line - scan enable stage, a driving lighting stage, and a second discharge stage; then switch the driving mode of the port according to the corresponding time configuration to improve the display effect through different driving modes.

[0047] To better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings of the specification and specific embodiments. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solution of the present application, rather than limitations on the technical solution of the present application. Without conflict, the technical features in the embodiments of the present invention and the embodiments can be combined with each other.

[0048] Figure 1 The figure shows a schematic diagram of an application scenario of an LED display driving control system provided by an embodiment of the present invention. As Figure 1 shown, the LED display driving control system 10 provided by the present invention is connected to the controller 20 and the LED load 30. The controller 20 transmits a control signal to the LED display driving control system 10 through a communication protocol, where the communication protocol includes but is not limited to the IIC protocol, the SPI protocol, the return-to-zero code protocol, and the VDD carrier protocol; then the LED display driving control system 10 configures the scanning display cycle according to the control signal, and then controls the display of the LED load 30 by switching the mode of the control driving port. Among them, the LED load 30 includes but is not limited to a Micro LED display screen or a mini LED display screen; the driving scheme of the LED display driving control system 10 for driving the LED load 30 includes a time-division multiplexing driving scheme, a segmental LED driving scheme, and an external MOS type driving scheme.

[0049] Specifically, in an embodiment of the present invention, the LED display driving control system 20 includes: an external communication interface for receiving an externally input control signal; a time configuration module for calculating the time configuration of multiple stages of the scanning display cycle of each driving port according to the control signal; and a mode switching module for controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display cycle.

[0050] Figure 2 The figure shows a schematic diagram of the principle of an LED display system adopting a time-division multiplexing driving scheme, Figure 2 as shown, it includes 9 driving ports, each driving port is connected to the cathodes of all the LED lights in the corresponding row, and between every two interfaces, there are 2 anti-parallel connected LED lights, for example, the anode of LED11 is connected to the cathode of LED21, and the cathode of LED11 is connected to the anode of LED21. Those skilled in the art can understand that it can also include other numbers of driving ports, and the connection method of the right LED array can also be other connection methods, and the present invention is not limited thereto. Figure 3 The figure shows Figure 2 a schematic diagram of the structure of the driving module of the driving port of the LED display system shown in the figure, as Figure 3As shown, each driving module includes a PMOS transistor, an NMOS transistor, a first inverter 110, and a second inverter 120. The source of the PMOS transistor is connected to the power supply, the source of the NMOS transistor is connected to the ground. The drains of the PMOS transistor and the MOS transistor are commonly connected and used as the output signal of the driving port. The gate of the PMOS transistor is connected to the first inverter, and the gate of the NMOS transistor is connected to the second inverter.

[0051] Figure 4 is for Figure 2 the overall scan diagram of the display driving control using the time-division multiplexing driving scheme as shown; Figure 5 As shown, it is a time configuration diagram showing multiple stages within a scan display cycle with three driving ports as an example. DA1_1 and DA1_2 are Figure 2 the control signals of the DA1 port as shown, DA2_1 and DA2_2 are Figure 2 the control signals of the DA2 port as shown, DA3_1 and DA3_2 are Figure 2 the control signals of the DA3 port as shown. When DA1_1 is at a high level, Figure 3 the PMOS shown is turned on. When DA1_2 is at a low level, Figure 3 the NMOS shown is turned on. As Figures 2 to 5 shown, the LED display driving control method provided by the present invention includes the following steps:

[0052] Step S10: Receive an externally input control signal.

[0053] Step S20: Calculate the time configuration of multiple stages of the scan display cycle for each driving port according to the control signal.

[0054] Step S30: Control each driving port to perform mode switching according to the time configuration of multiple stages of the scan display cycle.

[0055] Specifically, in an embodiment of the present invention, the number of driving ports for line scanning is configurable. For example, for a system with n driving ports, in the embodiment as Figure 5 shown, within the first scan display cycle, the first driving port performs line scanning. Within the nth scan display cycle, the nth driving port performs line scanning. That is, in the example as Figure 5 shown, the number of driving ports for line scanning is configured as n; while in the embodiment as Figure 6 shown, within the first scan display cycle, the first driving port performs line scanning. Within the nth scan display cycle, it is still the first driving port that performs line scanning. That is, in Figure 6In the example shown, the number of driving ports for line scanning is configured as 1. Those skilled in the art can understand that in other examples, it can also be that in the first scanning and display cycle, the first driving port performs line scanning, in the second scanning and display cycle, it is still the second driving port that performs line scanning, in the third scanning and display cycle, the first driving port performs line scanning, in the fourth scanning and display cycle, it is still the second driving port that performs line scanning, and so on. In this example, the number of driving ports for line scanning is configured as 2.

[0056] Specifically, in an embodiment of the present invention, within one line scanning cycle, after the high-impedance stage, a delay stage is set for every m driving ports. That is, for a system with n driving ports, the n driving ports can be divided into n / m groups. After the high-impedance stage, the first group of driving ports does not have a delay stage, the second group of driving ports has one delay stage, the third group of driving ports has two delay stages, and so on. For example, in Figure 7 the example shown, taking 3 driving ports as a group, within one line scanning cycle, after the high-impedance stage, driving ports 1 - 3 have no delay, and driving ports 4 - 6 have one delay; while for Figure 5 the example shown, it is the case where m = n.

[0057] Specifically, in an embodiment of the present invention, as Figure 5 shown, one scanning and display cycle includes a high-impedance stage with a duration of t1, a first discharge stage with a duration of t2, a delay stage with a duration of t3, a line scanning enable stage with a duration of t4, a driving light-on stage with a duration of t6, and a second discharge stage with a duration of t5. Within the same scanning and display cycle, only one driving port is in the line scanning enable stage, that is, starting from the first scanning and display cycle, driving ports DA1, DA2,..., DAn enter the line scanning enable stage in sequence, and the corresponding LED lights can be driven to light up during the line scanning enable stage. For one display scanning cycle:

[0058] At the starting stage of one scanning and display cycle, all driving ports (such as Figure 5 the driving ports DA1, DA2, DA3 shown) are in the high-impedance stage. The high-impedance stage is an intermediate buffer state. During the high-impedance stage, the PMOS and NMOS transistors of all driving ports are turned off to prevent the upper and lower transistors of the driving module from conducting when the level jumps;

[0059] Subsequently, one driving port (such as Figure 5 the driving port DA1 shown) enters the line scanning enable stage, and the remaining driving ports (such as Figure 5The driving ports DA2 and DA3 as shown enter the first discharge stage. The NMOS transistors of the driving modules of the driving ports entering the line scan enable stage are turned on, while the PMOS and NMOS transistors of the remaining driving ports remain off at this time. However, since the NMOS transistors of the driving ports entering the line scan enable stage are already on, these driving ports are discharged through the driving ports entering the line scan enable stage. Thus, it is possible to prevent the driving high level from arriving earlier than the line scan signal and the charge from flowing irregularly;

[0060] Then, the remaining driving ports other than the driving ports sequentially enter the driving light-on stage after several delay stages. During the delay stage, the PMOS and NMOS transistors of the corresponding driving ports are both off. Thus, it is possible to prevent the high levels of the driving ports from being pulled up simultaneously and the VDD current from suddenly increasing; during the driving light-on stage, the PMOS transistors of the corresponding driving ports are turned on. Therefore, together with the previous driving port, the diodes connected between the two are driven to light up. For example, Figure 5 As shown, when DA1 is in the line scan enable stage, after DA2 enters the driving light-on stage, D1-1 connected between DA1 and DA2 is lit. DA3 will go through a delay stage and then enter the driving light-on stage, and D1-2 connected between DA1 and DA3 is lit, and so on. When DA1 is in the line scan enable stage, the lights in the first row are sequentially lit; since the duration of the driving light-on stage of each driving port is the same, the remaining driving ports other than the driving ports will sequentially enter the first discharge stage after several delay stages after the driving light-on stage. For example, as Figure 5 shown, after the first discharge stage, DA2 enters the driving light-on stage and then enters the first discharge stage after a delay stage, while DA3 enters the driving light-on stage after a delay stage and then enters the first discharge stage; another example is that in an example including 4 driving ports, when DA1 is in the line scan enable stage, after the first discharge stage, DA2 enters the driving light-on stage and then enters the first discharge stage after two delay stages, while DA3 enters the driving light-on stage after a delay stage after the first discharge stage and then enters the first discharge stage after another delay stage, and DA4 enters the driving light-on stage after two delay stages after the first discharge stage and then enters the first discharge stage; that is, when the i-th driving port is in the line scan enable stage, when j < i, the j-th driving port sequentially experiences the first discharge stage, (j - 1) delay stages, the driving light-on stage, (n - j - 1) delay stages, and the first discharge stage, and when i < j, the j-th driving port sequentially experiences the first discharge stage, (j - 2) delay stages, the driving light-on stage, (n - j) delay stages, and the first discharge stage, and t4 = 2 * t2 + t6 + (n - 2) * t3;

[0061] After the line scan enable stage, all driving ports enter the high impedance stage again for buffering; subsequently, in order to prevent incomplete discharging during the first discharging stage and ghosting, all driving ports enter the second discharging stage, where the PMOS transistors are turned off and the NMOS transistors are turned on to completely discharge the electricity in the NMOS transistors before entering the next line scan cycle.

[0062] Therefore, when the time-division multiplexing driving scheme is adopted for the driving ports, step S20 includes:

[0063] During the i-th line scan cycle, the i-th driving port sequentially experiences a high impedance stage, a line scan enable stage, a high impedance stage, and a second discharging stage, where the duration of the high impedance stage is t1, the duration of the line scan enable stage is t4, and the duration of the second discharging stage is t5.

[0064] When the i-th driving port is in the high impedance stage and the second discharging stage, the remaining driving ports are respectively in the high impedance stage and the second discharging stage.

[0065] When the i-th driving port is in the line scan enable stage, when j < i, the j-th driving port sequentially experiences a first discharging stage, (j - 1) delay stages, a driving lighting stage, (n - j - 1) delay stages, and a first discharging stage; when i < j, the j-th driving port sequentially experiences a first discharging stage, (j - 2) delay stages, a driving lighting stage, (n - j) delay stages, and a first discharging stage, where the duration of the first discharging stage is t2, the duration of the delay stage is t3, the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

[0066] Step 30 includes: during the high impedance stage, the PMOS and NMOS transistors of all driving ports are turned off; during the second discharging stage, the PMOS transistors of all driving ports are turned off and the NMOS transistors are turned on; when the i-th driving port is in the line scan enable stage, the PMOS transistor of the i-th driving port is turned off and the NMOS transistor is turned on; when in the first discharging stage, the PMOS and NMOS transistors of the corresponding driving port are both turned off; when in the driving lighting stage, the PMOS transistor of the corresponding driving port is turned on and the NMOS transistor is turned off; when in the delay stage, the PMOS and NMOS transistors of the corresponding driving port are both turned off.

[0067] Figure 8 Shown is the schematic diagram of an LED display system adopting a segmental LED driving scheme. Figure 8As shown, it includes 4 segment select ports and 8 digit select ports. Those skilled in the art can understand that it may also include other numbers of ports, and the present invention is not limited thereto. Each segment select port is controlled by an inverter and an NMOS transistor, and each digit select port is controlled by an inverter and a PMOS transistor. Those skilled in the art can understand that other ways can also be selected to control the segment select ports and digit select ports, and the present invention is not limited thereto.

[0068] Figure 9 is for Figure 8 the overall scan diagram of the display drive control using the pen segment type LED drive scheme shown; Figure 10 As shown, taking 1 segment select port and 2 digit select ports as an example, it shows the time configuration diagram of multiple stages within a scan display cycle. DIG1 is Figure 8 the control signal of the GRID1 port shown, and SEG1, SEG2 are Figure 8 the control signals of the Seg1, Seg2 ports shown. When DIG1 is at a low level, the NMOS of the segment select port is turned on, and when SEG1, SEG2 are at a high level, the PMOS of the digit select port is turned on. As Figures 8 to 10 shown, the LED display drive control method provided by the present invention includes the following steps:

[0069] Step S10: Receive an externally input control signal.

[0070] Step S20: Calculate the time configuration of multiple stages of the scan display cycle for each drive port according to the control signal.

[0071] Step S30: Control each drive port to perform mode switching according to the time configuration of multiple stages of the scan display cycle.

[0072] Specifically, in an embodiment of the present invention, as Figure 10 shown, a scan display cycle includes a high impedance stage with a duration of t1, a first discharge stage with a duration of t2, a delay stage with a duration of t3, a line scan enable stage with a duration of t4, and a drive lighting stage with a duration of t6. Within the same scan display cycle, only one segment select port is in the line scan enable stage, that is, starting from the first scan display cycle, the segment select ports DIG1, DIG2,..., DIGn sequentially enter the line scan enable stage, and the corresponding LED lights can be driven to light up during the line scan enable stage. For a display scan cycle:

[0073] At the starting stage of a scan display cycle, all segment select ports and digit select ports (such as Figure 8The segment selection ports (DIG1), and the bit selection ports (SEG1, SEG2) shown are all in the high-impedance state. The high-impedance state is an intermediate buffering state. In the high-impedance state, all PMOS transistors and NMOS transistors are turned off to facilitate the switching of the segment selection ports;

[0074] Subsequently, a segment selection port (such as Figure 10 the driving port DIG1 shown) enters the line scan enabling stage, and all bit selection ports enter the first discharge stage. The NMOS transistors of the driving module of the segment selection port that enters the line scan enabling stage are turned on. At this time, the PMOS transistors of the bit selection ports still remain turned off. However, since the NMOS transistors of the segment selection port that enters the line scan enabling stage are already turned on, these bit selection ports are discharged through the segment selection port that enters the line scan enabling stage. Thus, it is possible to prevent the bit selection signal from arriving earlier than the line scan signal and the charge from flowing irregularly;

[0075] Then, the bit selection ports sequentially pass through several delay stages and enter the driving lighting stage. During the delay stage, the PMOS transistors of the bit selection ports remain turned off. Thus, it is possible to prevent the high levels of the bit selection ports from being pulled up simultaneously and the VDD current from suddenly increasing; during the driving lighting stage, the PMOS transistors of the corresponding bit selection ports are turned on. Therefore, together with the segment selection port, the corresponding diodes are driven to light up. That is, when DIG1 is in the line scan enabling stage, after SEG1 enters the driving lighting stage, the diode connected between DIG1 and SEG1 is lit. SEG2 will go through a delay stage and then enter the driving lighting stage, and the diode connected between DIG1 and SEG2 is lit, and so on;

[0076] Since the duration of the driving lighting stage of each bit selection port is the same, after the driving lighting stage, the bit selection ports sequentially pass through several delay stages and enter the first discharge stage. For example, as Figure 10As shown, after the first discharge stage, SEG1 enters the driving and lighting stage, then after a delay stage, it enters the first discharge stage again. And SEG2 enters the driving and lighting stage after a delay stage and then enters the first discharge stage. For another example, in an example including 3 bit selection ports, after the first discharge stage, SEG1 enters the driving and lighting stage, then after two delay stages, it enters the first discharge stage again. And SEG2 enters the driving and lighting stage after a delay stage after the first discharge stage, then after another delay stage, it enters the first discharge stage again. And SEG3 enters the driving and lighting stage after two delay stages after the first discharge stage and then enters the first discharge stage. That is, when the i-th segment selection port is in the line scan enable stage, the j-th bit selection port sequentially experiences the first discharge stage, (j - 1) delay stages, the driving and lighting stage, (y - j - 1) delay stages, and the first discharge stage. Among them, the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving and lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

[0077] The control method of the external MOS type driving scheme is the same as that of the pen segment type LED driving scheme, and the present invention will not elaborate here. Therefore, for the external MOS type driving scheme and the pen segment type LED driving scheme adopted at the driving port, step S20 includes:

[0078] In the i-th line scan cycle, the i-th segment selection port is valid, and the i-th segment selection port sequentially experiences the high impedance stage and the line scan enable stage. Among them, the duration of the high impedance stage is t1, and the duration of the line scan enable stage is t4.

[0079] When the i-th segment selection port is in the high impedance stage, all bit selection ports are respectively in the high impedance stage.

[0080] When the i-th segment selection port is in the line scan enable stage, the j-th bit selection port sequentially experiences the first discharge stage, (j - 1) delay stages, the driving and lighting stage, (y - j - 1) delay stages, and the first discharge stage. Among them, the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving and lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

[0081] Step 30 includes: in the high impedance stage, the NMOS transistors of each segment selection port and the PMOS transistors of each bit selection port are all turned off; when the i-th segment selection port is in the line scan enable stage, the NMOS transistor of the i-th segment selection port is turned on, and the NMOS transistors of the remaining segment selection ports are turned off. When in the first discharge stage, the PMOS transistors of the corresponding bit selection ports are all turned off. When in the driving and lighting stage, the PMOS transistors of the corresponding bit selection ports are all turned on. When in the delay stage, the PMOS transistors of the corresponding bit selection ports are all turned off.

[0082] Although embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations fall within the scope defined by the appended claims.

Claims

1. An LED display driving and controlling method, characterized in that, It includes the following steps: Receiving a control signal input externally; Calculating the time configuration of multiple stages of the scan display period for each driving port according to the control signal; And Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scan display period.

2. The LED display driving control method according to claim 1, wherein The multiple stages of the scan display period include multiple ones among a high-impedance stage, a first discharge stage, a delay stage, a line scan enable stage, a driving lighting stage, and a second discharge stage.

3. The LED display driving control method according to claim 2, wherein When a time-division multiplexing driving scheme is adopted for the driving port, including n driving ports, calculating the time configuration of multiple stages of the scan display period for each driving port according to the control signal includes: In the i-th line scan cycle, the i-th driving port sequentially experiences a high-impedance stage, a line scan enable stage, a high-impedance stage, and a second discharge stage, where the duration of the high-impedance stage is t1, the duration of the line scan enable stage is t4, and the duration of the second discharge stage is t5. When the i-th driving port is in the high-impedance stage and the second discharge stage, the remaining driving ports are respectively in the high-impedance stage and the second discharge stage. When the i-th driving port is in the line scan enable stage, when j < i, the j-th driving port sequentially experiences a first discharge stage, (j - 1) delay stages, a driving lighting stage, (n - j - 1) delay stages, and a first discharge stage, and when i < j, the j-th driving port sequentially experiences a first discharge stage, (j - 2) delay stages, a driving lighting stage, (n - j) delay stages, and a first discharge stage, where the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

4. The LED display driving control method according to claim 3, wherein, The driving module of each driving port includes a PMOS transistor, an NMOS transistor, a first inverter, and a second inverter. The source of the PMOS transistor is connected to the power supply, the source of the NMOS transistor is connected to the ground, the drain of the PMOS transistor is commonly connected to the drain of the MOS transistor, the gate of the PMOS transistor is connected to the first inverter, and the gate of the NMOS transistor is connected to the second inverter. Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scan display period includes: In the high-impedance stage, the PMOS transistors and NMOS transistors of all driving ports are turned off, and in the second discharge stage, the PMOS transistors of all driving ports are turned off and the NMOS transistors are turned on; When the i-th driving port is in the line scan enable stage, the PMOS transistor of the i-th driving port is turned off and the NMOS transistor is turned on, when in the first discharge stage, the PMOS transistor and NMOS transistor of the corresponding driving port are both turned off, when in the driving lighting stage, the PMOS transistor of the corresponding driving port is turned on and the NMOS transistor is turned off, and when in the delay stage, the PMOS transistor and NMOS transistor of the corresponding driving port are both turned off.

5. The LED display driving control method according to claim 2, wherein When a segment LED driving scheme or an external MOS type driving scheme is adopted for the driving port, the driving port includes x segment selection ports and y digit selection ports. Calculating the time configuration of multiple stages of the scan display period for each driving port according to the control signal includes: During the i-th line scan period, the i-th segment selection port is valid, and the i-th segment selection port sequentially experiences a high impedance stage and a line scan enable stage, where the duration of the high impedance stage is t1 and the duration of the line scan enable stage is t4. When the i-th segment selection port is in the high impedance stage, all bit selection ports are respectively in the high impedance stage. When the i-th segment selection port is in the line scan enable stage, the j-th bit selection port sequentially experiences a first discharge stage, (j - 1) delay stages, a driving lighting stage, (y - j - 1) delay stages, and a first discharge stage, where the duration of the first discharge stage is t2, the duration of the delay stage is t3, the duration of the driving lighting stage is t6, and t4 = 2 * t2 + t6 + (n - 2) * t3.

6. The LED display driving control method according to claim 5, wherein Each segment selection port includes a third inverter and an NMOS transistor, and each bit selection port includes a fourth inverter and a PMOS transistor. Controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display period includes: In the high impedance stage, the NMOS transistors of each segment selection port and the PMOS transistors of each bit selection port are all turned off. When the i-th segment selection port is in the line scan enable stage, the NMOS transistor of the i-th segment selection port is turned on, and the NMOS transistors of the remaining segment selection ports are turned off. When in the first discharge stage, the PMOS transistors of the corresponding bit selection ports are all turned off. When in the driving lighting stage, the PMOS transistors of the corresponding bit selection ports are all turned on. When in the delay stage, the PMOS transistors of the corresponding bit selection ports are all turned off.

7. The LED display driving control method according to claim 2, wherein In the step of calculating the time configuration of multiple stages of the scanning display period of each driving port according to the control signal, the number of driving ports for line scan can be configured.

8. The LED display driving control method according to claim 2, wherein In the step of calculating the time configuration of multiple stages of the scanning display period of each driving port according to the control signal, within one line scan period, after the high impedance stage, a delay stage is set every m driving ports.

9. An LED display driving control system, adopting the LED display driving control method according to any one of claims 1-8, characterized in that, Including: An external communication interface for receiving an externally input control signal; A time configuration module for calculating the time configuration of multiple stages of the scanning display period of each driving port according to the control signal; And A mode switching module for controlling each driving port to perform mode switching according to the time configuration of multiple stages of the scanning display period.

10. An LED display system, characterized in that, The LED display system includes the LED display driving control system as claimed in claim 9.

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